fgpa
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A collection of debugging busses developed and presented at zipcpu.com
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Jan 18, 2024 - Verilog
Graph Processing Framework that supports || OpenMP || CAPI
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Jan 21, 2023 - SystemVerilog
It contains 10 assignments based on simulation and testing of hardware codes on BASYS board.
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Jun 15, 2022 - VHDL
Tetris in low level programming. Made for Nios II processors.
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Nov 8, 2021 - Assembly
Covers the DEEDS training material for electronic Design
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Jan 23, 2021 - VHDL
Minimal SoC design for alarm clock
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Nov 12, 2020 - C
Repository gathering basic modules for CDC purpose
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Dec 31, 2019 - SystemVerilog
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Sep 24, 2018 - Verilog
Audio Signal Processing SoC Project Website
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Apr 6, 2017 - HTML
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Feb 9, 2017 - Verilog
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