fpga-soc
Here are 35 public repositories matching this topic...
The Task Parallel System Composer (TaPaSCo)
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May 27, 2024 - Verilog
RISC-V is an open-source instruction set architecture (ISA), enabling the implementation of central processing units (CPUs) or system-on-a-chip (SoC) designs without licensing fees. This makes it highly favored among FPGA enthusiasts for softcore processor implementations.
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Apr 21, 2024 - Verilog
Up-to-date [SIGCOMM 2023] Lightning: A Reconfigurable Photonic-Electronic SmartNIC for Fast and Energy-Efficient Inference
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Mar 4, 2024 - Verilog
[SIGCOMM 2023] Lightning: A Reconfigurable Photonic-Electronic SmartNIC for Fast and Energy-Efficient Inference
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Nov 17, 2023 - Verilog
Multi-Voltage and Multi-Threshold Low Power Design Techniques for ORCA Processor Based on 32 nm Technology
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Sep 10, 2023 - Verilog
In this project, we implemented a different kind of a tic tac toe board game that is played on an FPGA board using its push buttons. We used Verilog HDL to code the project and implemented a VGA interface for visualization.
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Jul 25, 2023 - Verilog
A full hardware implementation of the AES using Verilog, supporting SPI communication between all modules.
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Jun 5, 2023 - Verilog
fpga verilog risc-v rv32i cpu
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Apr 18, 2023 - Verilog
Upgrade of SchoolMIPS single-core processor
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Mar 9, 2023 - Verilog
ECE 385 Final Project on DE-10 FPGA Board with NIOS 2 SoC: Implementing PacMan
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Dec 23, 2022 - Verilog
This is a very basic replication of the popular rhythm / platformer game Geometry Dash, implemented completely in hardware through System Verilog
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Dec 9, 2022 - Verilog
NIOS II controlled hardware ODE solver implemented on Cyclone IV FPGA
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Oct 10, 2022 - Verilog
Advanced encryption standard (AES128, AES192, AES256) Encryption and Decryption Implementation in Verilog HDL
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Jul 31, 2022 - Verilog
FPGA SOC Mario NES in SystemVerilog. Built on a DE-10 Lite FPGA, synthesized in Quartus Prime 18.1
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Dec 16, 2021 - Verilog
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