A self-hosting and educational C optimizing compiler

Simple 3-stage pipeline RISC-V processor

Trivial RISC-V Linux binary bootloader

Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice

Some materials and sample source for RV32 OS projects.

The THUAS RISC-V RV32IM Zicsr Zicntr Zihpm Zicond Zba Zbs Sdext Sdtrig microcontroller

A synthesizable RISC-V RV32IM microcontroller written in VHDL

Becoming acquainted with the RISC-V ISA by writing an emulator

RISC-V Linux Port (supporting RV32IM - CPUs without atomic extensions)