verilog-hdl
Here are 347 public repositories matching this topic...
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May 7, 2017 - Verilog
Contains CSE460 Group Project Verilog code.
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Apr 25, 2023 - Verilog
In CMPSC 331 2019, I implemented a design of 32-bit-pipelined cpu design.
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Nov 21, 2023 - Verilog
The repository contains code from a voluntary assignment in the course IDATT2104 Network Programming.
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May 20, 2024 - Verilog
Undegraduate Capstone Project - Spring'21 (VIT University).
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Aug 6, 2021 - Verilog
Digital Electronics Course Projects
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Jun 7, 2020 - Verilog
Open Source Verilog Modules
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Jan 25, 2023 - Verilog
In this project, we implemented a different kind of a tic tac toe board game that is played on an FPGA board using its push buttons. We used Verilog HDL to code the project and implemented a VGA interface for visualization.
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Jul 25, 2023 - Verilog
This repository focuses on how to design a PWM Generator with variable Duty cycle
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Nov 22, 2023 - Verilog
Some exercises on verilog.
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Dec 21, 2023 - Verilog
This repository showcases various projects developed on the DE10-Lite board (Intel MAX 10 FPGA) using Quartus Prime Lite software. The projects primarily focus on Finite State Machines (FSMs) and communication protocols, implemented in VHDL. Each project includes HDL code, testbenches, simulations, and .qsf files for pin assignments
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Sep 5, 2024 - Verilog
This repo contains implementation of digital circuits and some projects related to them in Verilog language at different abstraction levels..
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Nov 11, 2024 - Verilog
🖼✏️ My first baby steps into the world of image processing
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Feb 26, 2020 - Verilog
Implementation of IF, ID, EX, MEM, WB and two stages units used in hazard detection and the forwarding unit, thus realizing a complete RISC-V processor prototype.
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Mar 2, 2023 - Verilog
A full hardware implementation of the AES using Verilog, supporting SPI communication between all modules.
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Jun 5, 2023 - Verilog
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