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denfry edited this page Oct 13, 2026 · 1 revision

Automation Platform

Note

Design stage. This page describes planned mechanics from the design document. Not implemented yet — see Roadmap (milestone M3 for relays A1 and analog computers A2; M6 for PLC/SIS A3, CC integration A4, historian and digital twin).

In Prompt Critical, plant I&C (process control) is gameplay. The mod supplies parts: relays, operational amplifiers, I/O modules, PLC function blocks. You design the circuits, interlocks, tuning and algorithms. Protection must work independently of Lua and of PLC programs.

All of A1–A3 and the safety instrumented system (SIS) run inside the simulation (pc-sim) on the server thread, within the FAST step (0.05 s), and do not need CC: Tweaked. A4–A5 run on CC computer threads. The design budget for the reference complex (40 PLCs and 10 SIS logic solvers) is 0.30 ms per tick.

The automation ladder A0–A5

Levels unlock through crafting recipes (electronics components), not research.

Level Recipe gate Opens up Limited by Runs in
A0 Manual — Handwheels, Create levers, local instrument_* gauges (readable within 4 m), manual sampling Player must be at the equipment; no memory or protection except relief valves and scram —
A1 Relay logic relay_coil Relays, time relays, stepping switch, cam controller on a Create shaft, process switches, desk lamps and buttons as circuit elements; interlocks, sequences, on/off control Discrete logic only; every function is blocks and wires in the world; coil heat; contact wear pc-sim, per tick
A2 Analog computers vacuum_tube, later transistor Summer, integrator, differentiator, multiplier/divider/root, function generator, comparator, manual/auto station, 4–20 mA ↔ ±10 V converter; PI/PID built from blocks Integrator zero drift and re-trimming, saturation, noise; no memory or sequences pc-sim, per tick
A3 PLC and SIS printed_circuit_board + transistor (BASIC CPU), integrated_circuit (STANDARD, SIS), silicon_wafer (ADVANCED) plc_controller with I/O modules, LD/FBD/SFC/ST, IEC and function block libraries; sis_logic_solver with cause and effect matrix, SIL/PFD; fieldbus, HART Instruction budget and cycle time, program size, cabinet heat, radiation and EMI sensitivity pc-sim, scan cycle
A4 DCS / SCADA io_module, CC computers Lua controllers, pcui HMI, pcnet, telemechanics (RTU), historian, analyzers as network devices CC token limits, program errors, computer crashes CC threads
A5 Plant level simulation_workstation, historian_server MES (Create logistics by plan), APC/RTO, optimization tasks (LP gasoline blending) — CC threads

The electronics generation of a block is its execution class (electronics_tier data component): RELAY, TUBE, TRANSISTOR, IC, WAFER. It sets heat output, radiation hardness and reliability. The same block (e.g. analog_integrator) can exist in tube and transistor versions.

Why no level replaces another

Property A1 relays A2 analog A3 PLC SIS A4 Lua
Radiation hardness (D63, Gy) ≥ 10⁶ 10⁶ (tubes), 10³ (transistors) 10²–10³ commercial, 10⁴ WAFER rad-hard as A3 —
EMI near generators none high medium (digital bus has CRC) — —
Reaction delay 1 tick per relay stage 1 tick 1 scan + 1 tick 1 tick 0.4–0.6 s
Algorithm complexity low medium (continuous math) high matrix unlimited
Silent failure welded contact drift program error, STOP hidden dangerous failure (λ_DU) crashed program
Scaling cost block per function block per operation cheap expensive (SIL) cheap
Server load ≈ 0 ≈ 0 instruction budget small CC tokens

This gives the typical mature architecture, matching real practice: hardwired relay interlocks and SIS at the bottom (cannot be "programmed around"), PLCs for control and sequences, Lua for HMI, optimization and reports, A5 for planning. Analog blocks stay where electronics don't survive (reactor hall, hot cells) and as independent backup controllers.

How levels interact

flowchart TB
  subgraph L4["A5 — plant level (CC threads)"]
    MES[MES / scheduler] --- RTO[APC / RTO / LP]
  end
  subgraph L3["A4 — DCS/SCADA (CC threads)"]
    HMI[pcui HMI] --- LUA[Lua controllers]
    HIST[(historian_server)] --- RTUM[telemetry_master]
  end
  subgraph L2["A3 — PLC (pc-sim, scan)"]
    PLC[plc_controller + modules] --- BUS{{fieldbus}}
  end
  subgraph L1["A1/A2 — relays and analog (pc-sim, tick)"]
    REL[relay cabinets] --- ANA[analog blocks]
  end
  subgraph SIS["SIS (pc-sim)"]
    SLS[sis_logic_solver] --- RPS[protection_cabinet]
  end
  FIELD[(actuators and sensors, level 0)]
  RTO -->|setpoints via pcnet| LUA
  LUA -->|write pc_plc tags| PLC
  HMI -->|read| PLC
  PLC -->|wire: module output| FIELD
  REL -->|wire| FIELD
  ANA -->|4-20 mA| FIELD
  FIELD -->|4-20 mA / discrete| PLC
  FIELD -->|dedicated sensors| SLS
  SLS ==>|in series, always wins| FIELD
  PLC -.->|read| HIST
Loading
  • Top-down: setpoints only, never direct outputs. Lua writes PLC variables that have an access attribute; the PLC decides what to do with the actuator.
  • Bottom-up: unrestricted reads (subject to CC token rules).
  • The SIS takes commands from nobody. Its inputs are its own sensors and wires; its outputs are in series with all other levels. Lua can only read pc_sis.
  • One owner per actuator command input: either the network (Lua via the command queue) or a wire (an A1–A3 output). The SIS is in series and always wins.

A1 — Relay logic

Block Description Parameters
relay Control relay: coil + 2 changeover contact sets (EN 50005 terminals A1, 11-12-14, 21-22-24) GENERAL or FORCE_GUIDED
relay_latching Bistable relay (SET / RESET coils) —
time_relay Timer relay ON_DELAY / OFF_DELAY / PULSE / FLASHER; 0.1 s – 3 h; pneumatic / motor / electronic
stepping_switch Stepping switch, 25 positions × 3 wipers Jumper matrix in GUI
cam_controller Cam drum on a Create shaft, 12 contacts Cam profiles (5° steps), gear ratio
process_switch Pressure, float level, thermostat or paddle flow switch Setpoint, deadband
relay_power_supply 24 V DC control power 2 / 5 / 10 A
relay_rack Cabinet frame for 16 relays Heat, radiation shadow, blast protection

Desk elements (pushbutton, selector_switch, key_switch, indicator_lamp, alarm_horn) get a wired mode: a button is a contact between two circuits, a lamp or horn is a load. relay_controller from SCADA-and-HMI is a factory-built special case of A1.

Limits: no arithmetic or analog values beyond process-switch comparisons; at most relays.max_per_station = 256 relays. You find a failed relay yourself: the lamp on a relay shows the coil state, not the contacts.

A2 — Analog computers

Built on the operational amplifier with feedback, as in 1950s–70s electronic controllers and analog machines. Computing signals are ±10 V (one machine unit = 10 V), saturating at ±10.5 V. Converters link A2 to 4–20 mA sensors and valves.

Block Operation
analog_summer y = −Σ kᵢxᵢ, 4 inputs, kᵢ ∈ [−10, 10]
analog_integrator dy/dt = −(1/Tᵢ)Σ kᵢxᵢ, plus drift and leakage; modes IC / OPERATE / HOLD
analog_differentiator T_d·s / (1 + T_d·s/N)
analog_multiplier x₁x₂/10, 10x₁/x₂, x²/10, √(10x)
analog_function Diode function generator, 10 linear segments
analog_comparator Comparator with hysteresis, contact output
manual_station Setpoint station and manual/auto transfer with tracking
signal_converter I/V and V/I: U = 10(I − 4)/16, I = 4 + 1.6U

Each block is a 1×1 cabinet with knobs (coefficients in 0.01 steps, time constants to 3 significant digits) and an output meter. The integrator has a random-walk zero drift, so it needs periodic trimming. A PI or PID controller is assembled from blocks. Limits: no event memory or sequences; at most analog.max_blocks_per_station = 128; vacuum tubes last about analog.tube_life_hours = 5000 physics hours, and a failed tube drops the output to 0 V with BAD quality.

A3 — Programmable logic controller

A PLC is built as a rack: the plc_controller CPU block plus I/O modules placed in a horizontal row to its right. A gap in the row disconnects every module beyond it. Remote I/O goes over fieldbus.

Block Module Channels Notes
plc_controller CPU with power supply CPU card slot, memory card slot LEDs RUN / STOP / FAULT / FORCE / BUS; mode key
plc_io_di Digital input 16 Ch. 0–1 also fast pulse counting up to 1 kHz; input filter 0 / 3 / 15 ms
plc_io_do Digital output 16 Safe value OFF / ON / HOLD_LAST
plc_io_ai Analog input 8 4–20 mA, 16-bit ADC, HART, NE43 diagnostics
plc_io_ao Analog output 8 Safe value (mA or HOLD_LAST), open-load detection
plc_comm Communication module 1 fieldbus + 1 network port Modbus RTU and pcbus master/slave; pcnet gateway
remote_io_adapter Remote I/O station up to 8 modules Fieldbus slave

The CPU card sets the class:

Parameter plc_cpu_basic plc_cpu_standard plc_cpu_advanced
Gate PCB + transistor integrated circuit silicon wafer
Virtual time per IR instruction 50 µs 10 µs 2 µs
OS overhead per cycle 5 ms 2 ms 1 ms
Instruction limit per task scan 2 000 8 000 32 000
Program memory (IR instructions) 4 000 16 000 64 000
Data / retain memory 4 KB / 0.5 KB 32 KB / 4 KB 128 KB / 16 KB
Tasks 2 8 16
Fastest cyclic task 4 ticks (200 ms) 2 ticks (100 ms) 1 tick (50 ms)
Modules local / total 8 / 8 8 / 32 8 / 64
Online changes in RUN no (STOP required) yes yes
CPU redundancy no no hot standby, bumpless ≤ 1 scan
CPU heat 8 W 12 W 20 W

Scan cycle

Each scan runs inside one server tick: ① read inputs into the process image, ② execute POUs within the instruction limit, ③ write the output image to modules (applied next tick), ④ diagnostics and publishing. The virtual cycle time T_cycle = T_os + N_ops·t_op + N_io·20 µs is shown as tag plc.<label>.scan_time. Worst-case input-to-output delay is the task period + 1 tick (up to 150 ms for a 100 ms task).

All languages compile to one register-machine intermediate code, PCIL, with a worst-case execution time (WCET) estimate. If a scan exceeds its instruction budget, the CPU goes to FAULT (event pc_plc_fault, reason WATCHDOG) and all outputs take their safe values (OFF / 4 mA by default; HOLD_LAST must be chosen deliberately and is highlighted in yellow). Other fault causes are DIV_BY_ZERO, BOUNDS, STACK (depth > 16), PARITY (radiation memory upset) and POWER. Recovery is STOP → RUN only.

Languages (IEC 61131-3)

Language Notes
LD — ladder diagram NO/NC contacts, edge contacts, coils ( ), (/), (S), (R), (P), (N); function blocks in rungs with EN/ENO
FBD — function block diagram Graphical block wiring
SFC — sequential function chart Steps and transitions, for sequences and batch control
ST — structured text Expressions, IF/ELSIF/ELSE, CASE, FOR, WHILE, REPEAT, FB calls, arrays, structs; attributes like {attribute 'pc_access' := 'RW'}
C&E — cause and effect matrix Tabular; the main language of the SIS, allowed in a PLC for process interlocks (no SIL, forcing allowed)

IL (instruction list) is not supported; it was dropped from IEC 61131-3 edition 3 (2013).

Ladder example: pump P-101 start/stop with interlocks and seal-in, a discharge pressure check 10 s after start, and fault reset:

 Rung 1: start/stop pump P-101 with interlocks and seal-in
 --| P101_START |--+--|/ P101_STOP |--|/ LSL_T1 |--| PSL_SUCT_OK |--|/ P101_FAIL |------( P101_RUN )--
                   |
 --| P101_RUN   |--+
 Rung 2: check discharge pressure 10 s after start
 --| P101_RUN |--|/ PSH_DISCH |--------[ TON  T_P101 ]--| T_P101.Q |---------------------(S P101_FAIL)--
                                         IN      PT:=T#10s
 Rung 3: reset fault with the acknowledge button
 --| ACK_PB |--|/ P101_RUN |-------------------------------------------------------------(R P101_FAIL)--

Structured text example: furnace temperature cascade with feedforward and burner management permissive:

PROGRAM FURNACE_F101
VAR_INPUT
    TT_OUT  : REAL;   (* coil outlet temperature, K *)
    FT_FEED : REAL;   (* feed flow, kg/s *)
    FT_FUEL : REAL;   (* fuel gas flow, kg/s *)
    BMS_OK  : BOOL;   (* burner management system (SIS) permissive *)
END_VAR
VAR
    {attribute 'pc_access' := 'RW'}
    TIC_SP  : REAL := 623.15;
    TIC     : PC_PID;
    FIC     : PC_PID;
    FF      : PC_LEAD_LAG;
    FUEL_FF : REAL;
END_VAR
VAR_OUTPUT
    FCV_FUEL : REAL;  (* 0..1 -> %QW4 *)
END_VAR
FF(IN := FT_FEED * 0.031, T_LEAD := T#0s, T_LAG := T#20s);     (* kg fuel per kg feed *)
TIC(PV := TT_OUT, SP := TIC_SP, KP := 0.004, TI := T#4m, TD := T#30s,
    OUT_LO := 0.0, OUT_HI := 0.6, FF := FF.OUT, BKCAL_IN := FIC.BKCAL_OUT);
IF NOT BMS_OK THEN
    FIC.MODE_REQ := MAN;  FIC.MAN_OUT := 0.0;                  (* SIS cut the fuel: controller to MAN, output 0 *)
ELSE
    FIC.MODE_REQ := CAS;
END_IF;
FIC(PV := FT_FUEL, CAS_IN := TIC.OUT, KP := 0.8, TI := T#6s,
    OUT_LO := 0.0, OUT_HI := 1.0, OUT_RATE := 0.05);            (* no faster than 5 %/s *)
FCV_FUEL := FIC.OUT;
END_PROGRAM

A GUI editor opens on right-click of plc_controller (role ENGINEER).

Function block library

Blocks give mechanisms; structure, tuning and interlocks remain yours. The PC_ prefix distinguishes them from standard IEC blocks.

Block Purpose
PC_PID PID with MAN / AUTO / CAS modes, feedforward input, tracking, back-calculation for cascades, derivative filter, setpoint weighting
PC_AIN Analog input processing: scaling, filter, NE43/NE107 quality, HH/H/L/LL limits
PC_RATIO Ratio control
PC_SPLIT Split range (e.g. 0–50 % → valve A, 50–100 % → valve B)
PC_LEAD_LAG Dynamic compensation K(T_lead·s + 1)/(T_lag·s + 1), Tustin discretization
PC_DEADTIME Dead time (≤ 256 samples); basis for a Smith predictor
PC_FF Feedforward (lead-lag + dead time, disabled on BAD disturbance signal)
PC_SELECT Override selector (LOW / HIGH / MED) with tracking of unselected controllers
PC_MEDIAN 2oo3 median of redundant sensors with deviation alarm
PC_RAMP Rate-limited setpoint generator
PC_TOTALIZER Flow totalizer (LREAL, low-flow cutoff)
PC_MOTOR Motor/pump control with feedback check, start counter, discrepancy
PC_VALVE Gate valve control with travel-time check (×1.5 rated → fault)
PC_ALARM Raises a software alarm in the alarm engine
PC_AUTOTUNE Autotuning (relay or step test)
PC_ANTISURGE Compressor anti-surge controller

The same algorithms with the same parameter names exist for Lua as the ROM library pcctl (pcctl.PID, pcctl.LeadLag, pcctl.Ratio, ...).

Online changes, forcing and change management

  • Online changes. Compatible changes (POU logic, new variables, initial values) take effect atomically at a scan boundary in RUN. Incompatible ones (I/O configuration, tasks, retain variable types, FB interfaces) need STOP. plc_cpu_basic has no online changes (E_BUSY: STOP_REQUIRED). The CPU key in RUN blocks all downloads (E_ACCESS: KEY_IN_RUN); in REM the ENGINEER role may download. Before a download in RUN the GUI shows the diff, WCET and changed outputs and asks for confirmation; with plc.moc_mode = TWO_PERSON a second player must sign.
  • Forcing. Up to 64 forced values per CPU (role ENGINEER). Forces survive STOP, restart and power loss until removed. While any is active: FORCE LED, a standing P3 alarm that cannot be shelved, a counter on the overview screen, and a shift-score penalty of −2 per hour per force. SIS inputs and outputs cannot be forced; the SIS only has key-operated cause bypasses.
  • Revisions. Every download creates a revision (number, SHA-256 hash, author, time, mandatory comment, diff, approver); the last plc.max_revisions = 32 are kept for comparison and rollback.

Safety instrumented system (sis_logic_solver)

The SIS (IEC 61511) executes safety instrumented functions: "if a hazardous condition, drive the unit to a safe state". Principles:

  1. Independence. A separate block with its own program, unrelated to PLCs and Lua, outputs in series with the control system. Sensors shared with a PLC trigger a "common cause" warning and are not counted as independent in the SIL calculation.
  2. Works on measurements with all sensor errors and failures.
  3. Fail-safe (de-energize to trip): power loss, open loop (< 3.6 mA) or module failure trip the channel. Exception: energize-to-act functions such as fire suppression.
  4. MooN voting, latching, first-out, manual reset.
  5. Hidden failures and proof testing as a reliability mechanic.

The reactor protection system is a special case of SIS: a fixed matrix whose rows are TripReasons and whose single effect is "open rod drive power". Both share the voting kernel sim.protection.VotingKernel. Non-nuclear industries name SIS causes SisCause.

Block Purpose
sis_logic_solver SIS cabinet: 32 inputs (discrete / 4–20 mA), 16 de-energize-to-trip outputs, C&E matrix up to 32 × 16
esd_valve Emergency shutdown valve with pneumatic actuator, spring return and solenoid; FAIL_CLOSED / FAIL_OPEN

Desk blocks are reused: scram_button as an ESD button (MANUAL_ESD), bypass_keyswitch with bypass_key, pushbutton, annunciator_panel for first-out.

Cause and effect matrix

Rows are causes, columns are effects, and cells are actions: X (immediate de-energize), D(t) (delayed), S (energize to act: deluge, foam), — (none). Each cause has an id (ISA-5.1 style, e.g. LZAHH-101), a kind (HIGH, LOW, DISCRETE, MANUAL_ESD, EXTERNAL_DEMAND, FLAME_LOSS, GAS_DETECTED, FIRE_DETECTED, DEVIATION, RATE), 1–3 channels, setpoint, voting, delay, latch, fault action (TRIP_CHANNEL / DEGRADE), bypass type (NONE / MAINTENANCE / STARTUP) and SIL target 0–3. EXTERNAL_DEMAND lets a PLC or Lua request a shutdown, but it never counts as an independent SIL channel. Shutdown hierarchy ESD-0 (site) → ESD-1 (unit) → ESD-2 (equipment).

Example, tank farm:

                        EFFECTS ->  XV-101  XV-102  XV-400    P-401  DV-1     FP-1   HORN
                                    close   close   close     stop   deluge   foam   on
 CAUSES                 vote  t_d   byp.
 LZAHH-101 T-101 overfill  1oo2  2 s   MAINT    X       -       -        D(5 s)  -        -      X
 LZAHH-102 T-102 overfill  1oo2  2 s   MAINT    -       X       -        D(5 s)  -        -      X
 PZLL-401 suction press.   1oo1  3 s   STARTUP  -       -       -        X       -        -      -
 GD-201 gas 40 % LEL       2oo3  0     MAINT    X       X       X        X       -        -      X
 FD-301 flame              2oo3  0     NONE     X       X       X        X       S        S      X
 HS-001 ESD button         1oo1  0     NONE     X       X       X        X       -        -      X

D(5 s) on P-401 stops the pump only after the valve has started closing, avoiding water hammer and deadheading. That is the player's engineering choice, not a mod rule.

SIL and PFDavg

SIL PFDavg (low demand) Risk reduction
1 10⁻² … 10⁻¹ 10–100
2 10⁻³ … 10⁻² 100–1000
3 10⁻⁴ … 10⁻³ 1000–10 000
4 10⁻⁵ … 10⁻⁴ not achievable in the mod

PFD of a function = sensors + logic solver + final elements. Example options for one function:

Option PFD_SIF SIL
Proof test every 720 h 0.0757 1
Proof test every 120 h 0.0127 1
Full test every 120 h + partial stroke test every 24 h 0.0060 2
Two valves 1oo2 (β = 0.1), test every 240 h 0.0043 2

You trade frequent testing (time, downtime) against redundancy (materials, complexity). The GUI and pc_sis.getPfd show both calculated and current PFD. Hidden failures are rolled honestly but stay invisible until a test or a real demand. A demand during a hidden failure is a failure on demand: the SIS trips but the valve does not close.

Proof testing

  1. Open a work permit (if enabled) and bypass the function or shut the unit down.
  2. Inject a test signal with a hart_communicator (loop test) or instrument_calibrator (reference pressure). This reveals hidden sensor faults such as STUCK and DRIFT_STEP.
  3. Observe the logic trip (test channel).
  4. Observe valve travel (full stroke if the unit is down, or a partial stroke test).
  5. Restore, remove the bypass, sign the result; test timers reset.

A hidden failure found raises a P2 alarm and the function is DEGRADED until repair. Untested fractions accumulate as "creeping PFD". An overdue test raises a P3 alarm and costs shift score; a test on time gives +2.

Fieldbuses and telemechanics

4–20 mA current loop

A two-wire transmitter must get enough voltage to drive full current: U_s ≥ U_min + I_max·(R_cable + R_load + ΣR_ind) with U_s = 24 V, U_min = 12 V, I_max = 22 mA. That allows 545 Ω of loop resistance. Three instruments in series, each with a 250 Ω input (recorder, panel indicator, SIS input), already exceed it. With an overloaded loop the transmitter cannot drive above I_clip = (U_s − U_min)/R_Σ (16 mA at 750 Ω): readings above 75 % of scale flatten while quality stays GOOD. It's a hidden design error, found by a HART loop test or a flat "ceiling" on a trend. NE43 thresholds: measuring range 3.8–20.5 mA; failure ≤ 3.6 mA or ≥ 21.0 mA.

HART (1200 bit/s FSK over 4–20 mA) supports loop tests and device diagnostics via the hart_communicator.

Fieldbus

A segment is a fieldbus_cable (RS-485 twisted pair) network with one master (plc_comm, telemetry_master, fieldbus_gateway) and slaves (remote_io_adapter, io_module, rtu_station, analyzers, digital actuators).

Parameter Modbus RTU pcbus (Profibus DP-like)
Speed 9 600 – 115 200 bit/s 93.75 k – 1.5 M bit/s
Addresses 1–247 1–125
Nodes per segment 32 32
Segment length 1200 m at ≤ 100 kbit/s 1200 / 1000 / 400 / 200 m by speed
Exchange Request/response, one slave at a time Cyclic image exchange with all slaves
Terminators Required at both ends Required

The PLC network port speaks pcnet on a CC wired modem: a PLC appears to computers as pc_plc, and two PLCs can exchange up to 64 global variables with a period ≥ 2 ticks.

Telemechanics

Remote sites (well pads, substations, pipeline pump stations, water intakes) are run through telemechanics:

Block Purpose
rtu_station Remote terminal unit: 16 DI, 8 AI, 4 DO, 2 AO, 256-entry sequence-of-events buffer with 1-tick timestamps
radio_antenna Omnidirectional (2 dBi) or directional (12 dBi) mast antenna
telemetry_master Master station / front-end; one pc_rtu peripheral per RTU

The radio link defaults to 450 MHz, 9600 bit/s half duplex on one shared channel. Link margin uses the free-space path loss L_fs = 20·log₁₀(d_km) + 20·log₁₀(f_MHz) + 32.44 dB plus obstruction losses.

Network segmentation

Wired-modem networks of different levels are separate by default and joined only through gateways: plc_comm (only pc_access variables; writes by card role), fieldbus_gateway (write whitelist) and data_diode (A → B only; mirrors up to 256 tags as mirror.<label>.<tag>). The recommended IEC 62443-style zoning is: SIS zone (diode outward only), control zone, HMI zone, DMZ (historian replica), enterprise zone (A5, MES, market). It is shown in a Ponder scene, not enforced.

Analyzers (pc_analyzer)

An analyzer is a sensor with two additions: sample-line transport delay τ_tr = V_line / Q_s and an analysis cycle (results arrive in batches). Point gas detectors use a first-order lag with τ = T₉₀ / ln 10 instead. For a controller this means large dead time, the classic analyzer-control problem: use a cascade or a Smith predictor on PC_DEADTIME. Types: gas_detector, process_chromatograph, quality_analyzer.

Engineering tools

Tool What it does
simulation_workstation — digital twin and simulator Copies the station's domain state into a sandbox SimulationWorld run on worker threads: pause, ×1, ×2, ×5, ×10. PLC/SIS copies run the programs from the world; Lua runs against virtual peripherals (ws.wrap(label)). Used for factory acceptance tests before downloading to the real plant.
Autotuning and identification PC_AUTOTUNE (PLC), pcctl.tune (Lua), and a wizard in the workstation. Step test → first-order-plus-dead-time model. Results are suggestions you accept or edit.
pctest Lua unit tests on fake devices generated from DeviceDescriptor (same methods, costs, errors; model time).
pcide Editor on top of the CC editor with tag-name completion from listTags().
historian_server Collects tags directly from the domain snapshot (no Lua tokens): up to 2000 tags per server, 4 servers per station, 1–20 Hz, 20 000 points per tag, exception filter + swinging door compression (default 0.25 % of scale, max gap 600 s).
pcapc ROM library for model predictive control (DMC-type MPC, horizon 20–60 steps).

A5 — Plant level

A5 implements ISA-95 level-3 functions in Lua: scheduling, dispatching, material accounting, quality and KPIs. It has no direct outputs; it hands setpoints to A3/A4 and routes to Create logistics. APC (MPC from step-response models) and RTO, including gasoline blending as a linear program, belong here.

Commissioning tasks

Puzzle-style challenges on real plant equipment, run on the digital twin with clear criteria, measurable metrics and a server leaderboard. A task is a datapack file data/<ns>/pc_challenge/<id>.json (fields: id, title, industry, level, template, tools, scenario, constraints, metrics, reward). A solution (PLC project hash, A1/A2 circuit graph, or Lua module hash) is verified on the server twin with a fixed seed, so it is reproducible and cannot be faked client-side.

Attempt lifecycle: DRAFT → EDITING → RUNNING (twin, up to ×10) → FAILED or PASSED → SUBMITTED (server re-run with reference seed). Metrics: IAE, ISE, ITAE, overshoot, settling time (±2 %), valve travel, solution size (blocks or IR instructions), scan time, cost. Leaderboards show histograms and top 10 (/pc challenge list|top <id> <metric>|reset <id>). Completion fires the advancement trigger promptcritical:challenge_completed.

# id Task Level
1 drum_level_load_rejection Hold drum level through a 100 → 40 % load rejection A3
2 compressor_startup_no_surge Start a centrifugal compressor without surge A3 (PC_ANTISURGE)
3 generator_synchronization Synchronize a generator to the grid (Δf, ΔU, Δφ windows) A1 or A3
4 furnace_temperature_cascade Furnace temperature cascade with feedforward and BMS permissives A3
5 batch_reactor_sfc ISA-88 batch reactor in SFC with SIS hold A3 (SFC)
6 tank_farm_cem Tank farm cause and effect matrix: overfill, gas, fire SIS
7 oilfield_telemetry Telemechanics for 30 wells: any alarm at the master ≤ 10 s at 9600 bit/s A4 (RTU)
8 mine_gas_protection Mine gas protection on relays: trip power at CH₄ ≥ 2 % A1
9 blast_furnace_stoves Hot-blast stove changeover A1 (cam_controller) or A3 SFC
10 column_dual_composition Top and bottom composition control of a column A3/A4
11 pressurizer_without_computer Pressurizer pressure on A1/A2 only A1 + A2
12 water_treatment_ph Caustic dosing by pH A2 or A3
13 dewatering_pump_alternation Alternate three mine dewatering pumps on a stepping switch A1
14 sis_proof_test_campaign Keep five SIS functions at SIL 2 for 10 real hours with minimal downtime SIS
15 gasoline_blending_lp Gasoline batch by LP with analyzer correction A5
16 grid_frequency_control Secondary frequency control of an island grid A3/A4

CC peripherals

All profiles follow the CC-Tweaked-API rules (common pc_device methods, R/C/W call classes, tokens, tickets, roles, error codes).

Block Peripheral Connection
plc_controller pc_plc Direct
sis_logic_solver pc_sis Hardware (read-only; changes only physically)
telemetry_master, rtu_station pc_rtu Direct
historian_server pc_historian Direct
gas_detector, process_chromatograph, quality_analyzer pc_analyzer Direct or via io_module
fieldbus_gateway, data_diode, plc_comm pc_fieldbus Direct
Relay cabinets, analog blocks — Read through io_module by wire, as in reality

Tag prefixes: plc.<label>.*, sis.<label>.*, rtu.<label>.*, bus.<label>.*, ana.<label>.*, hist.<label>.*, cab.<label>.*.

See also

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