vhdl
Here are 45 public repositories matching this topic...
saving lab experiments in this repo, specific to MAKAUT ECE-2021 7th SEM(old syllabus)
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Feb 17, 2021 - C++
Generator for unsigned n-bit modified Booth encoding Dadda tree multiplier code in VHDL written in C++. Based on https://github.com/HSOgawa/fast-multipliers/.
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Dec 24, 2019 - C++
This is a simulation based VHDL code developed in Xilinx to demonstrate a 4-bit PN sequence generator.
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Nov 6, 2018 - C++
Multi Layer Video Controller in VHDL for Spartan 3AN FPGA
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Nov 17, 2023 - C++
A custom 32-bit architecture, microcontroller, retro console, and software suite
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Oct 19, 2022 - C++
SENSE (Symbolic controlEr Networked SystEms) is a C++ toolbox for constructing symbolic abstractions as well as synthesizing symbolic controllers for networked control systems. The tool has MATLAB and OMNet++ interfaces for closed loop simulation.
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Dec 21, 2020 - C++
Custom IP for the Mini-EUSO PDM-DP Zynq system
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Feb 7, 2019 - C++
CJEL Back-end and Transformation Passes
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Jan 29, 2024 - C++
GHDL Verilator Interface. A glue code generator for VHDL Verilog cosimulation.
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Mar 11, 2024 - C++
Finit state macines network for MSI protocol modelling on VHDL.
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Apr 16, 2018 - C++
Small project to track things with a waterproof sonar sensor
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Mar 22, 2024 - C++
A library to translate strings between common EDA naming conventions.
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Jun 27, 2017 - C++
This repository contains my solutions to some of the assignments of the courses I took during my undergraduate first and second year
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Jul 14, 2020 - C++
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