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AD738x Platform Board Architecture
DataStorm DAQ (Trenz Cyclone-V SoC Development Kit (TEI0022))
Analog Devices EVAL-AD738x-FMCZ Development Board
![](https://github.com/ArrowElectronics/data-storm-daq/raw/master/ad738x/ad738x_platform_n.png)
![](https://github.com/ArrowElectronics/data-storm-daq/raw/master/ad738x/ad738x_platform_bd.png)
The AD738x Platform uses 2 boards. The Cyclone-V SoC Development Kit, and the EVAL-AD738x-FMCZ board connects via an FMC interface.
![](https://github.com/ArrowElectronics/data-storm-daq/raw/master/images/data_storm_daq_trenz.png)
The DataStorm DAQ is based on the Intel Cyclone V SoC FPGA. It features, 1GB DDR3 each for the HPS and FPGA, 32MB QSPI memory each for the HPS and FPGA, Ethernet, and Power. For details, visit the Trenz Electronics Technical Reference Manual Wiki page.
The major components of the DataStorm DAQ are identified by numbers:
- SE Processor:
- Single or Dual ARM Cortex® A9 MPU
- Up to 925 MHz max clock speed
- 32KB L1 Program Cache (per core)
- 32KB L1 Data Cache (per core)
- 512 KB L2 Cache (shared)
- 181 HPS I/O pins
- 1 Hard Memory Controller (LPDDR2, DDR2, DDR3)
- FPGA Fabric:
- Up to 110K Logic Elements (LE)
- Up to 5.5Mb M10K Memory
- Up to 621Kb MLAB Memory
- Up To 112 Variable Precision DSP blocks
- Up to 224 18x18 multipliers
- Up to 288 User FPGA I/O pins
- 1 Hard Memory Controller (LPDDR2, DDR2, DDR3)
FPGA DDR3
HPS DDR3
FMC LPC Connector
PMOD x4
microSD Card Connector
Ethernet PHY
RJ-45 Ethernet Connector
USB PHY
USB HUB
dual USB-A Connector
HDMI Transmitter
HDMI Connector
Intel MAX10
micro-USB to UART Connector for HPS Console
USB to JTAG and UART FTDI Bridge
micro-USB to JTAG and UART Connector for FPGA
SMA Connector
Push Button
LED
4-bit DIP Switch
12 VDC Power Jack
Clock Generator
Programmable Clock Generator
QSPI for HPS
QSPI for FPGA
Temperature Sensor
EEPROM
![](https://github.com/ArrowElectronics/data-storm-daq/raw/master/images/trenz_c5soc_bd.png)
The AD7380/AD7381 are respectively 16-bit/14-bit pin-compatible family of dual simultaneous sampling, high speed, low power, successive approximation register (SAR) analog-to-digital converters (ADCs) that operate from a 3.0 V to 3.6 V power supply and feature throughput rates up to 4 MSPS.
The EVAL-AD738x-FMCZ is an evaluation board that allows the user to evaluate the features of the ADC.
Full specifications on the AD738x are available in the product data sheet, which should be consulted in conjunction with this user guide when working with the evaluation board.
Full descriptions of these products are available in their respective data sheets, which must be consulted when using the corresponding evaluation board.
![](https://github.com/ArrowElectronics/data-storm-daq/raw/master/ad738x/eval-ad738x-fmcz_n.png)
AD738x - dual simultaneous sampling, high speed, low power,(SAR) analog-to-digital converters (ADCs).
Note : This design is with reference with AD7380®/AD7381® , But design can be applicable to other supported AD738x ADC.
ADA4896 - unity gain stable, low noise, rail-to-rail output, high speed voltage feedback amplifiers for AIN inputs.
ADM660A - Charge-pump voltage converter for +2.5V supply to AIN inputs amplifier.
ADP7182 - CMOS, Low Dropout Linear LDO for +2.5V Voltage supply.
ADP166A - Very low quiescent current, low dropout, linear regulator for +3.3V VCC.
ADP7104 - CMOS, Low Dropout Linear LDO for +5V Voltage supply.
ADA4807 - CMOS, low power, low noise, rail-to-rail voltage feedback amplifier for generating VCM .
ADR4533 - CMOS, high precision, low power, low noise voltage references for +3.3V supply.
EEPROM
The block diagram of the EVAL-AD738x-FMCZ® Eval board (below) shows the major components. Each analog input has the option of using the ADA4896 amplifier with a gain of 1 or bypassing it using jumpers. conversion results from the AD738x are communicated to the FPGA via the FMC-LPC connector using 2 source synchronous serial streams (SDI) of SPI . SPI interface is also used for Control functions.
![](https://github.com/ArrowElectronics/data-storm-daq/raw/master/ad738x/eval-ad738x_bd.png)
The AD7380/AD7381 are a respectively 16-bit/14-bit pin-compatible family of dual simultaneous sampling, high speed, low power, successive approximation register (SAR) analog-to-digital converters (ADCs). It incorporates the ADA4896 rail-to-rail output amplifier with Gain=1 to buffer the input signals before applying them to the ADC inputs. VCC is supplied though ADP7182 regulator and external reference voltage of +3.3V can be given through ADP166A. The AD738x expects the input signals in range between GND and VCC ,differential input full voltage swing equal to Vref. However, the EVAL-AD738x-FMCZ board is set up to use the ADA4807 buffers which offset the inputs by VCM. A VCM of (Vref=+3.3V)/2 from ADR4533 and goes through unity gain voltage follower ADA4807 as seen below. This means that the user is expected to provide a true differential input centered at GND, and the VCM takes care of shifting it up.
By default, Ext Vref is set to position B.
Return to AD738x Board Architecture Table of Contents
Return to AD738x Platform Architecture Table of Contents
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