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Run the no‐OS Demonstration Standalone (AD463x)

nnaufel edited this page Mar 11, 2022 · 8 revisions

In addition to the DataStorm DAQ development kit running either in standalone hardware configuration or remote configuration via an Ethernet cable, it can also run no-OS baremetal software while being connected to a PC via a USB cable.

Configuration for no-OS software access

The AD463x demonstration uses AD4630-24® Evaluation Platform in this configuration which is comprised of the following components:

Configure BOOTSEL DIP Switches

Select the SD card as the boot source for the processor.



Configure FMC_VADJ DIP Switches

The FMC_VADJ power rails provide power to the EVAL-AD4630-24FMCZ via the FMC interface. This is an adjustable voltage. It must be set to 3.3V. Modify the VID_SW DIP switch settings to select 3.3V.

Assemble the Hardware

Follow the steps in the order shown below.

  • Insert the Micro SD card into the SD card slot
  • Insert the EVAL-AD4630-24FMCZ FMC connector into the FMC mating connector on the DataStorm DAQ board
  • Connect the Micro USB cable between the serial port of the DataStorm DAQ board and the host PC.
  • Connect the Signal Generator to the EVAL-AD4630-24FMCZ SMA connectors
  • Ensure that Jumper JP1 is at EN position as shown below
  • Connect the power supply to the DataStorm DAQ
  • Plug the AC-DC adapter into an AC outlet

Signal Source

The AD463x requires a differential signal from a signal source. The EVAL-AD4630-24FMCZ, in its default configuration, requires the input signal to be centered around VCM=2.5V (as in yellow tag #5 below). Connect the Differential signal source to IN0+/IN1+ and IN0-/IN1- inputs of EVAL-AD4630-24FMCZ.

The Analog Discovery 2 is used as a signal generator to drive the AD463x input.

Install (if not already done) the Digilent WaveForms App.

Open the WaveForms App and Click on Wavegen in the left margin which opens a waveform window

Click on Channels and select 1
Select Type as Sine
Select Frequency or Period
Set Amplitude to 1V
Set Offset to 2.5V
For Channel 2, Match the Channel 1 settings
Select the Phase to 180 degrees for Inverse signal
Click on No synchronization and select Synchronized
Click Run All

Supported Design Configurations

The HDL design supports the following interface and clock mode configurations:

1 Lane per channel 2 Lane per channel 4 Lane per channel
SPI Mode SDR SDR SDR
Echo Clock Mode SDR & DDR SDR & DDR SDR & DDR
Master Clock Mode SDR SDR SDR

Run the no‐OS Demonstration

Software for no-OS access

There are a few software components that need to be installed in order to run this demo successfully:

  1. A SW terminal like Tera Term VT or Putty

Connect to the target terminal

Run the demonstration

Simply power up the unit. No additional configuration is required. The bare metal application runs automatically and continuously streams analog measurement results across the serial port to be received and displayed in the terminal program running on the separate Windows PC.

ADC Mode Register Configuration

The initial mode parameter variables shown below will allow the no-OS application to configure the ADC to sample data in the respective mode.

NOTE: This demo has AD463x configured by default to receive 24-bit differential and 8-bit common mode data over 4-Lane on SPI Mode.


Data Output:




Return to AD463x Quick Start Guide


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