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PR Digest Iteration 56
Period: 2026-04-26 to 2026-05-09 (Iteration 56) | Total PRs: 77 (49 from Xe2/Xe3/Xe3P, 28 from Xe4) | Lines changed: +93,927 / -32,763
The team built out the new 2D-block-load lowering stack end-to-end: new intermediate ops, per-variant lowering conversions, and a replacement pipeline pass that unifies the descriptor-load, tensor-of-pointers, and block-pointer paths. Alongside this, new analyses (spatial reuse, cache-control annotation) and widened vectorization (up to 256-bit Xe3P store/load) landed to improve memory throughput. Six upstream synchronizations were completed with a 98.99–99.26% test pass rate.
Key accomplishments:
- Unified the 2D block-load code path into a single pipeline pass that handles descriptor loads, tensor-of-pointers, and block pointers through one set of intermediate ops
- Widened elementwise load/store vectorization to 256 bits on Xe3P, lifting sustained memory bandwidth for bandwidth-bound kernels
- Landed a new Spatial Reuse analysis that complements the existing temporal reuse facade, giving future optimization passes a single place to query reuse information
- Fixed a vLLM startup segfault by hardening Level Zero initialization with clearer, debuggable error paths instead of hard crashes
- Maintained ongoing alignment with the upstream Triton compiler across six merges
New intermediate ops (ttig.2d_block_load, ttig.2d_block_load_from_ptr, ttig.extract_desc) and per-variant conversion patterns that together form a reusable, unified 2D-block-load lowering stack.
- #6853 Add ttig.extract_desc op for runtime descriptor field extraction — Introduces an op to pull runtime descriptor fields (base, shape, strides) out at lowering time. (+149/-29, @whitneywhtsang)
- #6850 Remove LowerTo2DBlockLoad pass from pipeline — Retires the dedicated pass now that the unified pipeline covers descriptor loads, tensors-of-pointers, and block pointers. (+338/-1, @whitneywhtsang)
- #6847 Add Subgroup2DBlockLoadFromPtrOpConversion for ttig.2d_block_load_from_ptr — Lowers the from-pointer variant of the new 2D block load op into subgroup 2D block sequences. (+380/-1, @whitneywhtsang)
- #6827 Add SpatialReuseAnalysis — New analysis that identifies same-location accesses, complementing the existing temporal reuse facade. (+510/-0, @etiotto)
- #6815 Add LowerTo2DBlockLoad pass for tensor-of-pointers — Extends the lowering pass to convert tensor-of-pointers loads into 2D block sequences. (+332/-5, @whitneywhtsang)
- #6816 Use SPV_INTEL_predicated_io — Switches predicated load/store lowering to the SPIR-V extension where available, replacing GenISA fallbacks on newer drivers. (+92/-93, @whitneywhtsang)
- #6804 Add Subgroup2DBlockLoadOpConversion for ttig.2d_block_load — Adds the main lowering conversion that emits subgroup 2D block load sequences for the new op. (+375/-362, @whitneywhtsang)
- #6801 Add LowerTo2DBlockLoad pass for descriptor loads — First stage of the unified pipeline: rewrites descriptor loads to the new 2D block load ops. (+438/-0, @whitneywhtsang)
- #6792 Add ttig.2d_block_load and ttig.2d_block_load_from_ptr ops — Introduces the op definitions that anchor the new 2D block load lowering path. (+200/-0, @whitneywhtsang)
- #6787 Widen tt.load too; rename pass to WidenLoadStoreEncoding — Extends the vectorization-widening pass to cover loads in addition to stores. (+222/-38, @etiotto)
- #6786 Extract block IO utilities from LoadStoreOpToLLVM — Moves shared block-IO helpers into a dedicated utility header to reduce duplication across lowerings. (+448/-377, @whitneywhtsang)
- #6747 Reland MaterializeBlockPointer 1D→2D load reshape with W<tpw bail-out — Re-lands 1D-to-2D reshape for block-pointer loads with a guard for narrow widths. (+640/-31, @etiotto)
- #6727 Widen elementwise store vectorization to 256 bits (Xe3P) — Promotes elementwise stores to 256-bit vectors on Xe3P to saturate memory bandwidth. (+446/-17, @etiotto)
- #6723 Add tritonintelgpu-annotate-cache-control pass — New pass that annotates load/store ops with cache-control hints for downstream lowering. (+933/-0, @etiotto)
Bug fixes and analysis hardening across the lowering stack — from runtime descriptor checks to block-pointer boundary handling.
- #6777 Guard sqrt_cr/divide_cr builtins behind SPV_INTEL_rounded_divide_sqrt capability — Prevents emitting the correctly-rounded SPIR-V builtins on targets that do not advertise the extension. (+134/-31, @whitneywhtsang)
- #6782 Return failure instead of asserting on unsupported tileWidth — Replaces a lowering assertion with a clean rewrite failure, letting fallback paths run. (+46/-0, @wdziurdz)
- #6772 Allow hoistConvertDotOperand across UpcastFpOpInterface — Extends the backward convert-layout hoist to traverse upcast-fp ops, reducing redundant conversions. (+7/-2, @etiotto)
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#6771 Fix test_enable_fp_fusion by respecting default_fp_fusion knob — Honors the
default_fp_fusionruntime knob so the test observes the intended fusion behavior. (+10/-10, @anmyachev) - #6768 Fix boundary_check bug of tl.make_block_ptr for column-major for SGLANG — Corrects the out-of-bounds check for column-major block pointers, unblocking an SGLang workload. (+23/-6, @anmyachev)
- #6767 Fix vLLM startup segfault: initialize Level Zero early — Initializes the Level Zero driver during XPU init and surfaces debuggable errors instead of segfaulting. (+119/-48, @lslusarczyk)
- #6750 Use twisted grid order for flash attention kernel — Reorders the flash-attention grid to improve L3 locality. (+16/-9, @chengjunlu)
- #6800 Add debug statistics and TRITON_INTEL_HLC_STATS env var to HoistLayoutConversions — Adds an opt-in stats dump for the hoist-layout-conversions pass to help diagnose layout issues. (+42/-6, @etiotto)
Pipeline maintenance: supporting utilities moved into shared headers, small pass refactors, and dialect plumbing.
- #6805 Move vBlocks capping into getBlockIOTileSize — Centralizes the vBlocks clamp in one helper used by both load and store paths. (+23/-23, @whitneywhtsang)
- #6806 Move getOpIdx, getDpasLayout, computeTransposeShuffleMapping to BlockIOUtils — Consolidates shared block-IO utilities following the header extraction in #6786. (+111/-74, @whitneywhtsang)
- #6370 Add handleArgPtrDatatype to pipeline manager — Plumbs pointer-arg datatype handling through the pipeline manager. (+15/-48, @dev-tomek)
- #6720 Refactor SPIRVRunner arg dump to kernel cache, add dump-dir overrides — Restructures the SPIR-V runner's argument dumping to write into the kernel cache with configurable output directories. (+93/-36, @app/copilot-swe-agent)
- #6470 Revert "Disable example plugins on Windows" — Re-enables the example plugins on Windows after the upstream blocker was resolved. (+2/-21, @quinnlp)
6 upstream merges from OpenAI Triton (commits 3123400, 88e8e52, 9f34338, e570a63, ef05530, ef05530) — pass rate 98.99–99.26%.
CI suite maintenance, benchmark infrastructure, and skip-list management.
- #6870 Skip test_sort with num_warps=8 (icpx 2025.3.3 regression) — Skips a test that regressed on icpx 2025.3.3 pending a compiler fix. (+24/-0, @whitneywhtsang)
- #6794 Reduce peak memory in unified_attention benchmark — Lowers peak memory in the unified attention benchmark so it fits within CI budget. (+31/-26, @dev-tomek)
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#6830 Fix OSTYPE to support cygwin — Accepts
cygwinvalues forOSTYPEin build scripts. (+11/-11, @kwasd) - #6812 Use content-based IDs for triton_kernels test_matmul parametrize — Stabilizes pytest IDs for matmul parametrize so they survive ordering changes. (+17/-10, @exolyr)
- #6807 Accept additional env vars as input in triton-benchmarks.yml — Lets the benchmark workflow accept extra environment variables as dispatch inputs. (+27/-0, @anmyachev)
- #6818 Run benchmarks when updating PyTorch pin — Triggers the benchmark workflow on PRs that bump the PyTorch pin. (+2/-2, @anmyachev)
- #6803 Update vLLM pin to 9f771b3ab92d26a7d91a8255572c5d8d2b3ad601 — Advances the pinned vLLM revision. (+239/-95, @quinnlp)
- #6761 Fix xe2 triton_kernels skiplist after upstream PR #9986 — Realigns the xe2 skiplist following upstream #9986. (+14/-14, @exolyr)