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PR Digest Iteration 60
Period: 2026-06-21 to 2026-07-04 (Iteration 60) | Total PRs: 44 (31 from Xe2/Xe3/Xe3P, 13 from Xe4) | Lines changed: +65,819 / -24,049
The team made substantial advances in memory access efficiency, adding 2D block I/O for descriptor GEMM kernels with runtime base pointers via a versioning pass, and skipping unnecessary boundary checks for divisible shapes. A new CodeSinking pass reduces register pressure by moving loop-invariant ops closer to their uses. Two new Intel-specific dialect ops for descriptor gather/scatter were introduced, and a CanonicalizePointers pass was ported from AMD to decompose tensor pointer iter-args into scalar+offset form. Mask analysis was extended to handle compound andi patterns and boundary-check idioms from the descriptor-to-pointer rewrite. Three upstream synchronizations were completed with a 99.49%–99.50% test pass rate.
Key accomplishments:
- Enabled 2D block I/O for descriptor GEMM kernels with runtime base pointers by cloning the loop under a divisibility branch
- Eliminated redundant boundary checks for descriptor loads and stores when shapes are statically divisible, reducing predicated-load overhead
- Added a new CodeSinking pass to sink loop-dead ops closer to their uses, reducing live ranges and register pressure
- Extended InvariantMaskValidator to handle compound andi masks and boundary-check patterns from the descriptor-to-pointer rewrite
- Ported CanonicalizePointers from AMD to decompose tensor pointer iter-args into scalar base + tensor offset, lowering GRF pressure
- Added Intel-specific descriptor gather/scatter dialect ops
- Fixed fp8→fp16 cast chains by folding through the narrow intermediate, improving numerical accuracy in flash attention
- Raised a proper OutOfResources exception on PTSS overflow so autotuners can skip over unviable configs
- Added batched FlashAttention benchmark and descriptor API microbenchmarks covering all child issues of #6003
New fast paths for 2D block I/O under runtime-shaped descriptors, and elimination of redundant boundary checks where shapes are compile-time divisible.
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#7217 Use 2D block load for descriptor GEMM with runtime base — Adds
triton-intel-descriptor-versioningto clone the persistent kernel loop underif (gk % d == 0), enabling 2D block loads where row length is a runtime value. (+454/-10, @wdziurdz) -
#7184 Skip descriptor load/store boundary checks for divisible shapes — Adds per-element bounds predication in
LoadStoreOpToLLVM.cppso descriptors with compile-time-divisible shapes avoid the predicated (masked) path, fixing #7097. (+519/-99, @etiotto) - #7267 Fix pitch < base_width issue when store stride=0 matrix on CRI — Corrects pitch computation for zero-stride stores to avoid base_width violations. (+48/-1, @chengjunlu)
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#7290 Add Intel descriptor gather/scatter op — Introduces
ttig.descriptor_gatherandttig.descriptor_scatterdialect ops without NVIDIA TMA-specific limitations. (+201/-2, @chengjunlu) - #7353 Cherry pick: Fix cooperative prefetch descriptor for broadcast row — Cherry-picks #7315 onto the release branch, fixing the cooperative prefetch descriptor for broadcast row patterns. (+56/-7, @dev-tomek)
- #7315 Fix cooperative prefetch descriptor for broadcast row — Fixes the prefetch descriptor generation for broadcast-row tiles. (+56/-7, @wdziurdz)
Expanded mask analysis passes and the CanonicalizePointers register-pressure reduction.
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#7289 Recognize boundary-check patterns in InvariantMaskValidator — Extends InvariantMaskValidator to recognize
(splat(offset) + ext(make_range)) cmp splat(constant)patterns from RewriteTensorDescriptorToPointer, generating scalar versioning conditions. (+209/-9, @whitneywhtsang) -
#7263 Handle compound andi masks in InvariantMaskValidator — Enables recursive handling of
arith.andimask trees so compound masks likeandi(mask_m, mask_n)are fully versioned. (+66/-2, @whitneywhtsang) -
#7257 Classify masks using IV-equivalent loop iter_args — Adds
getIVEquivalentRangeso iter_args that track the loop IV are recognized as always-true and masks are eliminated. (+137/-18, @whitneywhtsang) -
#7254 Add CanonicalizePointers pass — Ports AMD's CanonicalizePointers: decomposes loop-carried
tensor<Nx!tt.ptr>iter_args into scalar base + tensor offset to reduce GRF pressure. (+2375/-2, @etiotto) -
#7234 Preserve coalesced descriptor-store layout in RemoveLayoutConversions — Anchors the coalesced layout on
tt.descriptor_storeso the first RemoveLayoutConversions pass does not fold it away, preventing up to +38% regression on PVC. (+123/-2, @etiotto) -
#7285 Raise OutOfResources on PTSS overflow instead of opaque error — Raises
OutOfResourceswhen IGC/ocloc rejects the kernel due to exceeding the 256KB per-thread scratch space limit, allowing the autotuner to skip silently. (+282/-5, @sgurwinderr) - #7275 Remove in-place softmax from unified attention, drop workaround — Drops a vLLM unified-attention workaround now handled upstream. (+1/-12, @dev-tomek)
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#7140 Fold chained fp_to_fp under constraints — Adds
FoldNarrowFpToFpIntermediatein AccelerateMatmul to collapse fp32→fp8→fp16 chains where the fp8 intermediate is lossless, resolving #6993. (+340/-0, @aliharbaji)
New code sinking pass and loop-distribution for multi-dot kernels.
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#7299 Add CodeSinking pass to sink loop-dead pure ops — Adds
tritonintelgpu-code-sinking, which sinks pure ops defined before a region-bearing op down to their first use after it, shortening live ranges and reducing register pressure. (+700/-0, @etiotto) - #7287 Make test_auto_large_grf robust across IGC versions — Makes the PTL large-GRF test stable across different IGC driver versions. (+17/-4, @alona-meir)
- #7314 Add customer shapes to fused SwiGLU kernel — Extends the fused SwiGLU benchmark with additional customer-representative shapes. (+38/-8, @chengjunlu)
New benchmark integrations and CI probing improvements.
- #7222 Integrate batched FlashAttention benchmark into Triton benchmark CI — Integrates the batched variable-length FlashAttention benchmark into the standard Triton pipeline with segment-length distribution configuration. (+415/-0, @app/copilot-swe-agent)
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#7247 Add descriptor API microbenchmarks for issue #6003 — Adds eight paired
tl.loadvs tensor-descriptor microbenchmarks covering all child issues of #6003. (+683/-1, @etiotto) -
#7316 Add Torch Inductor grouped_mm GEMM benchmark — Benchmarks the Inductor grouped_mm Triton template against eager
torch._grouped_mmfor 2D×3D and 3D×3D layouts, closing #7086. (+315/-0, @wdziurdz) -
#7330 Add GDN_ATTN test to fill coverage gap — Adds
test_fused_sigmoid_gating_delta_ruleto the vLLM test suite, creating #7333. (+10/-1, @quinnlp) - #7301 Probe spirv-dis for SPV_INTEL_predicated_io before building — Fixes #7278 by probing spirv-dis capability before attempting to build. (+82/-14, @januszjah)
- #7241 Update unified attention benchmark configs — Updates benchmark configurations to better reflect real workloads. (+27/-13, @quinnlp)
- #7236 Improve performance of fused GEMM benchmark — Improves the fused GEMM benchmark's tuning configuration. (+16/-20, @chengjunlu)
- #7172 Replace remaining XE-TLA plumbing with SYCL-TLA — Completes the migration of benchmark plumbing from XE-TLA to SYCL-TLA. (+19/-19, @slawblauciak)
- #7170 SYCL-TLA provider for batched MoE — Adds a SYCL-TLA provider for the batched MoE benchmark. (+34/-0, @dev-tomek)
- #7281 Update vLLM pin — Bumps the vLLM version pin. (+103/-119, @quinnlp)
- #7284 Bump actions/checkout from 6 to 7 — Updates the GitHub Actions checkout action to v7. (+49/-49, @app/dependabot)
- #7269 Fix LSC d16 block width constraint violation in prefetch — Fixes a block width constraint violation in the prefetch LSC d16 path. (+36/-34, @sgurwinderr)
3 upstream merges from OpenAI Triton (commits 4e99439, cc0812e, 38bdcef) — pass rate 99.49%–99.50%.