PR Digest Iteration 65

PR Summary

Period: 2026-08-30 to 2026-09-12 (Iteration 65) | Total PRs: 53 (Xe2/Xe3/Xe3P) | Lines changed: +15,937 / -6,380

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Triton XPU BE (Xe2/Xe3/Xe3P) (53 PRs, +15,937 / -6,380)

The team unlocked the efficient hardware memory path for several tensor-descriptor shapes that previously fell back to slow element-by-element access, including one case running up to ten times slower than it should and an attention decode kernel that regained roughly a quarter of its runtime. A group of correctness fixes closed off situations where the compiler could silently produce wrong results, and a new memory-error test harness found and fixed real leaks and out-of-bounds accesses in the backend. The backend also moved off vendor-specific intrinsics onto standard portable extensions in several code paths, and shed a large block of dead machinery left over from a retired compilation strategy. Three upstream synchronizations were completed with a test pass rate of 99.24 to 99.36 percent.

Key accomplishments:

• Recovered up to a tenfold speedup on attention-style workloads by enabling the fast hardware load path for descriptor shapes it previously rejected, and cut an attention decode kernel from 417 to 310 microseconds by fixing how work is spread across execution units
• Closed five separate compiler bugs that could silently produce wrong results, fail to compile valid kernels, or quietly drop a performance optimization
• Added an automated memory-error test harness to the CI toolbox and fixed the leaks and out-of-bounds accesses it uncovered
• Replaced vendor-specific graphics intrinsics with standard portable extensions across matrix-multiply, long-vector, and block-memory code paths, improving portability across driver versions
• Removed a large body of dead code from a retired compilation strategy, including machinery that would have crashed if ever reached
• Fixed a driver-level crash that could take down user processes during garbage collection, and cut per-launch overhead for repeatedly dispatched kernels

Memory Access & Lowering

Extending the hardware 2D block I/O and descriptor paths to shapes and access patterns that previously fell back to slower generic lowering, plus correctness and performance fixes in those rewrites.

• #8018 Fix prefetch dedup keying on descriptor alone in ReduceVariableLiveness — Keys prefetch deduplication on the load's indices as well as the descriptor, so a second load of the same descriptor at a different offset no longer silently loses its prefetch. Fixes #8017. (+60/-9, @oelayan7)
• #7970 Refactor lowerDescriptorGather — Splits the descriptor-gather lowering into smaller helpers with no functional change. (+248/-178, @chengjunlu)
• #7021 Add reinterpret cast support in ConvertLayoutOp lowering — Adds a reinterpret-cast path to layout conversion lowering, avoiding a round trip through shared memory for compatible layouts. (+1023/-0, @chengjunlu)
• #7952 Reduce GenISA usages for 2DBlockIO — Replaces vendor-specific GenISA intrinsics in the 2D block I/O path with portable equivalents. (+209/-316, @whitneywhtsang)
• #7444 Use 2D block load for 32-bit and wider descriptor row lengths — Drops the divisor floor so descriptor row lengths of 32 bits and wider qualify for 2D block load. (+3/-7, @wdziurdz)
• #7956 Cap tensor descriptor shape divisibility at the block extent — Raises the host-side descriptor divisibility cap so a rank-3 descriptor's unit dimension can be proven collapsible, unblocking 2D block loads. (+50/-10, @wdziurdz)
• #7548 Add Triton Intel GPU gather op lowering — Lowers ttig.descriptor_gather to either predicated LLVM loads or a subgroup gather-load fast path when layout and tile constraints allow. (+786/-4, @chengjunlu)
• #7948 Map store cache modifiers ca and cv — Maps the ca/cv store cache modifiers instead of aborting the compiler, and stops lowering store cg/cs to !nontemporal. Closes #7899. (+166/-17, @etiotto)
• #7938 Reshape other in the 1D strided load rewrite — Reshapes the other operand into the delivery encoding so masked 1D strided loads no longer produce ill-typed IR that fails to compile. (+452/-3, @etiotto)
• #7920 Fix wrong per-warp base in 1D strided load reshape — Corrects the per-warp base address computed by the 1D strided load reshape, which produced wrong results. (+143/-21, @etiotto)
• #7901 Stop lowering load cg/cs to !nontemporal — Removes the !nontemporal annotation for cg/cs load cache modifiers, which did not match their intended cache behavior. Closes #7843. (+136/-9, @etiotto)
• #7897 Carry batch strides on ttig.2d_block_load — Adds explicit batch strides to the op so rank > 2 results stop relying on a re-derived stride during LLVM lowering. Closes #7882. (+243/-10, @aditzhaki)
• #7852 Fuse reshape for descriptors with a unit middle dimension — Collapses an Nx1xM descriptor's unit middle dimension so a one-head tile of a (TOKENS, HEADS, HEAD_DIM) tensor gets a 2D block load instead of a path up to 10x slower. Closes #7679. (+205/-70, @wdziurdz)
• #7867 Default tt.descriptor_load to predicated loads — Makes descriptor loads default to the predicated lowering, matching the three other load/store specializations. (+183/-17, @etiotto)
• #7826 Lift the H != 1 guard on 1D strided stores — Removes a guard that made the 1D strided store reshape effectively dead, so multi-row tiles can now become 2D block stores. (+354/-103, @NathanVoldman)

Correctness & Compiler Analysis

Fixes to layout rematerialization, warp assignment, and resource checks that prevent silently wrong results or compiler aborts, plus new reusable analysis and memory-error tooling.

• #7917 Do not propagate encodings into efficient_layout reshapes — Blocks forward layout propagation from overwriting a reshape result already marked with an efficient layout, which had been silently discarding the 1D-strided block-pointer optimization. Closes #7915. (+66/-10, @etiotto)
• #7995 Keep chained-dot warps off N when M holds one warp — Assigns warps to batch and M rather than N for chained dots when M holds one warp, avoiding a shared-memory round trip per loop iteration; FlexAttention decode improves from 417 to 310 microseconds at two warps. (+153/-7, @etiotto)
• #7959 Gate the auto-large-GRF retry on the reported n_spills — Raises the large-register-file recompile threshold from any spill at all to 16 dword-equivalents per lane, matching PyTorch inductor's own spill threshold so the retry fires only where it can change the outcome. (+56/-17, @etiotto)
• #7892 Stop backward slice at while/warp-specialize results — Restricts the rematerialization backward slice to a whitelist of ops so ttg.warp_specialize and scf.while results no longer yield IR that fails its own verifier. Fixes #7891. (+90/-0, @etiotto)
• #7962 Fix race condition with same pointer, different encodings — Rejects rematerialization when a loaded pointer is also stored under a different encoding, closing a thread-to-address mismatch that let threads read the wrong memory. Fixes #7890. (+167/-0, @whitneywhtsang)
• #7927 Add unit test for issue #7925 — Adds a regression test covering #7925. (+50/-0, @anmyachev)
• #7831 Add ASan/LeakSanitizer harness and fix memory bugs it found — Adds scripts/test-triton.sh --asan to run the C++ and lit suites under LeakSanitizer, and fixes the leaks and memory errors it surfaced. Implements #5029. (+528/-409, @Niz13)
• #7320 Add reusable RegisterPressureAnalysis — Introduces a shared register-pressure analysis that passes can query instead of each rolling its own live-range heuristic. (+474/-102, @etiotto)
• #7878 Raise OutOfResources for oversized static shared memory — Reports a proper OutOfResources error when a kernel's static shared memory exceeds the device limit. (+50/-0, @anmyachev)
• #7868 Recognize PyTorch floordiv patterns — Teaches SimplifySignedArithmetic to prove non-negativity through Inductor's bitwise-NOT and guarded-absolute floordiv lowerings. (+228/-3, @whitneywhtsang)

Portability & Dead Code Removal

Moving off vendor-specific graphics intrinsics onto standard SPIR-V extensions, and retiring machinery left behind by a removed compilation strategy.

• #8021 Remove leftovers of the advanced path — Deletes the warp encoding attribute and the alloc/broadcast ops orphaned when the advanced path was removed, including interface methods that would have aborted if ever reached. (+6/-189, @whitneywhtsang)
• #7953 Use SPV_INTEL_subgroup_scaled_matrix_multiply_accumulate extension — Emits the standard scaled matrix-multiply-accumulate SPIR-V extension in place of the previous vendor-specific encoding. (+325/-266, @whitneywhtsang)
• #7809 Replace SPV_INTEL_vector_compute with SPV_EXT_long_vector extension — Switches long-vector types to the cross-vendor SPIR-V extension. Fixes #5769. (+33/-14, @whitneywhtsang)

Upstream Alignment

Periodic synchronization with OpenAI Triton, plus non-functional cleanups that shrink the Intel backend's divergence from upstream files.

• 3 upstream merges from OpenAI Triton (commits 3a07c15, e08ec19, 5889527) — pass rate 99.24–99.36%.
• #7979 Remove unused constant-splat helpers from TritonLLVMOpBuilder — Deletes two callerless splat helpers and rewrites the single const_val use, making the shared utility header identical to upstream. (+2/-28, @mieshkiwrk)
• #7912 Reduce upstream divergence in histogram and print lowering — Switches to upstream's unpack/packUniqueTensorElements API with no change in emitted LLVM. Closes #7913. (+5/-6, @etiotto)
• #7873 Use shared attachAllocationSizeAndOffsetAttr in AllocateSharedMemory — Replaces Intel's drifted copy of the allocation-attribute walk with the upstream helper, restoring the missing allocation.size handling. (+32/-43, @etiotto)

Runtime, Tooling & CI

Runtime overhead and crash fixes, corrected spill reporting, and CI/benchmark infrastructure work including sharded test execution, signed wheel builds, and broader downstream framework coverage.

• #7886 Enable test_fused_moe.py in the MoE suite — Adds a native fallback for an unconditional kernel-library import and makes the fp8 capability check skip rather than raise on XPU, so the upstream fused mixture-of-experts test can run at all. Closes #8011. (+170/-3, @wdziurdz)
• #8031 Stop running vLLM benchmarks on max1550 automatically — Makes the max1550 vLLM benchmark run opt-in rather than scheduled. (+1/-50, @whitneywhtsang)
• #8016 Stop running Triton benchmarks on max1550 automatically — Makes the max1550 Triton benchmark run opt-in rather than scheduled. (+1/-44, @whitneywhtsang)
• #7885 Update SGLang pin to 771e613d — Advances the SGLang pin and relocates a test patch hunk to follow a file upstream moved. (+50/-8, @wdziurdz)
• #7989 Update Triton shim package version 3.7.2 to 3.8.0 — Bumps the Triton shim package version. (+6/-6, @anmyachev)
• #7950 Report n_spills in dword-equivalents per lane — Divides the raw Level Zero spill size by 4 * subgroupSize so the public n_spills matches the CUDA/HIP convention that downstream thresholds are calibrated against; codegen unchanged. (+158/-15, @etiotto)
• #7761 Never unload spirv_utils: fixes GC segfault — Stops unloading a module whose statically allocated PyTypeObject was still referenced by live instances, which segfaulted on the next garbage collection. Fixes #7682. (+199/-14, @januszjah)
• #7949 Correct the stale auto-GRF spill threshold (1000 to 0) — Fixes documentation that reported the auto-GRF-256 retry threshold as 1000 bytes when any spill triggers the retry. (+6/-4, @etiotto)
• #7703 Cache kernel num_args per specialization — Caches the shared-memory-binding decision per kernel specialization instead of re-querying SYCL kernel info on every launch, cutting per-launch overhead for repeated dispatch. (+43/-32, @NathanVoldman)
• #7921 Add support for sharded CI — Adds test sharding support and splits the language suite into two shards. (+77/-28, @gshimansky)
• #7261 Add Wan torch inductor tests — Adds a vLLM inductor test suite with a Wan2.2 test file. Closes #7283. (+795/-1, @quinnlp)
• #7893 Update vllm pin — Advances the vLLM pin with no benchmark performance impact. Closes #7871. (+9/-34, @quinnlp)
• #7911 Grant id-token to benchmark wheel-build jobs for Sigstore signing — Adds the id-token: write permission that the new signing step needs, unblocking benchmark workflows that were failing at startup validation. (+24/-4, @quinnlp)
• #7874 Unskip KDA tests — Re-enables the vLLM KDA tests. (+24/-23, @quinnlp)
• #7932 Move CodeQL build toolchain install into a reusable action — Extracts the gcc/libffi install into a composite action so other workflows needing a C compiler can reuse it. (+19/-8, @kwasd)
• #7914 Run SGLang BMG tests on b60 instead of b580 — Moves the SGLang BMG suite to b60 runners to reduce load on b580. (+4/-6, @quinnlp)
• #7900 Use rss-ubuntu-2404 runner for CodeQL workflow — Switches the CodeQL analyze and report jobs to the rss-ubuntu-2404 runner label. (+17/-2, @kwasd)
• #7840 Sign nightly and benchmarks wheels with keyless Sigstore — Attaches a Sigstore bundle to each nightly and benchmark wheel so consumers can verify wheel origin without stored keys. (+48/-1, @kwasd)
• #7881 Use wheels from partially-failed nightly runs — Lets the vLLM install script take wheels from the latest run even when an unrelated Python version failed, avoiding pin/commit mismatch errors. (+61/-25, @whitneywhtsang)