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TILERELEASE
Henk-Jan Lebbink edited this page Jun 4, 2026
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TILERELEASE — Release Tile
| Opcode/ Instruction | Op/ En | 64/32 bit Mode Support | CPUID Feature Flag | Description |
| VEX.128.NP.0F38.W0 49 C0 TILERELEASE | A | V/N.E. | AMX_TILE | Initialize TILECFG and TILEDATA. |
| Op/En | Tuple | Operand 1 | Operand 2 | Operand 3 | Operand 4 |
| A | N/A | N/A | N/A | N/A | N/A |
This instruction returns TILECFG and TILEDATA to the INIT state.
Any attempt to execute the TILERELEASE instruction inside an Intel TSX transaction will result in a transaction abort.
zero_all_tile_data()
tilecfg ← 0// equivalent to 64B of zeros
TILES_CONFIGURED ← 0TILERELEASE void _tile_release(void);None.
Source: Intel® 64 and IA-32 Architectures Software Developer's Manual, Combined Volumes (Order Number 325462-091US, March 2026)
Generated: 7-6-2026