[ExecuTorch][WebGPU] Port conv1d pointwise (aten.convolution)#21183
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[ExecuTorch][WebGPU] Port conv1d pointwise (aten.convolution)#21183JCNTH wants to merge 1 commit into
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🔗 Helpful Links🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/21183
Note: Links to docs will display an error until the docs builds have been completed. ❗ 1 Active SEVsThere are 1 currently active SEVs. If your PR is affected, please view them below: ❌ 78 New FailuresAs of commit 1ef672f with merge base 266e0dc ( NEW FAILURES - The following jobs have failed:
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Approving full WebGPU stack
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Stack from ghstack (oldest at bottom):
Adds the pointwise conv1d configuration to the
aten.convolution.defaulthandler (the depthwise config landed in the diff below). Pointwise conv1d (K=1, groups=1) is a per-position matmul over channels.Key changes:
runtime/ops/conv1d_dw/conv1d_pw.wgsl(+ generatedconv1d_pw_wgsl.h) — per NCL output(n, oc, l):sum_ic weight[oc, ic] * input[n, ic, l] + bias[oc].runtime/ops/conv1d_dw/Conv1dDW.cpp—add_conv1d_pw_nodehelper + a pointwise dispatch branch inconvolution_impl, checked BEFORE the depthwise branch (mirrors VulkanConvolution.cppis_pointwise-first). The oneaten.convolution.defaultregistration now dispatches depthwise vs pointwise, like Vulkan's singleConvolution.cpp.Mirrors Vulkan
glsl/conv1d_pw.glsl(pointwise = channel matmul) +impl/Convolution.cpp:755(is_pointwise = weight[2]==1). Raw[OC,IC,1]weight (oc*IC+ic), same no-AOT-prepack basis as the depthwise diff. A dynamic-shape resize hook recomputes the length. No-bias binds the weight buffer as an unread placeholder.Constraints: the pointwise branch is gated to
stride==1 && padding==0(the standard pointwise); a strided/padded/grouped K=1 conv falls through to a fail-loud throw. This is stricter than Vulkan'sis_pointwise = weight[2]==1alone (Vulkan's matmul shader has no stride/padding logic and would mis-handle those); the WebGPU handler fails loud instead.Differential Revision: D112257675