Hardware Oddity Xyclops Serial

Xyclops serial freeze and chip variants

Evidence: Xbox observed in the discoverer's working procedure. Catalog correction SMC-002: unsuccessful Xyclops flashing must be tied to the tested chip identity. Prehistoricman's XycloMod guide documents a working A-A02 path and explicitly excludes A-B01; “revision 1.6” alone is too coarse a flashability label.

The same procedure reports that receive-pin activity with the debug connection enabled can freeze normal SMC/Xyclops operation. The power button may stop responding until the tool exits successfully or standby power is removed. This is a board-management state transition, not just the existence of a UART.

Proposed test/model: distinguish CPU reset, SMC debug entry, serial transaction, SMC resume, interrupted transaction, and standby-power loss. Preserve chip marking and board revision in every observation; do not equate CPU reset with SMC reset.

See also Board Management: SMBus, SMC & GPIO and Firmware, Boot & ROM.