Performance Research A03 DSP JIT State Qualification

DSP JIT qualification and optimization

A03 — Implementation and validation notes

Field	Value
Evidence state	Standalone state-conversion counterexamples reproduced; native lifecycle test pending
Inspected source	322986f4c5502b3fa887a9605ac8cd88e9b2c579
First experiment	Separate current-state round trip from legacy migration
Scope	Addendum dated September 15, 2026; not a current-main benchmark or implementation status

Unproven performance research · Performance research — common test protocol · Performance research — reproducible checks

Evidence and implementation reasoning

Not a new-JIT proposal. The inspected source already contains a Rust JIT backend and a backend-independent DSPOps interface. The remaining research is qualification, lifecycle fidelity, and hotspot optimization. A separate production precedent is Gearmulator: it runs original synthesizer firmware using DSP emulation, including a DSP56300 JIT. That is a different implementation, not a drop-in replacement for xemu's Rust backend. xemu JIT, Gearmulator, DSP56300 library.

Concrete new qualification gap. dsp_jit_sync_from_vm() unconditionally applies legacy register widening. A current JIT value N=0x008000 becomes 0xff8000; N=0x128001 becomes 0xff8001; M=0x00ffff becomes 0xffffff. Those conversions can be appropriate for an old 16-bit snapshot, but are not identities over current JIT-supported state. The APU's normal stop/start path also synchronizes through shared VM state, making provenance important beyond file-format migration. Standalone source-equivalent C checks reproduce these transformations at both -O0 and -O2. This does not prove a particular game reaches the example states. Synchronization route, conversion implementation.

The shared state header separately documents narrower interrupt fields and only four retained interrupt slots versus the JIT's larger state. Qualification should explicitly define the supported state domain and require restore(save(state)) == state within that domain. Legacy conversion must be selected by state provenance/version, not guessed solely from a register bit pattern. Shared state contract.

Expected gain and tests. Establish interpreter/JIT work shares and cold/warm behavior before assigning a gain. Test arithmetic/flags, loops, interrupts, budget exits, X/Y aliases, program writes, self-modifying code, pending DMA, reset, engine switching, and repeated save/load. Keep current arithmetic discrepancies separate from optimization patches; the older interpreter is a useful comparator, not automatic hardware truth.

First patch boundary

Make state provenance explicit before optimizing dispatch or DSP code generation. A current-state round trip must not invoke legacy migration by default.

active JIT state -> shared VM state -> provenance-selected restore -> active JIT state

Locate the inspected seam before editing; names or ownership may have changed since the pinned review:

git grep -n -E 'dsp_jit_sync_from_vm|dsp_jit_sync_to_vm|sync_from_vm|sync_to_vm' -- hw/xbox/mcpx/apu

Proposed focused tests

These are implementation gates to add or exercise, not claims that production tests already exist or passed. Retained standalone checks are on the checks page.

Test ID	Setup / deliberate control	Required oracle
A03.01	Current JIT N values 0x007fff, 0x008000, 0x128001, 0xff8000 and M=0x00ffff; stop/start and save/load.	Current supported values survive bit-for-bit; the legacy widening reduction reproduces the documented counterexamples.
A03.02	Explicitly versioned legacy inputs with the documented 16-bit N/M representation.	Migration performs the required widening only for that provenance.
A03.03	Pending interrupts, loop/budget state, X/Y aliases, program writes and repeated engine switching.	The supported state domain is documented and round-trip equality holds; unsupported state is not silently truncated.

Counters and rejection criteria

Collect: register_mismatches, memory_mismatches, interrupt_mismatches, round_trip_count, cold_compile_ns, warm_dsp_cpu_ns. Keep exact counts separate from sampled durations; use an uninstrumented build for performance qualification.

Reject or hold: No JIT speed claim until state fidelity is separately qualified. A reduction proves the transform, not that a retail title reaches the example values.

Follow the common protocol for source identities, previous-main/fixed-baseline controls, raw results, confidence and retail/XISO qualification. No gain becomes proven from a model, cache hit, local operation count, or shifted wait label alone.