Corpus Testing 23

Corpus Page 23

Part 23 of 29 of Corpus Testing: every board of these projects, six runs each, one file format a run, as Corpus Testing describes.

23.1 amiga2000

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	4.2	33.3	231.7	4 ms	150.9	6.4	24.1	1.0	451.5
Simulation, STEP	4.1	33.9	235.6	4 ms	161.1	88.9	24.3	1.0	548.9
Simulation, STL	3.8	32.7	217.2	4 ms	145.6	13.1	21.9	0.9	435.3
Simulation, OBJ									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Visual, GLB	3.9	30.6	212.2	4 ms	341.5	2.9	26.2	0.7	617.8
Visual, OBJ	4.3	30.8	219.1	4 ms	372.1	116.6	31.3	0.9	775.1

Board Repo: rhaamo/kicad-amiga2000 Board: amiga2000.kicad_pcb Complexity 367 / 1000 (size 287, features 80) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings Tested 9th November 2026 to 10th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 558, 16,864, 999 Triangles, simulation 27,072,260 in 823 parts Verifier Simulation, OBJ: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Run again Visual, OBJ: failed in the corpus run, run again with the memory cap raised from 11 GB to 14.5 GB, and passed

File type File size Peak memory used Simulation GLB 934 MB 5.9 GB STEP 4.8 GB 8.2 GB STL 1.4 GB 5.9 GB OBJ – 11 GB Visual GLB 533 MB 8.0 GB OBJ 1.7 GB 11 GB

23.2 PicoEVB

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.7	9.1	0.8 ms	7.7	0.3	1.0	0.3	20.4
Simulation, STEP	0.4	1.8	9.4	0.6 ms	7.7	4.4	1.0	0.3	25.0
Simulation, STL	0.4	1.7	9.2	0.5 ms	7.8	0.7	1.0	0.3	21.1
Simulation, OBJ	0.4	1.6	9.0	0.6 ms	7.6	9.9	1.0	0.3	29.7
Visual, GLB	0.5	1.8	9.5	0.5 ms	20.8	0.2	1.7	0.4	34.9
Visual, OBJ	0.4	1.7	9.4	0.6 ms	21.8	6.1	2.4	0.3	42.1

Board Repo: RHSResearchLLC/PicoEVB Board: PicoEVB.kicad_pcb Folder Hardware / board_design Complexity 251 / 1000 (size 206, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 101, 843, 304 Triangles, simulation 1,913,616 in 76 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 66 MB 639 MB STEP 267 MB 758 MB STL 96 MB 617 MB OBJ 202 MB 1.3 GB Visual GLB 38 MB 875 MB OBJ 113 MB 845 MB

23.3 flyback-breakout-v1.0

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	1.7	0.3 ms	1.2	64 ms	0.2	0.2	4.1
Simulation, STEP	0.2	0.5	1.7	0.4 ms	1.3	1.4	0.2	0.2	5.4
Simulation, STL	0.2	0.6	1.6	0.2 ms	1.2	95 ms	0.2	0.2	4.1
Simulation, OBJ	0.2	0.5	1.6	0.3 ms	1.3	2.1	0.2	0.2	6.1
Visual, GLB	0.2	0.5	1.7	0.4 ms	3.2	51 ms	0.3	0.2	6.2
Visual, OBJ	0.2	0.5	1.6	0.3 ms	2.8	1.7	0.4	0.2	7.3

Board Repo: robojackets/robocup-pcb Board: flyback-breakout-v1.0.kicad_pcb Folder boards-archive / pre-2026 / off-robot / flyback-breakout-v1.0 Complexity 266 / 1000 (size 166, features 100) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 51, 152, 165 Triangles, simulation 431,466 in 50 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 267 MB STEP 54 MB 316 MB STL 22 MB 280 MB OBJ 43 MB 330 MB Visual GLB 12 MB 306 MB OBJ 35 MB 307 MB

23.4 teensy-adapter-v3.0

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.1	0.3 ms	1.9	94 ms	0.5	0.2	5.5
Simulation, STEP	0.1	0.5	2.1	0.3 ms	1.8	1.6	0.4	0.2	6.8
Simulation, STL	0.1	0.5	2.1	0.4 ms	1.9	0.2	0.5	0.2	5.5
Simulation, OBJ	0.1	0.5	2.1	0.4 ms	2.0	3.2	0.5	0.2	8.5
Visual, GLB	0.1	0.5	2.1	0.4 ms	4.8	48 ms	0.4	0.2	8.3
Visual, OBJ	0.1	0.5	2.1	0.4 ms	4.7	1.5	0.5	0.2	9.7

Board Repo: robojackets/robocup-pcb Board: teensy-adapter-v3.0.kicad_pcb Folder boards-archive / pre-2026 / off-robot / kicad / teensy-adapter-v3.0 Complexity 215 / 1000 (size 140, features 75) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 8, 114, 14 Triangles, simulation 781,546 in 76 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 26 MB 350 MB STEP 86 MB 393 MB STL 39 MB 343 MB OBJ 78 MB 542 MB Visual GLB 12 MB 395 MB OBJ 36 MB 397 MB

23.5 motortester-v2.0

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.7	5.4	0.8 ms	5.1	0.3	0.8	0.3	14.0
Simulation, STEP	0.6	1.8	5.5	2 ms	5.1	3.8	0.9	0.3	18.0
Simulation, STL	0.4	1.6	5.3	0.9 ms	5.1	0.6	0.8	0.2	14.0
Simulation, OBJ	0.5	2.0	5.3	0.9 ms	5.3	8.1	0.7	0.3	22.2
Visual, GLB	0.5	1.8	5.9	0.7 ms	13.0	0.2	1.7	0.3	23.4
Visual, OBJ	0.4	1.7	5.8	0.9 ms	12.5	5.2	1.7	0.3	27.6

Board Repo: robojackets/robocup-pcb Board: motortester-v2.0.kicad_pcb Folder boards-archive / pre-2026 / off-robot / motortester-v2.0 Complexity 288 / 1000 (size 193, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 76, 386, 195 Triangles, simulation 1,539,214 in 147 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 52 MB 622 MB STEP 178 MB 677 MB STL 77 MB 654 MB OBJ 159 MB 1.1 GB Visual GLB 31 MB 755 MB OBJ 95 MB 717 MB

23.6 motor-module

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.5	2.7	0.2 ms	2.3	81 ms	0.3	0.3	6.4
Simulation, STEP	0.3	0.5	2.5	0.5 ms	2.5	2.1	0.3	0.2	8.5
Simulation, STL	0.3	0.6	2.8	0.3 ms	2.5	0.2	0.2	0.2	6.7
Simulation, OBJ	0.4	0.6	2.8	0.2 ms	2.4	3.0	0.2	0.2	9.5
Visual, GLB	0.3	0.5	2.7	0.2 ms	5.6	64 ms	0.5	0.2	9.9
Visual, OBJ	0.3	0.5	2.4	0.3 ms	5.5	2.2	0.6	0.2	11.8

Board Repo: robojackets/robocup-pcb Board: motor-module.kicad_pcb Folder boards / develop-2027 / drive-motorboard / motor-module Complexity 119 / 1000 (size 109, features 10) KESE features rounded, trapezoid or chamfered pads Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 122, 0, 0 Triangles, simulation 492,312 in 94 parts Note mostly unrouted Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 18 MB 332 MB STEP 94 MB 407 MB STL 25 MB 340 MB OBJ 53 MB 396 MB Visual GLB 15 MB 455 MB OBJ 43 MB 453 MB

23.7 robocup-controller-pcb

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	1.9	6.7	0.6 ms	6.2	0.3	0.8	0.3	16.7
Simulation, STEP	0.5	1.9	6.8	1.0 ms	6.1	4.8	0.7	0.3	21.1
Simulation, STL	0.6	1.9	6.8	0.6 ms	6.4	0.5	0.8	0.3	17.2
Simulation, OBJ	0.6	1.9	6.9	0.8 ms	6.2	10.3	0.8	0.3	26.9
Visual, GLB	0.5	2.0	7.0	0.5 ms	13.6	0.2	1.7	0.3	25.3
Visual, OBJ	0.5	2.0	7.0	0.8 ms	13.0	7.0	1.7	0.3	31.6

Board Repo: robojackets/robocup-pcb Board: robocup-controller-pcb.kicad_pcb Folder boards / development / controller Complexity 342 / 1000 (size 247, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, knockout text, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 135, 982, 178 Triangles, simulation 1,720,566 in 135 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 59 MB 643 MB STEP 227 MB 759 MB STL 86 MB 614 MB OBJ 177 MB 1.1 GB Visual GLB 40 MB 878 MB OBJ 120 MB 877 MB

23.8 control-v4.0

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.1	3.8	0.5 ms	4.0	0.2	0.7	0.4	10.4
Simulation, STEP	0.2	1.0	3.6	0.9 ms	4.2	3.0	0.7	0.3	13.1
Simulation, STL	0.3	0.9	3.5	0.6 ms	3.9	0.3	0.6	0.3	9.9
Simulation, OBJ	0.3	1.0	3.7	0.6 ms	4.2	5.5	0.7	0.3	15.6
Visual, GLB	0.3	0.9	3.4	0.5 ms	8.3	0.1	1.2	0.3	14.5
Visual, OBJ	0.3	0.9	3.8	0.7 ms	8.8	3.2	1.1	0.2	18.4

Board Repo: robojackets/robocup-pcb Board: control-v4.0.kicad_pcb Folder boards / rev-2026 / control-v4.0 Complexity 269 / 1000 (size 169, features 100) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 17, 455, 45 Triangles, simulation 908,638 in 73 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 31 MB 380 MB STEP 129 MB 470 MB STL 45 MB 381 MB OBJ 92 MB 669 MB Visual GLB 18 MB 457 MB OBJ 55 MB 524 MB

23.9 control-v4.1-stm32

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.3	4.3	1 ms	5.8	0.2	0.8	0.2	13.0
Simulation, STEP	0.4	1.2	4.2	0.6 ms	5.6	3.5	0.7	0.3	15.9
Simulation, STL	0.4	1.2	4.0	0.6 ms	5.4	0.4	0.7	0.3	12.4
Simulation, OBJ	0.4	1.2	4.2	0.6 ms	5.5	5.7	0.7	0.3	18.0
Visual, GLB	0.4	1.1	4.1	0.8 ms	10.1	0.2	1.2	0.3	17.4
Visual, OBJ	0.4	1.2	4.4	0.7 ms	10.1	4.4	1.5	0.3	22.3

Board Repo: robojackets/robocup-pcb Board: control-v4.1-stm32.kicad_pcb Folder boards / rev-2026 / control-v4.1-stm32 Complexity 336 / 1000 (size 236, features 100) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 83, 795, 103 Triangles, simulation 1,237,914 in 141 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 43 MB 503 MB STEP 185 MB 599 MB STL 62 MB 495 MB OBJ 128 MB 839 MB Visual GLB 29 MB 709 MB OBJ 89 MB 719 MB

23.10 kicker-v3.4

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	2.9	8.2	0.8 ms	7.5	0.4	1.0	0.2	21.1
Simulation, STEP	0.9	2.7	7.9	0.7 ms	7.8	5.2	0.9	0.2	25.6
Simulation, STL	0.9	2.8	8.3	0.8 ms	7.6	0.6	0.9	0.2	21.3
Simulation, OBJ	0.9	2.8	8.2	0.7 ms	7.5	13.2	0.9	0.3	33.8
Visual, GLB	0.9	2.8	7.9	0.8 ms	17.0	0.2	2.0	0.3	31.1
Visual, OBJ	0.9	2.8	7.9	0.7 ms	18.1	8.9	2.3	0.2	41.1

Board Repo: robojackets/robocup-pcb Board: kicker-v3.4.kicad_pcb Folder boards / rev-2026 / kicker-v3.4 Complexity 394 / 1000 (size 254, features 140) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 146, 624, 532 Triangles, simulation 2,585,468 in 126 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 89 MB 937 MB STEP 302 MB 1.1 GB STL 129 MB 970 MB OBJ 275 MB 1.7 GB Visual GLB 59 MB 1.1 GB OBJ 184 MB 1.3 GB

23.11 motorboard-v1.0

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.7	4.9	17.2	2 ms	18.2	0.8	2.7	0.4	45.9
Simulation, STEP	1.7	5.1	17.9	1 ms	17.5	11.7	2.7	0.5	57.1
Simulation, STL	1.6	5.1	17.1	1 ms	17.7	1.9	2.6	0.4	46.4
Simulation, OBJ	1.6	4.9	16.7	1.0 ms	17.6	26.1	2.9	0.4	70.2
Visual, GLB	1.6	4.9	17.7	2 ms	45.0	0.5	6.2	0.4	76.4
Visual, OBJ	1.9	5.2	17.5	1 ms	46.0	17.4	6.7	0.3	94.9

Board Repo: robojackets/robocup-pcb Board: motorboard-v1.0.kicad_pcb Folder boards / rev-2026 / motorboard-v1.0 Complexity 332 / 1000 (size 232, features 100) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 297, 2,038, 757 Triangles, simulation 4,902,124 in 375 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 168 MB 1.5 GB STEP 656 MB 1.7 GB STL 245 MB 1.6 GB OBJ 523 MB 3.2 GB Visual GLB 105 MB 1.7 GB OBJ 336 MB 2.3 GB

23.12 Alius_6502

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.6	12.8	1 ms	11.8	0.4	1.4	0.3	29.9
Simulation, STEP	0.6	2.6	12.6	1 ms	12.3	8.6	1.4	0.3	38.4
Simulation, STL	0.5	2.5	12.8	1 ms	12.2	0.8	1.3	0.3	30.3
Simulation, OBJ	0.5	2.7	12.8	1 ms	12.1	14.7	1.3	0.3	44.4
Visual, GLB	0.5	2.5	12.3	1 ms	16.9	0.2	1.7	0.3	34.4
Visual, OBJ	0.5	2.5	12.5	1 ms	17.4	8.4	2.0	0.2	43.7

Board Repo: robsonde/Alius6502_PCB Board: Alius_6502.kicad_pcb Complexity 248 / 1000 (size 193, features 55) KESE features through vias, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 120, 1,879, 16 Triangles, simulation 2,658,232 in 209 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 85 MB 835 MB STEP 419 MB 1.1 GB STL 133 MB 825 MB OBJ 275 MB 1.7 GB Visual GLB 50 MB 1.2 GB OBJ 154 MB 1.2 GB

23.13 TINY-REFLOW-CONTROLLER

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.8	2.9	0.3 ms	2.5	0.1	0.4	0.2	7.1
Simulation, STEP	0.2	0.7	2.8	0.3 ms	2.5	1.9	0.4	0.2	8.7
Simulation, STL	0.2	0.8	2.9	0.3 ms	2.7	0.2	0.4	0.2	7.3
Simulation, OBJ	0.2	0.8	3.2	0.3 ms	2.9	3.3	0.4	0.2	10.9
Visual, GLB	0.3	0.8	2.9	0.3 ms	5.1	74 ms	0.5	0.3	9.9
Visual, OBJ	0.2	0.8	2.8	0.3 ms	5.0	2.9	0.6	0.2	12.5

Board Repo: rocketscream/TinyReflowController Board: TINY-REFLOW-CONTROLLER.kicad_pcb Complexity 278 / 1000 (size 213, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 54, 539, 147 Triangles, simulation 645,002 in 68 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 23 MB 346 MB STEP 110 MB 424 MB STL 32 MB 349 MB OBJ 66 MB 478 MB Visual GLB 18 MB 463 MB OBJ 55 MB 466 MB

23.14 GaNdapter-dual

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.2	1.1	0.2 ms	0.9	43 ms	97 ms	0.2	2.7
Simulation, STEP	0.2	0.2	1.1	0.2 ms	0.9	1.0	87 ms	0.2	3.6
Simulation, STL	0.2	0.2	0.8	0.1 ms	0.9	48 ms	93 ms	0.2	2.4
Simulation, OBJ	0.2	0.2	1.0	0.2 ms	0.8	0.8	75 ms	0.2	3.3
Visual, GLB	0.2	0.2	1.0	0.3 ms	2.1	28 ms	0.2	0.2	3.9
Visual, OBJ	0.2	0.2	1.0	0.3 ms	1.8	0.8	0.2	0.3	4.3

Board Repo: rootthecause/dcdc Board: GaNdapter-dual.kicad_pcb Folder extra / external-boards / GaNdapter-dual Complexity 241 / 1000 (size 126, features 115) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 4, 4, 88 Triangles, simulation 199,122 in 17 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.2 MB 202 MB STEP 31 MB 221 MB STL 10.0 MB 201 MB OBJ 22 MB 196 MB Visual GLB 5.6 MB 196 MB OBJ 17 MB 200 MB

23.15 GaNdapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	73 ms	32 ms	82 ms	0.1 ms	0.2	5 ms	17 ms	0.2	0.6
Simulation, STEP	95 ms	34 ms	77 ms	0.1 ms	0.2	0.2	23 ms	0.2	0.8
Simulation, STL	76 ms	34 ms	83 ms	0.1 ms	0.2	6 ms	19 ms	0.2	0.6
Simulation, OBJ	74 ms	34 ms	94 ms	0.1 ms	0.2	0.1	19 ms	0.2	0.7
Visual, GLB	77 ms	34 ms	79 ms	0.1 ms	0.3	5 ms	30 ms	0.2	0.7
Visual, OBJ	72 ms	32 ms	87 ms	0.1 ms	0.3	73 ms	27 ms	0.2	0.8

Board Repo: rootthecause/dcdc Board: GaNdapter.kicad_pcb Folder extra / external-boards / GaNdapter Complexity 129 / 1000 (size 29, features 100) KESE features slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 2, 0, 0 Triangles, simulation 18,750 in 14 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 663 kB 61 MB STEP 3.3 MB 64 MB STL 939 kB 62 MB OBJ 1.9 MB 64 MB Visual GLB 495 kB 82 MB OBJ 1.4 MB 83 MB

23.16 DCDCv9-3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	3.3	12.4	1 ms	11.4	0.6	1.4	0.3	30.2
Simulation, STEP	0.8	3.2	13.0	1 ms	11.7	6.5	1.3	0.3	36.8
Simulation, STL	0.8	3.2	12.7	0.9 ms	11.4	1.0	1.3	0.3	30.6
Simulation, OBJ	0.8	3.2	12.4	1.0 ms	11.5	15.0	1.2	0.3	44.4
Visual, GLB	0.9	3.3	12.6	1.0 ms	34.4	0.3	2.9	0.3	54.7
Visual, OBJ	0.8	3.0	12.0	1 ms	33.7	8.7	3.1	0.3	61.5

Board Repo: rootthecause/dcdc Board: DCDCv9-3.kicad_pcb Folder kicad Complexity 361 / 1000 (size 221, features 140) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 197, 682, 744 Triangles, simulation 3,136,706 in 124 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 103 MB 928 MB STEP 369 MB 1.1 GB STL 157 MB 913 MB OBJ 340 MB 2.1 GB Visual GLB 59 MB 1.3 GB OBJ 189 MB 1.2 GB

23.17 rosco_m68k

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	5.3	17.2	1 ms	20.0	0.8	2.5	0.3	47.0
Simulation, STEP	0.7	5.1	17.2	0.7 ms	19.6	10.0	2.3	0.3	55.3
Simulation, STL	0.7	5.1	17.1	0.7 ms	19.9	1.7	2.4	0.3	47.2
Simulation, OBJ	0.7	5.3	17.0	0.7 ms	19.2	22.5	2.3	0.4	67.4
Visual, GLB	0.7	5.1	17.3	0.7 ms	26.8	0.3	3.7	0.3	54.2
Visual, OBJ	0.7	5.2	16.8	0.8 ms	26.9	9.9	3.3	0.3	63.1

Board Repo: rosco-m68k/rosco_m68k Board: rosco_m68k.kicad_pcb Folder design / r0 / r0-kicad-import Complexity 240 / 1000 (size 205, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 69, 1,706, 160 Triangles, simulation 4,334,206 in 142 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 148 MB 1.0 GB STEP 561 MB 1.4 GB STL 217 MB 1.0 GB OBJ 462 MB 2.8 GB Visual GLB 65 MB 1.2 GB OBJ 206 MB 1.5 GB

23.18 rosco_m68k

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	7.3	20.9	0.8 ms	21.0	1.1	2.7	0.4	54.4
Simulation, STEP	1.1	7.2	20.7	0.6 ms	20.6	15.1	2.6	0.4	67.6
Simulation, STL	1.1	7.3	20.9	0.8 ms	20.7	2.3	2.6	0.4	55.1
Simulation, OBJ	1.1	7.2	19.8	0.6 ms	18.5	32.5	2.5	0.4	82.1
Visual, GLB	1.0	7.0	19.4	0.6 ms	37.9	0.5	6.0	0.3	72.1
Visual, OBJ	1.1	7.6	21.9	0.7 ms	40.9	18.4	6.7	0.3	96.9

Board Repo: rosco-m68k/rosco_m68k Board: rosco_m68k.kicad_pcb Folder design / r1.2 / kicad Complexity 259 / 1000 (size 214, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 74, 2,802, 259 Triangles, simulation 5,423,534 in 139 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 186 MB 1.3 GB STEP 771 MB 1.6 GB STL 271 MB 1.3 GB OBJ 582 MB 3.5 GB Visual GLB 95 MB 1.6 GB OBJ 302 MB 2.0 GB

23.19 rosco_m68k

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	5.5	18.4	0.7 ms	17.3	0.8	2.3	0.3	45.4
Simulation, STEP	0.7	5.4	18.5	0.7 ms	17.4	11.5	2.3	0.3	56.1
Simulation, STL	0.7	5.5	18.6	1 ms	16.9	1.6	2.4	0.4	46.1
Simulation, OBJ	0.7	5.4	18.8	0.6 ms	17.2	27.0	2.4	0.3	71.9
Visual, GLB	0.8	5.1	18.9	0.6 ms	27.4	0.3	3.2	0.3	56.0
Visual, OBJ	0.8	5.3	18.3	1 ms	28.1	11.8	3.6	0.4	68.3

Board Repo: rosco-m68k/rosco_m68k Board: rosco_m68k.kicad_pcb Folder design / r1 / kicad Complexity 253 / 1000 (size 208, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 72, 1,942, 188 Triangles, simulation 4,707,790 in 144 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 161 MB 1.2 GB STEP 612 MB 1.4 GB STL 235 MB 1.3 GB OBJ 504 MB 3.1 GB Visual GLB 71 MB 1.3 GB OBJ 226 MB 1.5 GB

23.20 rosco_m68k

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	5.5	16.1	1 ms	16.4	0.9	2.3	0.3	42.5
Simulation, STEP	1.0	5.4	15.6	0.7 ms	15.9	11.2	2.3	0.3	51.8
Simulation, STL	1.0	5.5	15.8	0.9 ms	16.5	1.7	2.3	0.3	43.2
Simulation, OBJ	1.1	5.7	15.9	0.9 ms	16.2	24.1	2.2	0.3	65.6
Visual, GLB	1.0	5.5	15.9	0.7 ms	36.9	0.5	5.8	0.2	65.9
Visual, OBJ	1.1	5.6	16.3	1 ms	36.9	15.0	7.3	0.3	82.5

Board Repo: rosco-m68k/rosco_m68k Board: rosco_m68k.kicad_pcb Folder design / r2 / kicad Complexity 422 / 1000 (size 272, features 150) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, knockout text, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 128, 3,716, 402 Triangles, simulation 5,616,966 in 210 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 189 MB 1.4 GB STEP 803 MB 1.8 GB STL 281 MB 1.4 GB OBJ 601 MB 3.6 GB Visual GLB 111 MB 1.8 GB OBJ 352 MB 2.4 GB

23.21 rosco_m68k

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	6.6	19.6	1 ms	19.7	1.1	3.0	0.4	51.6
Simulation, STEP	1.1	6.9	19.8	1.0 ms	20.0	12.5	2.7	0.3	63.3
Simulation, STL	1.2	6.7	20.4	1 ms	20.1	2.2	3.0	0.4	53.9
Simulation, OBJ	1.2	7.6	21.6	0.8 ms	21.2	30.5	3.1	0.3	85.4
Visual, GLB	1.2	7.7	21.5	2 ms	45.6	0.5	7.7	0.3	84.6
Visual, OBJ	1.2	6.9	20.6	1 ms	45.2	15.1	6.9	0.3	96.3

Board Repo: rosco-m68k/rosco_m68k Board: rosco_m68k.kicad_pcb Folder design / r2020 / kicad Complexity 386 / 1000 (size 261, features 125) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 87, 3,771, 341 Triangles, simulation 6,485,168 in 204 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 218 MB 1.6 GB STEP 889 MB 2.0 GB STL 324 MB 1.5 GB OBJ 694 MB 4.1 GB Visual GLB 122 MB 2.2 GB OBJ 386 MB 2.6 GB

23.22 rosco_m68k

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.4	6.7	23.0	2 ms	21.1	1.2	3.6	0.4	57.3
Simulation, STEP	1.4	6.8	23.3	0.9 ms	21.4	14.3	3.4	0.3	71.0
Simulation, STL	1.4	6.5	22.9	0.8 ms	21.1	2.4	3.9	0.3	58.5
Simulation, OBJ	1.5	6.6	23.0	1 ms	21.1	37.1	3.4	0.3	93.1
Visual, GLB	1.5	6.5	22.2	0.8 ms	48.5	0.5	6.2	0.3	85.6
Visual, OBJ	1.3	6.7	23.1	0.9 ms	51.2	19.3	6.9	0.3	108.7

Board Repo: rosco-m68k/rosco_m68k Board: rosco_m68k.kicad_pcb Folder design / r2030 / kicad Complexity 380 / 1000 (size 255, features 125) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 88, 3,017, 109 Triangles, simulation 6,108,744 in 219 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 207 MB 1.5 GB STEP 914 MB 2.0 GB STL 305 MB 1.6 GB OBJ 655 MB 3.9 GB Visual GLB 118 MB 1.9 GB OBJ 371 MB 2.4 GB

23.23 rosco_pro_030_proto

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	4.2	17.2	78.0	3 ms	60.8	3.8	12.1	0.6	176.8
Simulation, STEP	3.9	16.7	76.4	3 ms	61.2	41.2	12.6	0.6	212.6
Simulation, STL	4.2	16.3	76.8	2 ms	61.3	8.1	12.2	0.7	179.5
Simulation, OBJ	4.0	16.9	75.2	2 ms	60.3	103.0	11.6	0.7	271.7
Visual, GLB	3.9	17.0	77.1	3 ms	162.3	1.8	17.5	0.6	280.1
Visual, OBJ	4.0	17.1	75.0	3 ms	157.7	45.8	16.1	0.4	316.0

Board Repo: rosco-m68k/rosco_m68k_pro Board: rosco_pro_030_proto.kicad_pcb Folder design / pro_030_proto / kicad Complexity 415 / 1000 (size 285, features 130) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, drill offsets, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 241, 9,324, 390 Triangles, simulation 15,595,656 in 416 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 523 MB 3.5 GB STEP 2.3 GB 4.6 GB STL 780 MB 3.3 GB OBJ 1.7 GB 9.8 GB Visual GLB 265 MB 4.2 GB OBJ 851 MB 5.4 GB

23.24 xoseram

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.2	3.5	14.2	1 ms	14.8	0.5	1.3	0.3	35.8
Simulation, STEP	1.1	3.4	14.4	1 ms	14.5	8.0	1.3	0.3	43.1
Simulation, STL	1.1	3.6	13.5	1 ms	14.1	1.2	1.3	0.3	35.1
Simulation, OBJ	1.3	3.8	14.2	1 ms	14.5	15.8	1.3	0.3	51.3
Visual, GLB	1.2	3.4	13.6	1 ms	29.0	0.3	3.2	0.2	50.9
Visual, OBJ	1.2	3.5	13.8	2 ms	28.4	10.4	3.8	0.3	61.4

Board Repo: rosco-m68k/XoseraBoard Board: xoseram.kicad_pcb Folder kicad / xoseram Complexity 409 / 1000 (size 274, features 135) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 183, 2,256, 379 Triangles, simulation 3,356,522 in 288 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 115 MB 1.1 GB STEP 457 MB 1.4 GB STL 168 MB 1.1 GB OBJ 362 MB 2.2 GB Visual GLB 73 MB 1.4 GB OBJ 231 MB 1.6 GB

23.25 hellen1-mcz33810

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	1.4	0.3 ms	1.5	81 ms	0.3	0.2	4.1
Simulation, STEP	0.2	0.5	1.3	0.2 ms	1.4	1.4	0.3	0.2	5.3
Simulation, STL	0.2	0.5	1.4	0.3 ms	1.4	0.1	0.3	0.2	4.2
Simulation, OBJ	0.2	0.5	1.3	0.2 ms	1.3	2.4	0.3	0.2	6.1
Visual, GLB	0.2	0.6	1.4	0.3 ms	3.5	51 ms	0.4	0.2	6.2
Visual, OBJ	0.2	0.5	1.5	0.3 ms	3.4	1.8	0.3	0.2	7.8

Board Repo: rusefi/hellen-one Board: hellen1-mcz33810.kicad_pcb Folder kicad / modules / hellen1-mcz33810 Complexity 255 / 1000 (size 175, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 32, 342, 72 Triangles, simulation 491,272 in 54 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 312 MB STEP 69 MB 334 MB STL 25 MB 312 MB OBJ 49 MB 378 MB Visual GLB 12 MB 337 MB OBJ 37 MB 337 MB

23.26 hellen1-motor-driver

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.7	0.2 ms	0.9	46 ms	0.1	0.2	2.4
Simulation, STEP	0.1	0.2	0.8	0.2 ms	0.9	1.1	0.1	0.3	3.5
Simulation, STL	0.1	0.2	0.7	0.2 ms	0.9	57 ms	0.1	0.2	2.4
Simulation, OBJ	0.1	0.2	0.7	0.2 ms	0.9	1.2	0.1	0.3	3.6
Visual, GLB	0.1	0.2	0.7	0.3 ms	2.1	29 ms	0.2	0.2	3.6
Visual, OBJ	0.1	0.2	0.8	0.3 ms	2.3	0.9	0.1	0.3	4.7

Board Repo: rusefi/hellen-one Board: hellen1-motor-driver.kicad_pcb Folder kicad / modules / hellen1-motor-driver Complexity 229 / 1000 (size 149, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 17, 93, 27 Triangles, simulation 199,800 in 25 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 6.8 MB 220 MB STEP 28 MB 221 MB STL 10.0 MB 209 MB OBJ 19 MB 209 MB Visual GLB 4.8 MB 197 MB OBJ 14 MB 198 MB

23.27 hellen1-uaefi

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	97 ms	0.9	3.3	0.4 ms	2.7	0.1	0.5	0.2	7.8
Simulation, STEP	94 ms	0.9	3.2	0.4 ms	2.6	2.3	0.4	0.2	9.8
Simulation, STL	0.1	0.9	3.2	0.4 ms	2.7	0.2	0.5	0.2	7.7
Simulation, OBJ	97 ms	0.9	3.1	0.4 ms	2.7	5.2	0.5	0.2	12.7
Visual, GLB	96 ms	0.9	3.2	0.4 ms	5.6	57 ms	0.4	0.2	10.5
Visual, OBJ	0.1	0.9	3.3	0.4 ms	5.6	2.1	0.4	0.3	12.7

Board Repo: rusefi/hellen-one Board: hellen1-uaefi.kicad_pcb Folder kicad / modules / hellen1-uaefi Complexity 185 / 1000 (size 115, features 70) KESE features rounded, trapezoid or chamfered pads, arc tracks, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 17, 20, 0 Triangles, simulation 789,278 in 94 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 25 MB 311 MB STEP 85 MB 367 MB STL 39 MB 303 MB OBJ 80 MB 531 MB Visual GLB 12 MB 373 MB OBJ 35 MB 374 MB

23.28 hellen1-vr-discrete

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.0	0.4 ms	1.3	56 ms	0.2	0.2	3.1
Simulation, STEP	0.1	0.3	1.0	0.2 ms	1.2	1.3	0.2	0.2	4.2
Simulation, STL	0.1	0.3	1.0	0.2 ms	1.3	87 ms	0.2	0.2	3.2
Simulation, OBJ	0.1	0.3	0.9	0.2 ms	1.3	1.4	0.2	0.2	4.6
Visual, GLB	0.2	0.3	1.0	0.2 ms	2.9	41 ms	0.3	0.2	4.9
Visual, OBJ	0.1	0.3	1.0	0.2 ms	3.1	1.2	0.3	0.2	6.3

Board Repo: rusefi/hellen-one Board: hellen1-vr-discrete.kicad_pcb Folder kicad / modules / hellen1-vr-discrete Complexity 254 / 1000 (size 174, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 48, 270, 44 Triangles, simulation 358,994 in 42 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 12 MB 272 MB STEP 52 MB 284 MB STL 18 MB 273 MB OBJ 36 MB 277 MB Visual GLB 8.4 MB 280 MB OBJ 25 MB 277 MB

23.29 hellen1-vr-max9924

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	96 ms	0.1	0.5	0.2 ms	0.7	22 ms	75 ms	0.2	1.7
Simulation, STEP	0.1	0.1	0.5	0.2 ms	0.8	0.9	75 ms	0.2	2.8
Simulation, STL	93 ms	0.1	0.5	0.2 ms	0.7	33 ms	71 ms	0.2	1.8
Simulation, OBJ	0.1	0.1	0.5	0.2 ms	0.7	0.6	80 ms	0.2	2.5
Visual, GLB	97 ms	0.2	0.5	0.2 ms	1.3	14 ms	96 ms	0.2	2.4
Visual, OBJ	94 ms	0.1	0.6	0.2 ms	1.3	0.5	92 ms	0.2	2.9

Board Repo: rusefi/hellen-one Board: hellen1-vr-max9924.kicad_pcb Folder kicad / modules / hellen1-vr-max9924 Complexity 221 / 1000 (size 141, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 13, 57, 23 Triangles, simulation 119,346 in 27 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.0 MB 185 MB STEP 14 MB 196 MB STL 6.0 MB 185 MB OBJ 11 MB 188 MB Visual GLB 2.6 MB 154 MB OBJ 7.4 MB 154 MB

23.30 hellen1-wbo

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	1.4	0.4 ms	2.1	0.1	0.3	0.2	4.9
Simulation, STEP	0.2	0.5	1.4	0.4 ms	2.0	1.9	0.3	0.2	6.6
Simulation, STL	0.2	0.5	1.4	0.4 ms	2.0	0.2	0.3	0.3	4.9
Simulation, OBJ	0.2	0.5	1.4	0.3 ms	1.9	2.9	0.3	0.3	7.6
Visual, GLB	0.2	0.5	1.4	0.4 ms	4.9	65 ms	0.5	0.3	7.8
Visual, OBJ	0.2	0.4	1.3	0.4 ms	5.1	1.9	0.6	0.2	9.8

Board Repo: rusefi/hellen-one Board: hellen1-wbo.kicad_pcb Folder kicad / modules / hellen1-wbo Complexity 306 / 1000 (size 226, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 64, 448, 80 Triangles, simulation 560,150 in 68 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 19 MB 334 MB STEP 86 MB 362 MB STL 28 MB 356 MB OBJ 56 MB 417 MB Visual GLB 14 MB 384 MB OBJ 41 MB 387 MB

23.31 output.Panel_R0.5.1_300x300_2layer_step1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	12.0	95.1	413.3	5 ms	562.9	10.1	39.6	1.6	1134.5
Simulation, STEP									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Simulation, STL	13.7	95.7	428.1	5 ms	599.2	27.8	40.6	2.2	1207.3
Simulation, OBJ									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Visual, GLB									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Visual, OBJ									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory

Board Repo: rusefi/hw_microrusefi Board: output.Panel_R0.5.1_300x300_2layer_step1.kicad_pcb Folder gerbers / R0.5.1 / Panel_source_files Complexity 423 / 1000 (size 348, features 75) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline Tested 9th November 2026 to 10th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 2,241, 36,405, 7,605 Triangles, simulation 43,922,064 in 237 parts Note panel Verifier Simulation, STEP: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Simulation, OBJ: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Visual, GLB: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Visual, OBJ: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Run again Simulation, GLB; Simulation, STL: failed in the corpus run, run again with the memory cap raised from 11 GB to 14.5 GB, and passed

File type File size Peak memory used Simulation GLB 1.5 GB 12 GB STEP – 11 GB STL 2.2 GB 12 GB OBJ – 11 GB Visual GLB – 11 GB OBJ – 11 GB

23.32 output.Panel_R0.5.1_300x300_2layer_step1_Modified

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	11.0	95.0	420.2	6 ms	529.2	10.1	35.3	1.6	1102.4
Simulation, STEP									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Simulation, STL	11.1	96.0	420.7	5 ms	540.8	25.8	39.3	1.9	1135.7
Simulation, OBJ									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Visual, GLB									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Visual, OBJ									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory

Board Repo: rusefi/hw_microrusefi Board: output.Panel_R0.5.1_300x300_2layer_step1_Modified.kicad_pcb Folder gerbers / R0.5.1 / Panel_source_files Complexity 423 / 1000 (size 348, features 75) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline Tested 9th November 2026 to 10th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 2,188, 36,405, 7,605 Triangles, simulation 42,873,842 in 237 parts Note panel Verifier Simulation, STEP: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Simulation, OBJ: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Visual, GLB: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Visual, OBJ: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Run again Simulation, GLB; Simulation, STL: failed in the corpus run, run again with the memory cap raised from 11 GB to 14.5 GB, and passed

File type File size Peak memory used Simulation GLB 1.5 GB 12 GB STEP – 11 GB STL 2.1 GB 12 GB OBJ – 11 GB Visual GLB – 11 GB OBJ – 11 GB

23.33 output.Panel_R0.5.1_300x300_2layer_step1_Modified_1and5_only

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.0	4.5	1.2	1 ms	0.1	4 ms	8 ms	0.3	8.0
Simulation, STEP	1.8	4.2	0.8	2 ms	74 ms	0.1	5 ms	0.3	7.3
Simulation, STL	1.9	4.4	0.9	0.8 ms	74 ms	4 ms	6 ms	0.2	7.4
Simulation, OBJ	1.9	4.3	0.8	1 ms	77 ms	85 ms	6 ms	0.2	7.3
Visual, GLB	1.9	4.2	0.7	0.7 ms	0.1	5 ms	36 ms	0.2	7.2
Visual, OBJ	2.1	4.4	0.9	2 ms	0.1	78 ms	24 ms	0.2	7.8

Board Repo: rusefi/hw_microrusefi Board: output.Panel_R0.5.1_300x300_2layer_step1_Modified_1and5_only.kicad_pcb Folder gerbers / R0.5.1 / Panel_source_files Complexity 368 / 1000 (size 293, features 75) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 487, 8,095, 1,691 Triangles, simulation 19,142 in 5 parts Note panel Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 640 kB 248 MB STEP 1.1 MB 265 MB STL 958 kB 260 MB OBJ 1.9 MB 261 MB Visual GLB 723 kB 261 MB OBJ 1.9 MB 249 MB

23.34 Panel_R0.5.1_300x300_2layer_step1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	10.6	84.5	376.1	3 ms	560.1	9.7	34.1	1.4	1076.5
Simulation, STEP									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Simulation, STL	12.3	87.4	369.7	3 ms	589.2	26.9	44.6	1.8	1131.8
Simulation, OBJ									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Visual, GLB									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Visual, OBJ									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory

Board Repo: rusefi/hw_microrusefi Board: Panel_R0.5.1_300x300_2layer_step1.kicad_pcb Folder gerbers / R0.5.1 / Panel_source_files Complexity 423 / 1000 (size 348, features 75) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline Tested 9th November 2026 to 10th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 2,097, 36,405, 7,605 Triangles, simulation 42,281,164 in 237 parts Note panel Verifier Simulation, STEP: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Simulation, OBJ: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Visual, GLB: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Visual, OBJ: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Run again Simulation, GLB; Simulation, STL: failed in the corpus run, run again with the memory cap raised from 11 GB to 14.5 GB, and passed

File type File size Peak memory used Simulation GLB 1.5 GB 12 GB STEP – 11 GB STL 2.1 GB 12 GB OBJ – 11 GB Visual GLB – 11 GB OBJ – 11 GB

23.35 zMRETestFixture

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	5.0	29.7	0.8 ms	20.2	0.9	3.1	0.4	60.3
Simulation, STEP	1.0	5.1	31.3	0.9 ms	23.9	14.0	3.0	0.4	78.8
Simulation, STL	1.1	5.2	29.7	0.9 ms	20.7	1.9	3.1	0.3	62.0
Simulation, OBJ	1.1	5.0	30.7	0.8 ms	20.8	29.2	2.9	0.4	90.2
Visual, GLB	1.0	5.3	31.8	1 ms	53.7	0.5	6.0	0.3	98.7
Visual, OBJ	1.0	4.9	30.8	0.8 ms	56.6	21.6	6.8	0.4	122.2

Board Repo: rusefi/hw_microrusefi Board: zMRETestFixture.kicad_pcb Complexity 249 / 1000 (size 204, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 to 10th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 190, 1,607, 431 Triangles, simulation 4,664,266 in 178 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 161 MB 1.5 GB STEP 799 MB 1.9 GB STL 233 MB 1.6 GB OBJ 505 MB 3.1 GB Visual GLB 114 MB 1.9 GB OBJ 359 MB 2.3 GB

23.36 Motor_driver_A4988

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.7	0.1 ms	0.9	32 ms	0.1	0.2	2.2
Simulation, STEP	0.2	0.2	0.7	0.2 ms	0.8	1.0	0.1	0.2	3.1
Simulation, STL	0.1	0.2	0.7	0.2 ms	0.9	47 ms	0.1	0.2	2.2
Simulation, OBJ	0.1	0.2	0.7	0.2 ms	0.9	1.1	0.1	0.2	3.3
Visual, GLB	0.1	0.2	0.7	0.2 ms	1.8	26 ms	0.2	0.2	3.2
Visual, OBJ	0.1	0.2	0.7	0.2 ms	1.9	0.8	0.1	0.2	4.1

Board Repo: rusefi/rusefi-hardware Board: Motor_driver_A4988.kicad_pcb Folder A4988_stepper_motor_driver Complexity 255 / 1000 (size 180, features 75) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 19, 197, 21 Triangles, simulation 217,518 in 37 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.5 MB 213 MB STEP 36 MB 240 MB STL 11 MB 213 MB OBJ 21 MB 213 MB Visual GLB 5.6 MB 220 MB OBJ 16 MB 221 MB

23.37 Breakout-24pin-superseal

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	1.3	0.3 ms	1.0	52 ms	0.1	0.2	3.2
Simulation, STEP	0.1	0.3	1.2	0.2 ms	1.0	1.2	0.2	0.2	4.1
Simulation, STL	0.1	0.3	1.3	0.2 ms	0.9	65 ms	0.2	0.2	3.1
Simulation, OBJ	0.1	0.3	1.3	0.2 ms	1.0	1.2	0.1	0.2	4.2
Visual, GLB	0.1	0.3	1.4	0.2 ms	2.3	29 ms	0.2	0.2	4.5
Visual, OBJ	0.1	0.3	1.3	0.2 ms	2.3	0.9	0.2	0.2	5.2

Board Repo: rusefi/rusefi-hardware Board: Breakout-24pin-superseal.kicad_pcb Folder breakout-boards / Breakout-24pin-superseal Complexity 149 / 1000 (size 109, features 40) KESE features slotted holes, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 2, 134, 0 Triangles, simulation 336,614 in 38 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 12 MB 239 MB STEP 51 MB 262 MB STL 17 MB 239 MB OBJ 34 MB 278 MB Visual GLB 7.5 MB 240 MB OBJ 22 MB 228 MB

23.38 24pins_In_3conn

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	1.7	0.2 ms	1.2	56 ms	0.2	0.2	3.9
Simulation, STEP	0.1	0.4	1.7	0.2 ms	1.1	1.3	0.2	0.2	5.0
Simulation, STL	0.2	0.4	1.7	0.2 ms	1.2	89 ms	0.2	0.2	3.9
Simulation, OBJ	0.1	0.4	1.6	0.2 ms	1.1	1.9	0.2	0.2	5.6
Visual, GLB	0.1	0.4	1.8	0.3 ms	2.9	36 ms	0.3	0.2	5.7
Visual, OBJ	0.2	0.4	1.8	0.3 ms	2.8	1.2	0.3	0.3	6.8

Board Repo: rusefi/rusefi-hardware Board: 24pins_In_3conn.kicad_pcb Folder breakout-boards / Breakout-24pin Complexity 157 / 1000 (size 117, features 40) KESE features slotted holes, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 4, 156, 0 Triangles, simulation 318,636 in 36 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 227 MB STEP 49 MB 254 MB STL 16 MB 235 MB OBJ 32 MB 264 MB Visual GLB 7.2 MB 228 MB OBJ 21 MB 230 MB

23.39 284617-1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.8	10.4	0.6 ms	7.4	0.3	1.1	0.3	21.7
Simulation, STEP	0.4	1.9	10.8	1 ms	7.4	5.6	1.1	0.2	27.5
Simulation, STL	0.4	1.9	10.3	0.6 ms	7.1	0.7	1.0	0.2	21.6
Simulation, OBJ	0.4	1.8	10.4	0.6 ms	7.7	11.8	1.1	0.2	33.5
Visual, GLB	0.4	1.8	10.4	0.6 ms	17.8	0.3	2.0	0.2	32.9
Visual, OBJ	0.4	1.8	10.8	0.8 ms	17.5	8.0	2.2	0.3	41.0

Board Repo: rusefi/rusefi-hardware Board: 284617-1.kicad_pcb Folder breakout-boards / Breakout_154pin_284617-1-Connector Complexity 185 / 1000 (size 155, features 30) KESE features filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 13, 823, 0 Triangles, simulation 2,138,614 in 167 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 72 MB 809 MB STEP 314 MB 916 MB STL 107 MB 788 MB OBJ 222 MB 1.4 GB Visual GLB 50 MB 1.1 GB OBJ 154 MB 1.1 GB

23.40 CDI-test

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.6	0.3 ms	1.1	57 ms	0.2	0.2	3.6
Simulation, STEP	0.2	0.3	1.6	0.2 ms	1.1	1.2	0.2	0.2	4.8
Simulation, STL	0.1	0.3	1.6	0.2 ms	1.0	85 ms	0.2	0.2	3.6
Simulation, OBJ	0.2	0.3	1.6	0.3 ms	1.1	1.9	0.2	0.2	5.4
Visual, GLB	0.2	0.3	1.6	0.2 ms	2.3	32 ms	0.3	0.2	4.8
Visual, OBJ	0.2	0.3	1.7	0.2 ms	2.1	1.1	0.2	0.2	5.7

Board Repo: rusefi/rusefi-hardware Board: CDI-test.kicad_pcb Folder CDI-test Complexity 186 / 1000 (size 131, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 17, 37, 40 Triangles, simulation 381,408 in 22 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 12 MB 274 MB STEP 47 MB 288 MB STL 19 MB 275 MB OBJ 38 MB 293 MB Visual GLB 8.0 MB 267 MB OBJ 23 MB 267 MB

23.41 inj_12ch

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.1	3.6	0.7 ms	2.5	0.1	0.4	0.2	8.1
Simulation, STEP	0.3	1.1	3.4	0.5 ms	2.4	2.1	0.3	0.2	9.8
Simulation, STL	0.3	1.1	3.3	0.7 ms	2.5	0.2	0.4	0.2	7.9
Simulation, OBJ	0.3	1.2	3.6	0.5 ms	2.5	3.8	0.3	0.2	12.0
Visual, GLB	0.3	1.2	3.5	0.5 ms	6.0	92 ms	0.6	0.2	11.9
Visual, OBJ	0.2	1.1	3.8	0.7 ms	5.8	3.2	0.7	0.2	15.1

Board Repo: rusefi/rusefi-hardware Board: inj_12ch.kicad_pcb Folder classic-designs / 1A_injector_12-channels Complexity 214 / 1000 (size 179, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 56, 791, 196 Triangles, simulation 793,042 in 56 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 27 MB 455 MB STEP 116 MB 474 MB STL 40 MB 403 MB OBJ 81 MB 571 MB Visual GLB 23 MB 538 MB OBJ 68 MB 532 MB

23.42 inj_6ch

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	3.6	0.5 ms	2.6	0.1	0.4	0.3	7.9
Simulation, STEP	0.2	0.7	3.4	0.4 ms	2.7	1.9	0.4	0.3	9.6
Simulation, STL	0.2	0.6	3.4	0.3 ms	2.5	0.3	0.4	0.2	7.7
Simulation, OBJ	0.2	0.8	3.7	0.4 ms	2.5	3.6	0.4	0.2	11.4
Visual, GLB	0.2	0.7	3.4	0.4 ms	6.2	82 ms	0.7	0.2	11.5
Visual, OBJ	0.2	0.7	3.5	0.4 ms	6.3	2.7	0.9	0.3	14.6

Board Repo: rusefi/rusefi-hardware Board: inj_6ch.kicad_pcb Folder classic-designs / 1A_injector_6-channels Complexity 210 / 1000 (size 165, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 35, 472, 114 Triangles, simulation 757,786 in 44 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 27 MB 351 MB STEP 134 MB 415 MB STL 38 MB 391 MB OBJ 80 MB 564 MB Visual GLB 19 MB 441 MB OBJ 58 MB 476 MB

23.43 PWR_5V_linear

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	1.5	0.1 ms	1.2	49 ms	0.2	0.2	3.6
Simulation, STEP	0.1	0.3	1.5	0.1 ms	1.1	1.2	0.2	0.3	4.7
Simulation, STL	0.1	0.3	1.6	0.2 ms	1.2	68 ms	0.2	0.3	3.7
Simulation, OBJ	0.1	0.3	1.5	0.1 ms	1.1	1.7	0.2	0.2	5.1
Visual, GLB	0.1	0.3	1.5	0.2 ms	2.8	37 ms	0.2	0.3	5.2
Visual, OBJ	0.1	0.3	1.5	0.2 ms	3.0	1.2	0.3	0.2	6.6

Board Repo: rusefi/rusefi-hardware Board: PWR_5V_linear.kicad_pcb Folder classic-designs / 5V-regulator Complexity 170 / 1000 (size 135, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 16, 97, 38 Triangles, simulation 289,116 in 21 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 10 MB 231 MB STEP 47 MB 247 MB STL 14 MB 242 MB OBJ 29 MB 232 MB Visual GLB 7.2 MB 230 MB OBJ 21 MB 251 MB

23.44 stepper_motor_driver

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	64 ms	32 ms	0.1	0.1 ms	0.2	4 ms	16 ms	0.2	0.6
Simulation, STEP	72 ms	33 ms	96 ms	0.1 ms	0.2	0.2	24 ms	0.2	0.8
Simulation, STL	62 ms	33 ms	0.1	0.1 ms	0.2	6 ms	20 ms	0.2	0.6
Simulation, OBJ	62 ms	33 ms	0.1	0.1 ms	0.2	0.1	16 ms	0.2	0.7
Visual, GLB	64 ms	34 ms	97 ms	0.1 ms	0.3	4 ms	31 ms	0.2	0.7
Visual, OBJ	79 ms	41 ms	0.1	0.1 ms	0.3	78 ms	29 ms	0.2	0.8

Board Repo: rusefi/rusefi-hardware Board: stepper_motor_driver.kicad_pcb Folder classic-designs / A4988_stepper_motor_driver Complexity 64 / 1000 (size 64, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 1, 0, 0 Triangles, simulation 27,684 in 9 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 986 kB 64 MB STEP 4.1 MB 66 MB STL 1.4 MB 65 MB OBJ 2.7 MB 75 MB Visual GLB 696 kB 81 MB OBJ 1.9 MB 94 MB

23.45 adc_amp_divider_vert

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	3.1	0.3 ms	2.4	0.1	0.3	0.2	7.1
Simulation, STEP	0.2	0.6	2.8	0.3 ms	2.5	2.2	0.3	0.2	8.8
Simulation, STL	0.2	0.6	2.7	0.3 ms	2.5	0.2	0.3	0.2	6.7
Simulation, OBJ	0.2	0.5	2.9	0.4 ms	2.4	2.9	0.4	0.3	9.6
Visual, GLB	0.2	0.5	2.8	0.3 ms	5.7	90 ms	0.9	0.2	10.4
Visual, OBJ	0.2	0.6	2.9	0.3 ms	6.1	2.8	1.0	0.2	13.8

Board Repo: rusefi/rusefi-hardware Board: adc_amp_divider_vert.kicad_pcb Folder classic-designs / adc_amp_divider.vertical Complexity 206 / 1000 (size 171, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 75, 554, 42 Triangles, simulation 626,696 in 58 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 22 MB 385 MB STEP 124 MB 438 MB STL 31 MB 401 MB OBJ 64 MB 464 MB Visual GLB 20 MB 543 MB OBJ 58 MB 534 MB

23.46 adc_amp_divider

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.0	4.3	0.5 ms	3.9	0.1	0.6	0.3	10.6
Simulation, STEP	0.3	1.1	4.3	0.5 ms	4.1	3.9	0.5	0.3	14.6
Simulation, STL	0.3	1.0	4.3	0.7 ms	4.2	0.3	0.5	0.3	10.9
Simulation, OBJ	0.3	1.0	4.3	0.8 ms	4.2	4.9	0.6	0.4	15.7
Visual, GLB	0.3	1.0	4.4	1 ms	10.6	0.2	1.6	0.3	18.3
Visual, OBJ	0.3	1.0	4.3	1.0 ms	10.9	4.5	1.9	0.3	23.2

Board Repo: rusefi/rusefi-hardware Board: adc_amp_divider.kicad_pcb Folder classic-designs / adc_amp_divider.vertical12 Complexity 209 / 1000 (size 174, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 111, 567, 33 Triangles, simulation 889,936 in 79 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 31 MB 525 MB STEP 178 MB 589 MB STL 45 MB 544 MB OBJ 92 MB 642 MB Visual GLB 30 MB 658 MB OBJ 88 MB 664 MB

23.47 adc_amp_divider

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.0	5.5	0.5 ms	4.8	0.2	0.6	0.3	12.6
Simulation, STEP	0.4	1.1	5.3	0.5 ms	5.2	3.8	0.6	0.3	16.6
Simulation, STL	0.3	1.0	5.2	0.4 ms	4.7	0.3	0.6	0.3	12.3
Simulation, OBJ	0.3	1.1	5.2	0.4 ms	4.5	4.8	0.6	0.3	16.7
Visual, GLB	0.3	1.0	5.3	0.5 ms	11.7	0.1	1.3	0.2	19.9
Visual, OBJ	0.3	1.1	5.3	0.5 ms	12.1	4.5	1.6	0.3	25.2

Board Repo: rusefi/rusefi-hardware Board: adc_amp_divider.kicad_pcb Folder classic-designs / adc_amp_divider Complexity 215 / 1000 (size 180, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 113, 743, 66 Triangles, simulation 883,980 in 79 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 31 MB 526 MB STEP 172 MB 554 MB STL 44 MB 513 MB OBJ 91 MB 635 MB Visual GLB 29 MB 753 MB OBJ 85 MB 746 MB

23.48 adc_amp_dividor

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.5	0.2 ms	1.8	0.1	0.3	0.2	5.7
Simulation, STEP	0.3	0.6	2.5	0.3 ms	1.9	1.7	0.3	0.2	7.5
Simulation, STL	0.2	0.6	2.6	0.3 ms	1.8	0.1	0.4	0.2	5.9
Simulation, OBJ	0.3	0.6	2.7	0.4 ms	2.1	2.5	0.3	0.2	8.6
Visual, GLB	0.2	0.6	2.5	0.3 ms	4.7	63 ms	0.5	0.2	8.8
Visual, OBJ	0.2	0.6	2.5	0.3 ms	4.7	2.5	0.7	0.2	11.3

Board Repo: rusefi/rusefi-hardware Board: adc_amp_dividor.kicad_pcb Folder classic-designs / adc_amp_divider / history / rev00.10 Complexity 210 / 1000 (size 175, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 84, 684, 55 Triangles, simulation 489,820 in 56 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 311 MB STEP 85 MB 376 MB STL 24 MB 317 MB OBJ 51 MB 395 MB Visual GLB 15 MB 443 MB OBJ 45 MB 445 MB

23.49 adc_amp_divider

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.1	5.5	0.6 ms	4.5	0.2	0.6	0.3	12.6
Simulation, STEP	0.4	1.0	5.4	0.3 ms	4.6	4.1	0.6	0.3	16.5
Simulation, STL	0.4	1.0	5.5	0.4 ms	4.5	0.3	0.6	0.3	12.6
Simulation, OBJ	0.4	1.1	5.8	0.4 ms	4.5	5.3	0.7	0.3	17.9
Visual, GLB	0.4	1.1	5.7	0.6 ms	10.7	0.2	1.5	0.3	19.7
Visual, OBJ	0.4	1.2	5.7	0.5 ms	10.6	5.1	1.7	0.3	25.1

Board Repo: rusefi/rusefi-hardware Board: adc_amp_divider.kicad_pcb Folder classic-designs / adc_amp_divider / history / rev00.20 Complexity 215 / 1000 (size 180, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 113, 738, 64 Triangles, simulation 869,902 in 79 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 30 MB 461 MB STEP 169 MB 583 MB STL 44 MB 470 MB OBJ 90 MB 619 MB Visual GLB 28 MB 742 MB OBJ 83 MB 639 MB

23.50 frankenso-PWR-Supply

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	1.3	0.2 ms	1.0	37 ms	0.1	0.2	3.0
Simulation, STEP	0.1	0.2	1.3	0.2 ms	1.0	1.0	0.1	0.2	4.0
Simulation, STL	0.1	0.3	1.3	0.1 ms	1.0	61 ms	0.2	0.2	3.2
Simulation, OBJ	0.1	0.2	1.4	0.1 ms	1.0	1.3	0.1	0.2	4.4
Visual, GLB	0.1	0.3	1.3	0.2 ms	2.1	32 ms	0.2	0.2	4.3
Visual, OBJ	0.1	0.3	1.4	0.2 ms	2.3	1.1	0.2	0.2	5.6

Board Repo: rusefi/rusefi-hardware Board: frankenso-PWR-Supply.kicad_pcb Folder classic-designs / frankenso-PWR-Supply Complexity 190 / 1000 (size 135, features 55) KESE features through vias, slotted holes, filled zones, copper text Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 21, 106, 25 Triangles, simulation 262,346 in 24 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.4 MB 247 MB STEP 47 MB 257 MB STL 13 MB 246 MB OBJ 27 MB 237 MB Visual GLB 6.9 MB 222 MB OBJ 20 MB 216 MB

23.51 frankenso

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.8	19.2	85.8	2 ms	69.4	2.8	10.3	0.5	191.7
Simulation, STEP	3.7	19.0	85.4	2 ms	68.2	36.9	9.8	0.5	223.6
Simulation, STL	3.7	19.1	83.0	3 ms	70.8	6.1	10.5	0.6	193.9
Simulation, OBJ	4.0	19.8	89.0	2 ms	69.0	88.2	10.7	0.5	281.2
Visual, GLB	3.8	19.7	87.9	2 ms	176.9	1.6	12.8	0.5	303.1
Visual, OBJ	3.9	19.3	89.3	2 ms	173.6	48.7	12.3	0.4	347.5

Board Repo: rusefi/rusefi-hardware Board: frankenso.kicad_pcb Folder classic-designs / frankenso Complexity 356 / 1000 (size 291, features 65) KESE features through vias, slotted holes, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 551, 5,736, 1,102 Triangles, simulation 14,232,850 in 426 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 493 MB 3.1 GB STEP 2.2 GB 4.2 GB STL 712 MB 3.0 GB OBJ 1.6 GB 9.1 GB Visual GLB 296 MB 4.5 GB OBJ 942 MB 5.8 GB

23.52 frankenstein

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	3.9	17.1	1 ms	13.8	0.5	1.8	0.3	38.3
Simulation, STEP	0.9	3.9	17.7	0.7 ms	14.0	9.9	1.7	0.4	48.6
Simulation, STL	0.9	4.0	17.0	1 ms	13.7	1.1	1.9	0.3	39.0
Simulation, OBJ	0.8	3.8	17.4	3 ms	14.1	16.7	1.9	0.4	55.2
Visual, GLB	0.8	4.1	17.6	0.8 ms	39.4	0.5	5.3	0.2	68.0
Visual, OBJ	0.9	4.1	18.3	1 ms	37.5	14.6	5.5	0.3	81.3

Board Repo: rusefi/rusefi-hardware Board: frankenstein.kicad_pcb Folder classic-designs / frankenstein Complexity 246 / 1000 (size 211, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 242, 2,835, 326 Triangles, simulation 3,108,884 in 196 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 108 MB 1.3 GB STEP 564 MB 1.4 GB STL 155 MB 1.2 GB OBJ 331 MB 2.0 GB Visual GLB 91 MB 1.7 GB OBJ 280 MB 2.0 GB

23.53 hi-lo

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.1	0.2 ms	0.9	41 ms	0.2	0.2	2.9
Simulation, STEP	0.2	0.3	1.2	0.2 ms	0.9	1.1	0.1	0.2	4.0
Simulation, STL	0.2	0.4	1.2	0.1 ms	0.9	60 ms	0.2	0.2	3.0
Simulation, OBJ	0.1	0.3	1.1	0.2 ms	0.9	1.4	0.1	0.2	4.2
Visual, GLB	0.2	0.3	1.3	0.2 ms	2.3	47 ms	0.2	0.2	4.5
Visual, OBJ	0.1	0.3	1.2	0.1 ms	2.3	1.3	0.2	0.2	5.7

Board Repo: rusefi/rusefi-hardware Board: hi-lo.kicad_pcb Folder classic-designs / hi-lo_driver Complexity 183 / 1000 (size 148, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 28, 208, 41 Triangles, simulation 286,036 in 38 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 10.0 MB 256 MB STEP 46 MB 259 MB STL 14 MB 248 MB OBJ 29 MB 251 MB Visual GLB 8.5 MB 262 MB OBJ 25 MB 259 MB

23.54 VN750PS_E

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	89 ms	0.2	0.6	0.1 ms	0.8	29 ms	0.1	0.2	2.0
Simulation, STEP	95 ms	0.3	0.6	0.1 ms	0.8	0.9	0.1	0.2	2.9
Simulation, STL	0.1	0.2	0.6	0.1 ms	0.8	45 ms	0.1	0.2	2.2
Simulation, OBJ	95 ms	0.3	0.6	0.1 ms	0.8	1.1	0.2	0.2	3.3
Visual, GLB	95 ms	0.2	0.5	0.1 ms	1.6	22 ms	0.1	0.2	2.8
Visual, OBJ	95 ms	0.2	0.6	0.1 ms	1.5	0.6	0.1	0.2	3.4

Board Repo: rusefi/rusefi-hardware Board: VN750PS_E.kicad_pcb Folder classic-designs / HighSideSwitch Complexity 187 / 1000 (size 152, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 3 (3) Parts, tracks, vias 8, 143, 58 Triangles, simulation 218,614 in 23 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.0 MB 222 MB STEP 19 MB 223 MB STL 11 MB 216 MB OBJ 21 MB 215 MB Visual GLB 4.2 MB 174 MB OBJ 12 MB 177 MB

23.55 cps_vrs_io_1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.5	0.3 ms	1.1	61 ms	0.2	0.3	3.5
Simulation, STEP	0.2	0.3	1.5	0.2 ms	1.0	1.2	0.2	0.3	4.7
Simulation, STL	0.2	0.3	1.4	0.3 ms	1.1	66 ms	0.2	0.2	3.4
Simulation, OBJ	0.2	0.3	1.4	0.3 ms	1.1	1.5	0.2	0.2	4.8
Visual, GLB	0.2	0.4	1.5	0.2 ms	2.5	35 ms	0.2	0.2	4.9
Visual, OBJ	0.2	0.3	1.4	0.2 ms	2.5	1.1	0.2	0.2	5.9

Board Repo: rusefi/rusefi-hardware Board: cps_vrs_io_1.kicad_pcb Folder classic-designs / knock_VR_Art_ELectro Complexity 187 / 1000 (size 142, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 33, 173, 9 Triangles, simulation 244,486 in 41 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.9 MB 228 MB STEP 46 MB 252 MB STL 12 MB 241 MB OBJ 25 MB 236 MB Visual GLB 6.6 MB 229 MB OBJ 19 MB 221 MB

23.56 PWR_buck_12V_switcher

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.3	0.3 ms	1.1	62 ms	0.2	0.2	3.3
Simulation, STEP	0.2	0.3	1.2	0.4 ms	1.1	1.1	0.1	0.2	4.2
Simulation, STL	0.1	0.3	1.3	0.2 ms	1.0	56 ms	0.1	0.2	3.1
Simulation, OBJ	0.1	0.3	1.3	0.2 ms	1.0	1.4	0.1	0.2	4.5
Visual, GLB	0.1	0.3	1.2	0.2 ms	2.2	42 ms	0.2	0.2	4.4
Visual, OBJ	0.1	0.3	1.3	0.2 ms	2.5	1.1	0.2	0.2	5.7

Board Repo: rusefi/rusefi-hardware Board: PWR_buck_12V_switcher.kicad_pcb Folder classic-designs / power_supply_kb1gtt Complexity 169 / 1000 (size 134, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 21, 104, 22 Triangles, simulation 255,264 in 23 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.2 MB 232 MB STEP 46 MB 246 MB STL 13 MB 224 MB OBJ 27 MB 231 MB Visual GLB 7.0 MB 210 MB OBJ 20 MB 210 MB

23.57 inj_6ch

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.8	3.8	0.4 ms	2.8	0.1	0.4	0.2	8.4
Simulation, STEP	0.2	0.8	3.7	0.4 ms	2.8	2.1	0.4	0.2	10.3
Simulation, STL	0.2	0.8	3.8	0.3 ms	2.8	0.2	0.4	0.2	8.3
Simulation, OBJ	0.2	0.8	3.6	0.3 ms	2.7	3.9	0.4	0.2	11.8
Visual, GLB	0.2	0.7	3.8	0.4 ms	6.4	80 ms	0.5	0.2	11.8
Visual, OBJ	0.2	0.8	3.7	0.3 ms	6.3	3.0	0.5	0.2	14.6

Board Repo: rusefi/rusefi-hardware Board: inj_6ch.kicad_pcb Folder classic-designs / rusefi_hardware_history / 1A_injector_6-channels_rev00.20 Complexity 210 / 1000 (size 165, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 35, 472, 114 Triangles, simulation 741,604 in 44 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 26 MB 362 MB STEP 130 MB 403 MB STL 37 MB 341 MB OBJ 78 MB 556 MB Visual GLB 19 MB 443 MB OBJ 56 MB 439 MB

23.58 stm32f407_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.6	7.2	0.5 ms	5.8	0.2	0.9	0.3	16.4
Simulation, STEP	0.4	1.6	7.2	0.6 ms	5.6	4.3	0.8	0.3	20.1
Simulation, STL	0.4	1.6	7.0	0.5 ms	5.4	0.3	0.8	0.2	15.7
Simulation, OBJ	0.4	1.5	6.7	0.5 ms	5.6	7.8	0.9	0.2	23.1
Visual, GLB	0.4	1.5	6.8	0.6 ms	12.3	0.2	1.4	0.2	22.8
Visual, OBJ	0.4	1.5	6.7	0.4 ms	12.6	6.3	1.3	0.3	29.1

Board Repo: rusefi/rusefi-hardware Board: stm32f407_board.kicad_pcb Folder classic-designs / rusefi_hardware_history / brain_board_rev00.10 Complexity 255 / 1000 (size 220, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 66, 1,158, 61 Triangles, simulation 1,389,348 in 131 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 48 MB 525 MB STEP 249 MB 724 MB STL 69 MB 517 MB OBJ 144 MB 934 MB Visual GLB 41 MB 733 MB OBJ 122 MB 929 MB

23.59 brain_board_STM32F407

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.6	10.2	0.8 ms	6.2	0.3	1.0	0.3	20.0
Simulation, STEP	0.4	1.7	10.2	0.7 ms	6.0	4.5	0.9	0.2	23.9
Simulation, STL	0.4	1.7	10.3	0.6 ms	6.1	0.6	1.0	0.2	20.4
Simulation, OBJ	0.4	1.7	9.9	0.6 ms	6.1	9.2	0.9	0.2	28.4
Visual, GLB	0.4	1.7	9.8	0.8 ms	15.0	0.2	1.6	0.3	29.0
Visual, OBJ	0.4	1.6	10.0	1 ms	14.5	6.7	1.8	0.2	35.4

Board Repo: rusefi/rusefi-hardware Board: brain_board_STM32F407.kicad_pcb Folder classic-designs / rusefi_hardware_history / brain_board_rev00.20 Complexity 268 / 1000 (size 223, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 69, 1,301, 83 Triangles, simulation 1,706,544 in 123 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 60 MB 690 MB STEP 325 MB 773 MB STL 85 MB 659 MB OBJ 182 MB 1.2 GB Visual GLB 46 MB 984 MB OBJ 139 MB 971 MB

23.60 brain_board_STM32F407

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.7	10.2	2 ms	7.7	0.3	1.0	0.3	21.4
Simulation, STEP	0.4	1.8	10.1	1.0 ms	6.9	4.7	1.0	0.3	25.3
Simulation, STL	0.5	1.7	9.8	1 ms	7.3	0.5	1.1	0.3	21.1
Simulation, OBJ	0.4	1.8	10.0	1 ms	7.3	9.0	1.3	0.3	29.9
Visual, GLB	0.6	1.8	10.3	2 ms	16.5	0.2	1.9	0.3	31.6
Visual, OBJ	0.4	1.7	9.5	1 ms	15.5	6.3	2.1	0.2	35.7

Board Repo: rusefi/rusefi-hardware Board: brain_board_STM32F407.kicad_pcb Folder classic-designs / rusefi_hardware_history / brain_board_rev00.30 / brain_board Complexity 271 / 1000 (size 226, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 69, 1,561, 92 Triangles, simulation 1,683,722 in 123 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 59 MB 697 MB STEP 321 MB 744 MB STL 84 MB 634 MB OBJ 179 MB 1.2 GB Visual GLB 45 MB 936 MB OBJ 134 MB 925 MB

23.61 brain_board_SD_Card_1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	94 ms	0.1	0.4	0.1 ms	0.6	18 ms	66 ms	0.2	1.5
Simulation, STEP	98 ms	0.1	0.5	0.1 ms	0.7	0.8	68 ms	0.2	2.5
Simulation, STL	94 ms	0.1	0.5	0.1 ms	0.6	32 ms	73 ms	0.2	1.7
Simulation, OBJ	0.1	0.1	0.5	0.1 ms	0.6	0.5	74 ms	0.2	2.1
Visual, GLB	90 ms	0.1	0.5	0.2 ms	1.3	14 ms	92 ms	0.2	2.3
Visual, OBJ	0.1	0.1	0.5	0.1 ms	1.4	0.4	85 ms	0.2	2.8

Board Repo: rusefi/rusefi-hardware Board: brain_board_SD_Card_1.kicad_pcb Folder classic-designs / rusefi_hardware_history / brain_board_SD_Card_1_rev00.10 Complexity 140 / 1000 (size 105, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 5, 40, 8 Triangles, simulation 104,462 in 18 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.7 MB 179 MB STEP 19 MB 187 MB STL 5.2 MB 176 MB OBJ 10 MB 183 MB Visual GLB 3.0 MB 157 MB OBJ 8.2 MB 159 MB

23.62 pin_board_1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	3.8	0.7 ms	3.3	0.1	0.4	0.2	8.7
Simulation, STEP	0.2	0.7	3.8	0.6 ms	3.4	2.4	0.4	0.3	11.1
Simulation, STL	0.2	0.7	3.8	0.3 ms	3.3	0.2	0.4	0.2	8.8
Simulation, OBJ	0.2	0.7	3.9	0.3 ms	3.4	4.0	0.4	0.3	12.9
Visual, GLB	0.2	0.7	3.8	0.4 ms	7.2	78 ms	0.6	0.2	12.8
Visual, OBJ	0.2	0.7	3.8	0.6 ms	7.1	2.5	0.6	0.3	15.2

Board Repo: rusefi/rusefi-hardware Board: pin_board_1.kicad_pcb Folder classic-designs / rusefi_hardware_history / breakout_board_rev00.10 Complexity 181 / 1000 (size 136, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 50, 77, 9 Triangles, simulation 680,032 in 42 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 22 MB 343 MB STEP 104 MB 424 MB STL 34 MB 335 MB OBJ 68 MB 498 MB Visual GLB 15 MB 441 MB OBJ 45 MB 439 MB

23.63 pin_board_1_x2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.3	7.1	0.5 ms	5.8	0.2	0.6	0.3	15.6
Simulation, STEP	0.3	1.4	7.4	0.3 ms	5.9	3.8	0.6	0.2	19.6
Simulation, STL	0.3	1.4	7.4	0.3 ms	6.3	0.3	0.6	0.3	16.7
Simulation, OBJ	0.3	1.4	7.3	0.5 ms	5.9	7.2	0.6	0.2	22.9
Visual, GLB	0.3	1.4	7.2	0.4 ms	12.0	0.1	0.9	0.2	22.2
Visual, OBJ	0.3	1.4	7.1	0.4 ms	12.4	4.3	1.2	0.2	26.9

Board Repo: rusefi/rusefi-hardware Board: pin_board_1_x2.kicad_pcb Folder classic-designs / rusefi_hardware_history / breakout_board_rev00.10 Complexity 199 / 1000 (size 154, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 100, 154, 18 Triangles, simulation 1,290,772 in 72 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 44 MB 476 MB STEP 199 MB 626 MB STL 65 MB 539 MB OBJ 133 MB 851 MB Visual GLB 27 MB 623 MB OBJ 82 MB 711 MB

23.64 Breakout_TLE6244

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	1.2	4.7	0.4 ms	3.3	0.2	0.5	0.2	10.3
Simulation, STEP	0.3	1.1	5.1	0.6 ms	3.3	2.3	0.5	0.3	12.8
Simulation, STL	0.3	1.1	4.7	0.6 ms	3.1	0.2	0.5	0.2	10.1
Simulation, OBJ	0.3	1.1	5.0	0.4 ms	3.2	4.6	0.5	0.2	14.9
Visual, GLB	0.3	1.1	4.8	0.3 ms	8.6	0.1	0.7	0.2	15.8
Visual, OBJ	0.3	1.1	4.8	0.4 ms	8.7	2.9	0.9	0.2	18.9

Board Repo: rusefi/rusefi-hardware Board: Breakout_TLE6244.kicad_pcb Folder classic-designs / rusefi_hardware_history / Breakout_TLE6244_rev00.10 / Breakout_TLE6244 Complexity 275 / 1000 (size 230, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 3 (3) Parts, tracks, vias 73, 517, 100 Triangles, simulation 977,132 in 94 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 34 MB 395 MB STEP 147 MB 474 MB STL 49 MB 420 MB OBJ 101 MB 706 MB Visual GLB 22 MB 504 MB OBJ 66 MB 546 MB

23.65 denso079721_outline-append

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	5.9	22.2	0.6 ms	14.3	0.5	1.8	0.3	46.0
Simulation, STEP	1.2	5.9	22.0	0.7 ms	14.4	8.8	1.6	0.3	54.1
Simulation, STL	1.2	5.9	22.3	1 ms	14.3	0.9	1.7	0.3	46.5
Simulation, OBJ	1.2	5.8	21.7	0.6 ms	14.5	17.5	1.6	0.3	62.5
Visual, GLB	1.1	5.8	22.0	1 ms	31.2	0.3	3.2	0.3	64.0
Visual, OBJ	1.1	6.0	22.4	1.0 ms	31.4	12.6	3.3	0.3	77.0

Board Repo: rusefi/rusefi-hardware Board: denso079721_outline-append.kicad_pcb Folder classic-designs / rusefi_hardware_history / Breakout_TLE6244_rev00.10 / rusefi_lib / outlines Complexity 302 / 1000 (size 257, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 341, 3,172, 406 Triangles, simulation 3,221,878 in 198 parts Verifier Simulation, GLB: Verifier FAIL Simulation, STEP: Verifier FAIL Simulation, STL: Verifier FAIL Simulation, OBJ: Verifier FAIL Bad design Bad design according to KESE: copper of two nets on top of each other in the file, a short KiCad's DRC reports; a plated hole with no net overlaps a GND plated hole at (214.30, 108.84) mm. KESE models what the file says, so the Verifier rightly finds the two nets' solids overlapping

File type File size Peak memory used Simulation GLB 114 MB 1.1 GB STEP 606 MB 1.3 GB STL 161 MB 1.1 GB OBJ 350 MB 2.2 GB Visual GLB 83 MB 1.5 GB OBJ 259 MB 1.7 GB

23.66 can_brd_1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	61 ms	9 ms	0.0 ms	12 ms	1 ms	3 ms	0.2	0.4
Simulation, STEP	91 ms	58 ms	9 ms	0.0 ms	12 ms	14 ms	2 ms	0.2	0.4
Simulation, STL	96 ms	64 ms	11 ms	0.1 ms	13 ms	0.9 ms	2 ms	0.2	0.4
Simulation, OBJ	91 ms	60 ms	10 ms	0.0 ms	11 ms	5 ms	2 ms	0.2	0.4
Visual, GLB	91 ms	53 ms	9 ms	0.1 ms	22 ms	1 ms	9 ms	0.2	0.4
Visual, OBJ	97 ms	53 ms	8 ms	0.0 ms	25 ms	5 ms	8 ms	0.2	0.4

Board Repo: rusefi/rusefi-hardware Board: can_brd_1.kicad_pcb Folder classic-designs / rusefi_hardware_history / can_board_rev00.10 Complexity 164 / 1000 (size 119, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 10, 87, 6 Triangles, simulation 840 in 3 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 27 kB 58 MB STEP 20 kB 60 MB STL 42 kB 60 MB OBJ 76 kB 60 MB Visual GLB 34 kB 64 MB OBJ 76 kB 65 MB

23.67 can_brd_1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	96 ms	0.1	0.5	0.1 ms	0.6	27 ms	83 ms	0.2	1.7
Simulation, STEP	0.1	0.1	0.5	0.1 ms	0.6	0.8	74 ms	0.2	2.5
Simulation, STL	0.1	0.1	0.5	0.1 ms	0.6	31 ms	77 ms	0.2	1.6
Simulation, OBJ	0.1	0.1	0.5	0.1 ms	0.6	0.7	73 ms	0.2	2.4
Visual, GLB	95 ms	0.2	0.5	0.1 ms	1.3	17 ms	0.1	0.2	2.4
Visual, OBJ	98 ms	0.1	0.6	0.1 ms	1.4	0.6	87 ms	0.2	3.0

Board Repo: rusefi/rusefi-hardware Board: can_brd_1.kicad_pcb Folder classic-designs / rusefi_hardware_history / can_board_rev00.20 / can_board Complexity 151 / 1000 (size 116, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 11, 71, 3 Triangles, simulation 131,798 in 22 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.6 MB 202 MB STEP 25 MB 210 MB STL 6.6 MB 200 MB OBJ 13 MB 190 MB Visual GLB 3.7 MB 166 MB OBJ 10 MB 168 MB

23.68 O2_input_CJ125

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	1.7	0.3 ms	1.6	77 ms	0.3	0.2	4.4
Simulation, STEP	0.2	0.6	1.6	0.3 ms	1.6	1.5	0.3	0.2	6.0
Simulation, STL	0.2	0.5	1.6	0.2 ms	1.6	0.1	0.3	0.2	4.4
Simulation, OBJ	0.2	0.5	1.6	0.3 ms	1.6	2.4	0.3	0.2	6.8
Visual, GLB	0.2	0.5	1.7	0.4 ms	4.2	50 ms	0.5	0.2	7.4
Visual, OBJ	0.2	0.5	1.7	0.3 ms	4.3	1.5	0.4	0.3	8.8

Board Repo: rusefi/rusefi-hardware Board: O2_input_CJ125.kicad_pcb Folder classic-designs / rusefi_hardware_history / CJ125_board_rev00.20 Complexity 214 / 1000 (size 169, features 45) KESE features through vias, filled zones, copper text Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 31, 244, 48 Triangles, simulation 453,734 in 45 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 16 MB 274 MB STEP 67 MB 298 MB STL 23 MB 282 MB OBJ 47 MB 349 MB Visual GLB 10 MB 287 MB OBJ 31 MB 299 MB

23.69 DDPAK_breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	96 ms	0.2	1.0	0.1 ms	0.8	29 ms	89 ms	0.2	2.3
Simulation, STEP	0.1	0.2	0.8	0.1 ms	0.7	0.9	89 ms	0.2	3.1
Simulation, STL	86 ms	0.2	0.8	0.1 ms	0.8	47 ms	90 ms	0.2	2.2
Simulation, OBJ	89 ms	0.2	0.9	0.1 ms	0.8	0.9	99 ms	0.2	3.2
Visual, GLB	0.1	0.2	0.8	0.1 ms	1.9	24 ms	0.2	0.2	3.5
Visual, OBJ	95 ms	0.2	0.9	0.1 ms	1.9	0.7	0.1	0.2	4.2

Board Repo: rusefi/rusefi-hardware Board: DDPAK_breakout.kicad_pcb Folder classic-designs / rusefi_hardware_history / DDPAK_breakout_rev00.10 / DDPAK_breakout Complexity 165 / 1000 (size 130, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 4, 112, 76 Triangles, simulation 180,580 in 15 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 6.2 MB 200 MB STEP 24 MB 215 MB STL 9.0 MB 200 MB OBJ 18 MB 201 MB Visual GLB 4.7 MB 190 MB OBJ 13 MB 190 MB

23.70 frankenso-PWR-Supply

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.4	0.2 ms	1.0	40 ms	0.1	0.2	3.2
Simulation, STEP	0.1	0.3	1.4	0.2 ms	1.0	1.2	0.2	0.2	4.4
Simulation, STL	0.1	0.3	1.5	0.2 ms	1.0	58 ms	0.1	0.2	3.3
Simulation, OBJ	0.1	0.3	1.3	0.1 ms	1.0	1.4	0.2	0.2	4.4
Visual, GLB	0.1	0.3	1.4	0.2 ms	2.3	41 ms	0.2	0.2	4.7
Visual, OBJ	0.2	0.3	1.4	0.1 ms	2.3	1.1	0.2	0.2	5.7

Board Repo: rusefi/rusefi-hardware Board: frankenso-PWR-Supply.kicad_pcb Folder classic-designs / rusefi_hardware_history / frankenso_power_supply_rev00.10 / frankenso-PWR-Supply Complexity 191 / 1000 (size 136, features 55) KESE features through vias, slotted holes, filled zones, copper text Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 21, 107, 25 Triangles, simulation 264,622 in 24 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.5 MB 239 MB STEP 47 MB 255 MB STL 13 MB 237 MB OBJ 27 MB 242 MB Visual GLB 7.0 MB 224 MB OBJ 20 MB 231 MB

23.71 frankenso

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.4	12.3	51.5	4 ms	45.9	2.1	6.6	0.5	121.4
Simulation, STEP	2.4	12.2	51.4	3 ms	46.9	25.2	6.9	0.5	145.5
Simulation, STL	2.4	12.2	51.1	3 ms	45.0	4.3	6.8	0.4	122.3
Simulation, OBJ	2.3	12.4	51.8	2 ms	46.7	55.0	6.6	0.5	175.3
Visual, GLB	2.5	12.7	52.5	2 ms	111.0	1.1	10.6	0.4	190.8
Visual, OBJ	2.5	12.5	51.8	3 ms	111.0	32.3	11.6	0.5	222.2

Board Repo: rusefi/rusefi-hardware Board: frankenso.kicad_pcb Folder classic-designs / rusefi_hardware_history / frankenso_rev00.20 / frankenso Complexity 339 / 1000 (size 284, features 55) KESE features through vias, slotted holes, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 3 (3) Parts, tracks, vias 483, 4,621, 660 Triangles, simulation 9,519,422 in 372 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 332 MB 2.1 GB STEP 1.6 GB 3.0 GB STL 476 MB 2.1 GB OBJ 1.0 GB 6.1 GB Visual GLB 207 MB 3.1 GB OBJ 656 MB 4.1 GB

23.72 frankenso

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.3	16.5	79.7	2 ms	66.3	2.7	9.6	0.6	178.7
Simulation, STEP	3.2	16.8	79.0	4 ms	65.9	34.3	9.6	0.6	209.3
Simulation, STL	3.4	16.6	79.7	2 ms	65.5	5.7	9.1	0.5	180.6
Simulation, OBJ	3.3	15.8	79.0	4 ms	65.4	76.7	9.4	0.6	250.2
Visual, GLB	3.3	16.9	81.8	4 ms	165.4	1.4	14.4	0.6	283.6
Visual, OBJ	3.5	16.9	81.1	2 ms	165.3	42.6	14.7	0.6	324.7

Board Repo: rusefi/rusefi-hardware Board: frankenso.kicad_pcb Folder classic-designs / rusefi_hardware_history / frankenso_rev00.40 / frankenso Complexity 354 / 1000 (size 289, features 65) KESE features through vias, slotted holes, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 528, 5,233, 1,013 Triangles, simulation 13,229,682 in 384 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 458 MB 3.0 GB STEP 2.0 GB 3.9 GB STL 662 MB 3.0 GB OBJ 1.5 GB 8.4 GB Visual GLB 265 MB 4.1 GB OBJ 844 MB 5.4 GB

23.73 frankenso

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.8	18.8	89.4	2 ms	69.9	3.7	10.8	0.6	196.9
Simulation, STEP	3.9	18.4	90.2	3 ms	70.7	38.2	10.1	0.6	232.1
Simulation, STL	3.6	18.2	88.2	2 ms	65.8	6.8	10.2	0.5	193.3
Simulation, OBJ	3.5	17.7	85.5	3 ms	66.3	89.5	10.1	0.5	273.0
Visual, GLB	4.0	17.7	85.4	3 ms	180.6	1.6	15.1	0.5	304.9
Visual, OBJ	4.2	19.9	94.2	2 ms	230.2	64.0	16.3	0.6	429.3

Board Repo: rusefi/rusefi-hardware Board: frankenso.kicad_pcb Folder classic-designs / rusefi_hardware_history / frankenso_rev00.50 / frankenso Complexity 355 / 1000 (size 290, features 65) KESE features through vias, slotted holes, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 552, 5,576, 1,031 Triangles, simulation 14,019,168 in 435 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 486 MB 3.0 GB STEP 2.2 GB 4.2 GB STL 701 MB 2.9 GB OBJ 1.5 GB 9.0 GB Visual GLB 289 MB 4.3 GB OBJ 919 MB 5.8 GB

23.74 discovery

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.7	7.1	18.4	0.2 ms	21.6	0.5	2.1	0.3	51.6
Simulation, STEP	1.6	7.3	18.4	0.2 ms	21.5	9.9	2.1	0.2	61.1
Simulation, STL	1.8	7.2	18.7	0.1 ms	22.0	1.1	2.3	0.3	53.4
Simulation, OBJ	1.9	7.5	19.5	0.2 ms	22.6	18.1	2.2	0.3	72.1
Visual, GLB	2.1	7.5	18.2	0.1 ms	44.3	0.4	4.0	0.3	77.0
Visual, OBJ	1.8	7.5	19.8	0.3 ms	45.1	13.8	4.0	0.3	92.4

Board Repo: rusefi/rusefi-hardware Board: discovery.kicad_pcb Folder classic-designs / rusefi_hardware_history / frankenso_rev00.50 / rusefi_lib / outlines / stm-discovery-F4 Complexity 198 / 1000 (size 183, features 15) KESE features through vias Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 0, 22,985, 884 Triangles, simulation 3,312,690 in 12 parts Note no components Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 114 MB 1.3 GB STEP 703 MB 1.6 GB STL 166 MB 1.3 GB OBJ 353 MB 2.2 GB Visual GLB 88 MB 1.5 GB OBJ 277 MB 1.8 GB

23.75 frankenstein

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	3.6	15.1	0.7 ms	13.2	0.5	1.7	0.3	35.1
Simulation, STEP	0.8	3.6	15.2	0.8 ms	12.6	8.9	1.5	0.3	43.0
Simulation, STL	0.8	3.7	15.2	0.7 ms	13.2	1.0	1.5	0.3	35.8
Simulation, OBJ	0.9	3.4	14.8	0.8 ms	13.4	15.1	1.6	0.3	49.5
Visual, GLB	0.7	3.5	15.4	0.8 ms	32.9	0.4	4.5	0.3	57.7
Visual, OBJ	0.7	3.6	15.5	1.0 ms	33.8	12.6	4.7	0.3	71.3

Board Repo: rusefi/rusefi-hardware Board: frankenstein.kicad_pcb Folder classic-designs / rusefi_hardware_history / frankenstein_rev00.10 Complexity 246 / 1000 (size 211, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 240, 2,820, 299 Triangles, simulation 3,088,840 in 196 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 108 MB 1.2 GB STEP 570 MB 1.4 GB STL 154 MB 1.2 GB OBJ 330 MB 2.0 GB Visual GLB 91 MB 1.4 GB OBJ 281 MB 1.8 GB

23.76 frankenstein

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	4.1	17.2	1 ms	14.0	0.5	1.8	0.4	39.0
Simulation, STEP	1.0	4.2	18.2	0.7 ms	14.8	10.4	1.8	0.3	50.7
Simulation, STL	0.9	4.2	17.3	1 ms	14.7	1.1	1.9	0.3	40.4
Simulation, OBJ	1.0	4.2	17.6	0.9 ms	14.5	17.7	1.9	0.3	57.2
Visual, GLB	0.9	4.2	17.8	0.9 ms	36.8	0.4	4.7	0.3	65.1
Visual, OBJ	0.9	4.2	17.8	1 ms	35.4	14.7	4.9	0.2	78.2

Board Repo: rusefi/rusefi-hardware Board: frankenstein.kicad_pcb Folder classic-designs / rusefi_hardware_history / frankenstein_rev00.11 Complexity 246 / 1000 (size 211, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 242, 2,835, 326 Triangles, simulation 3,189,268 in 196 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 111 MB 1.2 GB STEP 586 MB 1.4 GB STL 159 MB 1.1 GB OBJ 341 MB 2.1 GB Visual GLB 94 MB 1.4 GB OBJ 290 MB 1.9 GB

23.77 hi-lo

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.8	0.2 ms	0.8	40 ms	0.1	0.2	2.3
Simulation, STEP	0.1	0.2	0.9	0.2 ms	0.8	1.0	0.1	0.2	3.4
Simulation, STL	0.1	0.2	0.9	0.2 ms	0.8	56 ms	0.1	0.2	2.5
Simulation, OBJ	0.1	0.2	0.9	0.2 ms	0.8	0.9	0.1	0.2	3.2
Visual, GLB	0.1	0.2	0.8	0.2 ms	2.0	43 ms	0.3	0.2	3.7
Visual, OBJ	0.2	0.2	0.8	0.2 ms	1.9	0.8	0.3	0.3	4.5

Board Repo: rusefi/rusefi-hardware Board: hi-lo.kicad_pcb Folder classic-designs / rusefi_hardware_history / hi-lo_driver_rev00.10 Complexity 175 / 1000 (size 140, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 27, 159, 14 Triangles, simulation 217,088 in 38 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.6 MB 232 MB STEP 39 MB 246 MB STL 11 MB 234 MB OBJ 22 MB 226 MB Visual GLB 7.0 MB 229 MB OBJ 20 MB 226 MB

23.78 DD HIP9011

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.9	0.2 ms	1.3	57 ms	0.2	0.3	4.2
Simulation, STEP	0.2	0.3	1.8	0.3 ms	1.3	1.3	0.2	0.2	5.3
Simulation, STL	0.2	0.3	1.8	0.3 ms	1.3	94 ms	0.2	0.2	4.2
Simulation, OBJ	0.2	0.3	1.8	0.3 ms	1.3	1.9	0.2	0.2	6.0
Visual, GLB	0.2	0.3	1.8	0.2 ms	2.9	45 ms	0.3	0.3	5.8
Visual, OBJ	0.2	0.3	1.8	0.2 ms	2.8	1.5	0.3	0.2	7.2

Board Repo: rusefi/rusefi-hardware Board: DD HIP9011.kicad_pcb Folder classic-designs / rusefi_hardware_history / hip9011_rev00.10 Complexity 180 / 1000 (size 145, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 34, 201, 10 Triangles, simulation 319,850 in 36 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 247 MB STEP 60 MB 285 MB STL 16 MB 246 MB OBJ 33 MB 251 MB Visual GLB 8.9 MB 272 MB OBJ 26 MB 270 MB

23.79 cps_vrs_io_1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.3	0.2 ms	1.0	44 ms	0.2	0.3	3.2
Simulation, STEP	0.2	0.3	1.3	0.2 ms	1.0	1.3	0.1	0.2	4.4
Simulation, STL	0.1	0.3	1.3	0.4 ms	1.1	81 ms	0.2	0.2	3.2
Simulation, OBJ	0.1	0.3	1.4	0.2 ms	1.1	1.2	0.2	0.2	4.6
Visual, GLB	0.1	0.2	1.4	0.2 ms	2.6	41 ms	0.2	0.2	4.9
Visual, OBJ	0.1	0.2	1.4	0.3 ms	2.7	1.0	0.3	0.2	6.1

Board Repo: rusefi/rusefi-hardware Board: cps_vrs_io_1.kicad_pcb Folder classic-designs / rusefi_hardware_history / knock_VR_Art_ELectro_rev00.10 Complexity 187 / 1000 (size 142, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 32, 182, 8 Triangles, simulation 236,430 in 42 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.6 MB 222 MB STEP 44 MB 248 MB STL 12 MB 222 MB OBJ 24 MB 227 MB Visual GLB 6.4 MB 216 MB OBJ 18 MB 218 MB

23.80 tle6240_driver

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.5	2.0	0.3 ms	2.1	92 ms	0.3	0.3	5.4
Simulation, STEP	0.2	0.5	2.1	0.3 ms	2.1	1.7	0.3	0.2	7.0
Simulation, STL	0.1	0.6	2.0	0.3 ms	2.0	0.1	0.3	0.2	5.3
Simulation, OBJ	0.2	0.5	2.2	0.3 ms	2.2	2.8	0.3	0.2	8.3
Visual, GLB	0.1	0.6	2.1	0.3 ms	4.1	54 ms	0.4	0.2	7.6
Visual, OBJ	0.1	0.5	2.1	0.5 ms	4.0	1.8	0.3	0.2	9.1

Board Repo: rusefi/rusefi-hardware Board: tle6240_driver.kicad_pcb Folder classic-designs / rusefi_hardware_history / low_side_tle6240_rev00.10 Complexity 181 / 1000 (size 146, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 12, 363, 40 Triangles, simulation 462,804 in 48 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 16 MB 288 MB STEP 80 MB 331 MB STL 23 MB 295 MB OBJ 48 MB 331 MB Visual GLB 11 MB 333 MB OBJ 32 MB 335 MB

23.81 tle6240_driver

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.8	0.3 ms	4.1	72 ms	0.3	0.2	7.1
Simulation, STEP	0.1	0.4	1.9	0.3 ms	4.2	1.5	0.3	0.2	8.7
Simulation, STL	0.1	0.3	1.9	0.3 ms	4.4	0.1	0.3	0.2	7.4
Simulation, OBJ	0.1	0.4	1.9	0.3 ms	4.2	2.2	0.3	0.2	9.4
Visual, GLB	0.1	0.4	1.9	0.3 ms	4.5	53 ms	0.4	0.3	7.7
Visual, OBJ	0.1	0.4	1.9	0.4 ms	4.3	1.5	0.4	0.3	8.9

Board Repo: rusefi/rusefi-hardware Board: tle6240_driver.kicad_pcb Folder classic-designs / rusefi_hardware_history / low_side_tle6240_rev00.11 Complexity 181 / 1000 (size 146, features 35) KESE features through vias, filled zones Tested 9th November 2026 to 10th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 12, 363, 40 Triangles, simulation 449,184 in 48 parts Verifier PASS in all six runs Run again Simulation, GLB; Simulation, STEP; Simulation, STL; Simulation, OBJ: failed in the corpus run, run again with fixes to KESE made after the corpus run, and passed

File type File size Peak memory used Simulation GLB 15 MB 283 MB STEP 72 MB 333 MB STL 22 MB 286 MB OBJ 45 MB 359 MB Visual GLB 11 MB 344 MB OBJ 33 MB 340 MB

23.82 Map_MPX

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	92 ms	72 ms	0.2	0.1 ms	0.5	11 ms	38 ms	0.2	1.2
Simulation, STEP	95 ms	69 ms	0.2	0.1 ms	0.6	0.7	37 ms	0.2	1.9
Simulation, STL	86 ms	68 ms	0.2	0.1 ms	0.5	19 ms	39 ms	0.2	1.2
Simulation, OBJ	83 ms	88 ms	0.2	0.1 ms	0.5	0.3	40 ms	0.2	1.4
Visual, GLB	86 ms	72 ms	0.2	0.2 ms	0.7	11 ms	71 ms	0.2	1.4
Visual, OBJ	85 ms	67 ms	0.2	0.1 ms	0.7	0.3	63 ms	0.2	1.6

Board Repo: rusefi/rusefi-hardware Board: Map_MPX.kicad_pcb Folder classic-designs / rusefi_hardware_history / Map_MPX_rev00.20 / Map_MPX Complexity 127 / 1000 (size 92, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 6, 21, 2 Triangles, simulation 61,680 in 15 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 2.2 MB 71 MB STEP 12 MB 182 MB STL 3.1 MB 73 MB OBJ 6.0 MB 84 MB Visual GLB 2.0 MB 113 MB OBJ 5.6 MB 114 MB

23.83 mini48-stm32

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.3	0.3 ms	2.3	0.1	0.3	0.2	6.0
Simulation, STEP	0.2	0.6	2.1	0.2 ms	2.2	1.9	0.3	0.2	7.6
Simulation, STL	0.2	0.6	2.3	0.3 ms	2.2	0.1	0.3	0.2	6.0
Simulation, OBJ	0.2	0.5	2.2	1 ms	2.3	2.5	0.3	0.2	8.2
Visual, GLB	0.2	0.5	2.4	0.3 ms	5.6	67 ms	0.7	0.2	9.7
Visual, OBJ	0.2	0.5	2.5	0.3 ms	5.8	2.4	0.7	0.3	12.3

Board Repo: rusefi/rusefi-hardware Board: mini48-stm32.kicad_pcb Folder classic-designs / rusefi_hardware_history / mini48-stm32_rev00.20 / mini48-stm32 Complexity 246 / 1000 (size 201, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 36, 496, 45 Triangles, simulation 603,828 in 66 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 21 MB 337 MB STEP 107 MB 396 MB STL 30 MB 357 MB OBJ 61 MB 449 MB Visual GLB 17 MB 443 MB OBJ 52 MB 464 MB

23.84 NGC_38_connector

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	2.1	0.3 ms	1.8	78 ms	0.3	0.3	5.0
Simulation, STEP	0.1	0.3	2.2	0.3 ms	2.0	1.6	0.3	0.2	6.7
Simulation, STL	0.1	0.3	2.1	0.4 ms	1.8	0.1	0.3	0.2	4.9
Simulation, OBJ	0.1	0.3	2.1	0.4 ms	1.9	2.7	0.3	0.2	7.6
Visual, GLB	0.1	0.3	2.1	0.3 ms	3.0	47 ms	0.3	0.2	5.9
Visual, OBJ	0.1	0.3	2.1	0.3 ms	2.9	1.3	0.3	0.2	7.2

Board Repo: rusefi/rusefi-hardware Board: NGC_38_connector.kicad_pcb Folder classic-designs / rusefi_hardware_history / NGC_38_connector_rev00.10 / NGC_38_connector Complexity 134 / 1000 (size 134, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 9, 276, 0 Triangles, simulation 500,704 in 49 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 273 MB STEP 70 MB 340 MB STL 25 MB 273 MB OBJ 50 MB 378 MB Visual GLB 9.0 MB 318 MB OBJ 27 MB 315 MB

23.85 NGC_38_connector

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	2.2	0.4 ms	1.9	81 ms	0.3	0.2	5.1
Simulation, STEP	0.1	0.3	2.0	0.3 ms	1.7	1.7	0.3	0.2	6.4
Simulation, STL	84 ms	0.3	2.2	0.3 ms	2.1	0.1	0.3	0.2	5.3
Simulation, OBJ	0.1	0.3	2.2	0.4 ms	1.8	2.6	0.3	0.3	7.6
Visual, GLB	0.1	0.3	2.1	0.4 ms	3.1	41 ms	0.4	0.3	6.3
Visual, OBJ	0.1	0.3	2.1	0.9 ms	3.1	1.3	0.4	0.2	7.5

Board Repo: rusefi/rusefi-hardware Board: NGC_38_connector.kicad_pcb Folder classic-designs / rusefi_hardware_history / NGC_38_connector_rev00.11 / NGC_38_connector Complexity 134 / 1000 (size 134, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 9, 276, 0 Triangles, simulation 501,166 in 49 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 16 MB 271 MB STEP 70 MB 339 MB STL 25 MB 271 MB OBJ 50 MB 377 MB Visual GLB 9.1 MB 321 MB OBJ 27 MB 311 MB

23.86 NGC_38_connector

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	69 ms	0.2	1.3	0.3 ms	2.1	42 ms	0.2	0.2	4.0
Simulation, STEP	70 ms	0.2	1.2	0.2 ms	2.1	1.1	0.1	0.2	5.0
Simulation, STL	71 ms	0.2	1.2	0.2 ms	2.2	70 ms	0.2	0.2	4.1
Simulation, OBJ	82 ms	0.2	1.3	0.5 ms	2.2	1.2	0.2	0.2	5.2
Visual, GLB	85 ms	0.2	1.3	0.2 ms	2.7	22 ms	0.2	0.2	4.6
Visual, OBJ	90 ms	0.2	1.4	0.2 ms	2.5	0.6	0.2	0.3	5.2

Board Repo: rusefi/rusefi-hardware Board: NGC_38_connector.kicad_pcb Folder classic-designs / rusefi_hardware_history / NGC_38_connector_rev00.20 / NGC_38_connector Complexity 111 / 1000 (size 111, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 5, 96, 0 Triangles, simulation 271,710 in 49 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.2 MB 227 MB STEP 41 MB 255 MB STL 14 MB 228 MB OBJ 27 MB 228 MB Visual GLB 4.9 MB 216 MB OBJ 14 MB 216 MB

23.87 NGC_38_connector

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	1.1	0.4 ms	1.4	40 ms	0.2	0.3	3.3
Simulation, STEP	84 ms	0.3	1.2	0.2 ms	1.3	1.2	0.2	0.2	4.5
Simulation, STL	90 ms	0.2	1.1	0.3 ms	1.3	0.1	0.2	0.2	3.2
Simulation, OBJ	91 ms	0.2	1.1	0.3 ms	1.4	1.2	0.2	0.2	4.3
Visual, GLB	93 ms	0.2	1.0	0.3 ms	1.8	19 ms	0.1	0.2	3.4
Visual, OBJ	99 ms	0.2	1.1	0.3 ms	1.8	0.6	0.1	0.2	4.1

Board Repo: rusefi/rusefi-hardware Board: NGC_38_connector.kicad_pcb Folder classic-designs / rusefi_hardware_history / NGC_38_connector_rev00.30 / NGC_38_connector Complexity 117 / 1000 (size 117, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 5, 136, 0 Triangles, simulation 268,182 in 49 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.9 MB 224 MB STEP 37 MB 246 MB STL 13 MB 224 MB OBJ 26 MB 234 MB Visual GLB 4.3 MB 204 MB OBJ 12 MB 205 MB

23.88 PWR_buck_12V_switcher

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	1.0	0.2 ms	0.8	36 ms	0.1	0.2	2.5
Simulation, STEP	0.1	0.2	0.9	0.1 ms	0.8	0.9	0.1	0.2	3.3
Simulation, STL	0.1	0.2	1.0	0.2 ms	0.9	41 ms	0.1	0.2	2.6
Simulation, OBJ	0.1	0.3	1.0	0.1 ms	0.8	0.9	0.1	0.2	3.4
Visual, GLB	0.1	0.2	1.0	0.2 ms	2.2	36 ms	0.3	0.2	4.0
Visual, OBJ	0.1	0.2	1.0	0.2 ms	1.9	0.7	0.2	0.2	4.4

Board Repo: rusefi/rusefi-hardware Board: PWR_buck_12V_switcher.kicad_pcb Folder classic-designs / rusefi_hardware_history / power_supply_kb1gtt_rev00.10 Complexity 166 / 1000 (size 131, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 18, 86, 22 Triangles, simulation 225,100 in 20 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.1 MB 220 MB STEP 40 MB 236 MB STL 11 MB 212 MB OBJ 24 MB 214 MB Visual GLB 6.3 MB 201 MB OBJ 18 MB 202 MB

23.89 PowerSSO-24_breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	95 ms	0.2	1.4	0.1 ms	0.9	45 ms	0.1	0.2	3.0
Simulation, STEP	91 ms	0.3	1.3	0.2 ms	1.0	1.0	0.1	0.2	3.9
Simulation, STL	83 ms	0.2	1.3	0.1 ms	1.0	83 ms	0.1	0.2	3.0
Simulation, OBJ	0.1	0.2	1.3	0.2 ms	1.0	1.3	0.1	0.2	4.3
Visual, GLB	90 ms	0.2	1.3	0.3 ms	2.5	33 ms	0.3	0.2	4.6
Visual, OBJ	0.1	0.2	1.3	0.2 ms	2.6	1.0	0.3	0.2	5.8

Board Repo: rusefi/rusefi-hardware Board: PowerSSO-24_breakout.kicad_pcb Folder classic-designs / rusefi_hardware_history / PowerSSO-24_breakout_rev00.10 / PowerSSO-24_breakout Complexity 178 / 1000 (size 143, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 14, 125, 85 Triangles, simulation 331,308 in 24 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 255 MB STEP 48 MB 273 MB STL 17 MB 251 MB OBJ 33 MB 250 MB Visual GLB 8.9 MB 275 MB OBJ 26 MB 279 MB

23.90 Stimulator

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	3.2	0.4 ms	2.6	0.1	0.4	0.2	7.4
Simulation, STEP	0.2	0.6	3.0	0.5 ms	2.6	2.2	0.3	0.2	9.2
Simulation, STL	0.2	0.6	3.0	0.5 ms	2.6	0.2	0.4	0.2	7.1
Simulation, OBJ	0.2	0.6	3.0	0.8 ms	2.6	3.5	0.4	0.2	10.5
Visual, GLB	0.2	0.6	3.1	0.4 ms	6.7	94 ms	0.9	0.2	11.9
Visual, OBJ	0.2	0.6	3.1	0.5 ms	6.2	2.9	1.1	0.2	14.3

Board Repo: rusefi/rusefi-hardware Board: Stimulator.kicad_pcb Folder classic-designs / rusefi_hardware_history / Stimulator_rev00.10 Complexity 201 / 1000 (size 166, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 46, 614, 25 Triangles, simulation 883,034 in 98 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 30 MB 416 MB STEP 148 MB 498 MB STL 44 MB 415 MB OBJ 89 MB 640 MB Visual GLB 24 MB 581 MB OBJ 71 MB 550 MB

23.91 Stimulator

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.4	6.4	1 ms	5.2	0.2	0.6	0.3	14.5
Simulation, STEP	0.3	1.3	6.3	1.0 ms	5.2	4.1	0.6	0.2	18.1
Simulation, STL	0.3	1.3	6.3	1 ms	5.2	0.6	0.6	0.3	14.6
Simulation, OBJ	0.4	1.4	6.2	0.9 ms	5.5	7.5	0.6	0.2	21.8
Visual, GLB	0.4	1.3	6.0	1 ms	12.9	0.2	1.5	0.2	22.6
Visual, OBJ	0.4	1.3	6.2	1 ms	12.7	5.5	1.5	0.2	27.7

Board Repo: rusefi/rusefi-hardware Board: Stimulator.kicad_pcb Folder classic-designs / rusefi_hardware_history / Stimulator_rev00.20 Complexity 211 / 1000 (size 176, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 83, 768, 31 Triangles, simulation 1,529,424 in 133 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 52 MB 638 MB STEP 272 MB 713 MB STL 76 MB 674 MB OBJ 159 MB 1.0 GB Visual GLB 41 MB 801 MB OBJ 125 MB 896 MB

23.92 thermocouple_module

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	98 ms	0.1	0.6	0.1 ms	0.6	23 ms	80 ms	0.2	1.7
Simulation, STEP	96 ms	0.1	0.6	0.1 ms	0.6	0.9	69 ms	0.2	2.5
Simulation, STL	94 ms	0.1	0.7	0.1 ms	0.6	32 ms	70 ms	0.2	1.8
Simulation, OBJ	80 ms	0.1	0.6	0.1 ms	0.5	0.6	73 ms	0.2	2.2
Visual, GLB	97 ms	0.1	0.6	0.1 ms	1.4	19 ms	0.1	0.2	2.5
Visual, OBJ	81 ms	0.1	0.7	0.2 ms	1.4	0.4	98 ms	0.2	2.9

Board Repo: rusefi/rusefi-hardware Board: thermocouple_module.kicad_pcb Folder classic-designs / rusefi_hardware_history / thermocouiple_module_rev00.10 / thermocouiple_module Complexity 137 / 1000 (size 102, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 6, 41, 3 Triangles, simulation 136,198 in 19 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.8 MB 188 MB STEP 24 MB 198 MB STL 6.8 MB 192 MB OBJ 14 MB 186 MB Visual GLB 3.3 MB 158 MB OBJ 9.4 MB 159 MB

23.93 mmc_usb_1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.6	0.2 ms	2.0	98 ms	0.3	0.2	5.8
Simulation, STEP	0.2	0.6	2.6	0.2 ms	2.2	2.2	0.4	0.3	8.4
Simulation, STL	0.2	0.5	2.4	0.1 ms	1.9	0.1	0.3	0.2	5.9
Simulation, OBJ	0.2	0.5	2.5	0.2 ms	2.0	3.3	0.3	0.3	9.1
Visual, GLB	0.2	0.6	2.5	0.2 ms	5.5	82 ms	0.5	0.2	9.6
Visual, OBJ	0.2	0.6	2.5	0.2 ms	5.6	2.7	0.5	0.2	12.2

Board Repo: rusefi/rusefi-hardware Board: mmc_usb_1.kicad_pcb Folder classic-designs / rusefi_hardware_history / usb_mmc_spi_rev00.10 Complexity 201 / 1000 (size 156, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 22, 488, 48 Triangles, simulation 605,962 in 35 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 21 MB 335 MB STEP 101 MB 390 MB STL 30 MB 333 MB OBJ 61 MB 431 MB Visual GLB 17 MB 435 MB OBJ 51 MB 468 MB

23.94 mmc_usb_1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.6	0.5 ms	2.0	92 ms	0.4	0.2	6.0
Simulation, STEP	0.2	0.6	2.6	0.2 ms	2.0	1.9	0.4	0.2	7.8
Simulation, STL	0.2	0.6	2.7	0.2 ms	2.1	0.2	0.4	0.2	6.4
Simulation, OBJ	0.2	0.6	2.6	0.2 ms	2.0	3.2	0.4	0.2	9.1
Visual, GLB	0.2	0.5	2.6	0.3 ms	5.9	84 ms	0.5	0.2	10.0
Visual, OBJ	0.2	0.6	2.6	0.3 ms	6.0	2.6	0.5	0.2	12.8

Board Repo: rusefi/rusefi-hardware Board: mmc_usb_1.kicad_pcb Folder classic-designs / rusefi_hardware_history / usb_mmc_spi_rev00.20 Complexity 201 / 1000 (size 156, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 22, 488, 48 Triangles, simulation 639,772 in 69 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 22 MB 357 MB STEP 107 MB 400 MB STL 32 MB 328 MB OBJ 65 MB 457 MB Visual GLB 18 MB 478 MB OBJ 54 MB 446 MB

23.95 mmc_usb_1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	3.0	0.3 ms	2.2	89 ms	0.4	0.2	6.6
Simulation, STEP	0.2	0.6	2.7	0.3 ms	2.3	2.0	0.4	0.2	8.3
Simulation, STL	0.2	0.6	2.7	0.3 ms	2.3	0.2	0.3	0.2	6.5
Simulation, OBJ	0.2	0.6	2.7	0.2 ms	2.3	3.6	0.4	0.2	10.0
Visual, GLB	0.2	0.6	2.8	0.4 ms	6.3	83 ms	0.6	0.3	10.9
Visual, OBJ	0.2	0.6	2.8	0.3 ms	6.0	3.1	0.8	0.2	13.7

Board Repo: rusefi/rusefi-hardware Board: mmc_usb_1.kicad_pcb Folder classic-designs / rusefi_hardware_history / usb_mmc_spi_rev00.30 / usb_mmc_spi Complexity 190 / 1000 (size 155, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 22, 450, 47 Triangles, simulation 653,104 in 71 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 22 MB 345 MB STEP 110 MB 401 MB STL 33 MB 363 MB OBJ 66 MB 466 MB Visual GLB 18 MB 447 MB OBJ 55 MB 471 MB

23.96 frequency-divider

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	1.0	0.2 ms	0.9	45 ms	0.1	0.2	2.6
Simulation, STEP	0.1	0.2	1.3	0.2 ms	0.9	1.1	0.1	0.3	4.0
Simulation, STL	0.1	0.2	1.3	0.2 ms	1.0	62 ms	0.1	0.2	3.0
Simulation, OBJ	0.1	0.3	1.1	0.2 ms	0.9	1.2	0.1	0.2	4.0
Visual, GLB	0.1	0.2	1.2	0.2 ms	1.7	24 ms	0.2	0.2	3.6
Visual, OBJ	0.1	0.2	1.1	0.2 ms	1.8	0.7	0.2	0.2	4.4

Board Repo: rusefi/rusefi-hardware Board: frequency-divider.kicad_pcb Folder frequency-divider Complexity 219 / 1000 (size 129, features 90) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20210824) Parts, tracks, vias 15, 41, 37 Triangles, simulation 269,140 in 21 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.1 MB 252 MB STEP 36 MB 254 MB STL 13 MB 234 MB OBJ 26 MB 250 MB Visual GLB 5.9 MB 211 MB OBJ 17 MB 213 MB

23.97 GDI-4ch

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	7.4	25.8	3 ms	22.3	1.0	3.8	0.3	62.2
Simulation, STEP	1.5	7.8	26.1	2 ms	22.1	15.3	3.5	0.3	76.5
Simulation, STL	1.4	7.6	25.3	2 ms	22.2	1.9	3.6	0.3	62.2
Simulation, OBJ	1.4	7.4	25.5	2 ms	22.3	34.6	3.6	0.4	95.2
Visual, GLB	1.5	7.6	25.3	2 ms	50.3	0.6	6.7	0.3	92.2
Visual, OBJ	1.4	7.6	25.4	2 ms	50.7	23.1	7.2	0.3	115.8

Board Repo: rusefi/rusefi-hardware Board: GDI-4ch.kicad_pcb Folder GDI-4ch Complexity 390 / 1000 (size 280, features 110) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 296, 2,669, 664 Triangles, simulation 5,698,984 in 302 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 189 MB 1.6 GB STEP 798 MB 2.2 GB STL 285 MB 1.6 GB OBJ 605 MB 3.6 GB Visual GLB 131 MB 2.1 GB OBJ 416 MB 2.5 GB

23.98 GDI-6ch

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.2	5.5	16.9	1 ms	15.3	0.7	2.1	0.3	42.0
Simulation, STEP	1.2	5.7	17.0	1.0 ms	16.3	11.1	2.1	0.3	53.7
Simulation, STL	1.1	5.8	16.1	1 ms	16.6	1.6	2.2	0.4	43.8
Simulation, OBJ	1.1	5.2	17.0	2 ms	16.0	25.4	2.3	0.3	67.3
Visual, GLB	1.3	5.7	17.4	1 ms	39.5	0.5	6.2	0.3	70.8
Visual, OBJ	1.2	5.6	17.4	1 ms	38.1	15.6	5.7	0.4	84.0

Board Repo: rusefi/rusefi-hardware Board: GDI-6ch.kicad_pcb Folder GDI-6ch Complexity 386 / 1000 (size 276, features 110) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 245, 2,076, 647 Triangles, simulation 4,888,790 in 278 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 162 MB 1.3 GB STEP 627 MB 1.9 GB STL 244 MB 1.3 GB OBJ 517 MB 3.1 GB Visual GLB 106 MB 1.8 GB OBJ 339 MB 2.2 GB

23.99 GDI-STM

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.4	5.9	20.4	2 ms	19.9	0.8	2.9	0.4	51.7
Simulation, STEP	1.6	5.7	20.7	2 ms	20.0	13.1	2.9	0.4	64.4
Simulation, STL	1.5	5.6	20.3	1 ms	19.7	1.8	2.8	0.3	52.1
Simulation, OBJ	1.4	5.5	20.2	2 ms	19.3	25.3	3.0	0.4	75.1
Visual, GLB	1.5	5.9	20.9	2 ms	44.1	0.6	8.0	0.3	81.3
Visual, OBJ	1.4	6.3	20.8	2 ms	42.1	16.8	7.2	0.3	95.0

Board Repo: rusefi/rusefi-hardware Board: GDI-STM.kicad_pcb Folder GDI-STM Complexity 357 / 1000 (size 272, features 85) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 306, 2,211, 687 Triangles, simulation 4,938,506 in 310 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 163 MB 1.4 GB STEP 655 MB 2.0 GB STL 247 MB 1.5 GB OBJ 521 MB 3.1 GB Visual GLB 111 MB 1.8 GB OBJ 354 MB 2.4 GB

23.100 IR2302-testboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.8	4.3	0.4 ms	2.5	0.1	0.4	0.2	8.6
Simulation, STEP	0.2	0.8	4.4	0.2 ms	2.5	2.4	0.4	0.3	10.9
Simulation, STL	0.3	0.9	4.4	0.2 ms	2.5	0.2	0.4	0.2	8.9
Simulation, OBJ	0.2	0.8	4.3	0.2 ms	2.5	4.1	0.4	0.2	12.6
Visual, GLB	0.2	0.8	4.3	0.2 ms	5.1	79 ms	0.7	0.2	11.5
Visual, OBJ	0.3	0.8	4.4	0.2 ms	5.1	2.9	0.7	0.2	14.4

Board Repo: rusefi/rusefi-hardware Board: IR2302-testboard.kicad_pcb Folder IR2302-testboard Complexity 251 / 1000 (size 166, features 85) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 49, 153, 169 Triangles, simulation 709,584 in 38 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 25 MB 386 MB STEP 117 MB 436 MB STL 35 MB 390 MB OBJ 72 MB 539 MB Visual GLB 17 MB 416 MB OBJ 50 MB 417 MB

23.101 micro_rusEFI

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.1	8.2	35.9	0.8 ms	37.0	0.9	3.8	0.5	88.3
Simulation, STEP	1.4	7.6	35.8	1.0 ms	35.9	17.3	3.1	0.4	101.5
Simulation, STL	1.3	6.8	33.0	1 ms	35.8	1.9	3.2	0.4	82.4
Simulation, OBJ	1.5	7.0	32.9	0.8 ms	36.8	30.3	3.2	0.4	112.2
Visual, GLB	1.3	6.8	32.7	0.8 ms	64.2	0.7	6.7	0.4	112.7
Visual, OBJ	1.4	6.9	33.5	1 ms	64.8	22.7	7.0	0.3	136.6

Board Repo: rusefi/rusefi-hardware Board: micro_rusEFI.kicad_pcb Folder L9779WD-breakout Complexity 342 / 1000 (size 267, features 75) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 233, 4,021, 857 Triangles, simulation 4,757,940 in 237 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 166 MB 1.5 GB STEP 872 MB 2.0 GB STL 238 MB 1.5 GB OBJ 513 MB 3.1 GB Visual GLB 135 MB 2.1 GB OBJ 427 MB 2.7 GB

23.102 lambda-x2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	5.2	23.8	1 ms	16.2	0.6	1.8	0.3	49.1
Simulation, STEP	1.1	5.3	22.6	1 ms	16.0	10.4	1.8	0.3	57.5
Simulation, STL	1.0	5.3	23.7	0.5 ms	16.6	1.6	2.0	0.3	50.5
Simulation, OBJ	1.2	5.4	23.2	0.5 ms	16.1	23.4	1.9	0.3	71.4
Visual, GLB	1.1	5.3	23.5	2 ms	36.3	0.4	4.0	0.3	70.9
Visual, OBJ	1.1	5.5	24.8	0.7 ms	37.5	13.7	3.9	0.3	86.7

Board Repo: rusefi/rusefi-hardware Board: lambda-x2.kicad_pcb Folder lambda-x2 Complexity 371 / 1000 (size 271, features 100) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline Tested 9th November 2026 to 10th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 266, 2,183, 706 Triangles, simulation 4,213,238 in 179 parts Verifier PASS in all six runs Run again Visual, GLB; Visual, OBJ: failed in the corpus run, run again with fixes to KESE made after the corpus run, and passed

File type File size Peak memory used Simulation GLB 147 MB 1.3 GB STEP 653 MB 1.7 GB STL 211 MB 1.3 GB OBJ 455 MB 2.8 GB Visual GLB 92 MB 1.5 GB OBJ 288 MB 2.0 GB

23.103 LM1949_Driver

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.8	0.1 ms	1.5	73 ms	0.2	0.2	4.3
Simulation, STEP	0.2	0.4	1.9	0.1 ms	1.5	1.3	0.2	0.2	5.6
Simulation, STL	0.1	0.3	1.9	0.1 ms	1.4	88 ms	0.2	0.2	4.2
Simulation, OBJ	0.1	0.4	1.9	0.1 ms	1.4	2.0	0.2	0.2	6.2
Visual, GLB	0.1	0.3	1.9	0.1 ms	2.4	38 ms	0.2	0.2	5.3
Visual, OBJ	0.1	0.4	1.8	0.2 ms	2.3	1.2	0.2	0.2	6.2

Board Repo: rusefi/rusefi-hardware Board: LM1949_Driver.kicad_pcb Folder Low-Z_LM1949 Complexity 223 / 1000 (size 148, features 75) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 17, 60, 129 Triangles, simulation 384,828 in 21 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 13 MB 255 MB STEP 51 MB 299 MB STL 19 MB 264 MB OBJ 38 MB 286 MB Visual GLB 7.9 MB 279 MB OBJ 23 MB 281 MB

23.104 MC33810-breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	2.3	0.3 ms	2.2	0.1	0.4	0.2	6.2
Simulation, STEP	0.2	0.7	2.4	0.4 ms	2.2	2.1	0.4	0.2	8.2
Simulation, STL	0.2	0.6	2.2	0.5 ms	2.2	0.2	0.4	0.2	6.0
Simulation, OBJ	0.2	0.6	2.2	0.3 ms	2.2	2.8	0.4	0.2	8.7
Visual, GLB	0.2	0.7	2.4	0.3 ms	5.2	65 ms	0.7	0.2	9.4
Visual, OBJ	0.2	0.6	2.3	0.2 ms	4.9	2.4	0.9	0.2	11.5

Board Repo: rusefi/rusefi-hardware Board: MC33810-breakout.kicad_pcb Folder MC33810-breakout Complexity 252 / 1000 (size 167, features 85) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 31, 491, 153 Triangles, simulation 631,044 in 52 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 22 MB 342 MB STEP 97 MB 420 MB STL 32 MB 334 MB OBJ 63 MB 457 MB Visual GLB 18 MB 478 MB OBJ 54 MB 475 MB

23.105 mini48-stm32

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.2	0.4 ms	3.0	93 ms	0.4	0.2	6.6
Simulation, STEP	0.2	0.5	2.2	0.9 ms	2.9	2.4	0.3	0.2	8.7
Simulation, STL	0.2	0.5	2.1	0.3 ms	2.9	0.2	0.3	0.2	6.4
Simulation, OBJ	0.2	0.5	2.2	0.5 ms	3.3	3.0	0.3	0.2	9.7
Visual, GLB	0.2	0.5	2.1	0.3 ms	5.4	78 ms	0.5	0.2	9.0
Visual, OBJ	0.2	0.5	2.2	0.3 ms	5.6	2.4	0.8	0.3	12.0

Board Repo: rusefi/rusefi-hardware Board: mini48-stm32.kicad_pcb Folder mini48-stm32 Complexity 259 / 1000 (size 204, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 37, 523, 69 Triangles, simulation 738,906 in 66 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 25 MB 371 MB STEP 118 MB 430 MB STL 37 MB 378 MB OBJ 74 MB 519 MB Visual GLB 20 MB 535 MB OBJ 61 MB 499 MB

23.106 ncv1124-micro

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	1.1	0.3 ms	1.3	38 ms	0.1	0.2	3.1
Simulation, STEP	0.1	0.3	1.0	0.2 ms	1.1	1.2	0.1	0.2	4.0
Simulation, STL	0.1	0.2	1.0	0.2 ms	1.2	66 ms	0.1	0.2	3.0
Simulation, OBJ	0.1	0.3	1.1	0.2 ms	1.2	1.2	0.1	0.2	4.2
Visual, GLB	0.1	0.3	1.0	0.3 ms	2.1	30 ms	0.2	0.2	3.9
Visual, OBJ	0.1	0.3	1.0	0.2 ms	2.0	1.1	0.3	0.2	4.9

Board Repo: rusefi/rusefi-hardware Board: ncv1124-micro.kicad_pcb Folder ncv1124-micro Complexity 242 / 1000 (size 142, features 100) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 26, 99, 45 Triangles, simulation 235,422 in 31 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.1 MB 228 MB STEP 40 MB 253 MB STL 12 MB 228 MB OBJ 23 MB 228 MB Visual GLB 6.8 MB 237 MB OBJ 20 MB 238 MB

23.107 quad-igbt

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	2.0	0.2 ms	1.2	59 ms	0.2	0.2	4.2
Simulation, STEP	0.1	0.4	1.9	0.2 ms	1.1	1.2	0.2	0.2	5.1
Simulation, STL	0.1	0.4	1.9	0.5 ms	1.2	92 ms	0.2	0.3	4.2
Simulation, OBJ	0.2	0.4	1.8	0.2 ms	1.2	1.8	0.2	0.2	5.8
Visual, GLB	0.1	0.4	1.9	0.4 ms	2.9	37 ms	0.4	0.2	6.1
Visual, OBJ	0.1	0.4	1.9	0.2 ms	2.9	1.2	0.3	0.2	7.1

Board Repo: rusefi/rusefi-hardware Board: quad-igbt.kicad_pcb Folder quad-igbt Complexity 233 / 1000 (size 148, features 85) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 12, 17, 174 Triangles, simulation 369,518 in 24 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 13 MB 241 MB STEP 40 MB 278 MB STL 18 MB 243 MB OBJ 37 MB 292 MB Visual GLB 8.4 MB 265 MB OBJ 25 MB 266 MB

23.108 superseal-igbt

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.1	0.1 ms	1.3	61 ms	0.2	0.2	4.5
Simulation, STEP	0.1	0.4	2.0	0.1 ms	1.3	1.3	0.2	0.2	5.6
Simulation, STL	0.1	0.5	2.0	0.2 ms	1.3	0.1	0.3	0.2	4.5
Simulation, OBJ	0.2	0.5	2.1	0.2 ms	1.4	2.1	0.2	0.2	6.6
Visual, GLB	0.1	0.4	2.0	0.2 ms	2.9	38 ms	0.3	0.2	6.1
Visual, OBJ	0.2	0.5	2.1	0.2 ms	2.9	1.6	0.3	0.2	7.7

Board Repo: rusefi/rusefi-hardware Board: superseal-igbt.kicad_pcb Folder superseal-igbt Complexity 234 / 1000 (size 149, features 85) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 13, 71, 166 Triangles, simulation 437,540 in 37 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 255 MB STEP 48 MB 301 MB STL 22 MB 256 MB OBJ 44 MB 340 MB Visual GLB 9.6 MB 299 MB OBJ 29 MB 295 MB

23.109 tle9104-breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.0	0.2 ms	1.8	90 ms	0.3	0.2	5.3
Simulation, STEP	0.2	0.7	1.9	0.2 ms	1.7	1.5	0.3	0.2	6.5
Simulation, STL	0.2	0.7	1.9	0.2 ms	1.8	0.1	0.3	0.3	5.3
Simulation, OBJ	0.2	0.7	2.0	0.3 ms	1.8	2.8	0.3	0.2	8.0
Visual, GLB	0.2	0.6	1.8	0.2 ms	3.4	48 ms	0.4	0.2	6.7
Visual, OBJ	0.2	0.7	2.1	0.2 ms	3.6	1.6	0.4	0.2	8.7

Board Repo: rusefi/rusefi-hardware Board: tle9104-breakout.kicad_pcb Folder tle9104-breakout Complexity 207 / 1000 (size 162, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 15, 152, 86 Triangles, simulation 581,310 in 32 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 20 MB 323 MB STEP 72 MB 342 MB STL 29 MB 319 MB OBJ 59 MB 429 MB Visual GLB 11 MB 303 MB OBJ 32 MB 309 MB

23.110 uaBrain-gm-e38

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	4.1	17.9	1 ms	15.2	0.6	2.0	0.3	40.9
Simulation, STEP	0.7	4.1	18.1	1 ms	16.0	10.4	2.1	0.3	51.7
Simulation, STL	0.7	4.2	17.8	0.9 ms	16.1	1.5	2.3	0.3	43.0
Simulation, OBJ	0.7	4.3	18.0	1 ms	15.6	20.3	2.3	0.3	61.6
Visual, GLB	0.7	4.1	18.3	0.7 ms	49.4	0.5	6.5	0.3	79.8
Visual, OBJ	0.7	4.2	18.0	0.8 ms	49.6	16.3	6.4	0.3	95.6

Board Repo: rusefi/rusefi-hardware Board: uaBrain-gm-e38.kicad_pcb Folder uaBrain-gm-e38 Complexity 314 / 1000 (size 209, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 120, 2,865, 804 Triangles, simulation 4,579,816 in 229 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 157 MB 1.6 GB STEP 745 MB 1.8 GB STL 229 MB 1.5 GB OBJ 488 MB 2.9 GB Visual GLB 132 MB 2.1 GB OBJ 416 MB 2.6 GB

23.111 VR-Hall

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	3.4	0.3 ms	3.1	92 ms	0.3	0.2	7.9
Simulation, STEP	0.2	0.6	2.9	0.5 ms	3.1	2.3	0.4	0.2	9.8
Simulation, STL	0.2	0.7	3.0	0.2 ms	3.3	0.2	0.3	0.2	7.9
Simulation, OBJ	0.2	0.7	2.8	0.3 ms	3.0	3.6	0.4	0.2	10.9
Visual, GLB	0.2	0.6	3.2	0.3 ms	5.3	86 ms	0.7	0.2	10.2
Visual, OBJ	0.2	0.6	3.0	0.4 ms	5.6	2.4	0.7	0.2	12.8

Board Repo: rusefi/rusefi-hardware Board: VR-Hall.kicad_pcb Folder VR-Hall Complexity 257 / 1000 (size 162, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 56, 210, 94 Triangles, simulation 723,276 in 56 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 25 MB 366 MB STEP 121 MB 451 MB STL 36 MB 367 MB OBJ 73 MB 523 MB Visual GLB 19 MB 432 MB OBJ 57 MB 499 MB

23.112 ncv1124

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.9	0.2 ms	1.5	65 ms	0.2	0.2	4.4
Simulation, STEP	0.2	0.4	1.9	0.3 ms	1.6	1.5	0.2	0.2	6.0
Simulation, STL	0.2	0.4	2.0	0.2 ms	1.5	98 ms	0.2	0.2	4.6
Simulation, OBJ	0.2	0.4	1.9	0.2 ms	1.6	2.1	0.2	0.2	6.6
Visual, GLB	0.2	0.3	1.8	0.2 ms	3.0	51 ms	0.3	0.2	5.8
Visual, OBJ	0.2	0.4	1.9	0.2 ms	3.0	1.6	0.3	0.2	7.5

Board Repo: rusefi/rusefi-hardware Board: ncv1124.kicad_pcb Folder VR_ncv1124_test_module Complexity 201 / 1000 (size 146, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 34, 80, 60 Triangles, simulation 397,716 in 30 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 272 MB STEP 62 MB 328 MB STL 20 MB 271 MB OBJ 40 MB 322 MB Visual GLB 11 MB 316 MB OBJ 31 MB 317 MB

23.113 wideband_controller

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.2	9.1	0.5 ms	8.0	0.3	0.9	0.3	21.4
Simulation, STEP	0.5	2.1	9.3	0.5 ms	7.8	5.0	0.9	0.3	25.9
Simulation, STL	0.5	2.1	9.5	0.4 ms	7.8	0.5	0.9	0.3	21.6
Simulation, OBJ	0.5	2.1	9.3	0.4 ms	7.7	9.5	0.9	0.3	30.3
Visual, GLB	0.5	2.1	9.3	0.4 ms	15.5	0.2	2.0	0.2	29.7
Visual, OBJ	0.5	2.2	9.4	0.4 ms	15.0	5.8	2.2	0.2	35.3

Board Repo: rusefi/rusefi-hardware Board: wideband_controller.kicad_pcb Folder wideband-F103 Complexity 304 / 1000 (size 249, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 136, 1,183, 191 Triangles, simulation 1,985,478 in 132 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 70 MB 697 MB STEP 351 MB 901 MB STL 99 MB 802 MB OBJ 211 MB 1.4 GB Visual GLB 44 MB 792 MB OBJ 134 MB 926 MB

23.114 8HPTCUAdapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	83 ms	0.2	0.7	0.1 ms	0.7	28 ms	74 ms	0.2	1.9
Simulation, STEP	93 ms	0.2	0.5	0.1 ms	0.7	0.9	76 ms	0.2	2.7
Simulation, STL	97 ms	0.2	0.5	0.1 ms	0.7	50 ms	73 ms	0.2	1.9
Simulation, OBJ	96 ms	0.2	0.5	0.1 ms	0.6	0.8	72 ms	0.2	2.5
Visual, GLB	0.1	0.2	0.6	0.1 ms	1.4	22 ms	0.2	0.2	2.7
Visual, OBJ	91 ms	0.2	0.6	0.1 ms	1.4	0.6	0.2	0.2	3.4

Board Repo: rusefi/rusefi-hardware Board: 8HPTCUAdapter.kicad_pcb Folder ZF8HP Transmission Complexity 219 / 1000 (size 104, features 115) KESE features blind and buried vias, custom pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 1, 98, 10 Triangles, simulation 184,320 in 23 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 6.6 MB 217 MB STEP 34 MB 234 MB STL 9.2 MB 208 MB OBJ 19 MB 207 MB Visual GLB 5.3 MB 194 MB OBJ 15 MB 194 MB

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