Corpus Testing 11

Corpus Page 11

Part 11 of 29 of Corpus Testing: boards 1,081 to 1,188, six runs each, one file format a run, as Corpus Testing describes.

1081. pcf8583_daughterboard

pcf8583_daughterboard: stages 4 and 6 take 52% to 78% of a run. Simulation, GLB takes 2.2 s. Simulation, STEP takes 3.3 s. Simulation, STL takes 2.4 s. Simulation, OBJ takes 3.2 s. Visual, GLB takes 3.2 s. Visual, OBJ takes 4.1 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.9	0.1 ms	0.7	32 ms	0.1	0.2	2.2
Simulation, STEP	93 ms	0.2	0.9	0.1 ms	0.8	1.0	0.1	0.2	3.3
Simulation, STL	92 ms	0.2	1.0	0.1 ms	0.8	50 ms	0.1	0.2	2.4
Simulation, OBJ	0.1	0.2	0.9	0.1 ms	0.8	0.9	0.1	0.2	3.2
Visual, GLB	0.1	0.2	0.9	0.1 ms	1.6	21 ms	0.2	0.2	3.2
Visual, OBJ	0.1	0.2	1.0	0.2 ms	1.7	0.8	0.2	0.2	4.1

Board	Repo: google/myelin-acorn-electron-hardware Board: `pcf8583_daughterboard.kicad_pcb`
Folder	pcf8583_daughterboard / pcb
Complexity	171 / 1000 (size 116, features 55)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline
Tested	9th November 2026
Copper layers	2
File format	KiCad 5 (20171130)
Parts, tracks, vias	14, 65, 2
Triangles, simulation	214,068 in 23 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	7.4 MB	215 MB
STEP	37 MB	237 MB
STL	11 MB	212 MB
OBJ	21 MB	213 MB
Visual
GLB	5.7 MB	212 MB
OBJ	16 MB	216 MB

1082. post_box_usb

post_box_usb: stages 4 and 6 take 52% to 83% of a run. Simulation, GLB takes 19 s. Simulation, STEP takes 23 s. Simulation, STL takes 19 s. Simulation, OBJ takes 28 s. Visual, GLB takes 28 s. Visual, OBJ takes 34 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.6	6.9	0.8 ms	7.9	0.3	1.0	0.3	18.5
Simulation, STEP	0.4	1.7	7.0	0.5 ms	7.6	5.4	1.0	0.2	23.4
Simulation, STL	0.4	1.8	7.3	0.6 ms	7.2	0.7	0.9	0.2	18.6
Simulation, OBJ	0.4	1.7	6.9	0.6 ms	7.6	10.0	1.0	0.3	28.0
Visual, GLB	0.4	1.8	6.8	0.7 ms	16.3	0.3	1.9	0.3	27.7
Visual, OBJ	0.5	1.7	6.8	0.8 ms	16.3	6.6	2.1	0.3	34.3

Board	Repo: google/myelin-acorn-electron-hardware Board: `post_box_usb.kicad_pcb`
Folder	post_box_usb / pcb
Complexity	293 / 1000 (size 238, features 55)
KESE features	through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones
Tested	9th November 2026
Copper layers	4
File format	KiCad 5 (20171130)
Parts, tracks, vias	66, 1,109, 99
Triangles, simulation	2,050,030 in 121 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	70 MB	673 MB
STEP	262 MB	871 MB
STL	103 MB	671 MB
OBJ	213 MB	1.4 GB
Visual
GLB	46 MB	956 MB
OBJ	141 MB	1.0 GB

1083. rom_socket_level_shifter

rom_socket_level_shifter: stages 4 and 6 take 53% to 82% of a run. Simulation, GLB takes 4.5 s. Simulation, STEP takes 5.9 s. Simulation, STL takes 4.7 s. Simulation, OBJ takes 6.5 s. Visual, GLB takes 7.3 s. Visual, OBJ takes 8.4 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	1.8	0.3 ms	1.6	79 ms	0.3	0.2	4.5
Simulation, STEP	0.1	0.4	1.9	0.5 ms	1.6	1.5	0.3	0.2	5.9
Simulation, STL	0.1	0.4	1.8	0.3 ms	1.7	0.1	0.3	0.2	4.7
Simulation, OBJ	0.1	0.4	1.9	0.3 ms	1.6	2.1	0.3	0.2	6.5
Visual, GLB	0.2	0.4	1.9	0.3 ms	4.0	64 ms	0.5	0.2	7.3
Visual, OBJ	0.2	0.4	1.7	0.3 ms	3.8	1.6	0.4	0.3	8.4

Board	Repo: google/myelin-acorn-electron-hardware Board: `rom_socket_level_shifter.kicad_pcb`
Folder	rom_socket_level_shifter / pcb
Complexity	194 / 1000 (size 149, features 45)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones
Tested	9th November 2026
Copper layers	2
File format	KiCad 4 (4)
Parts, tracks, vias	13, 463, 34
Triangles, simulation	479,746 in 64 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	16 MB	277 MB
STEP	76 MB	341 MB
STL	24 MB	278 MB
OBJ	48 MB	361 MB
Visual
GLB	13 MB	357 MB
OBJ	38 MB	350 MB

1084. bbc_1mhz_serial_sd

bbc_1mhz_serial_sd: stages 4 and 6 take 52% to 85% of a run. Simulation, GLB takes 8.0 s. Simulation, STEP takes 10 s. Simulation, STL takes 8.0 s. Simulation, OBJ takes 12 s. Visual, GLB takes 11 s. Visual, OBJ takes 14 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	3.8	0.3 ms	2.7	0.1	0.4	0.2	8.0
Simulation, STEP	0.2	0.6	3.8	0.6 ms	2.7	2.3	0.4	0.2	10.1
Simulation, STL	0.2	0.6	3.6	0.3 ms	2.6	0.3	0.4	0.2	8.0
Simulation, OBJ	0.2	0.6	3.8	0.3 ms	2.5	4.4	0.4	0.3	12.1
Visual, GLB	0.2	0.6	3.6	0.6 ms	5.7	77 ms	0.6	0.2	11.1
Visual, OBJ	0.2	0.6	3.7	0.4 ms	5.7	3.0	0.8	0.2	14.2

Board	Repo: google/myelin-acorn-electron-hardware Board: `bbc_1mhz_serial_sd.kicad_pcb`
Folder	serial_sd_adapter / bbc_1mhz_bus_pcb
Complexity	189 / 1000 (size 144, features 45)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones
Tested	9th November 2026
Copper layers	2
File format	KiCad 4 (4)
Parts, tracks, vias	13, 361, 19
Triangles, simulation	754,086 in 55 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	26 MB	362 MB
STEP	138 MB	422 MB
STL	38 MB	359 MB
OBJ	77 MB	545 MB
Visual
GLB	18 MB	435 MB
OBJ	54 MB	464 MB

1085. standalone_programmer

standalone_programmer: stages 4 and 6 take 56% to 81% of a run. Simulation, GLB takes 6.8 s. Simulation, STEP takes 8.0 s. Simulation, STL takes 6.7 s. Simulation, OBJ takes 9.5 s. Visual, GLB takes 9.1 s. Visual, OBJ takes 12 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	3.4	0.3 ms	2.1	91 ms	0.3	0.2	6.8
Simulation, STEP	0.1	0.6	3.1	0.3 ms	1.9	1.8	0.3	0.2	8.0
Simulation, STL	0.1	0.6	3.3	0.3 ms	1.9	0.2	0.4	0.3	6.7
Simulation, OBJ	0.1	0.6	3.4	0.4 ms	2.0	2.8	0.4	0.2	9.5
Visual, GLB	0.1	0.6	3.1	0.5 ms	4.2	65 ms	0.6	0.2	9.1
Visual, OBJ	0.2	0.6	3.3	0.3 ms	4.6	2.0	0.7	0.3	11.6

Board	Repo: google/myelin-acorn-electron-hardware Board: `standalone_programmer.kicad_pcb`
Folder	standalone_cartridge_programmer / pcb
Complexity	198 / 1000 (size 143, features 55)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline
Tested	9th November 2026
Copper layers	2
File format	KiCad 5 (20171130)
Parts, tracks, vias	11, 366, 18
Triangles, simulation	681,416 in 58 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	24 MB	348 MB
STEP	120 MB	390 MB
STL	34 MB	326 MB
OBJ	70 MB	492 MB
Visual
GLB	15 MB	406 MB
OBJ	45 MB	405 MB

1086. xc9500xl_44_breakout

xc9500xl_44_breakout: stages 4 and 6 take 54% to 85% of a run. Simulation, GLB takes 8.5 s. Simulation, STEP takes 11 s. Simulation, STL takes 8.2 s. Simulation, OBJ takes 12 s. Visual, GLB takes 12 s. Visual, OBJ takes 15 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.8	3.5	0.6 ms	3.1	0.1	0.5	0.3	8.5
Simulation, STEP	0.3	0.8	3.7	0.5 ms	3.0	2.6	0.5	0.3	11.1
Simulation, STL	0.2	0.7	3.5	0.4 ms	3.0	0.2	0.4	0.2	8.2
Simulation, OBJ	0.2	0.8	3.4	0.6 ms	3.0	4.0	0.4	0.2	12.1
Visual, GLB	0.2	0.8	3.6	0.3 ms	6.3	90 ms	0.5	0.2	11.6
Visual, OBJ	0.2	0.8	3.6	0.8 ms	6.4	3.2	0.5	0.3	14.9

Board	Repo: google/myelin-acorn-electron-hardware Board: `xc9500xl_44_breakout.kicad_pcb`
Folder	xc9500xl_44_breakout / pcb
Complexity	188 / 1000 (size 143, features 45)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones
Tested	9th November 2026
Copper layers	2
File format	KiCad 5 (20171130)
Parts, tracks, vias	13, 269, 40
Triangles, simulation	750,304 in 53 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	26 MB	405 MB
STEP	123 MB	460 MB
STL	38 MB	405 MB
OBJ	76 MB	535 MB
Visual
GLB	18 MB	442 MB
OBJ	55 MB	488 MB

1087. dvk-mx8m-bsb

dvk-mx8m-bsb: stages 4 and 6 take 50% to 83% of a run. Simulation, GLB takes 2 min. Simulation, STEP takes 2 min. Simulation, STL takes 2 min. Simulation, OBJ takes 3 min. Visual, GLB takes 3 min. Visual, OBJ takes 3 min

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.2	10.8	41.0	2 ms	42.3	2.3	5.6	0.4	104.8
Simulation, STEP	2.3	11.1	41.1	2 ms	42.6	22.1	5.1	0.4	124.8
Simulation, STL	2.3	10.6	41.3	2 ms	44.8	4.6	5.5	0.5	109.5
Simulation, OBJ	2.4	11.4	42.4	1 ms	43.8	65.0	6.4	0.5	171.8
Visual, GLB	2.4	12.3	43.2	3 ms	101.0	1.1	14.2	0.4	174.6
Visual, OBJ	2.4	11.2	41.9	2 ms	95.1	31.7	12.3	0.3	194.8

Board	Repo: gralco/dvk-mx8m-bsb Board: `dvk-mx8m-bsb.kicad_pcb`
Complexity	407 / 1000 (size 317, features 90)
KESE features	through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline
Tested	9th November 2026
Copper layers	6
File format	KiCad 5 (20171130)
Parts, tracks, vias	651, 17,587, 1,474
Triangles, simulation	11,609,834 in 629 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	403 MB	2.7 GB
STEP	1.6 GB	3.7 GB
STL	581 MB	2.9 GB
OBJ	1.3 GB	7.4 GB
Visual
GLB	236 MB	3.6 GB
OBJ	764 MB	4.9 GB

1088. librem5_mainboard

librem5_mainboard: stages 4 and 6 take 51% to 82% of a run. Simulation, GLB takes 5 min. Simulation, STEP takes 6 min. Simulation, STL takes 5 min. Simulation, OBJ takes 9 min. Visual, GLB takes 7 min. Visual, OBJ takes 7 min

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	7.2	47.6	135.3	4 ms	110.4	6.2	15.7	1.1	323.3
Simulation, STEP	7.2	46.3	131.7	2 ms	107.4	45.7	15.4	0.9	354.5
Simulation, STL	7.2	45.3	132.6	3 ms	114.8	11.0	17.0	1.1	329.0
Simulation, OBJ	7.8	49.2	144.4	2 ms	122.4	177.1	23.0	1.5	525.4
Visual, GLB	6.7	45.1	131.6	2 ms	205.7	1.8	18.3	0.8	409.9
Visual, OBJ	6.8	44.6	129.8	2 ms	197.8	48.6	16.3	0.8	444.6

Board	Repo: gralco/l5-schematic Board: `librem5_mainboard.kicad_pcb`
Folder	CAD / KiCad / librem5_mainboard
Complexity	600 / 1000 (size 370, features 230)
KESE features	through vias, blind and buried vias, microvias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026 to 11th November 2026
Copper layers	10
File format	KiCad 10 (20260206)
Parts, tracks, vias	1,164, 19,488, 5,044
Triangles, simulation	21,846,464 in 866 parts
Verifier	PASS in all six runs
Run again	Simulation, OBJ: failed in the corpus run, run again with no memory cap and no time limit (swap added to a 16 GB machine), and passed

File type	File size	Peak memory used
Simulation
GLB	751 MB	4.8 GB
STEP	2.5 GB	6.1 GB
STL	1.1 GB	4.7 GB
OBJ	2.5 GB	14 GB
Visual
GLB	283 MB	5.3 GB
OBJ	948 MB	6.3 GB

1089. librem5_usb-c_board

librem5_usb-c_board: stages 4 and 6 take 49% to 81% of a run. Simulation, GLB takes 16 s. Simulation, STEP takes 18 s. Simulation, STL takes 16 s. Simulation, OBJ takes 24 s. Visual, GLB takes 22 s. Visual, OBJ takes 26 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	2.2	5.7	0.5 ms	5.8	0.2	0.7	0.2	15.6
Simulation, STEP	0.8	2.1	5.6	0.5 ms	5.8	2.8	0.7	0.2	17.9
Simulation, STL	0.7	2.0	5.5	0.3 ms	5.9	0.5	0.7	0.2	15.5
Simulation, OBJ	0.8	2.2	5.8	0.7 ms	5.7	8.2	0.7	0.3	23.6
Visual, GLB	0.8	2.0	5.8	0.7 ms	11.8	0.1	0.9	0.2	21.6
Visual, OBJ	0.8	2.2	5.6	0.4 ms	11.6	4.5	0.9	0.3	25.8

Board	Repo: gralco/l5-schematic Board: `librem5_usb-c_board.kicad_pcb`
Folder	CAD / KiCad / librem5_usb-c_board
Complexity	397 / 1000 (size 212, features 185)
KESE features	through vias, blind and buried vias, microvias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline
Tested	9th November 2026
Copper layers	6
File format	KiCad 9 (20241229)
Parts, tracks, vias	52, 1,102, 355
Triangles, simulation	1,417,846 in 76 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	49 MB	563 MB
STEP	149 MB	640 MB
STL	71 MB	564 MB
OBJ	147 MB	978 MB
Visual
GLB	25 MB	594 MB
OBJ	77 MB	639 MB

1090. librem5_usb-c_fpc

librem5_usb-c_fpc: stages 4 and 6 take 42% to 74% of a run. Simulation, GLB takes 3.4 s. Simulation, STEP takes 4.4 s. Simulation, STL takes 3.5 s. Simulation, OBJ takes 5.1 s. Visual, GLB takes 4.6 s. Visual, OBJ takes 5.7 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	0.4	1.2	0.2 ms	1.0	59 ms	0.2	0.2	3.4
Simulation, STEP	0.4	0.3	1.1	0.2 ms	1.1	1.1	0.2	0.2	4.4
Simulation, STL	0.4	0.3	1.1	0.2 ms	1.1	80 ms	0.2	0.2	3.5
Simulation, OBJ	0.4	0.4	1.1	0.2 ms	1.1	1.8	0.2	0.2	5.1
Visual, GLB	0.4	0.4	1.1	0.2 ms	2.3	32 ms	0.2	0.2	4.6
Visual, OBJ	0.4	0.4	1.2	0.3 ms	2.3	1.1	0.2	0.2	5.7

Board	Repo: gralco/l5-schematic Board: `librem5_usb-c_fpc.kicad_pcb`
Folder	CAD / KiCad / librem5_usb-c_fpc
Complexity	203 / 1000 (size 148, features 55)
KESE features	through vias, filled zones, copper drawings, curved board outline
Tested	9th November 2026
Copper layers	4
File format	KiCad 9 (20241229)
Parts, tracks, vias	2, 240, 96
Triangles, simulation	367,218 in 38 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	13 MB	271 MB
STEP	39 MB	289 MB
STL	18 MB	266 MB
OBJ	37 MB	278 MB
Visual
GLB	7.5 MB	254 MB
OBJ	22 MB	247 MB

1091. librem5_mainboard

librem5_mainboard: stages 4 and 6 take 23% to 38% of a run. Simulation, GLB takes 36 min. Simulation, STEP takes 36 min. Simulation, STL takes 34 min. Visual, GLB takes 42 min. Visual, OBJ takes 39 min

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	9.7	1587.7	154.9	4 ms	359.8	9.5	26.9	1.4	2149.9
Simulation, STEP	8.2	1539.0	150.1	3 ms	348.4	85.7	26.2	1.2	2158.9
Simulation, STL	7.9	1507.8	146.9	4 ms	343.3	20.2	27.7	1.4	2055.2
Simulation, OBJ									exceeded 11 GB on a 16 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Visual, GLB	8.3	1522.9	150.6	3 ms	798.7	3.5	32.1	0.9	2517.0
Visual, OBJ	7.5	1345.4	130.5	6 ms	698.2	96.7	30.9	1.0	2310.2

Board	Repo: gralco/l5-schematic Board: `librem5_mainboard.kicad_pcb`
Folder	CAD / PADS / librem5_mainboard / librem5_mainboard_kicad_conversion
Complexity	536 / 1000 (size 371, features 165)
KESE features	through vias, padstacks, slotted holes, drill offsets, arc tracks, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026 to 10th November 2026
Copper layers	10
File format	KiCad 10 (20260206)
Parts, tracks, vias	1,161, 23,746, 5,044
Triangles, simulation	42,957,272 in 866 parts
Verifier	Simulation, GLB: Verifier FAIL Simulation, STEP: Verifier FAIL Simulation, STL: Verifier FAIL Simulation, OBJ: exceeded 11 GB on a 16 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Bad design	Bad design according to KESE: copper of two nets on top of each other in the file, a short KiCad's DRC reports; GND and `4G_POWER_KEY` vias about 0.01 mm apart in 238 places, the first at (149.77, 116.06) mm (left so by the conversion from PADS). KESE models what the file says, so the Verifier rightly finds the two nets' solids overlapping
Run again	Visual, OBJ: failed in the corpus run, run again with the memory cap raised from 11 GB to 14.5 GB, and passed

File type	File size	Peak memory used
Simulation
GLB	1.4 GB	9.2 GB
STEP	4.5 GB	11 GB
STL	2.1 GB	9.2 GB
OBJ	–	11 GB
Visual
GLB	655 MB	11 GB
OBJ	2.2 GB	14 GB

1092. amalthea

amalthea: stages 4 and 6 take 52% to 82% of a run. Simulation, GLB takes 5.7 s. Simulation, STEP takes 7.1 s. Simulation, STL takes 5.7 s. Simulation, OBJ takes 8.4 s. Visual, GLB takes 7.7 s. Visual, OBJ takes 9.5 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.4	0.3 ms	2.1	0.1	0.2	0.2	5.7
Simulation, STEP	0.2	0.5	2.3	0.3 ms	2.0	1.7	0.3	0.2	7.1
Simulation, STL	0.2	0.5	2.3	0.3 ms	2.0	0.2	0.3	0.3	5.7
Simulation, OBJ	0.2	0.5	2.3	0.2 ms	2.1	2.9	0.3	0.2	8.4
Visual, GLB	0.2	0.5	2.3	0.3 ms	4.1	54 ms	0.5	0.2	7.7
Visual, OBJ	0.2	0.5	2.3	0.3 ms	4.1	1.6	0.6	0.2	9.5

Board	Repo: greatscottgadgets/amalthea-hardware Board: `amalthea.kicad_pcb`
Complexity	334 / 1000 (size 219, features 115)
KESE features	through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper text, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 7 (20221018)
Parts, tracks, vias	41, 440, 63
Triangles, simulation	747,338 in 69 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	26 MB	350 MB
STEP	103 MB	410 MB
STL	37 MB	342 MB
OBJ	76 MB	532 MB
Visual
GLB	14 MB	388 MB
OBJ	41 MB	388 MB

1093. cydonia

cydonia: stages 4 and 6 take 55% to 83% of a run. Simulation, GLB takes 9.8 s. Simulation, STEP takes 12 s. Simulation, STL takes 9.7 s. Simulation, OBJ takes 14 s. Visual, GLB takes 14 s. Visual, OBJ takes 16 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.9	4.6	0.4 ms	3.1	0.2	0.4	0.3	9.8
Simulation, STEP	0.3	1.0	4.5	0.5 ms	3.0	2.5	0.4	0.3	12.0
Simulation, STL	0.3	0.9	4.5	0.5 ms	3.0	0.3	0.4	0.2	9.7
Simulation, OBJ	0.3	0.9	4.7	0.7 ms	3.0	4.5	0.4	0.2	14.0
Visual, GLB	0.3	1.0	4.7	0.6 ms	7.0	96 ms	0.7	0.3	13.9
Visual, OBJ	0.3	1.0	4.6	1 ms	6.8	2.7	0.8	0.3	16.4

Board	Repo: greatscottgadgets/cydonia Board: `cydonia.kicad_pcb`
Complexity	299 / 1000 (size 234, features 65)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline
Tested	9th November 2026
Copper layers	4
File format	KiCad 5 (20171130)
Parts, tracks, vias	107, 574, 74
Triangles, simulation	920,804 in 93 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	33 MB	452 MB
STEP	124 MB	484 MB
STL	46 MB	454 MB
OBJ	96 MB	679 MB
Visual
GLB	19 MB	473 MB
OBJ	57 MB	499 MB

1094. cynthion

cynthion: stages 4 and 6 take 50% to 84% of a run. Simulation, GLB takes 56 s. Simulation, STEP takes 68 s. Simulation, STL takes 57 s. Simulation, OBJ takes 90 s. Visual, GLB takes 80 s. Visual, OBJ takes 98 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.4	5.1	21.7	2 ms	23.1	1.2	2.9	0.3	55.6
Simulation, STEP	1.5	5.1	21.4	0.9 ms	23.0	13.7	2.9	0.3	67.9
Simulation, STL	1.4	5.2	21.8	1 ms	23.5	2.2	3.0	0.3	57.4
Simulation, OBJ	1.4	5.3	21.7	1 ms	23.3	35.3	3.1	0.4	90.5
Visual, GLB	1.4	5.3	21.3	1.0 ms	45.3	0.5	5.5	0.3	79.7
Visual, OBJ	1.5	5.2	21.9	1.0 ms	46.2	18.2	5.0	0.3	98.3

Board	Repo: greatscottgadgets/cynthion-hardware Board: `cynthion.kicad_pcb`
Complexity	454 / 1000 (size 304, features 150)
KESE features	through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	6
File format	KiCad 7 (20221018)
Parts, tracks, vias	294, 3,622, 651
Triangles, simulation	6,192,160 in 391 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	212 MB	1.5 GB
STEP	929 MB	2.1 GB
STL	310 MB	1.7 GB
OBJ	676 MB	4.0 GB
Visual
GLB	112 MB	1.9 GB
OBJ	364 MB	2.5 GB

1095. gig-e

gig-e: stages 4 and 6 take 51% to 82% of a run. Simulation, GLB takes 25 s. Simulation, STEP takes 31 s. Simulation, STL takes 26 s. Simulation, OBJ takes 40 s. Visual, GLB takes 38 s. Visual, OBJ takes 46 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.9	11.2	0.6 ms	8.7	0.4	1.3	0.2	25.3
Simulation, STEP	0.6	2.9	11.5	0.9 ms	8.5	5.9	1.2	0.3	30.9
Simulation, STL	0.6	3.0	11.4	0.9 ms	8.7	1.0	1.3	0.3	26.3
Simulation, OBJ	0.6	3.0	11.5	1 ms	8.7	14.2	1.3	0.3	39.6
Visual, GLB	0.6	2.9	11.2	0.6 ms	20.2	0.3	2.7	0.2	38.1
Visual, OBJ	0.6	2.8	11.2	1 ms	19.4	9.1	2.9	0.2	46.3

Board	Repo: greatscottgadgets/daisho Board: `gig-e.kicad_pcb`
Folder	hw / de2-115-frontend / gig-e
Complexity	307 / 1000 (size 272, features 35)
KESE features	through vias, filled zones
Tested	9th November 2026
Copper layers	4
File format	KiCad 3 (3)
Parts, tracks, vias	181, 2,692, 396
Triangles, simulation	2,547,136 in 199 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	90 MB	882 MB
STEP	353 MB	1.1 GB
STL	127 MB	911 MB
OBJ	273 MB	1.7 GB
Visual
GLB	61 MB	1.1 GB
OBJ	188 MB	1.3 GB

1096. hdmi

hdmi: stages 4 and 6 take 45% to 83% of a run. Simulation, GLB takes 44 s. Simulation, STEP takes 54 s. Simulation, STL takes 46 s. Simulation, OBJ takes 77 s. Visual, GLB takes 72 s. Visual, OBJ takes 87 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	4.9	15.8	1.0 ms	18.6	0.9	2.6	0.3	44.2
Simulation, STEP	0.9	5.0	14.8	1.0 ms	19.3	11.5	2.5	0.3	54.4
Simulation, STL	1.0	5.3	15.1	3 ms	20.2	1.8	2.5	0.4	46.2
Simulation, OBJ	1.0	4.9	15.1	2 ms	19.9	33.3	2.8	0.4	77.4
Visual, GLB	1.0	5.0	16.8	1 ms	43.3	0.6	5.0	0.4	71.9
Visual, OBJ	1.0	5.4	15.0	1 ms	42.8	17.9	4.4	0.3	86.8

Board	Repo: greatscottgadgets/daisho Board: `hdmi.kicad_pcb`
Folder	hw / de2-115-frontend / hdmi
Complexity	354 / 1000 (size 299, features 55)
KESE features	through vias, slotted holes, filled zones, copper text
Tested	9th November 2026
Copper layers	6
File format	KiCad 3 (3)
Parts, tracks, vias	221, 2,755, 605
Triangles, simulation	4,787,176 in 387 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	164 MB	1.4 GB
STEP	555 MB	1.7 GB
STL	239 MB	1.3 GB
OBJ	513 MB	3.0 GB
Visual
GLB	92 MB	1.7 GB
OBJ	296 MB	1.9 GB

1097. rs232

rs232: stages 4 and 6 take 53% to 82% of a run. Simulation, GLB takes 7.7 s. Simulation, STEP takes 10 s. Simulation, STL takes 8.3 s. Simulation, OBJ takes 12 s. Visual, GLB takes 12 s. Visual, OBJ takes 16 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.8	3.0	0.5 ms	3.0	0.1	0.4	0.2	7.7
Simulation, STEP	0.2	0.8	3.0	0.5 ms	3.2	2.5	0.4	0.2	10.4
Simulation, STL	0.2	0.8	3.0	0.4 ms	3.4	0.2	0.4	0.2	8.3
Simulation, OBJ	0.2	0.9	3.1	0.5 ms	3.3	4.0	0.4	0.2	12.1
Visual, GLB	0.2	0.8	3.0	0.7 ms	7.1	0.1	0.9	0.2	12.3
Visual, OBJ	0.2	0.8	3.0	0.7 ms	6.9	3.5	1.0	0.2	15.7

Board	Repo: greatscottgadgets/daisho Board: `rs232.kicad_pcb`
Folder	hw / de2-115-frontend / rs232
Complexity	222 / 1000 (size 177, features 45)
KESE features	through vias, filled zones, curved board outline
Tested	9th November 2026
Copper layers	2
File format	KiCad 3 (3)
Parts, tracks, vias	41, 1,007, 149
Triangles, simulation	780,252 in 111 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	27 MB	447 MB
STEP	129 MB	483 MB
STL	39 MB	423 MB
OBJ	79 MB	563 MB
Visual
GLB	23 MB	577 MB
OBJ	71 MB	596 MB

1098. gige_fe

gige_fe: stages 4 and 6 take 49% to 84% of a run. Simulation, GLB takes 20 s. Simulation, STEP takes 25 s. Simulation, STL takes 21 s. Simulation, OBJ takes 33 s. Visual, GLB takes 31 s. Visual, OBJ takes 40 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.3	8.8	0.9 ms	7.1	0.4	1.0	0.3	20.3
Simulation, STEP	0.5	2.4	9.0	0.9 ms	7.0	4.8	0.9	0.3	24.9
Simulation, STL	0.5	2.5	8.9	0.8 ms	7.3	0.9	0.9	0.2	21.3
Simulation, OBJ	0.5	2.6	9.0	1 ms	7.5	12.5	1.0	0.3	33.4
Visual, GLB	0.4	2.4	9.2	0.9 ms	16.9	0.2	1.8	0.2	31.2
Visual, OBJ	0.5	2.7	9.0	2 ms	17.1	8.3	2.3	0.3	40.1

Board	Repo: greatscottgadgets/daisho Board: `gige_fe.kicad_pcb`
Folder	hw / frontend / daisho_gige_fe
Complexity	306 / 1000 (size 261, features 45)
KESE features	through vias, filled zones, curved board outline
Tested	9th November 2026
Copper layers	4
File format	KiCad 4 (4)
Parts, tracks, vias	138, 1,686, 264
Triangles, simulation	2,142,834 in 260 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	75 MB	801 MB
STEP	291 MB	856 MB
STL	107 MB	840 MB
OBJ	228 MB	1.4 GB
Visual
GLB	46 MB	890 MB
OBJ	140 MB	1.0 GB

1099. rs232_fe

rs232_fe: stages 4 and 6 take 53% to 85% of a run. Simulation, GLB takes 25 s. Simulation, STEP takes 31 s. Simulation, STL takes 27 s. Simulation, OBJ takes 41 s. Visual, GLB takes 39 s. Visual, OBJ takes 46 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.6	11.4	2 ms	8.5	0.4	1.3	0.3	25.1
Simulation, STEP	0.6	2.8	11.1	1.0 ms	8.6	6.3	1.3	0.3	31.0
Simulation, STL	0.6	2.9	11.8	1 ms	9.3	0.8	1.4	0.3	26.9
Simulation, OBJ	0.6	3.0	12.2	1 ms	9.4	14.2	1.4	0.3	41.0
Visual, GLB	0.6	2.9	11.6	1 ms	21.6	0.2	2.1	0.3	39.3
Visual, OBJ	0.5	2.8	11.1	1.0 ms	21.0	8.3	2.0	0.2	46.0

Board	Repo: greatscottgadgets/daisho Board: `rs232_fe.kicad_pcb`
Folder	hw / frontend / daisho_rs232_fe / rs232_fe
Complexity	275 / 1000 (size 220, features 55)
KESE features	through vias, filled zones, copper text, curved board outline
Tested	9th November 2026
Copper layers	4
File format	KiCad 4 (4)
Parts, tracks, vias	165, 2,512, 181
Triangles, simulation	2,309,022 in 309 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	82 MB	871 MB
STEP	345 MB	921 MB
STL	115 MB	817 MB
OBJ	250 MB	1.6 GB
Visual
GLB	52 MB	1.0 GB
OBJ	161 MB	1.1 GB

1100. hdmi

hdmi: stages 4 and 6 take 50% to 83% of a run. Simulation, GLB takes 48 s. Simulation, STEP takes 58 s. Simulation, STL takes 49 s. Simulation, OBJ takes 77 s. Visual, GLB takes 65 s. Visual, OBJ takes 81 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	5.1	19.0	1 ms	19.0	1.1	2.2	0.4	47.7
Simulation, STEP	1.0	5.3	19.0	0.8 ms	19.9	10.1	2.6	0.3	58.0
Simulation, STL	1.0	5.0	19.3	2 ms	19.3	1.6	2.6	0.4	49.1
Simulation, OBJ	0.9	5.5	19.4	1 ms	19.1	28.8	2.5	0.4	76.5
Visual, GLB	1.0	5.4	19.3	1 ms	34.7	0.4	4.3	0.4	65.4
Visual, OBJ	0.9	5.2	19.2	2 ms	35.4	15.0	5.3	0.3	81.3

Board	Repo: greatscottgadgets/daisho Board: `hdmi.kicad_pcb`
Folder	hw / frontend / hdmi
Complexity	346 / 1000 (size 301, features 45)
KESE features	through vias, filled zones, curved board outline
Tested	9th November 2026
Copper layers	6
File format	KiCad 4 (4)
Parts, tracks, vias	224, 3,608, 525
Triangles, simulation	4,443,754 in 345 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	155 MB	1.3 GB
STEP	527 MB	1.6 GB
STL	222 MB	1.3 GB
OBJ	480 MB	2.9 GB
Visual
GLB	83 MB	1.6 GB
OBJ	264 MB	1.8 GB

1101. prod_fe

prod_fe: stages 4 and 6 take 52% to 84% of a run. Simulation, GLB takes 2.8 s. Simulation, STEP takes 3.9 s. Simulation, STL takes 2.9 s. Simulation, OBJ takes 3.8 s. Visual, GLB takes 5.3 s. Visual, OBJ takes 6.1 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.0	0.3 ms	1.0	45 ms	0.2	0.2	2.8
Simulation, STEP	0.1	0.3	1.0	0.4 ms	1.0	1.1	0.2	0.3	3.9
Simulation, STL	0.1	0.3	1.0	0.4 ms	1.0	71 ms	0.2	0.2	2.9
Simulation, OBJ	0.1	0.3	1.0	0.4 ms	1.0	1.0	0.2	0.2	3.8
Visual, GLB	0.1	0.3	1.0	0.4 ms	3.5	34 ms	0.2	0.2	5.3
Visual, OBJ	0.1	0.3	1.0	0.6 ms	3.4	0.8	0.2	0.2	6.1

Board	Repo: greatscottgadgets/daisho Board: `prod_fe.kicad_pcb`
Folder	hw / frontend / prod_fe_template
Complexity	171 / 1000 (size 146, features 25)
KESE features	through vias, curved board outline
Tested	9th November 2026
Copper layers	4
File format	KiCad 3 (3)
Parts, tracks, vias	5, 208, 28
Triangles, simulation	204,920 in 174 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	7.5 MB	224 MB
STEP	28 MB	232 MB
STL	10 MB	216 MB
OBJ	21 MB	224 MB
Visual
GLB	5.3 MB	199 MB
OBJ	15 MB	204 MB

1102. usb

usb: stages 4 and 6 take 49% to 83% of a run. Simulation, GLB takes 58 s. Simulation, STEP takes 70 s. Simulation, STL takes 63 s. Simulation, OBJ takes 95 s. Visual, GLB takes 82 s. Visual, OBJ takes 2 min

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	7.2	24.1	3 ms	21.4	1.1	2.7	0.3	57.7
Simulation, STEP	0.9	7.3	24.9	1 ms	22.0	12.2	2.6	0.3	70.1
Simulation, STL	0.9	8.5	24.5	2 ms	23.0	2.4	2.9	0.4	62.6
Simulation, OBJ	0.9	7.7	24.7	1 ms	22.3	36.5	2.6	0.4	95.2
Visual, GLB	0.9	7.3	24.5	2 ms	43.3	0.5	5.0	0.3	81.8
Visual, OBJ	1.0	7.7	24.7	1 ms	45.8	21.6	5.0	0.3	106.1

Board	Repo: greatscottgadgets/daisho Board: `usb.kicad_pcb`
Folder	hw / frontend / usb
Complexity	333 / 1000 (size 308, features 25)
KESE features	through vias, curved board outline
Tested	9th November 2026
Copper layers	6
File format	KiCad 4 (4)
Parts, tracks, vias	249, 5,119, 831
Triangles, simulation	5,867,216 in 325 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	202 MB	1.5 GB
STEP	706 MB	2.0 GB
STL	293 MB	1.6 GB
OBJ	640 MB	3.8 GB
Visual
GLB	110 MB	1.8 GB
OBJ	360 MB	2.4 GB

1103. main_board

main_board: stages 4 and 6 take 46% to 83% of a run. Simulation, GLB takes 2 min. Simulation, STEP takes 2 min. Simulation, STL takes 2 min. Simulation, OBJ takes 3 min. Visual, GLB takes 2 min. Visual, OBJ takes 3 min

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.8	12.1	44.8	2 ms	41.1	2.4	5.7	0.5	108.3
Simulation, STEP	1.6	12.1	44.2	2 ms	41.4	23.8	6.2	0.5	129.9
Simulation, STL	1.8	12.4	44.6	3 ms	41.5	5.2	6.4	0.5	112.4
Simulation, OBJ	1.7	12.4	44.5	2 ms	41.2	80.1	6.3	0.5	186.7
Visual, GLB	1.8	12.4	44.9	3 ms	79.1	0.9	9.9	0.4	149.3
Visual, OBJ	1.9	12.8	46.2	3 ms	86.3	33.2	10.6	0.4	191.3

Board	Repo: greatscottgadgets/daisho Board: `main_board.kicad_pcb`
Folder	hw / main_board
Complexity	375 / 1000 (size 330, features 45)
KESE features	through vias, filled zones, curved board outline
Tested	9th November 2026
Copper layers	8
File format	KiCad 4 (4)
Parts, tracks, vias	383, 8,842, 1,485
Triangles, simulation	12,543,244 in 692 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	428 MB	2.4 GB
STEP	1.3 GB	3.6 GB
STL	627 MB	2.4 GB
OBJ	1.4 GB	7.9 GB
Visual
GLB	192 MB	3.2 GB
OBJ	649 MB	4.2 GB

1104. azalea

azalea: stages 4 and 6 take 52% to 83% of a run. Simulation, GLB takes 22 s. Simulation, STEP takes 27 s. Simulation, STL takes 23 s. Simulation, OBJ takes 33 s. Visual, GLB takes 32 s. Visual, OBJ takes 39 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	2.5	9.1	0.9 ms	8.3	0.4	1.1	0.3	22.1
Simulation, STEP	0.4	2.4	9.2	1 ms	8.2	5.2	1.2	0.3	26.8
Simulation, STL	0.5	2.5	9.1	2 ms	8.3	0.7	1.2	0.3	22.6
Simulation, OBJ	0.4	2.6	9.1	1 ms	8.2	11.8	1.1	0.2	33.4
Visual, GLB	0.5	2.4	8.9	1 ms	17.8	0.3	2.1	0.3	32.2
Visual, OBJ	0.4	2.6	9.3	1 ms	18.0	6.4	1.9	0.3	39.0

Board	Repo: greatscottgadgets/greatfet-hardware Board: `azalea.kicad_pcb`
Folder	azalea
Complexity	300 / 1000 (size 245, features 55)
KESE features	through vias, filled zones, copper text, curved board outline
Tested	9th November 2026
Copper layers	4
File format	KiCad 4 (4)
Parts, tracks, vias	84, 1,412, 176
Triangles, simulation	2,293,082 in 149 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	80 MB	702 MB
STEP	329 MB	832 MB
STL	115 MB	717 MB
OBJ	244 MB	1.5 GB
Visual
GLB	48 MB	870 MB
OBJ	149 MB	1.1 GB

1105. begonia

begonia: stages 4 and 6 take 57% to 83% of a run. Simulation, GLB takes 8.0 s. Simulation, STEP takes 9.6 s. Simulation, STL takes 8.1 s. Simulation, OBJ takes 12 s. Visual, GLB takes 11 s. Visual, OBJ takes 12 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.6	4.0	0.4 ms	2.5	0.1	0.4	0.2	8.0
Simulation, STEP	0.2	0.7	3.8	0.7 ms	2.4	2.0	0.4	0.2	9.6
Simulation, STL	0.1	0.7	3.8	0.7 ms	2.6	0.2	0.4	0.2	8.1
Simulation, OBJ	0.1	0.6	4.0	0.6 ms	2.6	3.6	0.4	0.2	11.5
Visual, GLB	0.2	0.7	4.0	0.9 ms	5.0	53 ms	0.6	0.3	10.7
Visual, OBJ	0.2	0.6	3.9	0.6 ms	4.8	1.6	0.6	0.2	12.0

Board	Repo: greatscottgadgets/greatfet-hardware Board: `begonia.kicad_pcb`
Folder	begonia
Complexity	162 / 1000 (size 117, features 45)
KESE features	through vias, filled zones, curved board outline
Tested	9th November 2026
Copper layers	2
File format	KiCad 4 (4)
Parts, tracks, vias	13, 68, 3
Triangles, simulation	705,624 in 117 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	23 MB	327 MB
STEP	106 MB	411 MB
STL	35 MB	326 MB
OBJ	71 MB	506 MB
Visual
GLB	12 MB	363 MB
OBJ	34 MB	368 MB

1106. crocus

crocus: stages 4 and 6 take 51% to 83% of a run. Simulation, GLB takes 13 s. Simulation, STEP takes 17 s. Simulation, STL takes 14 s. Simulation, OBJ takes 23 s. Visual, GLB takes 18 s. Visual, OBJ takes 21 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.3	6.0	0.5 ms	4.4	0.3	0.7	0.3	13.2
Simulation, STEP	0.4	1.5	6.3	0.5 ms	4.7	3.4	0.7	0.3	17.1
Simulation, STL	0.3	1.4	6.4	0.5 ms	4.6	0.4	0.8	0.2	14.2
Simulation, OBJ	0.3	1.4	6.3	0.5 ms	5.1	8.5	0.7	0.3	22.7
Visual, GLB	0.3	1.4	6.4	0.6 ms	8.3	90 ms	0.9	0.2	17.6
Visual, OBJ	0.3	1.3	6.3	0.8 ms	8.0	3.6	1.0	0.2	20.7

Board	Repo: greatscottgadgets/greatfet-hardware Board: `crocus.kicad_pcb`
Folder	crocus
Complexity	220 / 1000 (size 175, features 45)
KESE features	through vias, filled zones, curved board outline
Tested	9th November 2026
Copper layers	4
File format	KiCad 4 (4)
Parts, tracks, vias	49, 298, 46
Triangles, simulation	1,310,436 in 132 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	44 MB	471 MB
STEP	169 MB	546 MB
STL	66 MB	486 MB
OBJ	135 MB	870 MB
Visual
GLB	21 MB	577 MB
OBJ	62 MB	529 MB

1107. daffodil

daffodil: stages 4 and 6 take 57% to 85% of a run. Simulation, GLB takes 12 s. Simulation, STEP takes 15 s. Simulation, STL takes 13 s. Simulation, OBJ takes 18 s. Visual, GLB takes 15 s. Visual, OBJ takes 17 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.9	6.1	0.5 ms	3.9	0.2	0.4	0.2	12.0
Simulation, STEP	0.2	0.9	6.1	0.7 ms	4.2	3.1	0.4	0.2	15.1
Simulation, STL	0.2	1.0	6.3	0.5 ms	4.0	0.4	0.5	0.2	12.6
Simulation, OBJ	0.2	0.9	6.1	0.5 ms	4.0	5.7	0.5	0.2	17.6
Visual, GLB	0.2	1.0	6.4	0.5 ms	6.0	77 ms	0.7	0.2	14.5
Visual, OBJ	0.2	1.0	6.5	0.5 ms	6.3	2.6	0.7	0.3	17.5

Board	Repo: greatscottgadgets/greatfet-hardware Board: `daffodil.kicad_pcb`
Folder	daffodil
Complexity	137 / 1000 (size 97, features 40)
KESE features	filled zones, copper text, curved board outline
Tested	9th November 2026
Copper layers	2
File format	KiCad 5 (20171130)
Parts, tracks, vias	8, 30, 0
Triangles, simulation	1,112,878 in 154 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	37 MB	443 MB
STEP	172 MB	558 MB
STL	56 MB	430 MB
OBJ	113 MB	786 MB
Visual
GLB	18 MB	491 MB
OBJ	53 MB	513 MB

1108. edelweiss

edelweiss: stages 4 and 6 take 53% to 83% of a run. Simulation, GLB takes 6.8 s. Simulation, STEP takes 8.5 s. Simulation, STL takes 6.8 s. Simulation, OBJ takes 11 s. Visual, GLB takes 7.7 s. Visual, OBJ takes 8.5 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.5	3.1	0.1 ms	2.5	98 ms	0.3	0.2	6.8
Simulation, STEP	0.1	0.5	3.2	0.2 ms	2.1	2.0	0.3	0.2	8.5
Simulation, STL	0.2	0.5	3.2	0.3 ms	2.3	0.2	0.3	0.3	6.8
Simulation, OBJ	0.1	0.5	3.2	0.1 ms	2.5	3.9	0.3	0.3	10.8
Visual, GLB	0.2	0.6	3.3	0.3 ms	3.0	43 ms	0.3	0.2	7.7
Visual, OBJ	0.2	0.5	2.9	0.4 ms	3.0	1.4	0.4	0.2	8.5

Board	Repo: greatscottgadgets/greatfet-hardware Board: `edelweiss.kicad_pcb`
Folder	edelweiss
Complexity	96 / 1000 (size 56, features 40)
KESE features	filled zones, copper text, curved board outline
Tested	9th November 2026
Copper layers	4
File format	KiCad 4 (4)
Parts, tracks, vias	7, 0, 0
Triangles, simulation	829,404 in 16 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	28 MB	371 MB
STEP	99 MB	443 MB
STL	41 MB	376 MB
OBJ	83 MB	591 MB
Visual
GLB	10 MB	362 MB
OBJ	30 MB	360 MB

1109. foxglove

foxglove: stages 4 and 6 take 56% to 85% of a run. Simulation, GLB takes 11 s. Simulation, STEP takes 13 s. Simulation, STL takes 11 s. Simulation, OBJ takes 16 s. Visual, GLB takes 13 s. Visual, OBJ takes 16 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	5.8	0.6 ms	3.3	0.2	0.5	0.3	11.1
Simulation, STEP	0.3	0.8	5.5	0.9 ms	3.4	2.7	0.5	0.3	13.5
Simulation, STL	0.2	0.7	5.5	0.7 ms	3.3	0.3	0.5	0.3	10.7
Simulation, OBJ	0.2	0.8	5.9	1.0 ms	3.3	5.4	0.5	0.2	16.5
Visual, GLB	0.2	0.8	5.4	0.6 ms	5.9	77 ms	0.7	0.2	13.3
Visual, OBJ	0.3	0.8	5.4	1 ms	6.3	2.5	0.8	0.3	16.4

Board	Repo: greatscottgadgets/greatfet-hardware Board: `foxglove.kicad_pcb`
Folder	foxglove
Complexity	242 / 1000 (size 187, features 55)
KESE features	through vias, filled zones, copper text, curved board outline
Tested	9th November 2026
Copper layers	2
File format	KiCad 4 (4)
Parts, tracks, vias	19, 318, 24
Triangles, simulation	855,148 in 137 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	29 MB	375 MB
STEP	133 MB	464 MB
STL	43 MB	361 MB
OBJ	87 MB	632 MB
Visual
GLB	15 MB	433 MB
OBJ	44 MB	427 MB

1110. gladiolus

gladiolus: stages 4 and 6 take 55% to 84% of a run. Simulation, GLB takes 24 s. Simulation, STEP takes 29 s. Simulation, STL takes 24 s. Simulation, OBJ takes 36 s. Visual, GLB takes 32 s. Visual, OBJ takes 40 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.5	11.3	0.6 ms	8.2	0.4	1.1	0.3	24.3
Simulation, STEP	0.5	2.5	11.6	0.7 ms	8.1	5.4	1.2	0.3	29.5
Simulation, STL	0.4	2.4	11.1	0.7 ms	8.1	0.8	1.2	0.2	24.2
Simulation, OBJ	0.4	2.3	11.5	0.5 ms	8.4	12.0	1.1	0.3	36.0
Visual, GLB	0.4	2.5	11.4	0.8 ms	15.8	0.2	1.8	0.2	32.3
Visual, OBJ	0.4	2.4	11.4	0.8 ms	16.8	7.4	1.5	0.2	40.2

Board	Repo: greatscottgadgets/greatfet-hardware Board: `gladiolus.kicad_pcb`
Folder	gladiolus
Complexity	299 / 1000 (size 244, features 55)
KESE features	through vias, filled zones, copper text, curved board outline
Tested	9th November 2026
Copper layers	4
File format	KiCad 5 (20171130)
Parts, tracks, vias	138, 962, 106
Triangles, simulation	2,062,476 in 114 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	71 MB	782 MB
STEP	326 MB	859 MB
STL	103 MB	661 MB
OBJ	217 MB	1.3 GB
Visual
GLB	40 MB	856 MB
OBJ	122 MB	938 MB

1111. jasmine

jasmine: stages 4 and 6 take 58% to 83% of a run. Simulation, GLB takes 17 s. Simulation, STEP takes 19 s. Simulation, STL takes 16 s. Simulation, OBJ takes 25 s. Visual, GLB takes 21 s. Visual, OBJ takes 29 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	2.1	8.2	0.7 ms	5.3	0.2	0.5	0.3	16.9
Simulation, STEP	0.3	1.7	7.4	0.6 ms	5.0	3.8	0.6	0.3	19.0
Simulation, STL	0.3	1.6	7.6	1 ms	5.1	0.4	0.7	0.3	16.0
Simulation, OBJ	0.3	2.0	8.5	1 ms	5.8	7.1	0.6	0.3	24.7
Visual, GLB	0.4	1.7	7.4	0.8 ms	10.3	0.1	1.0	0.3	21.3
Visual, OBJ	0.3	1.9	8.8	0.5 ms	11.0	5.5	0.9	0.3	28.7

Board	Repo: greatscottgadgets/greatfet-hardware Board: `jasmine.kicad_pcb`
Folder	jasmine
Complexity	218 / 1000 (size 163, features 55)
KESE features	through vias, filled zones, copper text, curved board outline
Tested	9th November 2026
Copper layers	2
File format	KiCad 5 (20171130)
Parts, tracks, vias	69, 349, 37
Triangles, simulation	1,031,328 in 156 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	35 MB	408 MB
STEP	163 MB	510 MB
STL	52 MB	428 MB
OBJ	106 MB	754 MB
Visual
GLB	20 MB	504 MB
OBJ	59 MB	484 MB

1112. lily

lily: stages 4 and 6 take 53% to 84% of a run. Simulation, GLB takes 10 s. Simulation, STEP takes 12 s. Simulation, STL takes 10 s. Simulation, OBJ takes 15 s. Visual, GLB takes 13 s. Visual, OBJ takes 15 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.9	4.6	0.5 ms	3.5	0.2	0.6	0.2	10.2
Simulation, STEP	0.2	1.0	4.5	0.4 ms	3.4	2.5	0.5	0.2	12.4
Simulation, STL	0.3	1.0	4.3	0.4 ms	3.4	0.3	0.5	0.2	10.0
Simulation, OBJ	0.2	1.1	4.7	1 ms	3.5	5.2	0.6	0.3	15.5
Visual, GLB	0.2	0.9	4.6	0.6 ms	6.4	64 ms	0.6	0.3	13.1
Visual, OBJ	0.2	1.0	4.6	1 ms	6.2	2.1	0.7	0.2	15.1

Board	Repo: greatscottgadgets/greatfet-hardware Board: `lily.kicad_pcb`
Folder	lily
Complexity	212 / 1000 (size 157, features 55)
KESE features	through vias, filled zones, copper text, curved board outline
Tested	9th November 2026
Copper layers	4
File format	KiCad 4 (4)
Parts, tracks, vias	31, 139, 17
Triangles, simulation	1,061,168 in 122 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	35 MB	383 MB
STEP	134 MB	472 MB
STL	53 MB	394 MB
OBJ	107 MB	747 MB
Visual
GLB	15 MB	436 MB
OBJ	44 MB	428 MB

1113. luckybamboo

luckybamboo: stages 4 and 6 take 53% to 85% of a run. Simulation, GLB takes 27 s. Simulation, STEP takes 32 s. Simulation, STL takes 27 s. Simulation, OBJ takes 39 s. Visual, GLB takes 33 s. Visual, OBJ takes 40 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.5	11.9	0.8 ms	9.6	0.5	1.2	0.2	26.5
Simulation, STEP	0.5	2.5	12.3	1 ms	9.6	5.7	1.2	0.3	32.1
Simulation, STL	0.5	2.7	11.9	0.8 ms	9.5	0.7	1.1	0.2	26.7
Simulation, OBJ	0.5	2.5	11.4	0.8 ms	9.4	13.9	1.1	0.2	39.0
Visual, GLB	0.5	2.5	11.9	0.8 ms	16.1	0.2	1.5	0.2	32.9
Visual, OBJ	0.5	2.5	11.8	2 ms	16.1	7.0	1.8	0.2	39.9

Board	Repo: greatscottgadgets/greatfet-hardware Board: `luckybamboo.kicad_pcb`
Folder	luckybamboo
Complexity	336 / 1000 (size 281, features 55)
KESE features	through vias, filled zones, copper text, curved board outline
Tested	9th November 2026
Copper layers	4
File format	KiCad 5 (20171130)
Parts, tracks, vias	153, 1,754, 197
Triangles, simulation	2,657,326 in 183 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	92 MB	827 MB
STEP	351 MB	979 MB
STL	133 MB	884 MB
OBJ	283 MB	1.8 GB
Visual
GLB	48 MB	901 MB
OBJ	147 MB	1.0 GB

1114. narcissus

narcissus: stages 4 and 6 take 60% to 88% of a run. Simulation, GLB takes 30 s. Simulation, STEP takes 37 s. Simulation, STL takes 30 s. Simulation, OBJ takes 44 s. Visual, GLB takes 36 s. Visual, OBJ takes 43 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	2.0	15.7	0.6 ms	10.1	0.3	1.6	0.3	30.4
Simulation, STEP	0.5	1.9	15.6	0.8 ms	10.1	6.8	1.7	0.3	36.9
Simulation, STL	0.4	2.0	15.5	0.6 ms	9.7	0.8	1.6	0.2	30.2
Simulation, OBJ	0.4	2.0	15.8	0.6 ms	10.3	13.4	1.6	0.3	43.8
Visual, GLB	0.4	1.7	13.4	0.8 ms	18.6	0.3	1.7	0.3	36.4
Visual, OBJ	0.4	1.9	15.5	0.5 ms	16.5	7.1	1.4	0.4	43.1

Board	Repo: greatscottgadgets/greatfet-hardware Board: `narcissus.kicad_pcb`
Folder	narcissus
Complexity	280 / 1000 (size 225, features 55)
KESE features	through vias, filled zones, copper text, curved board outline
Tested	9th November 2026
Copper layers	2
File format	KiCad 4 (4)
Parts, tracks, vias	51, 1,212, 68
Triangles, simulation	2,432,446 in 193 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	83 MB	728 MB
STEP	424 MB	977 MB
STL	122 MB	752 MB
OBJ	257 MB	1.6 GB
Visual
GLB	44 MB	977 MB
OBJ	135 MB	1.0 GB

1115. neighbor-template

neighbor-template: stages 4 and 6 take 52% to 82% of a run. Simulation, GLB takes 11 s. Simulation, STEP takes 13 s. Simulation, STL takes 9.1 s. Simulation, OBJ takes 13 s. Visual, GLB takes 10 s. Visual, OBJ takes 12 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.9	5.0	0.2 ms	4.1	0.2	0.5	0.3	11.1
Simulation, STEP	0.2	0.8	4.7	0.2 ms	3.3	2.9	0.5	0.3	12.6
Simulation, STL	0.2	0.8	4.3	0.1 ms	3.0	0.2	0.4	0.2	9.1
Simulation, OBJ	0.2	0.6	4.0	0.2 ms	2.8	4.8	0.5	0.3	13.3
Visual, GLB	0.2	0.8	4.5	0.4 ms	3.7	48 ms	0.4	0.3	10.0
Visual, OBJ	0.2	0.7	4.1	0.2 ms	3.8	2.0	0.5	0.3	11.6

Board	Repo: greatscottgadgets/greatfet-hardware Board: `neighbor-template.kicad_pcb`
Folder	neighbor-template
Complexity	96 / 1000 (size 56, features 40)
KESE features	filled zones, copper text, curved board outline
Tested	9th November 2026
Copper layers	4
File format	KiCad 4 (4)
Parts, tracks, vias	7, 0, 0
Triangles, simulation	829,656 in 16 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	28 MB	353 MB
STEP	99 MB	441 MB
STL	41 MB	380 MB
OBJ	83 MB	589 MB
Visual
GLB	10 MB	360 MB
OBJ	30 MB	365 MB

1116. quince

quince: stages 4 and 6 take 56% to 86% of a run. Simulation, GLB takes 9.9 s. Simulation, STEP takes 13 s. Simulation, STL takes 10 s. Simulation, OBJ takes 15 s. Visual, GLB takes 13 s. Visual, OBJ takes 16 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.8	5.0	0.7 ms	3.1	0.1	0.4	0.2	9.9
Simulation, STEP	0.2	0.8	5.6	0.7 ms	3.1	2.7	0.4	0.3	13.1
Simulation, STL	0.2	0.7	5.5	0.4 ms	3.2	0.2	0.4	0.2	10.5
Simulation, OBJ	0.2	0.7	5.2	0.4 ms	3.2	5.0	0.4	0.2	14.9
Visual, GLB	0.2	0.7	5.2	0.3 ms	5.6	77 ms	0.5	0.3	12.7
Visual, OBJ	0.2	0.8	5.4	0.5 ms	5.8	2.7	0.6	0.3	15.7

Board	Repo: greatscottgadgets/greatfet-hardware Board: `quince.kicad_pcb`
Folder	quince
Complexity	184 / 1000 (size 129, features 55)
KESE features	through vias, filled zones, copper text, curved board outline
Tested	9th November 2026
Copper layers	2
File format	KiCad 4 (4)
Parts, tracks, vias	26, 76, 10
Triangles, simulation	859,922 in 26 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	30 MB	390 MB
STEP	134 MB	456 MB
STL	43 MB	421 MB
OBJ	88 MB	627 MB
Visual
GLB	15 MB	439 MB
OBJ	46 MB	424 MB

1117. hackrf-one

hackrf-one: stages 4 and 6 take 57% to 84% of a run. Simulation, GLB takes 70 s. Simulation, STEP takes 81 s. Simulation, STL takes 70 s. Simulation, OBJ takes 2 min. Visual, GLB takes 91 s. Visual, OBJ takes 2 min

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.6	6.9	30.9	2 ms	26.5	1.0	2.8	0.4	70.2
Simulation, STEP	1.5	6.6	30.1	2 ms	26.6	13.1	2.7	0.3	81.0
Simulation, STL	1.5	6.8	30.3	2 ms	26.4	1.7	2.7	0.4	69.8
Simulation, OBJ	1.4	6.8	30.5	1 ms	27.3	31.8	3.0	0.4	101.2
Visual, GLB	1.5	6.7	31.2	1 ms	45.6	0.5	5.2	0.4	91.0
Visual, OBJ	1.6	7.4	33.9	3 ms	47.6	17.3	4.9	0.4	113.1

Board	Repo: greatscottgadgets/hackrf Board: `hackrf-one.kicad_pcb`
Folder	hardware / hackrf-one
Complexity	396 / 1000 (size 291, features 105)
KESE features	through vias, filled zones, copper text, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20211014)
Parts, tracks, vias	346, 3,817, 498
Triangles, simulation	4,917,978 in 392 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	173 MB	1.5 GB
STEP	687 MB	1.8 GB
STL	246 MB	1.5 GB
OBJ	541 MB	3.3 GB
Visual
GLB	95 MB	1.6 GB
OBJ	304 MB	2.1 GB

1118. LNA915

LNA915: stages 4 and 6 take 50% to 77% of a run. Simulation, GLB takes 2.3 s. Simulation, STEP takes 3.1 s. Simulation, STL takes 2.6 s. Simulation, OBJ takes 3.3 s. Visual, GLB takes 3.3 s. Visual, OBJ takes 3.7 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.9	0.2 ms	0.8	37 ms	84 ms	0.2	2.3
Simulation, STEP	0.1	0.2	0.8	0.2 ms	0.7	1.0	98 ms	0.2	3.1
Simulation, STL	0.1	0.2	1.0	0.2 ms	0.8	50 ms	0.1	0.3	2.6
Simulation, OBJ	0.1	0.2	0.8	0.2 ms	0.9	1.0	0.1	0.2	3.3
Visual, GLB	0.1	0.2	0.9	0.2 ms	1.7	19 ms	0.1	0.3	3.3
Visual, OBJ	0.1	0.2	0.9	0.2 ms	1.7	0.5	0.1	0.2	3.7

Board	Repo: greatscottgadgets/hackrf Board: `LNA915.kicad_pcb`
Folder	hardware / LNA915
Complexity	186 / 1000 (size 151, features 35)
KESE features	through vias, filled zones
Tested	9th November 2026
Copper layers	4
File format	KiCad 5 (20171130)
Parts, tracks, vias	25, 124, 8
Triangles, simulation	207,672 in 30 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	7.5 MB	205 MB
STEP	26 MB	221 MB
STL	10 MB	211 MB
OBJ	22 MB	214 MB
Visual
GLB	3.8 MB	167 MB
OBJ	11 MB	165 MB

1119. marzipan

marzipan: stages 4 and 6 take 57% to 85% of a run. Simulation, GLB takes 58 s. Simulation, STEP takes 71 s. Simulation, STL takes 60 s. Simulation, OBJ takes 84 s. Visual, GLB takes 78 s. Visual, OBJ takes 92 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	5.3	27.0	2 ms	21.2	0.8	2.5	0.3	58.1
Simulation, STEP	1.0	5.3	27.6	2 ms	22.1	11.8	2.5	0.3	70.6
Simulation, STL	1.0	5.5	27.4	2 ms	21.5	1.5	2.8	0.3	59.9
Simulation, OBJ	1.0	5.4	26.9	2 ms	21.2	27.1	2.5	0.3	84.4
Visual, GLB	0.9	5.6	27.1	2 ms	39.5	0.4	4.0	0.3	78.0
Visual, OBJ	1.0	5.5	26.3	2 ms	39.5	14.9	4.3	0.3	91.8

Board	Repo: greatscottgadgets/hackrf Board: `marzipan.kicad_pcb`
Folder	hardware / marzipan
Complexity	336 / 1000 (size 291, features 45)
KESE features	through vias, filled zones, curved board outline
Tested	9th November 2026
Copper layers	4
File format	KiCad 4 (4)
Parts, tracks, vias	340, 3,928, 500
Triangles, simulation	4,858,612 in 391 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	170 MB	1.4 GB
STEP	669 MB	1.8 GB
STL	243 MB	1.4 GB
OBJ	539 MB	3.2 GB
Visual
GLB	95 MB	1.6 GB
OBJ	303 MB	2.1 GB

1120. neapolitan

neapolitan: stages 4 and 6 take 58% to 85% of a run. Simulation, GLB takes 36 s. Simulation, STEP takes 41 s. Simulation, STL takes 37 s. Simulation, OBJ takes 51 s. Visual, GLB takes 48 s. Visual, OBJ takes 56 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	3.3	17.2	1 ms	12.1	0.5	1.4	0.3	35.6
Simulation, STEP	0.6	3.1	17.1	0.6 ms	12.0	6.9	1.5	0.3	41.4
Simulation, STL	0.6	3.4	17.7	0.8 ms	11.8	1.1	1.6	0.3	36.6
Simulation, OBJ	0.6	3.4	17.3	0.5 ms	12.0	15.9	1.5	0.3	51.0
Visual, GLB	0.7	3.2	16.7	1 ms	24.2	0.3	2.7	0.3	48.2
Visual, OBJ	0.5	3.0	16.9	0.6 ms	23.2	8.7	3.0	0.2	55.5

Board	Repo: greatscottgadgets/hackrf Board: `neapolitan.kicad_pcb`
Folder	hardware / neapolitan
Complexity	318 / 1000 (size 273, features 45)
KESE features	through vias, filled zones, curved board outline
Tested	9th November 2026
Copper layers	4
File format	KiCad 4 (4)
Parts, tracks, vias	241, 1,961, 272
Triangles, simulation	3,033,820 in 180 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	106 MB	1.0 GB
STEP	411 MB	1.2 GB
STL	152 MB	948 MB
OBJ	334 MB	2.1 GB
Visual
GLB	58 MB	1.2 GB
OBJ	181 MB	1.3 GB

1121. operacake

operacake: stages 4 and 6 take 53% to 83% of a run. Simulation, GLB takes 33 s. Simulation, STEP takes 40 s. Simulation, STL takes 33 s. Simulation, OBJ takes 49 s. Visual, GLB takes 42 s. Visual, OBJ takes 50 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	3.5	14.1	0.7 ms	12.3	0.6	1.6	0.3	33.0
Simulation, STEP	0.5	3.5	14.1	1 ms	12.3	7.2	1.7	0.3	39.6
Simulation, STL	0.6	3.5	13.9	0.6 ms	12.4	0.9	1.7	0.3	33.4
Simulation, OBJ	0.6	3.5	13.8	0.8 ms	12.3	16.9	1.6	0.3	49.1
Visual, GLB	0.5	3.3	14.1	0.7 ms	21.2	0.2	2.7	0.2	42.3
Visual, OBJ	0.6	3.5	13.5	0.8 ms	22.0	7.7	2.7	0.3	50.2

Board	Repo: greatscottgadgets/hackrf Board: `operacake.kicad_pcb`
Folder	hardware / operacake
Complexity	252 / 1000 (size 207, features 45)
KESE features	through vias, filled zones, curved board outline
Tested	9th November 2026
Copper layers	4
File format	KiCad 4 (4)
Parts, tracks, vias	122, 1,091, 182
Triangles, simulation	3,263,706 in 217 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	110 MB	1.0 GB
STEP	391 MB	1.2 GB
STL	163 MB	993 MB
OBJ	354 MB	2.2 GB
Visual
GLB	50 MB	975 MB
OBJ	157 MB	1.2 GB

1122. praline

praline: stages 4 and 6 take 54% to 86% of a run. Simulation, GLB takes 94 s. Simulation, STEP takes 2 min. Simulation, STL takes 95 s. Simulation, OBJ takes 2 min. Visual, GLB takes 2 min. Visual, OBJ takes 2 min

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.8	8.1	40.9	2 ms	36.9	1.6	4.0	0.4	93.7
Simulation, STEP	2.0	8.1	41.4	2 ms	37.3	19.2	3.8	0.4	112.2
Simulation, STL	1.9	7.5	40.9	1 ms	36.8	3.7	4.0	0.4	95.2
Simulation, OBJ	1.9	8.2	40.0	2 ms	36.7	51.0	4.2	0.4	142.5
Visual, GLB	1.8	7.7	40.2	2 ms	67.6	0.7	6.8	0.4	125.2
Visual, OBJ	1.9	7.7	40.2	2 ms	67.1	21.7	7.1	0.4	146.2

Board	Repo: greatscottgadgets/hackrf-pro Board: `praline.kicad_pcb`
Complexity	466 / 1000 (size 316, features 150)
KESE features	through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours
Tested	9th November 2026
Copper layers	6
File format	KiCad 9 (20241229)
Parts, tracks, vias	511, 4,690, 953
Triangles, simulation	9,435,120 in 508 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	319 MB	2.2 GB
STEP	1.2 GB	3.3 GB
STL	472 MB	2.2 GB
OBJ	1.0 GB	6.1 GB
Visual
GLB	149 MB	2.6 GB
OBJ	491 MB	3.3 GB

1123. swg_test

swg_test: stages 4 and 6 take 45% to 72% of a run. Simulation, GLB takes 4.2 s. Simulation, STEP takes 5.8 s. Simulation, STL takes 4.5 s. Simulation, OBJ takes 6.9 s. Visual, GLB takes 5.9 s. Visual, OBJ takes 7.4 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	1.1	0.2 ms	1.8	85 ms	0.2	0.2	4.2
Simulation, STEP	0.2	0.5	1.3	0.2 ms	1.9	1.4	0.2	0.3	5.8
Simulation, STL	0.2	0.6	1.2	0.2 ms	1.8	0.2	0.2	0.2	4.5
Simulation, OBJ	0.2	0.6	1.2	0.2 ms	1.9	2.6	0.2	0.2	6.9
Visual, GLB	0.2	0.6	1.3	0.2 ms	3.0	66 ms	0.5	0.2	5.9
Visual, OBJ	0.3	0.6	1.2	0.2 ms	3.0	1.7	0.4	0.3	7.4

Board	Repo: greatscottgadgets/lab-notes Board: `swg_test.kicad_pcb`
Folder	rf-testing / 2023-05-16-swg-test-board / swg_test_kicad
Complexity	266 / 1000 (size 166, features 100)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, copper text, stack-up, dielectric εr and tanδ, copper finish
Tested	9th November 2026
Copper layers	4
File format	KiCad 7 (20221018)
Parts, tracks, vias	23, 17, 129
Triangles, simulation	425,002 in 29 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	14 MB	313 MB
STEP	46 MB	357 MB
STL	21 MB	315 MB
OBJ	42 MB	342 MB
Visual
GLB	9.3 MB	297 MB
OBJ	27 MB	294 MB

1124. LNA1109

LNA1109: stages 4 and 6 take 49% to 78% of a run. Simulation, GLB takes 2.7 s. Simulation, STEP takes 3.2 s. Simulation, STL takes 2.4 s. Simulation, OBJ takes 3.3 s. Visual, GLB takes 3.2 s. Visual, OBJ takes 3.7 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.2	1.0	0.3 ms	0.9	44 ms	0.1	0.3	2.7
Simulation, STEP	0.1	0.2	0.8	0.2 ms	0.8	0.9	0.1	0.2	3.2
Simulation, STL	0.1	0.2	0.9	0.8 ms	0.8	66 ms	0.1	0.3	2.4
Simulation, OBJ	0.1	0.2	0.8	0.2 ms	0.8	1.1	98 ms	0.2	3.3
Visual, GLB	0.1	0.2	0.9	0.2 ms	1.7	22 ms	0.1	0.2	3.2
Visual, OBJ	0.1	0.2	0.8	0.2 ms	1.6	0.5	0.1	0.2	3.7

Board	Repo: greatscottgadgets/LNA1109 Board: `LNA1109.kicad_pcb`
Complexity	186 / 1000 (size 151, features 35)
KESE features	through vias, filled zones
Tested	9th November 2026
Copper layers	4
File format	KiCad 5 (20171130)
Parts, tracks, vias	25, 129, 8
Triangles, simulation	207,670 in 30 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	7.5 MB	211 MB
STEP	26 MB	224 MB
STL	10 MB	218 MB
OBJ	22 MB	212 MB
Visual
GLB	3.9 MB	167 MB
OBJ	11 MB	167 MB

1125. LNA3030

LNA3030: stages 4 and 6 take 50% to 79% of a run. Simulation, GLB takes 2.7 s. Simulation, STEP takes 3.5 s. Simulation, STL takes 2.6 s. Simulation, OBJ takes 3.7 s. Visual, GLB takes 3.3 s. Visual, OBJ takes 3.9 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	1.0	0.2 ms	0.9	36 ms	0.1	0.2	2.7
Simulation, STEP	0.1	0.2	1.1	0.2 ms	0.9	0.9	0.1	0.2	3.5
Simulation, STL	0.2	0.2	1.0	0.2 ms	0.9	49 ms	0.1	0.2	2.6
Simulation, OBJ	0.1	0.2	1.0	0.3 ms	0.8	1.2	0.1	0.2	3.7
Visual, GLB	0.1	0.2	1.0	0.2 ms	1.6	20 ms	0.1	0.2	3.3
Visual, OBJ	0.1	0.2	1.0	0.2 ms	1.6	0.6	0.1	0.2	3.9

Board	Repo: greatscottgadgets/LNA3030 Board: `LNA3030.kicad_pcb`
Complexity	186 / 1000 (size 151, features 35)
KESE features	through vias, filled zones
Tested	9th November 2026
Copper layers	4
File format	KiCad 5 (20171130)
Parts, tracks, vias	25, 125, 9
Triangles, simulation	211,622 in 30 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	7.6 MB	209 MB
STEP	27 MB	224 MB
STL	11 MB	211 MB
OBJ	22 MB	204 MB
Visual
GLB	3.9 MB	168 MB
OBJ	11 MB	171 MB

1126. baluns

baluns: stages 4 and 6 take 50% to 84% of a run. Simulation, GLB takes 15 s. Simulation, STEP takes 19 s. Simulation, STL takes 16 s. Simulation, OBJ takes 24 s. Visual, GLB takes 18 s. Visual, OBJ takes 20 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	1.3	6.6	0.4 ms	5.6	0.2	0.7	0.2	15.1
Simulation, STEP	0.6	1.2	6.2	0.2 ms	5.9	3.9	0.6	0.3	18.7
Simulation, STL	0.6	1.3	6.4	0.4 ms	6.2	0.5	0.7	0.3	16.0
Simulation, OBJ	0.6	1.4	6.4	0.3 ms	5.5	8.8	0.7	0.3	23.7
Visual, GLB	0.5	1.2	6.7	0.6 ms	8.1	76 ms	0.7	0.3	17.7
Visual, OBJ	0.6	1.3	6.4	0.3 ms	7.9	2.7	0.8	0.2	19.8

Board	Repo: greatscottgadgets/misc Board: `baluns.kicad_pcb`
Folder	evaluation-boards / baluns
Complexity	232 / 1000 (size 177, features 55)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, copper text
Tested	9th November 2026
Copper layers	4
File format	KiCad 9 (20241229)
Parts, tracks, vias	92, 230, 30
Triangles, simulation	1,559,312 in 64 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	54 MB	662 MB
STEP	192 MB	770 MB
STL	78 MB	645 MB
OBJ	162 MB	1.1 GB
Visual
GLB	17 MB	551 MB
OBJ	51 MB	552 MB

1127. BGA622H6820

BGA622H6820: stages 4 and 6 take 49% to 77% of a run. Simulation, GLB takes 2.7 s. Simulation, STEP takes 3.6 s. Simulation, STL takes 2.7 s. Simulation, OBJ takes 4.1 s. Visual, GLB takes 3.3 s. Visual, OBJ takes 3.9 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	1.0	0.3 ms	0.9	39 ms	0.1	0.3	2.7
Simulation, STEP	0.1	0.2	1.0	0.2 ms	0.9	1.0	0.1	0.2	3.6
Simulation, STL	0.1	0.2	1.0	0.2 ms	0.9	53 ms	0.1	0.2	2.7
Simulation, OBJ	0.1	0.2	1.1	0.2 ms	0.9	1.4	0.1	0.2	4.1
Visual, GLB	0.1	0.3	1.0	0.3 ms	1.5	20 ms	0.2	0.2	3.3
Visual, OBJ	0.1	0.2	1.0	0.2 ms	1.6	0.6	0.2	0.2	3.9

Board	Repo: greatscottgadgets/misc Board: `BGA622H6820.kicad_pcb`
Folder	evaluation-boards / BGA622H6820
Complexity	163 / 1000 (size 128, features 35)
KESE features	through vias, filled zones
Tested	9th November 2026
Copper layers	4
File format	KiCad 4 (4)
Parts, tracks, vias	15, 33, 6
Triangles, simulation	226,944 in 22 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	7.8 MB	212 MB
STEP	30 MB	222 MB
STL	11 MB	214 MB
OBJ	23 MB	212 MB
Visual
GLB	3.5 MB	166 MB
OBJ	9.9 MB	166 MB

1128. CC-test

CC-test: stages 4 and 6 take 50% to 81% of a run. Simulation, GLB takes 3.7 s. Simulation, STEP takes 4.9 s. Simulation, STL takes 3.5 s. Simulation, OBJ takes 5.3 s. Visual, GLB takes 5.0 s. Visual, OBJ takes 6.1 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.7	0.3 ms	1.2	58 ms	0.2	0.2	3.7
Simulation, STEP	0.2	0.3	1.6	0.2 ms	1.1	1.4	0.2	0.2	4.9
Simulation, STL	0.1	0.3	1.5	0.2 ms	1.1	68 ms	0.2	0.2	3.5
Simulation, OBJ	0.1	0.3	1.5	0.2 ms	1.1	1.8	0.2	0.3	5.3
Visual, GLB	0.2	0.3	1.6	0.3 ms	2.5	35 ms	0.2	0.2	5.0
Visual, OBJ	0.1	0.3	1.5	0.3 ms	2.5	1.2	0.3	0.2	6.1

Board	Repo: greatscottgadgets/misc Board: `CC-test.kicad_pcb`
Folder	evaluation-boards / CC-test
Complexity	206 / 1000 (size 141, features 65)
KESE features	through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline
Tested	9th November 2026
Copper layers	2
File format	KiCad 5 (20171130)
Parts, tracks, vias	23, 186, 20
Triangles, simulation	303,426 in 35 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	11 MB	240 MB
STEP	52 MB	258 MB
STL	15 MB	238 MB
OBJ	31 MB	258 MB
Visual
GLB	6.8 MB	218 MB
OBJ	20 MB	218 MB

1129. DC1722J5005AHF

DC1722J5005AHF: stages 4 and 6 take 50% to 80% of a run. Simulation, GLB takes 3.5 s. Simulation, STEP takes 4.6 s. Simulation, STL takes 3.4 s. Simulation, OBJ takes 5.5 s. Visual, GLB takes 3.8 s. Visual, OBJ takes 4.6 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.2	0.3 ms	1.4	50 ms	0.2	0.3	3.5
Simulation, STEP	0.1	0.3	1.3	0.1 ms	1.3	1.2	0.2	0.2	4.6
Simulation, STL	0.1	0.3	1.2	0.2 ms	1.3	79 ms	0.2	0.2	3.4
Simulation, OBJ	0.1	0.3	1.3	0.2 ms	1.5	1.9	0.2	0.2	5.5
Visual, GLB	0.1	0.3	1.2	0.3 ms	1.8	18 ms	0.1	0.2	3.8
Visual, OBJ	0.2	0.4	1.2	0.2 ms	2.0	0.6	0.1	0.2	4.6

Board	Repo: greatscottgadgets/misc Board: `DC1722J5005AHF.kicad_pcb`
Folder	evaluation-boards / DC1722J5005AHF
Complexity	172 / 1000 (size 117, features 55)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline
Tested	9th November 2026
Copper layers	4
File format	KiCad 5 (20171130)
Parts, tracks, vias	9, 16, 6
Triangles, simulation	333,628 in 18 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	11 MB	266 MB
STEP	37 MB	292 MB
STL	17 MB	268 MB
OBJ	33 MB	284 MB
Visual
GLB	3.7 MB	202 MB
OBJ	10 MB	199 MB

1130. filters

filters: stages 4 and 6 take 56% to 83% of a run. Simulation, GLB takes 22 s. Simulation, STEP takes 27 s. Simulation, STL takes 23 s. Simulation, OBJ takes 33 s. Visual, GLB takes 24 s. Visual, OBJ takes 27 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	2.0	9.1	0.5 ms	9.2	0.3	0.8	0.4	22.4
Simulation, STEP	0.8	2.0	8.9	0.5 ms	9.2	4.8	0.8	0.3	26.7
Simulation, STL	0.8	1.8	9.1	0.4 ms	9.1	0.7	0.9	0.3	22.7
Simulation, OBJ	0.7	2.0	9.5	0.5 ms	8.9	10.4	0.9	0.3	32.8
Visual, GLB	0.7	2.1	9.0	0.2 ms	10.8	0.1	1.0	0.3	23.9
Visual, OBJ	0.7	2.0	9.0	0.2 ms	10.6	3.2	0.9	0.3	26.7

Board	Repo: greatscottgadgets/misc Board: `filters.kicad_pcb`
Folder	evaluation-boards / filters
Complexity	218 / 1000 (size 163, features 55)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline
Tested	9th November 2026
Copper layers	4
File format	KiCad 9 (20241229)
Parts, tracks, vias	30, 41, 78
Triangles, simulation	2,127,510 in 31 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	70 MB	911 MB
STEP	237 MB	1.0 GB
STL	106 MB	985 MB
OBJ	223 MB	1.4 GB
Visual
GLB	23 MB	624 MB
OBJ	69 MB	626 MB

1131. leds

leds: stages 4 and 6 take 54% to 80% of a run. Simulation, GLB takes 4.8 s. Simulation, STEP takes 6.8 s. Simulation, STL takes 4.8 s. Simulation, OBJ takes 6.5 s. Visual, GLB takes 6.3 s. Visual, OBJ takes 7.8 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.4	1.4	0.3 ms	2.2	64 ms	0.2	0.2	4.8
Simulation, STEP	0.3	0.4	1.4	0.2 ms	2.3	2.1	0.2	0.2	6.8
Simulation, STL	0.2	0.3	1.4	0.3 ms	2.3	0.1	0.2	0.2	4.8
Simulation, OBJ	0.2	0.3	1.4	0.4 ms	2.3	1.8	0.2	0.2	6.5
Visual, GLB	0.2	0.3	1.5	0.3 ms	3.5	59 ms	0.4	0.3	6.3
Visual, OBJ	0.2	0.4	1.4	0.2 ms	3.5	1.6	0.5	0.2	7.8

Board	Repo: greatscottgadgets/misc Board: `leds.kicad_pcb`
Folder	evaluation-boards / leds
Complexity	247 / 1000 (size 172, features 75)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ
Tested	9th November 2026
Copper layers	2
File format	KiCad 8 (20240108)
Parts, tracks, vias	128, 372, 54
Triangles, simulation	457,374 in 66 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	15 MB	331 MB
STEP	79 MB	384 MB
STL	23 MB	331 MB
OBJ	46 MB	370 MB
Visual
GLB	13 MB	427 MB
OBJ	37 MB	421 MB

1132. limiters

limiters: stages 4 and 6 take 50% to 83% of a run. Simulation, GLB takes 16 s. Simulation, STEP takes 18 s. Simulation, STL takes 15 s. Simulation, OBJ takes 24 s. Visual, GLB takes 19 s. Visual, OBJ takes 23 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	1.3	6.2	0.5 ms	6.3	0.3	0.7	0.3	15.7
Simulation, STEP	0.6	1.3	5.9	0.4 ms	5.6	3.7	0.6	0.3	18.1
Simulation, STL	0.6	1.3	6.4	0.8 ms	5.8	0.6	0.6	0.3	15.5
Simulation, OBJ	0.5	1.3	6.3	0.4 ms	5.8	9.3	0.6	0.3	24.1
Visual, GLB	0.6	1.3	6.2	0.5 ms	9.7	0.1	0.9	0.3	19.1
Visual, OBJ	0.7	1.4	6.5	0.4 ms	9.5	3.6	0.8	0.3	22.8

Board	Repo: greatscottgadgets/misc Board: `limiters.kicad_pcb`
Folder	evaluation-boards / limiters
Complexity	267 / 1000 (size 192, features 75)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ
Tested	9th November 2026
Copper layers	4
File format	KiCad 8 (20240108)
Parts, tracks, vias	143, 397, 61
Triangles, simulation	1,536,570 in 79 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	52 MB	735 MB
STEP	184 MB	748 MB
STL	77 MB	667 MB
OBJ	157 MB	1.1 GB
Visual
GLB	21 MB	611 MB
OBJ	65 MB	614 MB

1133. passives

passives: stages 4 and 6 take 51% to 83% of a run. Simulation, GLB takes 13 s. Simulation, STEP takes 17 s. Simulation, STL takes 13 s. Simulation, OBJ takes 20 s. Visual, GLB takes 14 s. Visual, OBJ takes 17 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.1	5.4	0.3 ms	5.3	0.2	0.6	0.3	13.4
Simulation, STEP	0.4	1.2	5.2	0.3 ms	5.4	3.8	0.5	0.2	16.7
Simulation, STL	0.5	1.1	5.4	0.2 ms	5.0	0.4	0.6	0.3	13.2
Simulation, OBJ	0.4	1.1	5.2	0.3 ms	5.1	7.4	0.6	0.3	20.0
Visual, GLB	0.4	1.1	5.3	0.3 ms	6.8	68 ms	0.6	0.3	14.5
Visual, OBJ	0.4	1.0	5.1	0.3 ms	7.0	2.6	0.7	0.3	17.1

Board	Repo: greatscottgadgets/misc Board: `passives.kicad_pcb`
Folder	evaluation-boards / passives
Complexity	239 / 1000 (size 164, features 75)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ
Tested	9th November 2026
Copper layers	4
File format	KiCad 8 (20240108)
Parts, tracks, vias	59, 82, 38
Triangles, simulation	1,229,348 in 40 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	42 MB	599 MB
STEP	137 MB	661 MB
STL	61 MB	608 MB
OBJ	124 MB	835 MB
Visual
GLB	15 MB	455 MB
OBJ	44 MB	483 MB

1134. pmos-or

pmos-or: stages 4 and 6 take 53% to 83% of a run. Simulation, GLB takes 4.7 s. Simulation, STEP takes 6.3 s. Simulation, STL takes 4.9 s. Simulation, OBJ takes 6.9 s. Visual, GLB takes 6.3 s. Visual, OBJ takes 7.9 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	2.2	0.3 ms	1.5	70 ms	0.2	0.2	4.7
Simulation, STEP	0.2	0.4	2.2	0.2 ms	1.5	1.6	0.2	0.2	6.3
Simulation, STL	0.2	0.4	2.3	0.3 ms	1.5	92 ms	0.2	0.2	4.9
Simulation, OBJ	0.2	0.4	2.2	0.2 ms	1.5	2.2	0.2	0.2	6.9
Visual, GLB	0.2	0.4	2.3	0.2 ms	3.0	45 ms	0.3	0.2	6.3
Visual, OBJ	0.2	0.4	2.4	0.2 ms	3.0	1.5	0.3	0.2	7.9

Board	Repo: greatscottgadgets/misc Board: `pmos-or.kicad_pcb`
Folder	evaluation-boards / pmos-or
Complexity	234 / 1000 (size 149, features 85)
KESE features	through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ
Tested	9th November 2026
Copper layers	2
File format	KiCad 6 (20211014)
Parts, tracks, vias	42, 193, 24
Triangles, simulation	441,360 in 48 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	16 MB	287 MB
STEP	83 MB	331 MB
STL	22 MB	281 MB
OBJ	45 MB	340 MB
Visual
GLB	9.8 MB	309 MB
OBJ	29 MB	305 MB

1135. quad-balun-directional-coupler

Stages 4 and 6 take 52% to 79% of a run. Simulation, GLB takes 3.8 s. Simulation, STEP takes 5.0 s. Simulation, STL takes 3.9 s. Simulation, OBJ takes 5.8 s. Visual, GLB takes 4.2 s. Visual, OBJ takes 5.0 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.5	0.3 ms	1.5	55 ms	0.2	0.2	3.8
Simulation, STEP	0.1	0.3	1.4	0.3 ms	1.4	1.2	0.2	0.2	5.0
Simulation, STL	0.2	0.3	1.4	0.4 ms	1.4	81 ms	0.2	0.2	3.9
Simulation, OBJ	0.1	0.4	1.5	0.3 ms	1.5	1.9	0.2	0.3	5.8
Visual, GLB	0.2	0.3	1.4	0.3 ms	1.9	26 ms	0.1	0.2	4.2
Visual, OBJ	0.2	0.3	1.4	0.3 ms	2.2	0.6	0.1	0.2	5.0

Board	Repo: greatscottgadgets/misc Board: `quad-balun-directional-coupler.kicad_pcb`
Folder	evaluation-boards / quad-balun-directional-coupler
Complexity	167 / 1000 (size 132, features 35)
KESE features	through vias, filled zones
Tested	9th November 2026
Copper layers	4
File format	KiCad 5 (20171130)
Parts, tracks, vias	14, 55, 4
Triangles, simulation	337,942 in 27 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	11 MB	250 MB
STEP	37 MB	295 MB
STL	17 MB	252 MB
OBJ	34 MB	288 MB
Visual
GLB	4.0 MB	205 MB
OBJ	11 MB	203 MB

1136. rf-amps

rf-amps: stages 4 and 6 take 51% to 85% of a run. Simulation, GLB takes 8.9 s. Simulation, STEP takes 11 s. Simulation, STL takes 9.2 s. Simulation, OBJ takes 14 s. Visual, GLB takes 11 s. Visual, OBJ takes 13 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.8	3.9	0.2 ms	3.2	0.2	0.3	0.2	8.9
Simulation, STEP	0.3	0.7	3.9	0.2 ms	3.3	2.2	0.3	0.2	11.0
Simulation, STL	0.3	0.7	3.9	0.2 ms	3.3	0.2	0.4	0.3	9.2
Simulation, OBJ	0.3	0.7	3.7	0.2 ms	3.4	5.1	0.4	0.3	13.9
Visual, GLB	0.3	0.8	4.1	0.2 ms	5.5	52 ms	0.3	0.2	11.3
Visual, OBJ	0.3	0.8	3.8	0.2 ms	5.6	1.7	0.4	0.2	12.8

Board	Repo: greatscottgadgets/misc Board: `rf-amps.kicad_pcb`
Folder	evaluation-boards / rf-amps
Complexity	231 / 1000 (size 166, features 65)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline
Tested	9th November 2026
Copper layers	4
File format	KiCad 9 (20241229)
Parts, tracks, vias	59, 149, 23
Triangles, simulation	984,660 in 47 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	34 MB	490 MB
STEP	122 MB	526 MB
STL	49 MB	456 MB
OBJ	100 MB	708 MB
Visual
GLB	12 MB	424 MB
OBJ	35 MB	410 MB

1137. rf-switch-dpdt

rf-switch-dpdt: stages 4 and 6 take 50% to 83% of a run. Simulation, GLB takes 8.8 s. Simulation, STEP takes 11 s. Simulation, STL takes 8.9 s. Simulation, OBJ takes 14 s. Visual, GLB takes 11 s. Visual, OBJ takes 14 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.7	3.6	0.5 ms	3.3	0.2	0.5	0.2	8.8
Simulation, STEP	0.3	0.7	3.6	0.4 ms	3.4	2.2	0.4	0.2	11.0
Simulation, STL	0.3	0.7	3.5	0.5 ms	3.4	0.3	0.5	0.2	8.9
Simulation, OBJ	0.3	0.7	3.7	0.4 ms	3.5	5.4	0.5	0.2	14.3
Visual, GLB	0.3	0.7	3.5	0.4 ms	5.8	83 ms	0.5	0.3	11.2
Visual, OBJ	0.3	0.8	3.6	0.6 ms	5.7	2.3	0.6	0.2	13.6

Board	Repo: greatscottgadgets/misc Board: `rf-switch-dpdt.kicad_pcb`
Folder	evaluation-boards / rf-switch-dpdt
Complexity	256 / 1000 (size 156, features 100)
KESE features	through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, stack-up, dielectric εr and tanδ
Tested	9th November 2026
Copper layers	4
File format	KiCad 7 (20221018)
Parts, tracks, vias	29, 120, 24
Triangles, simulation	1,024,652 in 39 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	35 MB	432 MB
STEP	138 MB	521 MB
STL	51 MB	424 MB
OBJ	102 MB	724 MB
Visual
GLB	16 MB	475 MB
OBJ	47 MB	494 MB

1138. rf-switch-sp3t

rf-switch-sp3t: stages 4 and 6 take 51% to 81% of a run. Simulation, GLB takes 8.6 s. Simulation, STEP takes 10 s. Simulation, STL takes 9.0 s. Simulation, OBJ takes 13 s. Visual, GLB takes 10 s. Visual, OBJ takes 12 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.7	3.5	0.4 ms	3.2	0.1	0.4	0.3	8.6
Simulation, STEP	0.3	0.7	3.5	0.2 ms	3.1	2.2	0.4	0.2	10.4
Simulation, STL	0.3	0.7	3.6	0.2 ms	3.4	0.3	0.4	0.3	9.0
Simulation, OBJ	0.3	0.8	3.6	0.3 ms	3.2	4.9	0.4	0.3	13.5
Visual, GLB	0.3	0.8	3.5	0.3 ms	4.7	79 ms	0.5	0.3	10.1
Visual, OBJ	0.3	0.7	3.6	0.3 ms	5.2	1.8	0.5	0.2	12.2

Board	Repo: greatscottgadgets/misc Board: `rf-switch-sp3t.kicad_pcb`
Folder	evaluation-boards / rf-switch-sp3t
Complexity	241 / 1000 (size 166, features 75)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ
Tested	9th November 2026
Copper layers	4
File format	KiCad 8 (20240108)
Parts, tracks, vias	33, 141, 57
Triangles, simulation	942,708 in 40 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	32 MB	468 MB
STEP	103 MB	532 MB
STL	47 MB	442 MB
OBJ	95 MB	673 MB
Visual
GLB	13 MB	415 MB
OBJ	38 MB	441 MB

1139. rf-switch-sp4t

rf-switch-sp4t: stages 4 and 6 take 53% to 83% of a run. Simulation, GLB takes 16 s. Simulation, STEP takes 19 s. Simulation, STL takes 16 s. Simulation, OBJ takes 24 s. Visual, GLB takes 20 s. Visual, OBJ takes 22 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.5	6.2	0.4 ms	6.7	0.3	0.7	0.2	16.1
Simulation, STEP	0.5	1.5	6.1	0.3 ms	6.3	4.0	0.7	0.2	19.3
Simulation, STL	0.4	1.5	6.1	0.3 ms	6.6	0.6	0.8	0.2	16.1
Simulation, OBJ	0.4	1.3	5.9	0.5 ms	6.8	8.7	0.7	0.3	24.1
Visual, GLB	0.5	1.5	6.3	0.3 ms	10.3	0.1	1.0	0.3	19.9
Visual, OBJ	0.4	1.5	6.1	0.3 ms	9.9	3.4	1.0	0.2	22.5

Board	Repo: greatscottgadgets/misc Board: `rf-switch-sp4t.kicad_pcb`
Folder	evaluation-boards / rf-switch-sp4t
Complexity	287 / 1000 (size 187, features 100)
KESE features	through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, stack-up, dielectric εr and tanδ
Tested	9th November 2026
Copper layers	4
File format	KiCad 8 (20240108)
Parts, tracks, vias	73, 347, 109
Triangles, simulation	2,124,978 in 64 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	72 MB	865 MB
STEP	238 MB	950 MB
STL	106 MB	881 MB
OBJ	220 MB	1.4 GB
Visual
GLB	28 MB	811 MB
OBJ	85 MB	718 MB

1140. rf-switch-spdt

rf-switch-spdt: stages 4 and 6 take 48% to 85% of a run. Simulation, GLB takes 6.6 s. Simulation, STEP takes 8.1 s. Simulation, STL takes 6.3 s. Simulation, OBJ takes 9.9 s. Visual, GLB takes 9.0 s. Visual, OBJ takes 11 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.5	0.2 ms	2.5	0.1	0.5	0.2	6.6
Simulation, STEP	0.2	0.5	2.5	0.2 ms	2.4	1.8	0.4	0.2	8.1
Simulation, STL	0.2	0.6	2.4	0.1 ms	2.4	0.2	0.3	0.2	6.3
Simulation, OBJ	0.2	0.5	2.4	0.2 ms	2.3	3.7	0.4	0.3	9.9
Visual, GLB	0.2	0.5	2.4	0.2 ms	5.3	42 ms	0.3	0.2	9.0
Visual, OBJ	0.2	0.5	2.4	0.3 ms	5.4	1.5	0.3	0.2	10.5

Board	Repo: greatscottgadgets/misc Board: `rf-switch-spdt.kicad_pcb`
Folder	evaluation-boards / rf-switch-spdt
Complexity	259 / 1000 (size 159, features 100)
KESE features	through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, stack-up, dielectric εr and tanδ
Tested	9th November 2026
Copper layers	4
File format	KiCad 8 (20240108)
Parts, tracks, vias	28, 85, 48
Triangles, simulation	729,262 in 31 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	25 MB	391 MB
STEP	79 MB	447 MB
STL	36 MB	393 MB
OBJ	73 MB	523 MB
Visual
GLB	10 MB	354 MB
OBJ	30 MB	352 MB

1141. Si5351A

Si5351A: stages 4 and 6 take 50% to 83% of a run. Simulation, GLB takes 12 s. Simulation, STEP takes 15 s. Simulation, STL takes 12 s. Simulation, OBJ takes 19 s. Visual, GLB takes 16 s. Visual, OBJ takes 19 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.1	5.2	0.7 ms	4.3	0.2	0.6	0.2	11.9
Simulation, STEP	0.4	1.1	5.3	0.5 ms	4.2	3.0	0.5	0.3	14.7
Simulation, STL	0.4	1.1	5.4	0.5 ms	4.3	0.4	0.6	0.2	12.4
Simulation, OBJ	0.4	1.2	5.3	0.5 ms	4.3	7.1	0.5	0.2	19.0
Visual, GLB	0.3	1.1	5.4	0.3 ms	7.6	92 ms	0.9	0.2	15.6
Visual, OBJ	0.3	1.1	5.5	0.3 ms	7.2	3.2	1.0	0.2	18.5

Board	Repo: greatscottgadgets/misc Board: `Si5351A.kicad_pcb`
Folder	evaluation-boards / Si5351A
Complexity	273 / 1000 (size 188, features 85)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20211014)
Parts, tracks, vias	84, 439, 69
Triangles, simulation	1,313,314 in 62 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	43 MB	578 MB
STEP	152 MB	634 MB
STL	66 MB	566 MB
OBJ	133 MB	899 MB
Visual
GLB	20 MB	627 MB
OBJ	61 MB	588 MB

1142. sky13350

sky13350: stages 4 and 6 take 50% to 80% of a run. Simulation, GLB takes 2.7 s. Simulation, STEP takes 3.5 s. Simulation, STL takes 2.6 s. Simulation, OBJ takes 3.7 s. Visual, GLB takes 3.6 s. Visual, OBJ takes 4.0 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	91 ms	0.2	1.1	0.3 ms	0.9	42 ms	0.1	0.2	2.7
Simulation, STEP	94 ms	0.2	1.1	0.2 ms	0.9	0.9	0.1	0.2	3.5
Simulation, STL	0.1	0.2	1.1	0.4 ms	0.8	68 ms	0.2	0.2	2.6
Simulation, OBJ	0.1	0.2	1.0	0.2 ms	0.9	1.2	0.1	0.2	3.7
Visual, GLB	99 ms	0.2	1.1	0.4 ms	1.8	20 ms	0.2	0.2	3.6
Visual, OBJ	0.1	0.3	1.1	0.3 ms	1.6	0.5	0.2	0.2	4.0

Board	Repo: greatscottgadgets/misc Board: `sky13350.kicad_pcb`
Folder	evaluation-boards / sky13350
Complexity	164 / 1000 (size 129, features 35)
KESE features	through vias, filled zones
Tested	9th November 2026
Copper layers	4
File format	KiCad 4 (4)
Parts, tracks, vias	22, 34, 3
Triangles, simulation	292,626 in 27 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	10 MB	222 MB
STEP	39 MB	241 MB
STL	15 MB	225 MB
OBJ	30 MB	229 MB
Visual
GLB	4.4 MB	203 MB
OBJ	13 MB	197 MB

1143. sky13351

sky13351: stages 4 and 6 take 51% to 78% of a run. Simulation, GLB takes 3.1 s. Simulation, STEP takes 4.2 s. Simulation, STL takes 3.2 s. Simulation, OBJ takes 4.6 s. Visual, GLB takes 4.0 s. Visual, OBJ takes 4.5 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.3	0.2 ms	1.0	47 ms	0.2	0.2	3.1
Simulation, STEP	0.1	0.3	1.4	0.1 ms	1.0	1.1	0.1	0.2	4.2
Simulation, STL	0.1	0.3	1.3	0.2 ms	1.0	70 ms	0.2	0.2	3.2
Simulation, OBJ	0.1	0.3	1.3	0.2 ms	1.0	1.4	0.2	0.2	4.6
Visual, GLB	0.1	0.3	1.3	0.2 ms	1.8	23 ms	0.2	0.2	4.0
Visual, OBJ	0.1	0.3	1.2	0.2 ms	1.8	0.7	0.2	0.3	4.5

Board	Repo: greatscottgadgets/misc Board: `sky13351.kicad_pcb`
Folder	evaluation-boards / sky13351
Complexity	167 / 1000 (size 132, features 35)
KESE features	through vias, filled zones
Tested	9th November 2026
Copper layers	4
File format	KiCad 4 (4)
Parts, tracks, vias	22, 42, 3
Triangles, simulation	294,750 in 27 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	10 MB	233 MB
STEP	40 MB	241 MB
STL	15 MB	228 MB
OBJ	30 MB	231 MB
Visual
GLB	4.5 MB	192 MB
OBJ	13 MB	193 MB

1144. sky13374

sky13374: stages 4 and 6 take 48% to 79% of a run. Simulation, GLB takes 4.6 s. Simulation, STEP takes 5.8 s. Simulation, STL takes 4.2 s. Simulation, OBJ takes 6.2 s. Visual, GLB takes 5.1 s. Visual, OBJ takes 6.0 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.9	0.2 ms	1.5	86 ms	0.2	0.3	4.6
Simulation, STEP	0.2	0.4	1.7	0.2 ms	1.4	1.6	0.2	0.3	5.8
Simulation, STL	0.2	0.5	1.7	0.4 ms	1.3	88 ms	0.2	0.3	4.2
Simulation, OBJ	0.1	0.4	1.7	0.2 ms	1.3	2.3	0.2	0.2	6.2
Visual, GLB	0.1	0.3	1.7	0.2 ms	2.3	25 ms	0.3	0.3	5.1
Visual, OBJ	0.1	0.3	1.8	0.4 ms	2.4	0.8	0.2	0.3	6.0

Board	Repo: greatscottgadgets/misc Board: `sky13374.kicad_pcb`
Folder	evaluation-boards / sky13374
Complexity	171 / 1000 (size 136, features 35)
KESE features	through vias, filled zones
Tested	9th November 2026
Copper layers	4
File format	KiCad 4 (4)
Parts, tracks, vias	17, 45, 10
Triangles, simulation	299,316 in 23 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	10 MB	225 MB
STEP	40 MB	236 MB
STL	15 MB	226 MB
OBJ	30 MB	234 MB
Visual
GLB	4.6 MB	202 MB
OBJ	13 MB	197 MB

1145. sky13411

sky13411: stages 4 and 6 take 51% to 80% of a run. Simulation, GLB takes 4.3 s. Simulation, STEP takes 5.5 s. Simulation, STL takes 3.9 s. Simulation, OBJ takes 6.0 s. Visual, GLB takes 5.0 s. Visual, OBJ takes 6.2 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	1.9	0.2 ms	1.3	84 ms	0.2	0.3	4.3
Simulation, STEP	0.1	0.5	1.9	0.2 ms	1.2	1.3	0.2	0.2	5.5
Simulation, STL	0.1	0.3	1.7	0.4 ms	1.2	88 ms	0.2	0.2	3.9
Simulation, OBJ	0.1	0.4	1.8	0.2 ms	1.2	2.0	0.2	0.2	6.0
Visual, GLB	0.2	0.4	1.7	0.2 ms	2.3	30 ms	0.2	0.3	5.0
Visual, OBJ	0.1	0.4	1.7	0.2 ms	2.4	1.1	0.2	0.2	6.2

Board	Repo: greatscottgadgets/misc Board: `sky13411.kicad_pcb`
Folder	evaluation-boards / sky13411
Complexity	172 / 1000 (size 137, features 35)
KESE features	through vias, filled zones
Tested	9th November 2026
Copper layers	4
File format	KiCad 4 (4)
Parts, tracks, vias	26, 53, 3
Triangles, simulation	355,080 in 30 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	12 MB	240 MB
STEP	48 MB	258 MB
STL	18 MB	244 MB
OBJ	36 MB	288 MB
Visual
GLB	5.3 MB	212 MB
OBJ	15 MB	216 MB

1146. sma-jlcpcb

sma-jlcpcb: stages 4 and 6 take 54% to 83% of a run. Simulation, GLB takes 18 s. Simulation, STEP takes 22 s. Simulation, STL takes 19 s. Simulation, OBJ takes 28 s. Visual, GLB takes 19 s. Visual, OBJ takes 23 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.8	7.1	0.5 ms	7.6	0.3	0.8	0.3	18.2
Simulation, STEP	0.4	1.7	7.8	0.5 ms	7.6	3.8	0.8	0.3	22.5
Simulation, STL	0.4	1.8	6.9	0.4 ms	8.0	0.6	0.8	0.2	18.8
Simulation, OBJ	0.5	1.7	7.2	0.3 ms	7.9	9.6	0.7	0.3	27.7
Visual, GLB	0.4	1.6	7.5	0.4 ms	8.4	99 ms	0.9	0.3	19.1
Visual, OBJ	0.4	1.7	7.1	0.3 ms	9.1	3.1	1.0	0.3	22.7

Board	Repo: greatscottgadgets/misc Board: `sma-jlcpcb.kicad_pcb`
Folder	evaluation-boards / trace-width
Complexity	236 / 1000 (size 171, features 65)
KESE features	through vias, filled zones, stack-up, dielectric εr and tanδ
Tested	9th November 2026
Copper layers	6
File format	KiCad 8 (20240108)
Parts, tracks, vias	20, 10, 104
Triangles, simulation	1,934,558 in 25 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	64 MB	849 MB
STEP	181 MB	902 MB
STL	97 MB	838 MB
OBJ	199 MB	1.3 GB
Visual
GLB	22 MB	662 MB
OBJ	65 MB	630 MB

1147. trace-width-jlcpcb

trace-width-jlcpcb: stages 4 and 6 take 53% to 83% of a run. Simulation, GLB takes 12 s. Simulation, STEP takes 14 s. Simulation, STL takes 12 s. Simulation, OBJ takes 18 s. Visual, GLB takes 12 s. Visual, OBJ takes 14 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.1	5.0	0.3 ms	4.5	0.2	0.4	0.2	11.7
Simulation, STEP	0.3	1.1	5.0	0.4 ms	4.7	2.4	0.4	0.2	14.1
Simulation, STL	0.3	1.1	4.9	0.4 ms	4.4	0.3	0.5	0.2	11.7
Simulation, OBJ	0.3	1.1	4.9	0.4 ms	4.4	6.2	0.4	0.2	17.7
Visual, GLB	0.3	1.1	4.9	0.4 ms	4.8	55 ms	0.3	0.2	11.7
Visual, OBJ	0.3	1.1	5.1	0.4 ms	4.8	1.9	0.3	0.2	13.7

Board	Repo: greatscottgadgets/misc Board: `trace-width-jlcpcb.kicad_pcb`
Folder	evaluation-boards / trace-width
Complexity	230 / 1000 (size 165, features 65)
KESE features	through vias, filled zones, stack-up, dielectric εr and tanδ
Tested	9th November 2026
Copper layers	6
File format	KiCad 8 (20240108)
Parts, tracks, vias	16, 8, 84
Triangles, simulation	1,229,520 in 21 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	41 MB	555 MB
STEP	118 MB	668 MB
STL	61 MB	544 MB
OBJ	124 MB	853 MB
Visual
GLB	13 MB	447 MB
OBJ	39 MB	413 MB

1148. trace-width-sunstone

trace-width-sunstone: stages 4 and 6 take 52% to 81% of a run. Simulation, GLB takes 9.7 s. Simulation, STEP takes 12 s. Simulation, STL takes 10 s. Simulation, OBJ takes 15 s. Visual, GLB takes 9.2 s. Visual, OBJ takes 11 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.8	3.9	0.5 ms	3.9	0.1	0.4	0.3	9.7
Simulation, STEP	0.3	0.8	3.7	0.2 ms	4.2	2.6	0.4	0.2	12.2
Simulation, STL	0.3	0.8	3.8	0.2 ms	4.2	0.3	0.4	0.2	10.1
Simulation, OBJ	0.3	0.8	3.7	0.2 ms	4.0	5.3	0.4	0.2	14.6
Visual, GLB	0.3	0.8	3.8	0.2 ms	3.7	43 ms	0.4	0.2	9.2
Visual, OBJ	0.3	0.8	3.8	0.2 ms	3.7	1.3	0.4	0.2	10.5

Board	Repo: greatscottgadgets/misc Board: `trace-width-sunstone.kicad_pcb`
Folder	evaluation-boards / trace-width
Complexity	113 / 1000 (size 93, features 20)
KESE features	filled zones
Tested	9th November 2026
Copper layers	4
File format	KiCad 4 (4)
Parts, tracks, vias	12, 6, 0
Triangles, simulation	933,056 in 19 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	30 MB	488 MB
STEP	93 MB	590 MB
STL	47 MB	472 MB
OBJ	94 MB	681 MB
Visual
GLB	7.2 MB	386 MB
OBJ	22 MB	361 MB

1149. trace-width

trace-width: stages 4 and 6 take 60% to 84% of a run. Simulation, GLB takes 12 s. Simulation, STEP takes 14 s. Simulation, STL takes 12 s. Simulation, OBJ takes 17 s. Visual, GLB takes 12 s. Visual, OBJ takes 14 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.9	4.6	0.2 ms	5.4	0.2	0.4	0.3	12.0
Simulation, STEP	0.2	0.9	4.3	0.3 ms	4.7	3.3	0.4	0.2	13.9
Simulation, STL	0.2	0.9	4.6	0.2 ms	5.2	0.3	0.4	0.2	11.8
Simulation, OBJ	0.2	0.8	4.7	0.3 ms	5.7	5.3	0.4	0.2	17.4
Visual, GLB	0.2	0.9	4.7	0.2 ms	5.3	54 ms	0.8	0.2	12.1
Visual, OBJ	0.2	1.0	4.9	0.3 ms	5.2	1.8	1.0	0.3	14.3

Board	Repo: greatscottgadgets/misc Board: `trace-width.kicad_pcb`
Folder	evaluation-boards / trace-width
Complexity	132 / 1000 (size 112, features 20)
KESE features	filled zones
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20211014)
Parts, tracks, vias	26, 13, 0
Triangles, simulation	1,164,700 in 19 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	39 MB	511 MB
STEP	99 MB	672 MB
STL	58 MB	485 MB
OBJ	116 MB	812 MB
Visual
GLB	12 MB	477 MB
OBJ	35 MB	505 MB

1150. ununs

ununs: stages 4 and 6 take 53% to 84% of a run. Simulation, GLB takes 10 s. Simulation, STEP takes 13 s. Simulation, STL takes 10 s. Simulation, OBJ takes 16 s. Visual, GLB takes 13 s. Visual, OBJ takes 15 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.8	4.6	0.3 ms	3.9	0.2	0.4	0.2	10.5
Simulation, STEP	0.2	0.9	4.6	0.3 ms	3.9	2.9	0.4	0.2	13.0
Simulation, STL	0.2	0.9	4.3	0.4 ms	4.0	0.4	0.4	0.2	10.5
Simulation, OBJ	0.2	0.9	4.6	0.4 ms	4.0	5.8	0.5	0.3	16.3
Visual, GLB	0.2	1.0	4.7	0.4 ms	6.3	82 ms	0.7	0.2	13.2
Visual, OBJ	0.2	0.9	4.4	0.4 ms	6.4	2.5	0.7	0.2	15.3

Board	Repo: greatscottgadgets/misc Board: `ununs.kicad_pcb`
Folder	evaluation-boards / ununs
Complexity	250 / 1000 (size 175, features 75)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20211014)
Parts, tracks, vias	77, 196, 43
Triangles, simulation	1,471,406 in 61 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	48 MB	671 MB
STEP	147 MB	705 MB
STL	74 MB	645 MB
OBJ	148 MB	973 MB
Visual
GLB	20 MB	584 MB
OBJ	62 MB	524 MB

1151. vbus-switch

vbus-switch: stages 4 and 6 take 56% to 84% of a run. Simulation, GLB takes 14 s. Simulation, STEP takes 18 s. Simulation, STL takes 14 s. Simulation, OBJ takes 21 s. Visual, GLB takes 18 s. Visual, OBJ takes 23 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.3	7.2	0.6 ms	4.3	0.2	0.6	0.2	14.2
Simulation, STEP	0.4	1.2	7.0	0.5 ms	4.3	3.9	0.5	0.2	17.6
Simulation, STL	0.4	1.3	7.0	0.6 ms	4.3	0.5	0.5	0.2	14.1
Simulation, OBJ	0.4	1.3	7.5	0.4 ms	4.3	7.0	0.5	0.2	21.2
Visual, GLB	0.4	1.1	7.3	0.4 ms	8.3	0.1	1.0	0.2	18.4
Visual, OBJ	0.4	1.2	7.2	0.6 ms	8.9	3.9	1.2	0.2	23.0

Board	Repo: greatscottgadgets/misc Board: `vbus-switch.kicad_pcb`
Folder	evaluation-boards / vbus-switch
Complexity	282 / 1000 (size 197, features 85)
KESE features	through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20211014)
Parts, tracks, vias	109, 663, 96
Triangles, simulation	1,340,080 in 102 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	46 MB	557 MB
STEP	220 MB	633 MB
STL	67 MB	532 MB
OBJ	140 MB	930 MB
Visual
GLB	27 MB	658 MB
OBJ	79 MB	631 MB

1152. throwing-star-pro

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	3.0	0.5 ms	3.2	93 ms	0.5	0.2	7.4
Simulation, STEP	0.1	0.3	3.0	0.4 ms	3.2	1.9	0.5	0.2	9.2
Simulation, STL	0.1	0.3	2.8	0.3 ms	3.0	0.1	0.5	0.2	7.1
Simulation, OBJ	0.1	0.3	2.7	0.3 ms	3.0	2.7	0.5	0.2	9.5
Visual, GLB	0.1	0.2	2.7	0.3 ms	6.3	61 ms	0.5	0.2	10.0
Visual, OBJ	0.1	0.3	2.9	0.3 ms	6.0	1.7	0.5	0.2	11.6

Board	Repo: greatscottgadgets/throwing-star-lan-tap Board: `throwing-star-pro.kicad_pcb`
Complexity	152 / 1000 (size 117, features 35)
KESE features	through vias, filled zones
Tested	9th November 2026
Copper layers	2
File format	KiCad 5 (20171130)
Parts, tracks, vias	6, 112, 4
Triangles, simulation	653,240 in 29 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	24 MB	342 MB
STEP	153 MB	432 MB
STL	33 MB	345 MB
OBJ	71 MB	509 MB
Visual
GLB	16 MB	436 MB
OBJ	47 MB	436 MB

1153. throwing-star

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	4.1	0.6 ms	3.7	0.1	0.9	0.2	9.6
Simulation, STEP	0.2	0.4	3.7	0.5 ms	3.5	2.3	0.8	0.2	11.3
Simulation, STL	0.2	0.4	3.9	0.3 ms	3.5	0.2	0.9	0.3	9.3
Simulation, OBJ	0.2	0.4	3.7	0.2 ms	3.6	4.3	0.9	0.3	13.3
Visual, GLB	0.2	0.4	3.6	0.3 ms	10.0	87 ms	0.5	0.3	15.1
Visual, OBJ	0.2	0.4	3.7	0.3 ms	9.6	2.6	0.6	0.2	17.4

Board	Repo: greatscottgadgets/throwing-star-lan-tap Board: `throwing-star.kicad_pcb`
Complexity	171 / 1000 (size 126, features 45)
KESE features	through vias, filled zones, curved board outline
Tested	9th November 2026
Copper layers	2
File format	KiCad 5 (20171130)
Parts, tracks, vias	6, 204, 4
Triangles, simulation	695,490 in 29 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	26 MB	380 MB
STEP	165 MB	460 MB
STL	35 MB	385 MB
OBJ	76 MB	534 MB
Visual
GLB	17 MB	438 MB
OBJ	50 MB	435 MB

1154. toorcamp2018badge

toorcamp2018badge: stages 4 and 6 take 51% to 81% of a run. Simulation, GLB takes 4.1 s. Simulation, STEP takes 5.4 s. Simulation, STL takes 4.0 s. Simulation, OBJ takes 5.9 s. Visual, GLB takes 5.8 s. Visual, OBJ takes 7.0 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.8	0.2 ms	1.2	59 ms	0.2	0.2	4.1
Simulation, STEP	0.2	0.4	1.9	0.2 ms	1.2	1.3	0.2	0.2	5.4
Simulation, STL	0.1	0.4	1.8	0.2 ms	1.2	89 ms	0.2	0.2	4.0
Simulation, OBJ	0.2	0.4	1.8	0.1 ms	1.2	1.9	0.2	0.2	5.9
Visual, GLB	0.1	0.4	1.8	0.2 ms	2.9	42 ms	0.3	0.2	5.8
Visual, OBJ	0.1	0.4	1.8	0.2 ms	2.8	1.4	0.3	0.2	7.0

Board	Repo: greatscottgadgets/toorcamp2018badge Board: `toorcamp2018badge.kicad_pcb`
Folder	hardware / badge
Complexity	202 / 1000 (size 147, features 55)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline
Tested	9th November 2026
Copper layers	2
File format	KiCad 4 (4)
Parts, tracks, vias	30, 264, 8
Triangles, simulation	380,290 in 32 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	14 MB	265 MB
STEP	70 MB	288 MB
STL	19 MB	260 MB
OBJ	40 MB	302 MB
Visual
GLB	9.8 MB	279 MB
OBJ	29 MB	273 MB

1155. toorcamp2018jig

toorcamp2018jig: stages 4 and 6 take 59% to 86% of a run. Simulation, GLB takes 15 s. Simulation, STEP takes 18 s. Simulation, STL takes 15 s. Simulation, OBJ takes 20 s. Visual, GLB takes 21 s. Visual, OBJ takes 24 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	1.1	7.2	1 ms	5.1	0.2	0.7	0.2	14.8
Simulation, STEP	0.3	1.2	7.2	1 ms	5.1	3.3	0.7	0.2	18.0
Simulation, STL	0.2	1.2	7.1	1.0 ms	5.0	0.3	0.8	0.2	15.0
Simulation, OBJ	0.2	1.1	7.0	0.9 ms	4.9	5.9	0.9	0.2	20.2
Visual, GLB	0.2	1.2	7.3	0.8 ms	10.6	0.1	1.3	0.2	20.9
Visual, OBJ	0.3	1.1	7.2	0.9 ms	10.5	3.6	1.1	0.2	24.0

Board	Repo: greatscottgadgets/toorcamp2018badge Board: `toorcamp2018jig.kicad_pcb`
Folder	hardware / jig
Complexity	218 / 1000 (size 173, features 45)
KESE features	through vias, filled zones, curved board outline
Tested	9th November 2026
Copper layers	2
File format	KiCad 4 (4)
Parts, tracks, vias	75, 705, 26
Triangles, simulation	1,475,914 in 181 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	51 MB	573 MB
STEP	257 MB	651 MB
STL	74 MB	573 MB
OBJ	156 MB	1.0 GB
Visual
GLB	31 MB	690 MB
OBJ	93 MB	679 MB

1156. sasserides

sasserides: stages 4 and 6 take 55% to 83% of a run. Simulation, GLB takes 9.1 s. Simulation, STEP takes 11 s. Simulation, STL takes 9.3 s. Simulation, OBJ takes 13 s. Visual, GLB takes 12 s. Visual, OBJ takes 15 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	1.0	4.2	0.6 ms	2.9	0.2	0.4	0.2	9.1
Simulation, STEP	0.2	0.9	4.1	0.7 ms	2.6	2.3	0.4	0.2	10.7
Simulation, STL	0.2	0.9	4.5	0.6 ms	2.7	0.3	0.4	0.2	9.3
Simulation, OBJ	0.2	1.0	4.4	0.4 ms	2.9	4.1	0.4	0.2	13.2
Visual, GLB	0.2	0.9	4.4	1 ms	5.7	76 ms	0.6	0.2	12.1
Visual, OBJ	0.2	1.1	4.3	0.4 ms	5.8	2.4	0.8	0.2	14.9

Board	Repo: greatscottgadgets/tycho Board: `sasserides.kicad_pcb`
Folder	sasserides
Complexity	230 / 1000 (size 150, features 80)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	2
File format	KiCad 7 (20221018)
Parts, tracks, vias	30, 324, 12
Triangles, simulation	970,818 in 113 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	33 MB	453 MB
STEP	170 MB	519 MB
STL	49 MB	438 MB
OBJ	100 MB	696 MB
Visual
GLB	19 MB	483 MB
OBJ	58 MB	479 MB

1157. tycho

tycho: stages 4 and 6 take 56% to 82% of a run. Simulation, GLB takes 34 s. Simulation, STEP takes 43 s. Simulation, STL takes 38 s. Simulation, OBJ takes 53 s. Visual, GLB takes 49 s. Visual, OBJ takes 58 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	3.9	15.0	0.9 ms	12.6	0.5	1.4	0.3	34.3
Simulation, STEP	0.9	4.1	15.3	1 ms	13.5	7.9	1.5	0.3	43.4
Simulation, STL	0.7	4.1	16.4	0.8 ms	13.4	1.2	1.7	0.3	37.8
Simulation, OBJ	0.7	4.1	16.2	0.6 ms	13.5	16.3	1.6	0.3	52.6
Visual, GLB	0.8	3.8	15.9	1 ms	24.2	0.3	3.6	0.3	48.8
Visual, OBJ	0.7	4.1	15.9	1 ms	24.1	9.5	3.8	0.3	58.4

Board	Repo: greatscottgadgets/tycho Board: `tycho.kicad_pcb`
Folder	tycho
Complexity	399 / 1000 (size 259, features 140)
KESE features	through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 7 (20221018)
Parts, tracks, vias	164, 1,623, 399
Triangles, simulation	3,419,022 in 267 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	118 MB	1.1 GB
STEP	518 MB	1.3 GB
STL	171 MB	1.1 GB
OBJ	369 MB	2.3 GB
Visual
GLB	67 MB	1.2 GB
OBJ	210 MB	1.5 GB

1158. mainboard

mainboard: stages 4 and 6 take 55% to 86% of a run. Simulation, GLB takes 86 s. Simulation, STEP takes 2 min. Simulation, STL takes 89 s. Simulation, OBJ takes 2 min. Visual, GLB takes 2 min. Visual, OBJ takes 2 min

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.9	7.3	35.6	1 ms	35.2	1.3	4.0	0.4	85.8
Simulation, STEP	2.0	7.6	36.6	3 ms	37.5	17.6	4.2	0.4	105.8
Simulation, STL	2.1	7.8	36.2	2 ms	36.3	2.7	4.0	0.4	89.5
Simulation, OBJ	2.0	7.8	35.9	2 ms	37.3	45.7	4.4	0.4	133.5
Visual, GLB	2.2	7.7	36.3	2 ms	64.1	0.7	5.6	0.4	116.9
Visual, OBJ	2.0	7.9	35.6	2 ms	64.0	22.9	5.5	0.4	138.1

Board	Repo: greatscottgadgets/urti-mainboard Board: `mainboard.kicad_pcb`
Complexity	465 / 1000 (size 315, features 150)
KESE features	through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	6
File format	KiCad 7 (20221018)
Parts, tracks, vias	440, 3,761, 899
Triangles, simulation	7,380,624 in 471 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	251 MB	1.9 GB
STEP	1.0 GB	2.7 GB
STL	369 MB	1.9 GB
OBJ	803 MB	4.7 GB
Visual
GLB	127 MB	2.2 GB
OBJ	411 MB	2.8 GB

1159. yardstickone

yardstickone: stages 4 and 6 take 54% to 83% of a run. Simulation, GLB takes 9.6 s. Simulation, STEP takes 12 s. Simulation, STL takes 9.4 s. Simulation, OBJ takes 14 s. Visual, GLB takes 13 s. Visual, OBJ takes 16 s

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.8	4.1	0.4 ms	3.5	0.1	0.4	0.3	9.6
Simulation, STEP	0.3	0.8	3.9	0.3 ms	3.5	2.5	0.4	0.2	11.7
Simulation, STL	0.3	0.9	3.9	0.3 ms	3.4	0.3	0.4	0.3	9.4
Simulation, OBJ	0.3	0.9	3.9	0.4 ms	3.4	4.4	0.4	0.2	13.5
Visual, GLB	0.3	0.9	3.9	0.4 ms	7.0	91 ms	0.7	0.3	13.2
Visual, OBJ	0.3	0.8	4.0	0.2 ms	7.0	2.4	0.8	0.3	15.6

Board	Repo: greatscottgadgets/yardstick Board: `yardstickone.kicad_pcb`
Folder	yardstickone
Complexity	317 / 1000 (size 232, features 85)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, copper text, stack-up, dielectric εr and tanδ
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20211014)
Parts, tracks, vias	74, 657, 83
Triangles, simulation	894,982 in 79 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	31 MB	423 MB
STEP	141 MB	497 MB
STL	45 MB	418 MB
OBJ	92 MB	672 MB
Visual
GLB	18 MB	452 MB
OBJ	53 MB	455 MB

1160. arm-watch

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.7	0.4 ms	2.2	75 ms	0.3	0.2	5.0
Simulation, STEP	0.2	0.4	1.7	0.3 ms	2.3	1.9	0.3	0.2	7.0
Simulation, STL	0.2	0.4	1.7	0.3 ms	2.1	0.2	0.3	0.2	5.1
Simulation, OBJ	0.2	0.4	1.7	0.3 ms	2.3	2.8	0.3	0.2	8.0
Visual, GLB	0.2	0.4	1.7	0.3 ms	4.4	51 ms	0.3	0.2	7.3
Visual, OBJ	0.2	0.4	1.6	0.3 ms	4.5	1.6	0.3	0.2	8.8

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `arm-watch.kicad_pcb`
Folder	arm-watch / kicad-src
Complexity	323 / 1000 (size 223, features 100)
KESE features	through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201116)
Parts, tracks, vias	17, 496, 51
Triangles, simulation	448,504 in 106 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	15 MB	303 MB
STEP	72 MB	343 MB
STL	22 MB	306 MB
OBJ	47 MB	374 MB
Visual
GLB	11 MB	338 MB
OBJ	33 MB	339 MB

1161. ecpbreaker

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	3.9	10.0	1 ms	12.4	0.6	1.9	0.3	30.1
Simulation, STEP	1.1	3.7	10.0	1 ms	12.7	8.5	1.8	0.3	38.1
Simulation, STL	1.0	3.8	9.5	1 ms	12.6	1.2	1.9	0.3	30.4
Simulation, OBJ	1.0	3.9	9.5	1.0 ms	12.6	20.7	2.0	0.3	49.9
Visual, GLB	1.1	3.8	9.7	1 ms	27.1	0.4	3.3	0.3	45.6
Visual, OBJ	0.9	3.7	9.8	1 ms	27.4	11.4	3.5	0.3	57.1

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `ecpbreaker.kicad_pcb`
Folder	ecpbreaker / kicad-src
Complexity	427 / 1000 (size 287, features 140)
KESE features	through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	6
File format	KiCad 6 (20210126)
Parts, tracks, vias	117, 3,175, 442
Triangles, simulation	3,875,838 in 294 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	129 MB	1.2 GB
STEP	499 MB	1.4 GB
STL	194 MB	1.3 GB
OBJ	409 MB	2.5 GB
Visual
GLB	71 MB	1.3 GB
OBJ	229 MB	1.6 GB

1162. esp32s2-breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	2.4	12.0	0.5 ms	13.3	0.5	1.4	0.3	30.8
Simulation, STEP	0.8	2.4	11.8	1 ms	13.4	9.1	1.4	0.3	39.1
Simulation, STL	0.9	2.7	12.1	0.6 ms	13.2	1.1	1.4	0.3	31.7
Simulation, OBJ	0.7	2.5	12.2	1.0 ms	13.3	15.3	1.3	0.3	45.6
Visual, GLB	0.8	2.3	12.3	0.4 ms	28.2	0.4	4.2	0.2	48.5
Visual, OBJ	0.8	2.5	12.0	1 ms	29.2	11.9	4.8	0.3	61.4

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `esp32s2-breakout.kicad_pcb`
Folder	esp32s2-breakout / kicad-src
Complexity	360 / 1000 (size 245, features 115)
KESE features	through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201220)
Parts, tracks, vias	64, 1,459, 252
Triangles, simulation	3,009,806 in 93 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	101 MB	988 MB
STEP	527 MB	1.2 GB
STL	150 MB	992 MB
OBJ	316 MB	1.9 GB
Visual
GLB	75 MB	1.2 GB
OBJ	235 MB	1.5 GB

1163. esp32s2-co2-monitor

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.8	4.9	0.6 ms	7.1	0.3	0.8	0.3	15.6
Simulation, STEP	0.5	1.7	5.2	0.6 ms	7.4	4.7	0.7	0.2	20.3
Simulation, STL	0.5	1.7	4.5	0.5 ms	7.3	0.5	0.7	0.2	15.4
Simulation, OBJ	0.5	1.6	4.7	0.5 ms	7.1	8.1	0.6	0.3	22.9
Visual, GLB	0.5	1.6	4.7	0.3 ms	11.7	0.2	1.6	0.2	20.5
Visual, OBJ	0.5	1.6	4.8	0.7 ms	12.1	5.2	1.8	0.3	26.3

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `esp32s2-co2-monitor.kicad_pcb`
Folder	esp32s2-co2-monitor / kicad-src
Complexity	360 / 1000 (size 245, features 115)
KESE features	through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201116)
Parts, tracks, vias	67, 1,161, 346
Triangles, simulation	1,868,242 in 94 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	62 MB	710 MB
STEP	253 MB	871 MB
STL	93 MB	703 MB
OBJ	192 MB	1.2 GB
Visual
GLB	41 MB	833 MB
OBJ	124 MB	873 MB

1164. esp32s2-lepton

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.7	2.1	0.6 ms	3.5	0.1	0.6	0.2	7.6
Simulation, STEP	0.3	0.7	2.3	0.4 ms	3.4	2.9	0.5	0.2	10.3
Simulation, STL	0.3	0.7	2.1	0.4 ms	3.5	0.2	0.6	0.2	7.6
Simulation, OBJ	0.3	0.7	2.2	0.4 ms	3.7	4.3	0.5	0.2	12.0
Visual, GLB	0.3	0.6	2.1	0.6 ms	7.5	0.1	0.9	0.2	11.8
Visual, OBJ	0.3	0.7	2.4	0.3 ms	7.4	3.4	0.8	0.2	15.3

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `esp32s2-lepton.kicad_pcb`
Folder	esp32s2-lepton / kicad-src
Complexity	377 / 1000 (size 237, features 140)
KESE features	through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201220)
Parts, tracks, vias	62, 1,082, 116
Triangles, simulation	888,094 in 97 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	30 MB	466 MB
STEP	138 MB	512 MB
STL	44 MB	428 MB
OBJ	89 MB	621 MB
Visual
GLB	22 MB	607 MB
OBJ	66 MB	593 MB

1165. gpdi-serdes

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.1	0.4 ms	1.6	72 ms	0.3	0.2	3.8
Simulation, STEP	0.2	0.4	1.1	0.3 ms	1.5	1.5	0.2	0.2	5.1
Simulation, STL	0.2	0.4	1.2	0.4 ms	1.5	0.1	0.2	0.3	3.9
Simulation, OBJ	0.2	0.4	1.1	0.3 ms	1.5	2.3	0.3	0.2	6.0
Visual, GLB	0.2	0.4	1.1	0.3 ms	3.9	49 ms	0.3	0.2	6.2
Visual, OBJ	0.2	0.4	1.1	0.3 ms	3.8	1.6	0.4	0.3	7.7

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `gpdi-serdes.kicad_pcb`
Folder	gpdi-serdes / kicad-src
Complexity	291 / 1000 (size 166, features 125)
KESE features	through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201116)
Parts, tracks, vias	20, 300, 48
Triangles, simulation	418,796 in 84 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	14 MB	264 MB
STEP	57 MB	316 MB
STL	21 MB	287 MB
OBJ	41 MB	333 MB
Visual
GLB	9.2 MB	307 MB
OBJ	28 MB	325 MB

1166. gpdi

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	1.7	0.3 ms	2.3	89 ms	0.4	0.2	5.5
Simulation, STEP	0.3	0.6	1.7	0.4 ms	2.4	2.3	0.4	0.2	7.7
Simulation, STL	0.2	0.5	1.6	0.5 ms	2.4	0.2	0.3	0.2	5.4
Simulation, OBJ	0.2	0.5	1.6	0.3 ms	2.4	3.3	0.3	0.2	8.5
Visual, GLB	0.2	0.5	1.8	0.4 ms	4.9	63 ms	0.5	0.2	8.2
Visual, OBJ	0.2	0.5	1.6	0.3 ms	4.9	2.3	0.6	0.2	10.4

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `gpdi.kicad_pcb`
Folder	gpdi / kicad-src
Complexity	313 / 1000 (size 188, features 125)
KESE features	through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20210126)
Parts, tracks, vias	53, 679, 67
Triangles, simulation	676,432 in 104 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	23 MB	342 MB
STEP	96 MB	414 MB
STL	34 MB	343 MB
OBJ	67 MB	488 MB
Visual
GLB	15 MB	466 MB
OBJ	45 MB	413 MB

1167. hdmi-si

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.9	2.6	0.2 ms	3.3	0.1	0.5	0.2	8.0
Simulation, STEP	0.3	0.9	2.5	0.2 ms	3.2	2.6	0.5	0.2	10.3
Simulation, STL	0.2	0.9	2.5	0.2 ms	3.3	0.2	0.6	0.2	8.0
Simulation, OBJ	0.2	0.9	2.6	0.2 ms	3.4	5.7	0.5	0.2	13.5
Visual, GLB	0.2	0.9	2.5	0.4 ms	6.0	88 ms	0.8	0.3	10.8
Visual, OBJ	0.2	1.0	2.6	0.3 ms	6.2	3.3	0.7	0.3	14.2

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `hdmi-si.kicad_pcb`
Folder	hdmi-si / kicad-src
Complexity	278 / 1000 (size 178, features 100)
KESE features	through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201116)
Parts, tracks, vias	26, 335, 138
Triangles, simulation	987,308 in 42 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	32 MB	491 MB
STEP	121 MB	540 MB
STL	49 MB	498 MB
OBJ	98 MB	689 MB
Visual
GLB	19 MB	547 MB
OBJ	59 MB	483 MB

1168. icebreaker++

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.9	7.5	0.8 ms	8.0	0.4	0.9	0.3	19.5
Simulation, STEP	0.6	1.9	7.6	0.9 ms	8.1	6.1	0.9	0.2	25.6
Simulation, STL	0.6	2.1	7.6	0.9 ms	8.6	0.6	1.0	0.3	20.8
Simulation, OBJ	0.6	1.9	7.5	0.9 ms	8.4	12.5	1.0	0.2	32.2
Visual, GLB	0.6	2.0	7.5	0.9 ms	16.9	0.3	1.9	0.2	29.4
Visual, OBJ	0.6	2.1	7.7	0.9 ms	17.3	8.1	2.4	0.2	38.3

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `icebreaker++.kicad_pcb`
Folder	icebreaker++ / kicad-src
Complexity	365 / 1000 (size 265, features 100)
KESE features	through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201116)
Parts, tracks, vias	92, 1,852, 227
Triangles, simulation	2,188,308 in 276 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	74 MB	760 MB
STEP	341 MB	979 MB
STL	109 MB	770 MB
OBJ	229 MB	1.4 GB
Visual
GLB	49 MB	945 MB
OBJ	150 MB	1.1 GB

1169. jtag-programmer

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.2	0.2 ms	1.8	73 ms	0.2	0.2	4.1
Simulation, STEP	0.2	0.4	1.2	0.2 ms	1.8	1.7	0.3	0.2	5.8
Simulation, STL	0.2	0.4	1.2	0.2 ms	1.7	0.1	0.3	0.2	4.1
Simulation, OBJ	0.2	0.4	1.2	0.2 ms	1.8	2.7	0.3	0.2	6.9
Visual, GLB	0.2	0.4	1.2	0.2 ms	3.4	49 ms	0.3	0.2	5.8
Visual, OBJ	0.2	0.4	1.2	0.2 ms	3.8	1.8	0.5	0.2	8.1

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `jtag-programmer.kicad_pcb`
Folder	jtag-programmer / kicad-src
Complexity	314 / 1000 (size 214, features 100)
KESE features	through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201116)
Parts, tracks, vias	25, 327, 92
Triangles, simulation	546,070 in 54 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	18 MB	310 MB
STEP	73 MB	372 MB
STL	27 MB	308 MB
OBJ	54 MB	411 MB
Visual
GLB	12 MB	355 MB
OBJ	36 MB	386 MB

1170. led-panel

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.2	1.0	0.3 ms	2.1	60 ms	0.2	0.2	4.0
Simulation, STEP	0.2	0.3	0.9	0.2 ms	2.2	1.9	0.3	0.2	6.0
Simulation, STL	0.2	0.3	1.0	0.3 ms	2.2	0.1	0.3	0.3	4.3
Simulation, OBJ	0.2	0.2	1.0	0.2 ms	2.1	1.9	0.2	0.2	5.9
Visual, GLB	0.2	0.3	0.9	0.2 ms	3.2	46 ms	0.3	0.2	5.1
Visual, OBJ	0.2	0.2	0.9	0.2 ms	3.2	1.4	0.3	0.2	6.5

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `led-panel.kicad_pcb`
Folder	led-panel / kicad-src
Complexity	251 / 1000 (size 161, features 90)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	2
File format	KiCad 6 (20201116)
Parts, tracks, vias	58, 388, 16
Triangles, simulation	337,424 in 61 parts
Note	panel
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	11 MB	295 MB
STEP	74 MB	324 MB
STL	17 MB	291 MB
OBJ	34 MB	294 MB
Visual
GLB	9.0 MB	314 MB
OBJ	26 MB	316 MB

1171. meiji-led-ring

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.7	1.7	0.3 ms	1.9	84 ms	0.4	0.2	5.3
Simulation, STEP	0.2	0.7	2.0	0.3 ms	2.3	2.0	0.4	0.2	7.9
Simulation, STL	0.3	0.7	1.8	0.3 ms	2.1	0.2	0.4	0.2	5.7
Simulation, OBJ	0.2	0.6	1.9	0.5 ms	2.1	3.1	0.4	0.2	8.6
Visual, GLB	0.4	0.7	1.9	0.4 ms	4.6	72 ms	0.6	0.3	8.4
Visual, OBJ	0.3	0.7	1.9	0.4 ms	5.0	2.3	0.6	0.2	10.9

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `meiji-led-ring.kicad_pcb`
Folder	meiji-led-ring / kicad-src
Complexity	287 / 1000 (size 187, features 100)
KESE features	through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20210126)
Parts, tracks, vias	61, 592, 59
Triangles, simulation	709,422 in 75 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	24 MB	399 MB
STEP	110 MB	424 MB
STL	35 MB	393 MB
OBJ	71 MB	510 MB
Visual
GLB	16 MB	431 MB
OBJ	48 MB	434 MB

1172. memory-lcd-wing

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.7	0.2 ms	1.0	33 ms	0.1	0.2	2.4
Simulation, STEP	0.1	0.2	0.8	0.2 ms	0.9	1.1	0.1	0.3	3.5
Simulation, STL	0.1	0.2	0.7	0.3 ms	1.0	52 ms	0.1	0.2	2.4
Simulation, OBJ	0.1	0.2	0.8	0.2 ms	0.9	1.1	0.1	0.2	3.5
Visual, GLB	0.1	0.2	0.7	0.2 ms	1.8	33 ms	0.2	0.2	3.3
Visual, OBJ	0.1	0.2	0.9	0.2 ms	2.2	0.9	0.2	0.2	4.6

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `memory-lcd-wing.kicad_pcb`
Folder	memory-lcd-wing / kicad-src
Complexity	196 / 1000 (size 106, features 90)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	2
File format	KiCad 6 (20201116)
Parts, tracks, vias	4, 68, 3
Triangles, simulation	192,292 in 39 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	6.2 MB	206 MB
STEP	28 MB	225 MB
STL	9.6 MB	207 MB
OBJ	19 MB	209 MB
Visual
GLB	4.2 MB	188 MB
OBJ	12 MB	191 MB

1173. pcie_x1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.6	0.3 ms	0.9	45 ms	0.1	0.2	2.3
Simulation, STEP	0.1	0.2	0.6	0.3 ms	1.0	1.1	0.2	0.2	3.5
Simulation, STL	0.1	0.2	0.6	0.3 ms	0.9	65 ms	0.1	0.2	2.3
Simulation, OBJ	0.1	0.3	0.7	0.2 ms	1.0	1.4	0.2	0.2	3.8
Visual, GLB	0.1	0.3	0.7	0.3 ms	2.6	30 ms	0.2	0.2	4.1
Visual, OBJ	0.1	0.2	0.7	0.3 ms	2.6	1.0	0.3	0.2	5.1

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `pcie_x1.kicad_pcb`
Folder	pcie_x1 / kicad-src
Complexity	271 / 1000 (size 156, features 115)
KESE features	through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201116)
Parts, tracks, vias	10, 248, 37
Triangles, simulation	286,956 in 84 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	9.6 MB	253 MB
STEP	41 MB	259 MB
STL	14 MB	249 MB
OBJ	28 MB	243 MB
Visual
GLB	6.5 MB	235 MB
OBJ	19 MB	233 MB

1174. pcie_x4

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.0	0.3 ms	1.5	0.1	0.2	0.2	3.7
Simulation, STEP	0.2	0.4	1.1	0.3 ms	1.4	1.5	0.2	0.3	5.0
Simulation, STL	0.2	0.4	1.2	0.3 ms	1.5	0.1	0.2	0.3	3.9
Simulation, OBJ	0.2	0.4	1.0	1 ms	1.4	2.1	0.2	0.3	5.5
Visual, GLB	0.2	0.4	1.1	0.5 ms	3.7	43 ms	0.3	0.2	5.9
Visual, OBJ	0.2	0.4	1.0	0.4 ms	3.6	1.4	0.3	0.2	7.1

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `pcie_x4.kicad_pcb`
Folder	pcie_x4 / kicad-src
Complexity	282 / 1000 (size 167, features 115)
KESE features	through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201116)
Parts, tracks, vias	16, 374, 53
Triangles, simulation	370,874 in 94 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	12 MB	275 MB
STEP	52 MB	296 MB
STL	19 MB	273 MB
OBJ	37 MB	285 MB
Visual
GLB	8.3 MB	282 MB
OBJ	25 MB	282 MB

1175. pmod-gnss

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	0.9	0.3 ms	1.1	55 ms	0.2	0.2	2.8
Simulation, STEP	0.2	0.3	0.8	0.2 ms	1.1	1.2	0.2	0.3	4.0
Simulation, STL	0.2	0.3	0.8	0.2 ms	1.0	84 ms	0.2	0.3	2.8
Simulation, OBJ	0.2	0.3	0.9	0.2 ms	1.1	1.6	0.2	0.2	4.5
Visual, GLB	0.2	0.3	0.8	0.2 ms	2.4	36 ms	0.2	0.3	4.2
Visual, OBJ	0.1	0.3	0.9	0.2 ms	2.4	1.0	0.2	0.2	5.2

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `pmod-gnss.kicad_pcb`
Folder	pmod-gnss / kicad-src
Complexity	261 / 1000 (size 156, features 105)
KESE features	through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201116)
Parts, tracks, vias	22, 135, 30
Triangles, simulation	281,488 in 41 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	9.3 MB	234 MB
STEP	34 MB	250 MB
STL	14 MB	234 MB
OBJ	28 MB	237 MB
Visual
GLB	5.8 MB	218 MB
OBJ	17 MB	222 MB

1176. pmod-quad-7segment

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.2	0.3 ms	1.7	81 ms	0.3	0.2	4.1
Simulation, STEP	0.2	0.4	1.4	0.4 ms	1.7	1.8	0.3	0.2	5.9
Simulation, STL	0.2	0.4	1.2	0.3 ms	1.6	99 ms	0.3	0.2	4.0
Simulation, OBJ	0.2	0.4	1.3	0.3 ms	1.6	2.3	0.2	0.2	6.2
Visual, GLB	0.2	0.4	1.3	0.3 ms	3.6	50 ms	0.3	0.2	6.1
Visual, OBJ	0.2	0.4	1.2	0.2 ms	3.4	1.7	0.3	0.3	7.3

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `pmod-quad-7segment.kicad_pcb`
Folder	pmod-quad-7segment / kicad-src
Complexity	244 / 1000 (size 154, features 90)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	2
File format	KiCad 6 (20201116)
Parts, tracks, vias	21, 385, 63
Triangles, simulation	398,938 in 49 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	13 MB	272 MB
STEP	67 MB	312 MB
STL	20 MB	272 MB
OBJ	40 MB	322 MB
Visual
GLB	11 MB	333 MB
OBJ	33 MB	334 MB

1177. sd-dummy

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.5	0.3 ms	0.7	29 ms	90 ms	0.2	1.7
Simulation, STEP	0.1	0.2	0.5	0.1 ms	0.7	0.8	85 ms	0.2	2.5
Simulation, STL	0.1	0.2	0.5	0.1 ms	0.6	39 ms	0.1	0.2	1.7
Simulation, OBJ	99 ms	0.2	0.5	0.2 ms	0.7	0.9	96 ms	0.2	2.6
Visual, GLB	0.1	0.2	0.5	0.1 ms	1.2	16 ms	0.1	0.2	2.3
Visual, OBJ	0.1	0.2	0.5	0.1 ms	1.3	0.5	0.1	0.2	2.9

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `sd-dummy.kicad_pcb`
Folder	pmod-sd-dummy / kicad-src
Complexity	212 / 1000 (size 122, features 90)
KESE features	through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201116)
Parts, tracks, vias	4, 57, 7
Triangles, simulation	165,454 in 23 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	5.6 MB	194 MB
STEP	24 MB	203 MB
STL	8.3 MB	196 MB
OBJ	16 MB	196 MB
Visual
GLB	3.5 MB	165 MB
OBJ	9.9 MB	159 MB

1178. resonance

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.6	7.1	0.5 ms	7.2	0.2	0.7	0.3	17.6
Simulation, STEP	0.4	1.4	6.8	0.5 ms	7.8	4.4	0.7	0.2	21.7
Simulation, STL	0.4	1.4	6.9	0.6 ms	6.8	0.4	0.6	0.2	16.7
Simulation, OBJ	0.5	1.4	6.6	0.5 ms	7.1	8.5	0.7	0.2	24.9
Visual, GLB	0.5	1.5	7.1	0.5 ms	11.7	0.1	1.5	0.3	22.7
Visual, OBJ	0.4	1.3	6.8	0.8 ms	11.7	5.0	1.6	0.3	27.1

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `resonance.kicad_pcb`
Folder	resonance / kicad-src
Complexity	348 / 1000 (size 248, features 100)
KESE features	through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201116)
Parts, tracks, vias	64, 858, 149
Triangles, simulation	1,380,012 in 139 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	46 MB	548 MB
STEP	218 MB	674 MB
STL	69 MB	533 MB
OBJ	147 MB	942 MB
Visual
GLB	28 MB	608 MB
OBJ	90 MB	699 MB

1179. rpi-hq-camera

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	0.8	0.2 ms	1.4	68 ms	0.2	0.3	3.3
Simulation, STEP	0.2	0.3	0.9	0.3 ms	1.4	1.8	0.2	0.2	5.0
Simulation, STL	0.2	0.3	0.9	0.3 ms	1.4	0.1	0.2	0.2	3.3
Simulation, OBJ	0.2	0.3	0.8	0.5 ms	1.3	2.2	0.2	0.2	5.2
Visual, GLB	0.2	0.3	0.8	0.3 ms	3.5	52 ms	0.3	0.3	5.4
Visual, OBJ	0.2	0.3	0.7	0.2 ms	3.4	1.4	0.3	0.3	6.6

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `rpi-hq-camera.kicad_pcb`
Folder	rpi-hq-camera / kicad-src
Complexity	274 / 1000 (size 159, features 115)
KESE features	through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201116)
Parts, tracks, vias	7, 453, 31
Triangles, simulation	341,220 in 70 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	11 MB	279 MB
STEP	57 MB	290 MB
STL	17 MB	262 MB
OBJ	34 MB	286 MB
Visual
GLB	8.1 MB	270 MB
OBJ	24 MB	283 MB

1180. SCD30-3d-model

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	98 ms	0.1	0.5	0.1 ms	0.7	24 ms	61 ms	0.2	1.7
Simulation, STEP	0.1	0.1	0.5	0.1 ms	0.7	0.9	60 ms	0.2	2.7
Simulation, STL	0.1	0.1	0.5	0.1 ms	0.8	41 ms	63 ms	0.2	1.9
Simulation, OBJ	0.1	0.1	0.5	0.2 ms	0.8	0.9	73 ms	0.2	2.8
Visual, GLB	0.1	0.1	0.5	0.1 ms	1.4	19 ms	0.1	0.2	2.5
Visual, OBJ	0.1	0.1	0.5	0.1 ms	1.4	0.6	0.1	0.3	3.2

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `SCD30-3d-model.kicad_pcb`
Folder	SCD30-3d-model / kicad-src
Complexity	121 / 1000 (size 66, features 55)
KESE features	rounded, trapezoid or chamfered pads, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201116)
Parts, tracks, vias	19, 0, 0
Triangles, simulation	138,320 in 13 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	4.7 MB	197 MB
STEP	18 MB	206 MB
STL	6.9 MB	196 MB
OBJ	14 MB	197 MB
Visual
GLB	3.6 MB	173 MB
OBJ	10 MB	171 MB

1181. syzygy-breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.2	5.3	0.3 ms	5.4	0.3	0.6	0.3	13.3
Simulation, STEP	0.3	1.2	5.3	0.4 ms	5.4	3.8	0.6	0.2	16.9
Simulation, STL	0.3	1.2	5.4	0.5 ms	5.5	0.5	0.6	0.3	13.7
Simulation, OBJ	0.2	1.1	5.5	0.7 ms	5.4	9.1	0.7	0.2	22.3
Visual, GLB	0.4	1.3	5.4	0.3 ms	9.8	0.1	0.9	0.2	18.0
Visual, OBJ	0.3	1.2	5.6	0.3 ms	9.4	4.0	1.1	0.3	21.9

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `syzygy-breakout.kicad_pcb`
Folder	syzygy-breakout / kicad-src
Complexity	273 / 1000 (size 158, features 115)
KESE features	through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201116)
Parts, tracks, vias	7, 399, 41
Triangles, simulation	1,777,548 in 70 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	58 MB	694 MB
STEP	216 MB	801 MB
STL	89 MB	673 MB
OBJ	181 MB	1.1 GB
Visual
GLB	28 MB	682 MB
OBJ	85 MB	750 MB

1182. syzygy-dual-atto320

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	1.6	0.2 ms	1.8	98 ms	0.3	0.2	4.7
Simulation, STEP	0.2	0.5	1.7	0.4 ms	1.8	1.6	0.3	0.2	6.3
Simulation, STL	0.2	0.5	1.5	0.3 ms	1.7	0.1	0.3	0.2	4.6
Simulation, OBJ	0.2	0.5	1.5	0.3 ms	1.9	3.0	0.3	0.2	7.5
Visual, GLB	0.2	0.5	1.6	0.2 ms	4.4	60 ms	0.5	0.2	7.4
Visual, OBJ	0.2	0.5	1.5	0.3 ms	4.2	2.1	0.7	0.2	9.5

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `syzygy-dual-atto320.kicad_pcb`
Folder	syzygy-dual-atto320 / kicad-src
Complexity	275 / 1000 (size 160, features 115)
KESE features	through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201116)
Parts, tracks, vias	8, 323, 73
Triangles, simulation	559,920 in 70 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	19 MB	324 MB
STEP	89 MB	351 MB
STL	28 MB	317 MB
OBJ	56 MB	402 MB
Visual
GLB	13 MB	368 MB
OBJ	40 MB	361 MB

1183. syzygy-epc901

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.7	4.6	0.5 ms	6.7	0.3	0.8	0.2	14.8
Simulation, STEP	0.5	1.6	4.5	0.5 ms	6.3	4.8	0.8	0.2	18.7
Simulation, STL	0.5	1.5	4.4	0.6 ms	6.7	0.5	0.8	0.3	14.7
Simulation, OBJ	0.5	1.6	4.5	0.4 ms	6.2	9.1	0.9	0.2	23.2
Visual, GLB	0.5	1.6	4.3	0.6 ms	11.7	0.2	1.0	0.2	19.6
Visual, OBJ	0.5	1.6	4.5	0.8 ms	11.6	6.1	1.7	0.2	26.3

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `syzygy-epc901.kicad_pcb`
Folder	syzygy-epc901 / kicad-src
Complexity	380 / 1000 (size 250, features 130)
KESE features	through vias, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20210126)
Parts, tracks, vias	97, 1,339, 308
Triangles, simulation	1,768,478 in 129 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	59 MB	645 MB
STEP	233 MB	869 MB
STL	88 MB	656 MB
OBJ	181 MB	1.2 GB
Visual
GLB	39 MB	833 MB
OBJ	121 MB	895 MB

1184. syzygy-flir-boson

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.5	5.5	0.3 ms	5.0	0.2	0.6	0.2	13.4
Simulation, STEP	0.5	1.4	5.1	0.3 ms	5.1	3.3	0.6	0.3	16.3
Simulation, STL	0.3	1.4	5.5	0.7 ms	5.0	0.4	0.6	0.2	13.5
Simulation, OBJ	0.4	1.4	5.5	0.4 ms	5.0	6.2	0.7	0.2	19.4
Visual, GLB	0.4	1.4	5.2	0.3 ms	10.3	0.2	1.3	0.2	19.0
Visual, OBJ	0.3	1.2	5.3	0.4 ms	10.5	4.6	1.3	0.2	23.4

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `syzygy-flir-boson.kicad_pcb`
Folder	syzygy-flir-boson / kicad-src
Complexity	312 / 1000 (size 197, features 115)
KESE features	through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20210126)
Parts, tracks, vias	35, 906, 375
Triangles, simulation	1,359,476 in 105 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	45 MB	599 MB
STEP	179 MB	701 MB
STL	68 MB	606 MB
OBJ	137 MB	919 MB
Visual
GLB	32 MB	758 MB
OBJ	98 MB	812 MB

1185. syzygy-flir-tau2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.9	2.6	0.4 ms	3.1	0.1	0.4	0.2	7.7
Simulation, STEP	0.4	0.8	2.7	0.3 ms	3.1	2.9	0.5	0.2	10.6
Simulation, STL	0.4	0.9	2.8	0.5 ms	3.1	0.2	0.5	0.2	8.1
Simulation, OBJ	0.4	0.9	2.7	0.4 ms	3.2	4.3	0.5	0.2	12.3
Visual, GLB	0.4	0.8	2.8	0.4 ms	7.1	0.1	0.8	0.2	12.2
Visual, OBJ	0.4	0.9	2.6	0.3 ms	7.4	3.3	0.9	0.2	15.6

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `syzygy-flir-tau2.kicad_pcb`
Folder	syzygy-flir-tau2 / kicad-src
Complexity	310 / 1000 (size 195, features 115)
KESE features	through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201116)
Parts, tracks, vias	32, 1,446, 138
Triangles, simulation	1,050,638 in 82 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	36 MB	541 MB
STEP	182 MB	589 MB
STL	53 MB	508 MB
OBJ	106 MB	737 MB
Visual
GLB	26 MB	673 MB
OBJ	80 MB	676 MB

1186. syzygy-pmod

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	1.8	0.3 ms	1.8	90 ms	0.4	0.2	5.0
Simulation, STEP	0.2	0.6	1.8	0.3 ms	2.0	1.8	0.4	0.2	7.0
Simulation, STL	0.2	0.6	2.0	0.3 ms	2.0	0.2	0.4	0.2	5.6
Simulation, OBJ	0.2	0.6	1.9	0.3 ms	2.0	3.0	0.4	0.2	8.4
Visual, GLB	0.2	0.6	1.9	0.3 ms	4.6	61 ms	0.5	0.2	8.1
Visual, OBJ	0.2	0.6	1.9	0.3 ms	4.4	1.8	0.6	0.2	9.8

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `syzygy-pmod.kicad_pcb`
Folder	syzygy-pmod / kicad-src
Complexity	281 / 1000 (size 166, features 115)
KESE features	through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201116)
Parts, tracks, vias	16, 387, 36
Triangles, simulation	702,838 in 70 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	23 MB	340 MB
STEP	93 MB	381 MB
STL	35 MB	331 MB
OBJ	71 MB	506 MB
Visual
GLB	13 MB	392 MB
OBJ	39 MB	390 MB

1187. syzygy-rgb888-lcd

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.0	0.4 ms	1.5	74 ms	0.3	0.2	3.6
Simulation, STEP	0.2	0.4	1.0	0.2 ms	1.4	1.5	0.3	0.2	5.0
Simulation, STL	0.2	0.4	0.9	0.3 ms	1.4	0.1	0.2	0.3	3.6
Simulation, OBJ	0.2	0.4	0.9	0.3 ms	1.6	2.2	0.2	0.2	5.7
Visual, GLB	0.2	0.4	1.0	0.3 ms	3.9	49 ms	0.3	0.2	6.1
Visual, OBJ	0.2	0.4	1.0	0.3 ms	4.0	1.4	0.4	0.2	7.6

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `syzygy-rgb888-lcd.kicad_pcb`
Folder	syzygy-rgb888-lcd / kicad-src
Complexity	282 / 1000 (size 167, features 115)
KESE features	through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20201116)
Parts, tracks, vias	15, 359, 65
Triangles, simulation	448,792 in 79 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	15 MB	305 MB
STEP	62 MB	317 MB
STL	22 MB	299 MB
OBJ	45 MB	348 MB
Visual
GLB	9.8 MB	317 MB
OBJ	30 MB	321 MB

1188. syzygy-sgmii

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.0	3.2	0.5 ms	3.7	0.2	0.6	0.3	9.3
Simulation, STEP	0.3	1.0	3.1	0.5 ms	3.7	3.0	0.6	0.3	12.0
Simulation, STL	0.4	1.0	3.1	0.5 ms	3.8	0.3	0.6	0.3	9.4
Simulation, OBJ	0.4	1.0	3.1	0.4 ms	3.7	5.8	0.6	0.3	15.0
Visual, GLB	0.3	1.0	3.1	0.5 ms	8.0	0.1	0.8	0.2	13.6
Visual, OBJ	0.4	1.1	3.0	0.5 ms	8.2	4.2	0.8	0.3	17.9

Board	Repo: gregdavill/advent-calendar-of-circuits-2020 Board: `syzygy-sgmii.kicad_pcb`
Folder	syzygy-sgmii / kicad-src
Complexity	351 / 1000 (size 236, features 115)
KESE features	through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours
Tested	9th November 2026
Copper layers	4
File format	KiCad 6 (20210126)
Parts, tracks, vias	69, 850, 129
Triangles, simulation	1,034,760 in 118 parts
Verifier	PASS in all six runs

File type	File size	Peak memory used
Simulation
GLB	34 MB	431 MB
STEP	137 MB	533 MB
STL	52 MB	434 MB
OBJ	104 MB	738 MB
Visual
GLB	23 MB	621 MB
OBJ	70 MB	613 MB

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