Corpus Testing 20

Corpus Page 20

Part 20 of 29 of Corpus Testing: every board of these projects, six runs each, one file format a run, as Corpus Testing describes.

20.1 headstage-rhs2116

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	1.8	4.9	0.6 ms	7.0	0.3	1.0	0.3	15.8
Simulation, STEP	0.6	1.8	4.9	0.6 ms	6.8	5.1	1.0	0.2	20.4
Simulation, STL	0.6	1.8	4.8	0.6 ms	6.8	0.6	1.0	0.3	15.7
Simulation, OBJ	0.7	1.8	4.8	1.0 ms	6.7	11.0	1.0	0.3	26.2
Visual, GLB	0.6	1.7	4.9	0.7 ms	17.6	0.2	1.9	0.2	27.2
Visual, OBJ	0.6	1.8	4.8	0.6 ms	18.6	8.0	2.0	0.2	36.0

Board Repo: open-ephys/onix-headstage-rhs2116 Board: headstage-rhs2116.kicad_pcb Folder pcb Complexity 425 / 1000 (size 280, features 145) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 8 (20240108) Parts, tracks, vias 131, 1,462, 313 Triangles, simulation 2,183,078 in 178 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 74 MB 841 MB STEP 318 MB 952 MB STL 109 MB 824 MB OBJ 231 MB 1.5 GB Visual GLB 49 MB 919 MB OBJ 154 MB 1.1 GB

20.2 test-board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.8	4.8	0.7 ms	3.4	0.2	0.5	0.2	10.2
Simulation, STEP	0.3	0.8	4.3	0.5 ms	3.0	2.5	0.4	0.2	11.6
Simulation, STL	0.3	0.7	4.4	0.3 ms	3.1	0.2	0.5	0.2	9.5
Simulation, OBJ	0.3	0.8	4.4	0.6 ms	3.2	4.6	0.5	0.2	14.1
Visual, GLB	0.3	0.7	4.4	0.4 ms	6.5	0.1	0.7	0.2	12.9
Visual, OBJ	0.3	0.8	4.4	0.3 ms	6.8	3.6	0.8	0.2	16.8

Board Repo: open-ephys/onix-headstage-rhs2116 Board: test-board.kicad_pcb Folder test-board Complexity 229 / 1000 (size 144, features 85) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 26, 219, 13 Triangles, simulation 820,550 in 57 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 28 MB 402 MB STEP 144 MB 492 MB STL 41 MB 393 MB OBJ 83 MB 590 MB Visual GLB 21 MB 558 MB OBJ 61 MB 540 MB

20.3 PCIexpress_x16_full

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.6	2.2	0.4 ms	2.0	0.1	0.3	0.2	5.7
Simulation, STEP	0.2	0.6	2.0	0.5 ms	2.0	1.8	0.3	0.2	7.3
Simulation, STL	0.2	0.6	2.2	0.5 ms	1.9	0.2	0.4	0.2	5.7
Simulation, OBJ	0.2	0.6	2.0	0.7 ms	1.9	3.1	0.4	0.2	8.4
Visual, GLB	0.2	0.7	2.3	0.5 ms	5.6	76 ms	0.6	0.3	9.7
Visual, OBJ	0.2	0.7	2.2	0.5 ms	5.8	2.1	0.7	0.3	11.9

Board Repo: open-ephys/PCIexpress-KiCad Board: PCIexpress_x16_full.kicad_pcb Folder PCIexpress_x16_full Complexity 239 / 1000 (size 184, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 65, 323, 102 Triangles, simulation 613,568 in 134 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 21 MB 375 MB STEP 102 MB 394 MB STL 31 MB 373 MB OBJ 64 MB 452 MB Visual GLB 15 MB 388 MB OBJ 45 MB 389 MB

20.4 PCIexpress_x16_half

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	2.3	0.4 ms	2.1	0.1	0.4	0.2	6.1
Simulation, STEP	0.3	0.7	2.3	0.7 ms	2.0	1.9	0.4	0.2	7.8
Simulation, STL	0.3	0.6	2.3	0.5 ms	2.0	0.2	0.4	0.3	6.0
Simulation, OBJ	0.3	0.7	2.4	0.4 ms	2.1	3.3	0.4	0.2	9.3
Visual, GLB	0.2	0.7	2.3	0.5 ms	5.0	73 ms	0.6	0.2	9.2
Visual, OBJ	0.3	0.7	2.3	0.4 ms	5.4	2.6	0.6	0.3	12.2

Board Repo: open-ephys/PCIexpress-KiCad Board: PCIexpress_x16_half.kicad_pcb Folder PCIexpress_x16_half Complexity 239 / 1000 (size 184, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 65, 323, 102 Triangles, simulation 607,864 in 134 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 20 MB 364 MB STEP 102 MB 386 MB STL 30 MB 360 MB OBJ 63 MB 448 MB Visual GLB 15 MB 380 MB OBJ 45 MB 398 MB

20.5 PCIexpress_x16_low

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.7	2.5	0.5 ms	2.2	0.1	0.4	0.3	6.5
Simulation, STEP	0.3	0.7	2.3	0.4 ms	2.1	2.0	0.4	0.3	8.0
Simulation, STL	0.3	0.8	2.5	0.5 ms	2.2	0.2	0.4	0.2	6.4
Simulation, OBJ	0.3	0.8	2.4	0.5 ms	2.1	3.6	0.4	0.3	10.0
Visual, GLB	0.3	0.8	2.5	0.5 ms	6.1	82 ms	0.7	0.2	10.6
Visual, OBJ	0.3	0.7	2.3	0.4 ms	5.3	2.4	0.7	0.3	12.0

Board Repo: open-ephys/PCIexpress-KiCad Board: PCIexpress_x16_low.kicad_pcb Folder PCIexpress_x16_low Complexity 239 / 1000 (size 184, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 65, 323, 102 Triangles, simulation 608,008 in 134 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 20 MB 379 MB STEP 101 MB 386 MB STL 30 MB 376 MB OBJ 63 MB 447 MB Visual GLB 15 MB 379 MB OBJ 45 MB 400 MB

20.6 PCIexpress_x1_full

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.1	0.2	0.2 ms	0.6	17 ms	54 ms	0.2	1.3
Simulation, STEP	99 ms	98 ms	0.3	0.1 ms	0.5	0.8	53 ms	0.2	2.0
Simulation, STL	0.1	0.1	0.2	0.1 ms	0.5	35 ms	63 ms	0.2	1.3
Simulation, OBJ	98 ms	0.1	0.2	0.1 ms	0.5	0.4	56 ms	0.2	1.7
Visual, GLB	0.1	0.1	0.2	0.1 ms	1.2	12 ms	57 ms	0.2	1.9
Visual, OBJ	98 ms	0.1	0.2	0.2 ms	1.1	0.3	55 ms	0.2	2.1

Board Repo: open-ephys/PCIexpress-KiCad Board: PCIexpress_x1_full.kicad_pcb Folder PCIexpress_x1_full Complexity 175 / 1000 (size 120, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 5, 23, 12 Triangles, simulation 83,072 in 35 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 2.8 MB 182 MB STEP 12 MB 181 MB STL 4.2 MB 179 MB OBJ 8.1 MB 180 MB Visual GLB 1.9 MB 154 MB OBJ 5.4 MB 154 MB

20.7 PCIexpress_x1_half

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	97 ms	0.1	0.2	0.2 ms	0.5	15 ms	60 ms	0.2	1.2
Simulation, STEP	0.1	0.1	0.2	0.2 ms	0.5	0.8	73 ms	0.3	2.1
Simulation, STL	0.1	0.1	0.3	0.1 ms	0.6	23 ms	53 ms	0.2	1.4
Simulation, OBJ	94 ms	0.1	0.2	0.1 ms	0.6	0.4	69 ms	0.3	1.7
Visual, GLB	0.1	0.1	0.2	0.3 ms	1.4	15 ms	74 ms	0.2	2.1
Visual, OBJ	95 ms	96 ms	0.2	0.3 ms	1.3	0.3	72 ms	0.3	2.3

Board Repo: open-ephys/PCIexpress-KiCad Board: PCIexpress_x1_half.kicad_pcb Folder PCIexpress_x1_half Complexity 175 / 1000 (size 120, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 5, 23, 12 Triangles, simulation 79,200 in 35 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 2.7 MB 175 MB STEP 12 MB 176 MB STL 4.0 MB 176 MB OBJ 7.8 MB 177 MB Visual GLB 1.8 MB 154 MB OBJ 5.1 MB 153 MB

20.8 PCIexpress_x1_low

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	82 ms	78 ms	0.2	0.1 ms	0.4	14 ms	43 ms	0.2	1.0
Simulation, STEP	88 ms	92 ms	0.2	0.1 ms	0.5	0.7	41 ms	0.2	1.7
Simulation, STL	86 ms	85 ms	0.2	0.1 ms	0.5	23 ms	47 ms	0.2	1.1
Simulation, OBJ	95 ms	87 ms	0.2	0.1 ms	0.5	0.4	48 ms	0.2	1.5
Visual, GLB	0.1	87 ms	0.2	0.1 ms	1.0	9 ms	47 ms	0.2	1.6
Visual, OBJ	82 ms	81 ms	0.2	0.1 ms	0.9	0.3	58 ms	0.2	1.8

Board Repo: open-ephys/PCIexpress-KiCad Board: PCIexpress_x1_low.kicad_pcb Folder PCIexpress_x1_low Complexity 175 / 1000 (size 120, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 5, 23, 12 Triangles, simulation 79,200 in 35 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 2.7 MB 182 MB STEP 12 MB 179 MB STL 4.0 MB 174 MB OBJ 7.7 MB 182 MB Visual GLB 1.8 MB 154 MB OBJ 5.1 MB 154 MB

20.9 PCIexpress_x4_full

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.5	0.3 ms	0.7	25 ms	0.1	0.2	1.7
Simulation, STEP	0.1	0.2	0.5	0.2 ms	0.6	0.9	0.1	0.2	2.6
Simulation, STL	0.1	0.2	0.5	0.2 ms	0.7	49 ms	81 ms	0.2	1.8
Simulation, OBJ	0.1	0.2	0.5	0.1 ms	0.7	0.9	90 ms	0.2	2.7
Visual, GLB	0.1	0.2	0.5	0.1 ms	1.8	21 ms	0.1	0.2	2.9
Visual, OBJ	0.1	0.2	0.5	0.2 ms	1.7	0.6	0.1	0.2	3.4

Board Repo: open-ephys/PCIexpress-KiCad Board: PCIexpress_x4_full.kicad_pcb Folder PCIexpress_x4_full Complexity 204 / 1000 (size 149, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 17, 83, 30 Triangles, simulation 187,908 in 57 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 6.3 MB 218 MB STEP 29 MB 220 MB STL 9.4 MB 218 MB OBJ 19 MB 215 MB Visual GLB 4.5 MB 183 MB OBJ 13 MB 182 MB

20.10 PCIexpress_x4_half

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.5	0.2 ms	0.8	32 ms	89 ms	0.2	1.9
Simulation, STEP	0.1	0.2	0.5	0.3 ms	0.7	0.9	0.1	0.2	2.8
Simulation, STL	0.1	0.2	0.6	0.2 ms	0.8	49 ms	93 ms	0.2	2.1
Simulation, OBJ	0.1	0.2	0.5	0.2 ms	0.8	0.8	0.1	0.3	2.8
Visual, GLB	97 ms	0.2	0.5	0.2 ms	1.9	18 ms	0.1	0.2	3.0
Visual, OBJ	0.1	0.2	0.5	0.2 ms	1.8	0.6	0.1	0.2	3.5

Board Repo: open-ephys/PCIexpress-KiCad Board: PCIexpress_x4_half.kicad_pcb Folder PCIexpress_x4_half Complexity 204 / 1000 (size 149, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 17, 83, 30 Triangles, simulation 182,182 in 57 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 6.1 MB 215 MB STEP 29 MB 220 MB STL 9.1 MB 211 MB OBJ 18 MB 215 MB Visual GLB 4.4 MB 171 MB OBJ 13 MB 178 MB

20.11 PCIexpress_x4_low

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.5	0.2 ms	0.8	33 ms	0.1	0.2	2.1
Simulation, STEP	0.1	0.2	0.6	0.2 ms	0.7	1.0	97 ms	0.2	2.9
Simulation, STL	0.1	0.2	0.6	0.1 ms	0.7	49 ms	91 ms	0.2	1.9
Simulation, OBJ	0.1	0.2	0.6	0.2 ms	0.7	1.0	0.1	0.2	2.9
Visual, GLB	0.1	0.2	0.6	0.3 ms	1.9	27 ms	0.1	0.2	3.1
Visual, OBJ	0.1	0.2	0.5	0.3 ms	1.9	0.7	0.1	0.2	3.7

Board Repo: open-ephys/PCIexpress-KiCad Board: PCIexpress_x4_low.kicad_pcb Folder PCIexpress_x4_low Complexity 204 / 1000 (size 149, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 17, 83, 30 Triangles, simulation 182,178 in 57 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 6.1 MB 206 MB STEP 29 MB 217 MB STL 9.1 MB 214 MB OBJ 18 MB 213 MB Visual GLB 4.4 MB 175 MB OBJ 13 MB 179 MB

20.12 PCIexpress_x8_full

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.1	0.3 ms	1.2	58 ms	0.2	0.2	3.3
Simulation, STEP	0.2	0.4	1.1	0.2 ms	1.2	1.4	0.2	0.2	4.6
Simulation, STL	0.2	0.4	1.1	0.2 ms	1.1	88 ms	0.2	0.3	3.4
Simulation, OBJ	0.2	0.4	1.1	0.3 ms	1.1	1.9	0.2	0.3	5.0
Visual, GLB	0.2	0.4	1.1	0.3 ms	3.0	39 ms	0.2	0.3	5.2
Visual, OBJ	0.2	0.4	1.1	0.2 ms	2.9	1.3	0.2	0.2	6.2

Board Repo: open-ephys/PCIexpress-KiCad Board: PCIexpress_x8_full.kicad_pcb Folder PCIexpress_x8_full Complexity 221 / 1000 (size 166, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 33, 163, 54 Triangles, simulation 326,948 in 83 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 275 MB STEP 52 MB 282 MB STL 16 MB 278 MB OBJ 34 MB 281 MB Visual GLB 8.0 MB 239 MB OBJ 24 MB 245 MB

20.13 PCIexpress_x8_half

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.1	0.3 ms	1.2	64 ms	0.2	0.3	3.3
Simulation, STEP	0.1	0.4	1.1	0.2 ms	1.2	1.3	0.2	0.2	4.4
Simulation, STL	0.2	0.4	1.1	0.2 ms	1.3	86 ms	0.2	0.2	3.4
Simulation, OBJ	0.2	0.4	1.1	0.3 ms	1.1	1.6	0.2	0.3	4.8
Visual, GLB	0.1	0.3	1.0	0.4 ms	3.4	37 ms	0.3	0.3	5.5
Visual, OBJ	0.2	0.4	1.0	0.2 ms	3.2	1.1	0.2	0.2	6.4

Board Repo: open-ephys/PCIexpress-KiCad Board: PCIexpress_x8_half.kicad_pcb Folder PCIexpress_x8_half Complexity 221 / 1000 (size 166, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 33, 163, 54 Triangles, simulation 323,256 in 83 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 264 MB STEP 52 MB 273 MB STL 16 MB 279 MB OBJ 33 MB 265 MB Visual GLB 8.1 MB 242 MB OBJ 24 MB 242 MB

20.14 PCIexpress_x8_low

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	0.9	0.2 ms	0.9	45 ms	0.2	0.2	2.7
Simulation, STEP	0.1	0.3	0.8	0.3 ms	0.9	1.1	0.2	0.2	3.6
Simulation, STL	0.1	0.3	0.9	0.2 ms	0.9	75 ms	0.1	0.2	2.6
Simulation, OBJ	0.2	0.3	0.9	0.3 ms	0.9	1.3	0.1	0.2	3.9
Visual, GLB	0.1	0.3	0.8	0.3 ms	2.5	42 ms	0.3	0.2	4.3
Visual, OBJ	0.1	0.3	0.8	0.3 ms	2.4	0.9	0.2	0.2	4.8

Board Repo: open-ephys/PCIexpress-KiCad Board: PCIexpress_x8_low.kicad_pcb Folder PCIexpress_x8_low Complexity 221 / 1000 (size 166, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 33, 163, 54 Triangles, simulation 321,284 in 83 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 262 MB STEP 51 MB 275 MB STL 16 MB 273 MB OBJ 33 MB 275 MB Visual GLB 7.9 MB 236 MB OBJ 23 MB 239 MB

20.15 panel-back

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	97 ms	0.3	0.1 ms	0.6	15 ms	42 ms	0.2	1.3
Simulation, STEP	98 ms	89 ms	0.3	0.1 ms	0.6	0.8	41 ms	0.2	2.2
Simulation, STL	0.1	88 ms	0.3	0.1 ms	0.6	29 ms	46 ms	0.2	1.4
Simulation, OBJ	0.1	0.1	0.3	0.1 ms	0.7	0.5	46 ms	0.2	2.0
Visual, GLB	0.1	97 ms	0.3	0.1 ms	1.1	14 ms	0.1	0.3	2.0
Visual, OBJ	0.1	0.1	0.3	0.1 ms	1.1	0.3	89 ms	0.2	2.3

Board Repo: open-ephys/stimjim Board: panel-back.kicad_pcb Folder PCB / panels Complexity 101 / 1000 (size 36, features 65) KESE features filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 5, 0, 0 Triangles, simulation 118,094 in 12 parts Note panel Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.2 MB 190 MB STEP 23 MB 204 MB STL 5.9 MB 190 MB OBJ 12 MB 188 MB Visual GLB 2.7 MB 155 MB OBJ 7.5 MB 156 MB

20.16 panel-front

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	86 ms	0.2	0.1 ms	0.5	14 ms	29 ms	0.2	1.1
Simulation, STEP	96 ms	87 ms	0.2	0.1 ms	0.5	0.7	29 ms	0.2	1.8
Simulation, STL	95 ms	83 ms	0.2	0.1 ms	0.5	22 ms	30 ms	0.2	1.2
Simulation, OBJ	0.1	86 ms	0.2	0.1 ms	0.5	0.4	30 ms	0.2	1.5
Visual, GLB	93 ms	84 ms	0.2	0.1 ms	1.0	11 ms	81 ms	0.2	1.6
Visual, OBJ	94 ms	84 ms	0.2	0.1 ms	1.0	0.3	77 ms	0.2	1.9

Board Repo: open-ephys/stimjim Board: panel-front.kicad_pcb Folder PCB / panels Complexity 129 / 1000 (size 34, features 95) KESE features arc tracks, filled zones, curved board outline, TrueType text, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 4, 0, 0 Triangles, simulation 98,478 in 12 parts Note panel Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.4 MB 185 MB STEP 18 MB 194 MB STL 4.9 MB 181 MB OBJ 9.6 MB 185 MB Visual GLB 2.7 MB 153 MB OBJ 7.4 MB 151 MB

20.17 stimjim

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	2.9	12.8	0.6 ms	15.0	0.5	1.6	0.3	34.2
Simulation, STEP	1.1	2.9	11.9	0.5 ms	14.6	9.3	1.6	0.3	41.7
Simulation, STL	1.0	2.9	12.2	0.6 ms	14.2	1.1	1.5	0.3	33.3
Simulation, OBJ	1.1	3.2	12.7	0.5 ms	14.7	17.6	1.7	0.3	51.3
Visual, GLB	1.1	3.0	12.7	0.5 ms	27.6	0.4	3.2	0.3	48.3
Visual, OBJ	1.0	3.1	12.5	0.5 ms	28.0	11.9	3.7	0.2	60.4

Board Repo: open-ephys/stimjim Board: stimjim.kicad_pcb Folder PCB Complexity 359 / 1000 (size 259, features 100) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 193, 1,526, 371 Triangles, simulation 3,557,586 in 188 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 121 MB 1.1 GB STEP 564 MB 1.5 GB STL 178 MB 1.2 GB OBJ 381 MB 2.4 GB Visual GLB 83 MB 1.7 GB OBJ 265 MB 1.7 GB

20.18 osw

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.3	5.9	0.5 ms	5.1	0.2	0.6	0.2	13.6
Simulation, STEP	0.4	1.2	5.5	0.5 ms	4.4	3.7	0.5	0.2	16.1
Simulation, STL	0.4	1.3	5.7	0.5 ms	4.8	0.3	0.5	0.3	13.4
Simulation, OBJ	0.3	1.3	5.7	0.6 ms	4.5	7.4	0.6	0.3	20.1
Visual, GLB	0.4	1.2	5.7	0.4 ms	10.5	0.1	1.2	0.2	19.4
Visual, OBJ	0.4	1.1	5.8	0.5 ms	10.6	5.6	1.4	0.2	25.2

Board Repo: Open-Smartwatch/kicad-project Board: osw.kicad_pcb Complexity 261 / 1000 (size 196, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 67, 707, 193 Triangles, simulation 1,331,232 in 92 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 46 MB 525 MB STEP 193 MB 670 MB STL 67 MB 528 MB OBJ 138 MB 910 MB Visual GLB 32 MB 668 MB OBJ 96 MB 764 MB

20.19 osw-light

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.0	4.7	0.5 ms	3.8	0.2	0.5	0.3	10.8
Simulation, STEP	0.3	1.0	4.5	0.4 ms	3.9	3.1	0.5	0.2	13.6
Simulation, STL	0.5	0.9	4.5	0.3 ms	3.7	0.3	0.5	0.3	10.6
Simulation, OBJ	0.3	0.9	4.5	0.4 ms	4.1	5.8	0.6	0.3	16.5
Visual, GLB	0.3	0.9	4.3	0.4 ms	9.0	0.1	1.3	0.2	16.3
Visual, OBJ	0.3	0.9	4.3	0.4 ms	9.1	3.8	1.2	0.2	19.9

Board Repo: Open-Smartwatch/open-smartwatch-light Board: osw-light.kicad_pcb Complexity 253 / 1000 (size 188, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 51, 524, 126 Triangles, simulation 972,290 in 74 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 34 MB 436 MB STEP 149 MB 516 MB STL 49 MB 458 MB OBJ 99 MB 684 MB Visual GLB 24 MB 517 MB OBJ 71 MB 572 MB

20.20 6ct-expander

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.4	0.2 ms	1.7	53 ms	0.2	0.2	4.1
Simulation, STEP	0.2	0.3	1.3	0.2 ms	1.7	1.5	0.2	0.2	5.3
Simulation, STL	0.2	0.3	1.3	0.2 ms	1.6	89 ms	0.2	0.2	4.0
Simulation, OBJ	0.2	0.3	1.4	0.2 ms	1.8	1.7	0.2	0.2	5.7
Visual, GLB	0.2	0.3	1.5	0.2 ms	2.8	42 ms	0.3	0.2	5.3
Visual, OBJ	0.2	0.3	1.4	0.2 ms	2.7	1.4	0.2	0.2	6.3

Board Repo: openenergymonitor/emon32 Board: 6ct-expander.kicad_pcb Folder pcb / 6ct-expander Complexity 223 / 1000 (size 153, features 70) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 56, 141, 45 Triangles, simulation 358,758 in 45 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 12 MB 280 MB STEP 59 MB 321 MB STL 18 MB 277 MB OBJ 36 MB 308 MB Visual GLB 10 MB 313 MB OBJ 29 MB 317 MB

20.21 emonPi3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	2.2	10.4	0.7 ms	10.3	0.3	1.1	0.3	25.5
Simulation, STEP	0.9	2.1	10.6	0.7 ms	10.3	7.7	1.2	0.3	33.1
Simulation, STL	1.2	2.1	10.6	1.0 ms	11.3	0.8	1.2	0.3	27.6
Simulation, OBJ	0.9	2.4	10.5	0.8 ms	10.6	12.0	1.0	0.4	37.7
Visual, GLB	1.0	2.1	9.6	0.8 ms	22.1	0.3	3.2	0.3	38.6
Visual, OBJ	0.9	2.0	9.8	0.7 ms	19.8	9.2	2.6	0.3	44.6

Board Repo: openenergymonitor/emon32 Board: emonPi3.kicad_pcb Folder pcb / emonpi3 Complexity 405 / 1000 (size 250, features 155) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, knockout text, TrueType text, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 151, 933, 260 Triangles, simulation 2,361,186 in 148 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 80 MB 897 MB STEP 407 MB 1.2 GB STL 118 MB 934 MB OBJ 246 MB 1.6 GB Visual GLB 59 MB 1.2 GB OBJ 181 MB 1.3 GB

20.22 OpenHW DevKit

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	3.5	15.8	0.7 ms	16.1	0.6	1.9	0.3	39.4
Simulation, STEP	1.2	3.4	15.1	0.7 ms	15.1	10.5	1.8	0.3	47.5
Simulation, STL	1.2	3.5	15.2	0.7 ms	16.0	1.1	2.1	0.3	39.4
Simulation, OBJ	1.3	3.5	15.6	0.9 ms	15.1	17.5	1.9	0.3	55.2
Visual, GLB	1.1	3.5	15.8	0.6 ms	33.0	0.4	5.0	0.3	59.0
Visual, OBJ	1.1	3.5	15.3	0.5 ms	32.6	12.3	4.9	0.2	69.9

Board Repo: openhwgroup/core-v-mcu-devkit Board: OpenHW DevKit.kicad_pcb Folder kicad Complexity 411 / 1000 (size 271, features 140) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 158, 1,714, 286 Triangles, simulation 3,646,834 in 231 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 126 MB 1.2 GB STEP 648 MB 1.5 GB STL 182 MB 1.2 GB OBJ 392 MB 2.4 GB Visual GLB 88 MB 1.5 GB OBJ 278 MB 1.9 GB

20.23 MacArthur-HAT

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	1.9	5.2	0.6 ms	6.0	0.2	0.6	0.2	15.2
Simulation, STEP	1.0	2.1	5.6	0.6 ms	5.8	4.2	0.7	0.2	19.7
Simulation, STL	1.0	1.9	5.4	0.6 ms	5.9	0.5	0.6	0.2	15.5
Simulation, OBJ	1.1	1.9	5.5	0.7 ms	5.9	8.3	0.7	0.2	23.6
Visual, GLB	1.0	2.1	5.6	0.5 ms	12.3	0.2	1.2	0.3	22.7
Visual, OBJ	1.0	2.0	5.7	0.8 ms	12.9	6.4	1.5	0.3	29.6

Board Repo: OpenMarine/MacArthur-HAT Board: MacArthur-HAT.kicad_pcb Folder KiCad Complexity 312 / 1000 (size 207, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 102, 1,085, 240 Triangles, simulation 1,613,902 in 109 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 54 MB 598 MB STEP 226 MB 782 MB STL 81 MB 629 MB OBJ 167 MB 1.1 GB Visual GLB 40 MB 803 MB OBJ 120 MB 881 MB

20.24 blade12

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.0	3.1	0.2 ms	3.0	0.1	0.5	0.2	8.3
Simulation, STEP	0.4	1.1	3.1	0.2 ms	3.0	2.8	0.5	0.2	11.1
Simulation, STL	0.3	1.1	3.1	0.2 ms	2.7	0.3	0.5	0.3	8.2
Simulation, OBJ	0.4	1.0	3.0	0.3 ms	2.8	4.7	0.5	0.3	12.6
Visual, GLB	0.4	1.1	3.2	0.3 ms	6.5	99 ms	1.0	0.2	12.6
Visual, OBJ	0.4	1.1	3.1	0.3 ms	6.9	3.6	1.1	0.3	16.4

Board Repo: opulo-inc/lumenpnp Board: blade12.kicad_pcb Folder src / PCB / blade12 Complexity 285 / 1000 (size 170, features 115) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 38, 391, 206 Triangles, simulation 724,098 in 26 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 25 MB 421 MB STEP 129 MB 473 MB STL 36 MB 403 MB OBJ 74 MB 562 MB Visual GLB 20 MB 503 MB OBJ 61 MB 503 MB

20.25 blade13

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.1	3.5	0.3 ms	2.9	0.1	0.5	0.3	8.8
Simulation, STEP	0.4	1.2	3.6	0.2 ms	2.9	2.7	0.7	0.2	11.7
Simulation, STL	0.4	1.2	3.7	0.2 ms	3.1	0.3	0.5	0.3	9.6
Simulation, OBJ	0.4	1.3	3.6	0.2 ms	3.1	4.9	0.5	0.3	13.9
Visual, GLB	0.4	1.2	3.7	0.2 ms	7.1	0.1	1.0	0.3	13.8
Visual, OBJ	0.4	1.2	3.8	0.3 ms	7.1	3.7	1.2	0.3	17.6

Board Repo: opulo-inc/lumenpnp Board: blade13.kicad_pcb Folder src / PCB / blade13 Complexity 287 / 1000 (size 172, features 115) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 42, 373, 237 Triangles, simulation 789,616 in 27 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 27 MB 431 MB STEP 140 MB 503 MB STL 39 MB 408 MB OBJ 81 MB 571 MB Visual GLB 22 MB 495 MB OBJ 66 MB 549 MB

20.26 cal-fid

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	5 ms	19 ms	25 ms	0.1 ms	71 ms	2 ms	10 ms	0.2	0.4
Simulation, STEP	6 ms	22 ms	21 ms	0.1 ms	84 ms	0.1	10 ms	0.2	0.5
Simulation, STL	5 ms	15 ms	24 ms	0.1 ms	68 ms	3 ms	10 ms	0.2	0.3
Simulation, OBJ	7 ms	15 ms	27 ms	0.1 ms	77 ms	42 ms	11 ms	0.2	0.4
Visual, GLB	5 ms	16 ms	26 ms	0.1 ms	0.1	3 ms	43 ms	0.2	0.4
Visual, OBJ	6 ms	16 ms	22 ms	0.1 ms	0.1	22 ms	36 ms	0.2	0.5

Board Repo: opulo-inc/lumenpnp Board: cal-fid.kicad_pcb Folder src / PCB / cal-fid Complexity 52 / 1000 (size 17, features 35) KESE features filled zones, TrueType text Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 0, 0, 0 Triangles, simulation 5,528 in 8 parts Note no components Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 199 kB 39 MB STEP 1.1 MB 40 MB STL 277 kB 39 MB OBJ 517 kB 41 MB Visual GLB 103 kB 54 MB OBJ 247 kB 54 MB

20.27 datum

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.2	0.9	0.1 ms	0.8	31 ms	0.1	0.2	2.5
Simulation, STEP	0.2	0.2	0.9	0.2 ms	0.9	1.0	0.1	0.2	3.5
Simulation, STL	0.2	0.2	1.1	0.1 ms	0.9	46 ms	0.1	0.2	2.7
Simulation, OBJ	0.2	0.2	0.9	0.2 ms	0.9	1.2	0.1	0.2	3.7
Visual, GLB	0.2	0.2	0.9	0.1 ms	1.9	26 ms	0.1	0.2	3.6
Visual, OBJ	0.2	0.2	0.9	0.1 ms	1.9	0.6	0.1	0.2	4.1

Board Repo: opulo-inc/lumenpnp Board: datum.kicad_pcb Folder src / PCB / datum Complexity 83 / 1000 (size 63, features 20) KESE features filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 4, 5, 0 Triangles, simulation 196,880 in 13 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 6.9 MB 212 MB STEP 32 MB 229 MB STL 9.8 MB 210 MB OBJ 20 MB 215 MB Visual GLB 4.1 MB 188 MB OBJ 12 MB 184 MB

20.28 ftp

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.5	2.3	0.2 ms	3.5	81 ms	0.3	0.3	7.3
Simulation, STEP	0.3	0.4	2.4	0.2 ms	3.7	2.8	0.3	0.2	10.1
Simulation, STL	0.3	0.5	2.3	0.3 ms	4.0	0.2	0.3	0.3	7.9
Simulation, OBJ	0.3	0.4	2.4	0.2 ms	3.7	2.6	0.3	0.2	9.9
Visual, GLB	0.3	0.4	2.3	0.2 ms	5.2	78 ms	0.8	0.3	9.3
Visual, OBJ	0.3	0.4	2.5	0.2 ms	4.7	2.3	0.6	0.2	11.1

Board Repo: opulo-inc/lumenpnp Board: ftp.kicad_pcb Folder src / PCB / ftp Complexity 202 / 1000 (size 142, features 60) KESE features rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 81, 115, 0 Triangles, simulation 499,656 in 53 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 378 MB STEP 109 MB 409 MB STL 25 MB 384 MB OBJ 51 MB 400 MB Visual GLB 15 MB 461 MB OBJ 44 MB 459 MB

20.29 ftp0402

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.4	2.1	0.2 ms	3.2	69 ms	0.3	0.2	6.5
Simulation, STEP	0.3	0.4	2.1	0.2 ms	3.2	2.2	0.2	0.2	8.7
Simulation, STL	0.3	0.4	2.1	0.2 ms	3.2	0.1	0.3	0.2	6.7
Simulation, OBJ	0.3	0.4	2.3	0.3 ms	3.2	2.6	0.3	0.2	9.2
Visual, GLB	0.3	0.4	2.0	0.2 ms	4.0	64 ms	0.4	0.2	7.4
Visual, OBJ	0.3	0.4	2.1	0.3 ms	3.9	1.8	0.5	0.2	9.3

Board Repo: opulo-inc/lumenpnp Board: ftp0402.kicad_pcb Folder src / PCB / ftp / ftp0402 Complexity 199 / 1000 (size 139, features 60) KESE features rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 81, 91, 0 Triangles, simulation 441,218 in 53 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 339 MB STEP 89 MB 387 MB STL 22 MB 335 MB OBJ 45 MB 362 MB Visual GLB 13 MB 417 MB OBJ 37 MB 335 MB

20.30 mobo

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.9	7.5	27.5	2 ms	20.4	1.0	2.9	0.4	61.4
Simulation, STEP	1.9	7.5	27.2	1 ms	19.8	14.6	2.9	0.3	74.1
Simulation, STL	1.8	7.6	27.5	1 ms	19.8	1.8	3.0	0.4	62.0
Simulation, OBJ	1.8	7.5	27.9	2 ms	20.2	32.6	2.8	0.3	93.1
Visual, GLB	1.9	7.7	27.8	2 ms	48.6	0.5	5.9	0.3	92.7
Visual, OBJ	1.8	7.8	28.7	2 ms	48.5	20.6	6.3	0.3	114.1

Board Repo: opulo-inc/lumenpnp Board: mobo.kicad_pcb Folder src / PCB / mobo Complexity 454 / 1000 (size 294, features 160) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, copper text, curved board outline, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 296, 2,176, 1,010 Triangles, simulation 5,290,772 in 276 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 177 MB 1.8 GB STEP 676 MB 2.2 GB STL 265 MB 1.7 GB OBJ 563 MB 3.4 GB Visual GLB 114 MB 1.8 GB OBJ 363 MB 2.4 GB

20.31 pi-interface

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	34 ms	0.1	0.3	0.1 ms	0.5	16 ms	68 ms	0.2	1.3
Simulation, STEP	37 ms	83 ms	0.3	0.2 ms	0.5	0.7	52 ms	0.2	2.0
Simulation, STL	33 ms	81 ms	0.3	0.1 ms	0.6	25 ms	53 ms	0.2	1.2
Simulation, OBJ	37 ms	90 ms	0.3	0.2 ms	0.5	0.5	57 ms	0.2	1.7
Visual, GLB	35 ms	78 ms	0.3	0.1 ms	1.0	17 ms	66 ms	0.2	1.7
Visual, OBJ	34 ms	85 ms	0.3	0.2 ms	1.0	0.3	71 ms	0.2	2.0

Board Repo: opulo-inc/lumenpnp Board: pi-interface.kicad_pcb Folder src / PCB / pi-interface Complexity 157 / 1000 (size 102, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 3, 49, 7 Triangles, simulation 85,092 in 19 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 2.9 MB 156 MB STEP 12 MB 157 MB STL 4.3 MB 158 MB OBJ 8.0 MB 159 MB Visual GLB 2.0 MB 130 MB OBJ 5.6 MB 128 MB

20.32 ringLight

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.2	0.7	0.2 ms	0.9	26 ms	88 ms	0.2	2.3
Simulation, STEP	0.1	0.2	0.7	0.2 ms	1.0	0.9	88 ms	0.2	3.2
Simulation, STL	0.1	0.2	0.6	0.1 ms	1.0	36 ms	91 ms	0.2	2.3
Simulation, OBJ	0.1	0.2	0.6	0.1 ms	1.0	0.7	90 ms	0.2	2.9
Visual, GLB	0.2	0.2	0.6	0.1 ms	1.6	20 ms	0.1	0.2	2.8
Visual, OBJ	0.1	0.2	0.6	0.1 ms	1.6	0.6	0.1	0.2	3.4

Board Repo: opulo-inc/lumenpnp Board: ringLight.kicad_pcb Folder src / PCB / ringLight Complexity 222 / 1000 (size 137, features 85) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 21, 142, 17 Triangles, simulation 179,692 in 25 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 6.4 MB 219 MB STEP 36 MB 237 MB STL 9.0 MB 219 MB OBJ 18 MB 219 MB Visual GLB 5.4 MB 218 MB OBJ 15 MB 215 MB

20.33 x-cable-chain-support

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	95 ms	0.1	0.3	0.1 ms	0.6	25 ms	40 ms	0.3	1.4
Simulation, STEP	89 ms	0.1	0.2	0.1 ms	0.6	0.8	39 ms	0.2	2.1
Simulation, STL	86 ms	0.1	0.2	0.1 ms	0.6	29 ms	41 ms	0.2	1.3
Simulation, OBJ	95 ms	91 ms	0.3	0.1 ms	0.6	0.7	40 ms	0.2	1.9
Visual, GLB	88 ms	98 ms	0.2	0.1 ms	0.9	16 ms	0.1	0.2	1.7
Visual, OBJ	88 ms	93 ms	0.2	0.1 ms	0.9	0.3	96 ms	0.2	1.9

Board Repo: opulo-inc/lumenpnp Board: x-cable-chain-support.kicad_pcb Folder src / PCB / x-cable-chain-support Complexity 92 / 1000 (size 17, features 75) KESE features filled zones, curved board outline, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 0, 0, 0 Triangles, simulation 110,860 in 9 parts Note no components Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.3 MB 179 MB STEP 25 MB 195 MB STL 5.5 MB 179 MB OBJ 12 MB 169 MB Visual GLB 2.3 MB 134 MB OBJ 6.2 MB 135 MB

20.34 xy-limit

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	78 ms	0.3	0.1 ms	0.6	28 ms	60 ms	0.2	1.3
Simulation, STEP	0.1	92 ms	0.3	0.1 ms	0.7	0.9	49 ms	0.2	2.3
Simulation, STL	0.1	83 ms	0.3	0.1 ms	0.7	35 ms	61 ms	0.2	1.5
Simulation, OBJ	0.1	0.1	0.3	0.1 ms	0.7	0.6	61 ms	0.2	2.1
Visual, GLB	0.1	0.1	0.3	0.1 ms	1.0	15 ms	90 ms	0.2	1.8
Visual, OBJ	0.1	0.1	0.3	0.2 ms	1.0	0.3	0.1	0.2	2.2

Board Repo: opulo-inc/lumenpnp Board: xy-limit.kicad_pcb Folder src / PCB / xy-limit Complexity 173 / 1000 (size 103, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, TrueType text Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 3, 42, 11 Triangles, simulation 129,766 in 15 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.8 MB 194 MB STEP 25 MB 212 MB STL 6.5 MB 192 MB OBJ 14 MB 192 MB Visual GLB 2.5 MB 154 MB OBJ 6.8 MB 155 MB

20.35 z-limit

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	84 ms	0.3	0.1 ms	0.6	26 ms	60 ms	0.2	1.4
Simulation, STEP	0.2	0.1	0.4	0.1 ms	0.6	0.9	56 ms	0.2	2.4
Simulation, STL	0.1	0.1	0.4	0.1 ms	0.6	37 ms	81 ms	0.2	1.5
Simulation, OBJ	0.2	0.1	0.4	0.3 ms	0.6	0.6	54 ms	0.2	2.1
Visual, GLB	0.1	0.1	0.4	0.1 ms	1.3	15 ms	0.1	0.2	2.3
Visual, OBJ	0.2	0.1	0.4	0.1 ms	1.3	0.4	97 ms	0.2	2.7

Board Repo: opulo-inc/lumenpnp Board: z-limit.kicad_pcb Folder src / PCB / z-limit Complexity 171 / 1000 (size 101, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, TrueType text Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 3, 30, 13 Triangles, simulation 107,692 in 17 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.8 MB 190 MB STEP 18 MB 196 MB STL 5.4 MB 185 MB OBJ 11 MB 189 MB Visual GLB 3.0 MB 156 MB OBJ 8.3 MB 158 MB

20.36 OrangeCrab

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	3.7	13.9	0.5 ms	14.8	0.6	1.7	0.3	35.7
Simulation, STEP	0.8	3.9	14.3	0.6 ms	14.6	8.9	1.6	0.3	44.3
Simulation, STL	0.8	3.5	14.5	1 ms	14.7	1.5	1.7	0.3	37.0
Simulation, OBJ	0.8	3.8	14.4	1 ms	14.6	20.4	1.7	0.3	55.9
Visual, GLB	0.8	4.0	13.9	2 ms	26.9	0.4	3.6	0.2	49.8
Visual, OBJ	0.9	3.8	13.5	1 ms	26.3	10.4	3.6	0.3	58.7

Board Repo: orangecrab-fpga/orangecrab-hardware Board: OrangeCrab.kicad_pcb Folder hardware / orangecrab_r0.1 Complexity 403 / 1000 (size 303, features 100) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline Tested 9th November 2026 Copper layers 6 File format KiCad 5 (20171130) Parts, tracks, vias 141, 6,919, 449 Triangles, simulation 4,238,478 in 192 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 146 MB 1.2 GB STEP 609 MB 1.5 GB STL 212 MB 1.3 GB OBJ 453 MB 2.7 GB Visual GLB 73 MB 1.3 GB OBJ 233 MB 1.6 GB

20.37 OrangeCrab

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	3.8	15.4	0.6 ms	17.5	0.7	1.8	0.3	40.3
Simulation, STEP	0.9	3.7	15.5	0.9 ms	18.4	9.9	2.0	0.3	50.8
Simulation, STL	1.0	3.7	15.8	0.9 ms	18.3	1.7	2.0	0.3	42.9
Simulation, OBJ	0.9	3.8	15.9	0.6 ms	18.5	25.5	2.2	0.3	67.1
Visual, GLB	1.0	4.0	14.9	0.6 ms	30.6	0.4	3.8	0.3	55.0
Visual, OBJ	1.0	3.8	15.3	0.7 ms	30.6	12.8	3.9	0.2	67.7

Board Repo: orangecrab-fpga/orangecrab-hardware Board: OrangeCrab.kicad_pcb Folder hardware / orangecrab_r0.2.1 Complexity 404 / 1000 (size 304, features 100) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline Tested 9th November 2026 Copper layers 6 File format KiCad 5 (20171130) Parts, tracks, vias 142, 7,280, 441 Triangles, simulation 4,397,740 in 188 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 151 MB 1.1 GB STEP 636 MB 1.5 GB STL 220 MB 1.2 GB OBJ 470 MB 2.8 GB Visual GLB 77 MB 1.5 GB OBJ 245 MB 1.7 GB

20.38 OrangeCrab

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	4.1	15.5	1.0 ms	16.7	0.9	1.9	0.3	40.5
Simulation, STEP	1.1	4.2	16.0	1 ms	17.0	10.4	2.0	0.3	51.1
Simulation, STL	1.1	4.3	16.0	0.7 ms	16.7	1.8	2.0	0.3	42.4
Simulation, OBJ	1.1	4.4	16.0	0.6 ms	17.1	28.1	2.2	0.3	69.1
Visual, GLB	1.1	4.4	16.4	1 ms	32.9	0.4	4.4	0.3	59.9
Visual, OBJ	1.1	4.4	16.3	0.6 ms	33.4	14.1	4.5	0.3	74.1

Board Repo: orangecrab-fpga/orangecrab-hardware Board: OrangeCrab.kicad_pcb Folder hardware / orangecrab_r0.2 Complexity 405 / 1000 (size 305, features 100) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline Tested 9th November 2026 Copper layers 6 File format KiCad 5 (20171130) Parts, tracks, vias 144, 7,537, 459 Triangles, simulation 4,445,274 in 185 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 153 MB 1.3 GB STEP 651 MB 1.6 GB STL 222 MB 1.4 GB OBJ 475 MB 2.9 GB Visual GLB 79 MB 1.5 GB OBJ 252 MB 1.6 GB

20.39 mezzanine-breakout-board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	80 ms	0.1	0.3	0.2 ms	0.5	14 ms	44 ms	0.2	1.3
Simulation, STEP	77 ms	0.1	0.3	0.1 ms	0.5	0.7	46 ms	0.2	2.0
Simulation, STL	77 ms	0.1	0.3	0.1 ms	0.5	21 ms	47 ms	0.2	1.3
Simulation, OBJ	85 ms	0.1	0.3	0.1 ms	0.5	0.4	51 ms	0.2	1.7
Visual, GLB	76 ms	99 ms	0.3	0.1 ms	1.0	11 ms	70 ms	0.2	1.7
Visual, OBJ	79 ms	0.1	0.3	0.1 ms	0.9	0.4	58 ms	0.2	2.0

Board Repo: oresat/oresat-adcs-hardware Board: mezzanine-breakout-board.kicad_pcb Folder mezzanine-breakout-board Complexity 197 / 1000 (size 92, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 2, 31, 5 Triangles, simulation 88,076 in 19 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.0 MB 178 MB STEP 12 MB 186 MB STL 4.4 MB 176 MB OBJ 8.5 MB 178 MB Visual GLB 2.1 MB 152 MB OBJ 5.8 MB 152 MB

20.40 mezzanine-flex-board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	79 ms	0.2	0.3	0.1 ms	0.5	21 ms	42 ms	0.2	1.3
Simulation, STEP	78 ms	0.2	0.3	0.1 ms	0.4	0.7	47 ms	0.2	2.0
Simulation, STL	80 ms	0.2	0.3	0.1 ms	0.5	45 ms	48 ms	0.2	1.3
Simulation, OBJ	74 ms	0.2	0.3	0.1 ms	0.4	0.5	52 ms	0.2	1.7
Visual, GLB	78 ms	0.2	0.3	0.2 ms	0.9	12 ms	86 ms	0.2	1.8
Visual, OBJ	79 ms	0.2	0.4	0.2 ms	0.9	0.3	89 ms	0.2	2.1

Board Repo: oresat/oresat-adcs-hardware Board: mezzanine-flex-board.kicad_pcb Folder mezzanine-flex-board Complexity 204 / 1000 (size 109, features 95) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 2, 16, 40 Triangles, simulation 118,972 in 22 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.2 MB 199 MB STEP 22 MB 208 MB STL 6.0 MB 195 MB OBJ 12 MB 199 MB Visual GLB 2.6 MB 162 MB OBJ 7.4 MB 164 MB

20.41 oresat-adcs-card

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.5	9.8	49.2	2 ms	37.1	1.8	4.9	0.4	105.8
Simulation, STEP	2.8	10.7	49.9	1 ms	34.3	20.7	4.5	0.4	123.3
Simulation, STL	2.4	9.6	51.3	1 ms	34.8	3.8	5.3	0.4	107.6
Simulation, OBJ	2.5	10.2	49.3	2 ms	35.2	52.7	5.2	0.5	155.7
Visual, GLB	2.6	10.2	52.0	2 ms	87.3	0.8	8.6	0.4	162.0
Visual, OBJ	2.6	10.1	50.0	1 ms	85.7	30.5	8.5	0.4	187.9

Board Repo: oresat/oresat-adcs-hardware Board: oresat-adcs-card.kicad_pcb Folder oresat-adcs-card Complexity 334 / 1000 (size 244, features 90) KESE features through vias, rounded, trapezoid or chamfered pads, drill offsets, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 456, 3,064, 1,130 Triangles, simulation 7,666,848 in 369 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 261 MB 2.0 GB STEP 1.2 GB 2.8 GB STL 383 MB 2.1 GB OBJ 829 MB 5.0 GB Visual GLB 166 MB 2.7 GB OBJ 532 MB 3.4 GB

20.42 oresat-mag-card

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	3.3	11.6	0.6 ms	13.8	0.6	1.4	0.3	32.0
Simulation, STEP	0.9	3.2	11.6	0.6 ms	12.7	7.7	1.5	0.3	37.7
Simulation, STL	1.0	3.2	11.3	0.6 ms	12.5	1.3	1.2	0.3	30.7
Simulation, OBJ	0.9	3.2	11.5	0.6 ms	11.9	15.2	1.3	0.2	44.3
Visual, GLB	0.9	3.1	11.8	0.5 ms	23.4	0.3	3.8	0.3	43.6
Visual, OBJ	1.0	3.6	11.9	0.5 ms	24.5	9.1	3.5	0.3	53.9

Board Repo: oresat/oresat-adcs-hardware Board: oresat-mag-card.kicad_pcb Folder oresat-mag-card Complexity 376 / 1000 (size 261, features 115) KESE features through vias, rounded, trapezoid or chamfered pads, drill offsets, filled zones, curved board outline, tracks bare of mask, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 175, 1,177, 651 Triangles, simulation 3,666,392 in 197 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 122 MB 1.1 GB STEP 484 MB 1.5 GB STL 183 MB 1.1 GB OBJ 384 MB 2.4 GB Visual GLB 74 MB 1.3 GB OBJ 233 MB 1.6 GB

20.43 control-stage

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	2.3	4.6	0.9 ms	6.3	0.3	0.9	0.2	15.0
Simulation, STEP	0.5	2.6	5.0	0.9 ms	6.3	3.6	0.9	0.3	19.1
Simulation, STL	0.4	2.5	4.6	1 ms	6.3	0.7	1.0	0.2	15.7
Simulation, OBJ	0.5	2.6	4.9	0.7 ms	5.9	9.7	0.8	0.2	24.6
Visual, GLB	0.4	2.6	4.6	0.7 ms	10.9	0.2	1.0	0.2	19.9
Visual, OBJ	0.4	2.3	4.6	0.9 ms	11.0	4.9	1.5	0.2	25.0

Board Repo: oresat/oresat-adcs-hardware Board: control-stage.kicad_pcb Folder oresat-rw-board-rev1-MCXN / control-stage Complexity 349 / 1000 (size 259, features 90) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 9 (20241229) Parts, tracks, vias 93, 830, 485 Triangles, simulation 2,345,640 in 131 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 79 MB 829 MB STEP 210 MB 948 MB STL 117 MB 806 MB OBJ 249 MB 1.5 GB Visual GLB 38 MB 789 MB OBJ 122 MB 929 MB

20.44 power-stage-rev8

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.2	4.2	14.3	1 ms	16.3	0.8	2.0	0.3	39.1
Simulation, STEP	1.2	4.3	14.3	0.8 ms	16.6	8.6	2.0	0.3	47.3
Simulation, STL	1.2	4.3	14.3	1 ms	16.5	1.6	2.1	0.3	40.3
Simulation, OBJ	1.2	4.3	14.1	1 ms	16.7	25.0	2.0	0.3	63.6
Visual, GLB	1.1	4.3	14.2	1 ms	50.1	0.3	3.1	0.3	73.6
Visual, OBJ	1.1	4.3	14.6	1 ms	49.9	11.4	3.2	0.3	84.9

Board Repo: oresat/oresat-adcs-hardware Board: power-stage-rev8.kicad_pcb Folder oresat-rw-board-rev2-MCXN / power-stage-rev8 Complexity 435 / 1000 (size 285, features 150) KESE features through vias, padstacks, rounded, trapezoid or chamfered pads, arc tracks, filled zones, TrueType text, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 6 File format KiCad 10 (20260206) Parts, tracks, vias 213, 1,035, 686 Triangles, simulation 4,212,664 in 271 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 140 MB 1.1 GB STEP 463 MB 1.4 GB STL 211 MB 1.1 GB OBJ 442 MB 2.7 GB Visual GLB 66 MB 1.4 GB OBJ 206 MB 1.6 GB

20.45 controller_rev5.0_flat

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	7.4	22.2	0.7 ms	16.9	0.8	2.1	0.3	50.7
Simulation, STEP	1.1	7.7	22.0	0.7 ms	17.6	9.6	2.3	0.3	60.5
Simulation, STL	1.1	7.5	22.3	0.7 ms	18.1	1.6	2.1	0.3	52.9
Simulation, OBJ	1.1	7.7	22.5	0.7 ms	18.1	26.4	2.2	0.3	78.3
Visual, GLB	1.1	7.6	21.9	0.7 ms	33.3	0.4	4.7	0.3	69.2
Visual, OBJ	1.2	7.4	21.5	0.7 ms	31.6	16.1	4.9	0.3	83.0

Board Repo: oresat/oresat-adcs-hardware Board: controller_rev5.0_flat.kicad_pcb Folder oresat-rw-board-rev5-flat Complexity 362 / 1000 (size 272, features 90) KESE features through vias, rounded, trapezoid or chamfered pads, drill offsets, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20211228) Parts, tracks, vias 149, 2,162, 1,552 Triangles, simulation 4,833,650 in 201 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 157 MB 1.7 GB STEP 482 MB 2.0 GB STL 242 MB 1.8 GB OBJ 507 MB 3.0 GB Visual GLB 99 MB 1.7 GB OBJ 315 MB 2.1 GB

20.46 rev6.0_flat_controlstage

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	6.7	14.2	1 ms	17.9	0.7	1.6	0.3	42.1
Simulation, STEP	0.7	6.7	14.1	1 ms	18.2	6.9	1.6	0.3	48.5
Simulation, STL	0.7	6.8	15.0	1 ms	18.6	1.5	1.7	0.3	44.6
Simulation, OBJ	0.8	7.0	14.7	1 ms	18.3	23.9	1.6	0.3	66.7
Visual, GLB	0.8	7.4	15.8	1 ms	33.1	0.4	3.1	0.3	61.0
Visual, OBJ	0.7	7.0	15.2	1 ms	32.9	13.9	2.9	0.3	73.0

Board Repo: oresat/oresat-adcs-hardware Board: rev6.0_flat_controlstage.kicad_pcb Folder oresat-rw-board-rev6 / rev6.0_flat_controlstage Complexity 342 / 1000 (size 267, features 75) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 104, 948, 1,776 Triangles, simulation 4,214,950 in 107 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 134 MB 1.4 GB STEP 292 MB 1.9 GB STL 211 MB 1.4 GB OBJ 438 MB 2.7 GB Visual GLB 86 MB 1.5 GB OBJ 274 MB 1.8 GB

20.47 rev6.0_flat_powerstage

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.4	18.4	39.6	3 ms	33.2	1.7	3.5	0.4	98.3
Simulation, STEP	1.5	18.6	38.4	3 ms	33.2	13.8	3.4	0.4	109.4
Simulation, STL	1.5	18.9	40.9	4 ms	34.2	4.5	3.5	0.4	103.8
Simulation, OBJ	1.4	18.7	39.4	1 ms	33.1	54.2	3.5	0.4	150.6
Visual, GLB	1.5	18.5	40.4	4 ms	83.0	1.1	10.6	0.4	155.4
Visual, OBJ	1.5	18.6	39.6	4 ms	81.3	30.7	10.8	0.4	182.9

Board Repo: oresat/oresat-adcs-hardware Board: rev6.0_flat_powerstage.kicad_pcb Folder oresat-rw-board-rev6 / rev6.0_flat_powerstage Complexity 324 / 1000 (size 249, features 75) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 201, 931, 4,881 Triangles, simulation 9,968,238 in 126 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 314 MB 2.8 GB STEP 588 MB 3.5 GB STL 498 MB 2.8 GB OBJ 1.0 GB 6.0 GB Visual GLB 202 MB 3.3 GB OBJ 658 MB 4.2 GB

20.48 as5047p_breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	98 ms	0.2	0.9	0.2 ms	0.8	42 ms	0.2	0.2	2.5
Simulation, STEP	95 ms	0.2	0.9	0.2 ms	0.8	0.9	0.1	0.2	3.3
Simulation, STL	0.1	0.2	1.0	0.2 ms	0.8	63 ms	0.1	0.2	2.5
Simulation, OBJ	0.1	0.2	0.9	0.3 ms	0.8	1.1	0.1	0.3	3.5
Visual, GLB	0.1	0.2	0.9	0.2 ms	2.0	32 ms	0.2	0.2	3.6
Visual, OBJ	0.1	0.2	0.9	0.2 ms	1.9	0.8	0.2	0.2	4.3

Board Repo: oresat/oresat-adcs-hardware Board: as5047p_breakout.kicad_pcb Folder oresat-rw-board-rev7 / as5047p_breakout Complexity 172 / 1000 (size 127, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 6, 51, 60 Triangles, simulation 273,762 in 24 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.3 MB 232 MB STEP 34 MB 238 MB STL 14 MB 221 MB OBJ 27 MB 234 MB Visual GLB 5.9 MB 219 MB OBJ 17 MB 226 MB

20.49 as5047p_breakout_rev2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.1	0.8	0.3 ms	0.8	36 ms	0.1	0.2	2.3
Simulation, STEP	0.1	0.1	0.8	0.2 ms	0.8	1.0	0.1	0.2	3.2
Simulation, STL	0.1	0.1	0.8	0.3 ms	0.9	58 ms	0.1	0.2	2.3
Simulation, OBJ	0.1	0.1	0.8	0.2 ms	0.9	1.1	0.1	0.2	3.4
Visual, GLB	0.1	0.1	0.8	0.2 ms	2.1	19 ms	0.1	0.2	3.6
Visual, OBJ	96 ms	0.1	0.8	0.2 ms	2.0	0.6	0.1	0.2	3.9

Board Repo: oresat/oresat-adcs-hardware Board: as5047p_breakout_rev2.kicad_pcb Folder oresat-rw-board-rev7 / as5047p_breakout_rev2 Complexity 144 / 1000 (size 114, features 30) KESE features rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 8, 88, 0 Triangles, simulation 224,936 in 32 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.6 MB 213 MB STEP 33 MB 233 MB STL 11 MB 205 MB OBJ 22 MB 205 MB Visual GLB 4.2 MB 196 MB OBJ 12 MB 198 MB

20.50 control-stage

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	2.9	6.7	0.3 ms	8.0	0.4	1.0	0.3	20.0
Simulation, STEP	0.8	2.8	6.8	0.3 ms	8.0	4.3	1.0	0.3	24.0
Simulation, STL	0.8	2.8	6.7	0.3 ms	8.0	0.9	1.1	0.3	20.6
Simulation, OBJ	0.8	3.0	6.7	0.3 ms	8.2	14.6	1.2	0.2	34.7
Visual, GLB	0.9	3.6	7.0	0.3 ms	18.9	0.2	2.2	0.2	33.2
Visual, OBJ	0.8	3.0	7.2	0.4 ms	18.9	10.1	2.3	0.3	42.7

Board Repo: oresat/oresat-adcs-hardware Board: control-stage.kicad_pcb Folder oresat-rw-board-rev7 / control-stage Complexity 353 / 1000 (size 258, features 95) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, TrueType text, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 7 (20221018) Parts, tracks, vias 74, 917, 524 Triangles, simulation 2,647,594 in 93 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 89 MB 862 MB STEP 217 MB 964 MB STL 132 MB 880 MB OBJ 281 MB 1.7 GB Visual GLB 48 MB 890 MB OBJ 152 MB 1.1 GB

20.51 power-stage

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	4.6	14.0	0.8 ms	14.6	0.7	1.6	0.3	36.9
Simulation, STEP	1.0	4.3	13.7	1.0 ms	14.9	7.1	1.6	0.3	42.9
Simulation, STL	1.1	4.4	13.7	0.7 ms	15.6	1.9	1.7	0.4	38.7
Simulation, OBJ	1.0	4.6	14.2	1 ms	16.4	24.9	1.8	0.3	63.3
Visual, GLB	1.0	4.7	14.5	0.9 ms	46.2	0.3	3.7	0.3	70.8
Visual, OBJ	1.3	4.9	14.2	1.0 ms	47.9	12.1	4.0	0.3	84.6

Board Repo: oresat/oresat-adcs-hardware Board: power-stage.kicad_pcb Folder oresat-rw-board-rev7 / power-stage Complexity 326 / 1000 (size 231, features 95) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, TrueType text, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 7 (20221018) Parts, tracks, vias 137, 1,171, 840 Triangles, simulation 3,991,868 in 89 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 130 MB 1.1 GB STEP 352 MB 1.3 GB STL 200 MB 1.2 GB OBJ 432 MB 2.6 GB Visual GLB 64 MB 1.3 GB OBJ 207 MB 1.4 GB

20.52 oresat-rw-card

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.1	4.2	16.8	2 ms	21.1	0.7	1.8	0.3	47.0
Simulation, STEP	2.1	4.3	16.2	2 ms	21.6	10.5	1.8	0.3	56.7
Simulation, STL	2.1	4.3	16.2	2 ms	21.6	1.7	1.9	0.3	48.1
Simulation, OBJ	2.2	4.5	16.2	2 ms	20.9	20.8	1.8	0.3	66.8
Visual, GLB	2.0	4.3	16.0	2 ms	33.6	0.4	4.9	0.3	61.5
Visual, OBJ	2.1	4.0	15.6	2 ms	33.4	13.9	4.9	0.3	74.2

Board Repo: oresat/oresat-adcs-hardware Board: oresat-rw-card.kicad_pcb Folder oresat-rw-card Complexity 342 / 1000 (size 227, features 115) KESE features through vias, rounded, trapezoid or chamfered pads, drill offsets, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 267, 1,651, 575 Triangles, simulation 4,214,454 in 244 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 146 MB 1.4 GB STEP 627 MB 1.6 GB STL 211 MB 1.3 GB OBJ 457 MB 2.8 GB Visual GLB 99 MB 1.6 GB OBJ 314 MB 2.1 GB

20.53 oresat-backplane-1u

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	3.5	14.0	0.4 ms	13.1	0.7	1.8	0.3	34.1
Simulation, STEP	0.8	3.5	14.0	0.5 ms	13.3	8.4	1.7	0.3	41.9
Simulation, STL	0.7	3.4	13.9	0.6 ms	13.4	1.4	1.7	0.3	34.7
Simulation, OBJ	0.8	3.5	14.7	0.5 ms	13.7	19.1	1.9	0.3	54.0
Visual, GLB	0.8	3.5	15.1	0.2 ms	28.1	0.3	2.9	0.3	50.9
Visual, OBJ	0.7	3.6	15.0	0.3 ms	27.9	8.2	3.3	0.3	59.0

Board Repo: oresat/oresat-backplane Board: oresat-backplane-1u.kicad_pcb Folder 1U / KiCad / oresat-backplane-1u Complexity 292 / 1000 (size 197, features 95) KESE features through vias, rounded, trapezoid or chamfered pads, drill offsets, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 45, 1,025, 224 Triangles, simulation 4,370,926 in 62 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 148 MB 1.2 GB STEP 648 MB 1.5 GB STL 219 MB 1.2 GB OBJ 467 MB 2.8 GB Visual GLB 69 MB 1.3 GB OBJ 216 MB 1.6 GB

20.54 oresat0-1u-backplane

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.2	2.8	12.6	0.3 ms	11.0	0.5	1.3	0.3	29.6
Simulation, STEP	1.1	2.9	12.5	0.3 ms	11.0	8.2	1.3	0.3	37.4
Simulation, STL	1.2	3.0	12.7	0.3 ms	10.8	1.1	1.5	0.3	30.5
Simulation, OBJ	1.2	2.8	12.5	0.3 ms	10.6	17.9	1.5	0.3	46.9
Visual, GLB	1.2	2.8	12.2	0.4 ms	21.2	0.2	1.8	0.3	39.8
Visual, OBJ	1.1	2.9	12.9	0.3 ms	21.6	8.6	2.2	0.3	49.5

Board Repo: oresat/oresat-backplane Board: oresat0-1u-backplane.kicad_pcb Folder 1U / KiCad / oresat0-1u-backplane Complexity 313 / 1000 (size 193, features 120) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, drill offsets, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 38, 808, 245 Triangles, simulation 3,116,812 in 59 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 105 MB 974 MB STEP 441 MB 1.1 GB STL 156 MB 934 MB OBJ 330 MB 2.1 GB Visual GLB 51 MB 1.1 GB OBJ 157 MB 1.2 GB

20.55 oresat-backplane-2u

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.0	8.6	38.0	0.8 ms	32.8	1.7	4.4	0.4	88.0
Simulation, STEP	2.0	9.2	38.7	0.5 ms	32.1	19.7	4.0	0.5	106.2
Simulation, STL	1.9	8.8	39.1	0.4 ms	33.3	4.4	4.4	0.4	92.3
Simulation, OBJ	1.9	9.5	38.7	0.6 ms	32.6	54.2	4.1	0.4	141.4
Visual, GLB	2.0	9.3	39.6	0.6 ms	63.1	0.5	8.1	0.3	122.9
Visual, OBJ	1.9	9.1	40.0	0.4 ms	63.8	20.4	9.6	0.4	145.1

Board Repo: oresat/oresat-backplane Board: oresat-backplane-2u.kicad_pcb Folder 2U / generic-2u Complexity 343 / 1000 (size 213, features 130) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, drill offsets, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 52, 923, 1,103 Triangles, simulation 9,769,928 in 46 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 324 MB 2.8 GB STEP 1.3 GB 3.3 GB STL 489 MB 2.7 GB OBJ 1.0 GB 6.2 GB Visual GLB 145 MB 2.6 GB OBJ 464 MB 3.0 GB

20.56 oresat-backplane-2u

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.9	9.0	39.3	1.0 ms	34.4	1.6	4.3	0.4	90.9
Simulation, STEP	1.8	8.9	40.7	0.5 ms	34.8	19.2	4.1	0.4	110.0
Simulation, STL	1.8	9.1	40.0	2 ms	35.0	3.6	4.3	0.4	94.2
Simulation, OBJ	1.8	9.2	40.4	0.3 ms	34.3	52.3	4.1	0.4	142.5
Visual, GLB	1.9	8.8	38.8	0.6 ms	60.7	0.6	6.8	0.4	117.9
Visual, OBJ	2.0	8.8	39.0	0.6 ms	61.4	22.6	6.8	0.4	141.0

Board Repo: oresat/oresat-backplane Board: oresat-backplane-2u.kicad_pcb Folder 2U / oresat0.5 Complexity 349 / 1000 (size 214, features 135) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 59, 731, 1,153 Triangles, simulation 7,981,954 in 48 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 265 MB 2.3 GB STEP 976 MB 2.8 GB STL 399 MB 2.3 GB OBJ 853 MB 5.1 GB Visual GLB 128 MB 2.3 GB OBJ 410 MB 2.7 GB

20.57 oresat-backplane-2u

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.6	6.9	29.0	0.9 ms	26.2	1.1	3.1	0.4	68.3
Simulation, STEP	1.5	6.9	29.8	0.7 ms	25.7	13.1	3.3	0.3	80.5
Simulation, STL	1.6	7.1	30.1	1 ms	27.6	2.1	3.4	0.4	72.1
Simulation, OBJ	1.7	7.2	29.8	0.8 ms	24.9	41.1	3.2	0.3	108.2
Visual, GLB	1.7	7.2	33.6	2 ms	58.6	0.6	6.6	0.4	108.5
Visual, OBJ	1.9	8.2	33.9	2 ms	52.5	18.3	4.8	0.3	119.9

Board Repo: oresat/oresat-backplane Board: oresat-backplane-2u.kicad_pcb Folder 2U / oresat1 Complexity 370 / 1000 (size 215, features 155) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 53, 1,119, 1,172 Triangles, simulation 6,573,172 in 56 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 223 MB 2.0 GB STEP 768 MB 2.4 GB STL 329 MB 2.0 GB OBJ 708 MB 4.3 GB Visual GLB 107 MB 1.9 GB OBJ 346 MB 2.2 GB

20.58 esi-backplane-3u

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.6	10.3	57.0	1 ms	39.2	1.9	6.5	0.4	116.9
Simulation, STEP	1.6	10.4	55.4	0.4 ms	39.7	21.6	6.0	0.4	135.1
Simulation, STL	1.6	9.7	57.8	1 ms	41.0	4.5	7.1	0.5	122.0
Simulation, OBJ	1.7	10.7	57.3	0.5 ms	40.0	59.6	6.7	0.4	176.3
Visual, GLB	1.6	9.8	57.5	0.4 ms	75.3	0.8	8.1	0.4	153.5
Visual, OBJ	1.6	10.6	58.5	0.4 ms	77.2	24.2	8.1	0.4	180.6

Board Repo: oresat/oresat-backplane Board: esi-backplane-3u.kicad_pcb Folder 3U / esi-backplane-3u Complexity 392 / 1000 (size 222, features 170) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones, copper drawings, curved board outline, tracks bare of mask, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 81, 2,165, 1,088 Triangles, simulation 10,799,048 in 46 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 369 MB 2.3 GB STEP 1.4 GB 3.5 GB STL 540 MB 2.4 GB OBJ 1.2 GB 6.8 GB Visual GLB 169 MB 2.9 GB OBJ 548 MB 3.5 GB

20.59 oresat-backplane-3u

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.6	15.5	106.8	3 ms	70.8	3.0	10.7	0.8	211.3
Simulation, STEP	3.8	14.9	107.1	3 ms	71.3	46.9	11.5	0.7	256.3
Simulation, STL	4.0	15.5	102.9	3 ms	69.9	6.5	11.3	0.6	210.8
Simulation, OBJ	3.7	14.5	98.8	4 ms	65.5	99.3	9.9	0.5	292.1
Visual, GLB	3.0	14.1	95.7	3 ms	136.5	1.3	10.0	0.5	261.2
Visual, OBJ	3.2	14.1	96.4	3 ms	137.2	41.7	10.5	0.5	303.6

Board Repo: oresat/oresat-backplane Board: oresat-backplane-3u.kicad_pcb Folder 3U / oresat-backplane-3u Complexity 358 / 1000 (size 218, features 140) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, drill offsets, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 189, 2,348, 25 Triangles, simulation 14,995,974 in 526 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 510 MB 3.8 GB STEP 2.3 GB 4.6 GB STL 750 MB 3.5 GB OBJ 1.7 GB 9.6 GB Visual GLB 222 MB 3.8 GB OBJ 721 MB 4.6 GB

20.60 oresat-batteries

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.2	4.2	17.5	2 ms	23.2	0.9	2.1	0.3	49.5
Simulation, STEP	1.5	4.4	17.8	2 ms	23.6	11.2	2.0	0.3	60.8
Simulation, STL	1.4	4.6	18.0	2 ms	23.7	1.4	2.1	0.3	51.5
Simulation, OBJ	1.3	4.5	17.6	2 ms	23.3	21.1	2.1	0.3	70.1
Visual, GLB	1.5	4.3	17.1	2 ms	39.9	0.4	5.5	0.3	69.0
Visual, OBJ	1.3	4.2	17.9	2 ms	39.5	15.0	5.2	0.3	83.3

Board Repo: oresat/oresat-batteries Board: oresat-batteries.kicad_pcb Folder oresat-battery-card Complexity 410 / 1000 (size 270, features 140) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, drill offsets, filled zones, copper drawings, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 277, 2,229, 566 Triangles, simulation 4,578,120 in 287 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 157 MB 1.4 GB STEP 697 MB 1.8 GB STL 229 MB 1.4 GB OBJ 494 MB 3.0 GB Visual GLB 104 MB 1.7 GB OBJ 334 MB 2.2 GB

20.61 oresat-c3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.4	9.7	38.6	2 ms	39.7	1.3	4.1	0.4	96.2
Simulation, STEP	2.4	10.2	38.8	1 ms	39.4	19.0	3.7	0.4	113.8
Simulation, STL	2.5	9.7	37.8	2 ms	37.8	2.6	3.9	0.4	94.7
Simulation, OBJ	2.5	9.7	37.9	1 ms	36.4	44.2	3.7	0.4	134.8
Visual, GLB	2.5	9.5	36.9	2 ms	66.6	0.7	8.0	0.3	124.6
Visual, OBJ	2.5	9.6	38.4	1 ms	64.8	26.5	8.0	0.3	150.2

Board Repo: oresat/oresat-c3-hardware Board: oresat-c3.kicad_pcb Folder oresat-c3-card Complexity 449 / 1000 (size 304, features 145) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones, copper drawings, tracks bare of mask, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 347, 2,992, 1,380 Triangles, simulation 7,494,014 in 560 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 255 MB 2.1 GB STEP 1.0 GB 2.9 GB STL 375 MB 2.1 GB OBJ 809 MB 4.8 GB Visual GLB 164 MB 2.6 GB OBJ 532 MB 3.4 GB

20.62 amp-PA-GRF5504-with-detect

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.0	3.4	0.2 ms	2.9	0.1	0.3	0.3	8.4
Simulation, STEP	0.4	1.0	3.6	0.4 ms	3.3	2.1	0.4	0.3	10.9
Simulation, STL	0.3	1.0	3.2	0.4 ms	2.9	0.3	0.4	0.3	8.4
Simulation, OBJ	0.3	1.1	3.3	0.3 ms	2.8	3.8	0.3	0.3	12.0
Visual, GLB	0.3	0.9	3.2	0.6 ms	5.9	67 ms	0.7	0.3	11.3
Visual, OBJ	0.3	1.0	3.5	0.3 ms	5.4	2.0	0.5	0.2	13.0

Board Repo: oresat/oresat-c3-rf Board: amp-PA-GRF5504-with-detect.kicad_pcb Folder KiCad Complexity 308 / 1000 (size 188, features 120) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 51, 247, 220 Triangles, simulation 840,424 in 46 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 29 MB 418 MB STEP 96 MB 486 MB STL 42 MB 410 MB OBJ 86 MB 626 MB Visual GLB 16 MB 418 MB OBJ 48 MB 420 MB

20.63 cfc_emulator

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.4	0.4 ms	1.9	0.1	0.3	0.2	5.6
Simulation, STEP	0.2	0.4	2.4	0.3 ms	2.1	1.9	0.3	0.2	7.6
Simulation, STL	0.2	0.4	2.5	0.3 ms	1.9	0.1	0.3	0.2	5.7
Simulation, OBJ	0.2	0.4	2.4	0.3 ms	2.0	2.9	0.3	0.2	8.5
Visual, GLB	0.3	0.4	2.5	0.3 ms	3.9	52 ms	0.4	0.3	7.8
Visual, OBJ	0.3	0.4	2.3	0.5 ms	3.9	1.8	0.5	0.2	9.4

Board Repo: oresat/oresat-cfc-hardware Board: cfc_emulator.kicad_pcb Folder cfc-emulator Complexity 222 / 1000 (size 142, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20210424) Parts, tracks, vias 23, 202, 18 Triangles, simulation 540,340 in 74 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 18 MB 305 MB STEP 84 MB 368 MB STL 27 MB 303 MB OBJ 54 MB 411 MB Visual GLB 12 MB 344 MB OBJ 34 MB 345 MB

20.64 cfc-minibackplane

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.9	6.0	0.4 ms	4.5	0.2	0.6	0.2	12.7
Simulation, STEP	0.3	0.9	6.2	0.4 ms	4.3	3.2	0.6	0.3	15.8
Simulation, STL	0.3	0.8	6.2	0.3 ms	4.2	0.4	0.6	0.3	12.8
Simulation, OBJ	0.3	0.9	6.2	0.4 ms	4.1	6.4	0.5	0.2	18.6
Visual, GLB	0.3	0.9	6.0	0.6 ms	9.1	0.1	1.1	0.2	17.7
Visual, OBJ	0.3	0.9	6.3	0.5 ms	9.1	3.7	1.1	0.3	21.7

Board Repo: oresat/oresat-cfc-hardware Board: cfc-minibackplane.kicad_pcb Folder cfc-minibackplane Complexity 232 / 1000 (size 147, features 85) KESE features through vias, rounded, trapezoid or chamfered pads, drill offsets, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 33, 219, 19 Triangles, simulation 1,343,314 in 65 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 46 MB 501 MB STEP 230 MB 619 MB STL 67 MB 523 MB OBJ 140 MB 925 MB Visual GLB 27 MB 663 MB OBJ 80 MB 688 MB

20.65 cfc-processor

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.3	4.5	18.5	1 ms	18.3	0.7	1.8	0.3	45.5
Simulation, STEP	1.3	4.5	18.0	2 ms	17.9	11.6	1.9	0.3	55.5
Simulation, STL	1.2	4.7	19.0	2 ms	17.1	1.3	1.8	0.3	45.4
Simulation, OBJ	1.3	4.8	19.3	1 ms	17.3	22.1	1.9	0.3	66.9
Visual, GLB	1.3	4.7	18.2	1 ms	33.3	0.4	3.8	0.3	62.1
Visual, OBJ	1.2	4.8	18.7	2 ms	37.3	14.3	4.2	0.3	80.8

Board Repo: oresat/oresat-cfc-hardware Board: cfc-processor.kicad_pcb Folder cfc-processor-card-v2 Complexity 403 / 1000 (size 283, features 120) KESE features through vias, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 163, 2,385, 501 Triangles, simulation 3,912,120 in 430 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 133 MB 1.3 GB STEP 567 MB 1.6 GB STL 196 MB 1.3 GB OBJ 419 MB 2.6 GB Visual GLB 84 MB 1.4 GB OBJ 270 MB 1.8 GB

20.66 cfc-sensor-card

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	2.7	9.5	1.0 ms	9.4	0.4	1.1	0.2	24.2
Simulation, STEP	0.8	2.5	9.7	0.8 ms	9.4	6.9	1.2	0.3	30.7
Simulation, STL	0.9	2.5	9.7	1.0 ms	9.8	0.9	1.2	0.3	25.2
Simulation, OBJ	0.9	2.7	9.5	1 ms	9.6	13.2	1.1	0.3	37.2
Visual, GLB	0.8	2.6	9.5	0.8 ms	19.7	0.3	2.8	0.2	35.9
Visual, OBJ	0.9	2.5	9.3	1 ms	20.3	8.5	3.0	0.3	44.6

Board Repo: oresat/oresat-cfc-hardware Board: cfc-sensor-card.kicad_pcb Folder cfc-sensor-card-v2 Complexity 330 / 1000 (size 215, features 115) KESE features through vias, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 149, 1,151, 404 Triangles, simulation 3,117,614 in 170 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 105 MB 984 MB STEP 434 MB 1.3 GB STL 156 MB 1.0 GB OBJ 331 MB 2.1 GB Visual GLB 65 MB 1.3 GB OBJ 206 MB 1.5 GB

20.67 oresat-diode-test-card

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	2.6	12.1	0.7 ms	10.3	0.5	1.2	0.3	27.7
Simulation, STEP	0.7	2.8	12.6	0.5 ms	10.0	5.9	1.3	0.3	33.5
Simulation, STL	0.7	2.8	12.3	0.4 ms	9.9	0.9	1.2	0.3	28.0
Simulation, OBJ	0.7	2.6	12.4	0.5 ms	10.2	13.5	1.3	0.3	40.8
Visual, GLB	0.7	2.6	12.6	0.6 ms	20.0	0.2	2.4	0.2	38.8
Visual, OBJ	0.6	2.5	12.6	0.6 ms	19.7	7.8	2.6	0.3	46.2

Board Repo: oresat/oresat-diode-test-card Board: oresat-diode-test-card.kicad_pcb Folder oresat-diode-test-card Complexity 301 / 1000 (size 211, features 90) KESE features through vias, rounded, trapezoid or chamfered pads, drill offsets, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 116, 1,047, 362 Triangles, simulation 2,723,040 in 151 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 94 MB 872 MB STEP 377 MB 1.1 GB STL 136 MB 878 MB OBJ 291 MB 1.8 GB Visual GLB 55 MB 1.1 GB OBJ 173 MB 1.3 GB

20.68 AR9271_eval

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	1.9	8.9	1 ms	7.3	0.3	0.8	0.3	20.1
Simulation, STEP	0.6	2.0	8.7	0.8 ms	7.4	3.9	0.8	0.3	23.7
Simulation, STL	0.6	2.0	8.7	0.9 ms	7.4	0.6	0.7	0.3	20.3
Simulation, OBJ	0.5	2.0	8.6	1 ms	7.2	8.9	0.9	0.4	28.4
Visual, GLB	0.6	1.9	8.6	0.9 ms	12.5	0.2	1.4	0.3	25.5
Visual, OBJ	0.5	2.0	8.7	0.8 ms	12.4	5.4	1.6	0.2	30.9

Board Repo: oresat/oresat-dxwifi-hardware Board: AR9271_eval.kicad_pcb Folder AR9271_eval / AR9271_eval / AR9271_eval Complexity 293 / 1000 (size 248, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 125, 745, 346 Triangles, simulation 1,765,668 in 93 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 62 MB 669 MB STEP 243 MB 841 MB STL 88 MB 657 MB OBJ 186 MB 1.2 GB Visual GLB 38 MB 797 MB OBJ 114 MB 910 MB

20.69 Bidirectional_Amp

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.8	6.5	0.5 ms	5.6	0.3	0.6	0.3	15.5
Simulation, STEP	0.6	1.8	6.7	0.6 ms	5.8	3.3	0.6	0.2	19.2
Simulation, STL	0.5	1.9	6.8	0.5 ms	5.9	0.4	0.6	0.3	16.4
Simulation, OBJ	0.6	1.8	6.5	0.4 ms	6.3	8.7	0.6	0.2	24.8
Visual, GLB	0.6	1.9	6.7	0.5 ms	9.5	0.2	1.1	0.2	20.2
Visual, OBJ	0.6	1.9	6.7	0.5 ms	9.8	5.2	1.2	0.2	25.6

Board Repo: oresat/oresat-dxwifi-hardware Board: Bidirectional_Amp.kicad_pcb Folder bi-directional-amp-board_V2 / KiCad Complexity 275 / 1000 (size 205, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 101, 356, 445 Triangles, simulation 1,663,490 in 66 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 58 MB 756 MB STEP 178 MB 809 MB STL 83 MB 722 MB OBJ 174 MB 1.1 GB Visual GLB 32 MB 706 MB OBJ 98 MB 762 MB

20.70 oresat-live-card

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.9	8.2	30.9	1 ms	23.3	1.0	2.9	0.4	68.8
Simulation, STEP	2.0	8.2	32.1	2 ms	24.2	15.2	2.9	0.3	85.0
Simulation, STL	1.9	8.9	30.9	1 ms	23.1	2.3	2.6	0.3	70.0
Simulation, OBJ	1.9	8.5	31.3	1 ms	24.3	33.5	2.8	0.3	102.7
Visual, GLB	2.0	8.5	31.7	1 ms	61.0	0.7	7.2	0.3	111.4
Visual, OBJ	2.1	8.8	31.0	1 ms	57.8	20.8	6.4	0.3	127.2

Board Repo: oresat/oresat-dxwifi-hardware Board: oresat-live-card.kicad_pcb Folder oresat-live-card Complexity 472 / 1000 (size 302, features 170) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones, copper drawings, curved board outline, tracks bare of mask, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 313, 3,611, 1,249 Triangles, simulation 6,616,224 in 533 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 225 MB 1.8 GB STEP 911 MB 2.5 GB STL 331 MB 2.0 GB OBJ 713 MB 4.2 GB Visual GLB 144 MB 2.3 GB OBJ 470 MB 3.1 GB

20.71 receive_Path

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.9	2.3	0.3 ms	2.8	0.1	0.3	0.2	6.8
Simulation, STEP	0.2	0.9	2.2	0.4 ms	2.6	1.4	0.3	0.2	7.8
Simulation, STL	0.2	0.8	2.3	0.3 ms	2.7	0.2	0.3	0.2	6.7
Simulation, OBJ	0.2	0.8	2.4	0.3 ms	3.0	3.4	0.3	0.2	10.3
Visual, GLB	0.2	0.8	2.3	0.3 ms	4.1	57 ms	0.4	0.2	8.0
Visual, OBJ	0.2	0.9	2.2	0.3 ms	4.1	1.9	0.5	0.2	10.0

Board Repo: oresat/oresat-dxwifi-hardware Board: receive_Path.kicad_pcb Folder rf-receive-test Complexity 291 / 1000 (size 186, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 34, 120, 317 Triangles, simulation 849,594 in 45 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 29 MB 448 MB STEP 64 MB 523 MB STL 42 MB 436 MB OBJ 86 MB 625 MB Visual GLB 15 MB 451 MB OBJ 47 MB 422 MB

20.72 balun-eval-board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.6	1.3	0.2 ms	2.0	67 ms	0.2	0.2	4.5
Simulation, STEP	0.1	0.7	1.4	0.2 ms	1.9	1.0	0.2	0.2	5.4
Simulation, STL	0.1	0.6	1.3	0.2 ms	2.1	0.1	0.2	0.2	4.6
Simulation, OBJ	0.2	0.8	2.0	0.2 ms	2.5	2.9	0.3	0.3	8.9
Visual, GLB	0.2	0.9	1.9	0.3 ms	3.3	46 ms	0.3	0.4	7.1
Visual, OBJ	0.2	0.9	1.9	0.3 ms	3.0	1.5	0.3	0.3	8.0

Board Repo: oresat/oresat-end-cards Board: balun-eval-board.kicad_pcb Folder dev-boards / BalUn-eval-board Complexity 266 / 1000 (size 161, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper drawings, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 5, 14, 239 Triangles, simulation 450,516 in 18 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 319 MB STEP 19 MB 355 MB STL 23 MB 327 MB OBJ 45 MB 342 MB Visual GLB 8.2 MB 285 MB OBJ 25 MB 291 MB

20.73 esi-minusz-end-card

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.4	8.2	0.6 ms	7.9	0.4	1.1	0.3	20.8
Simulation, STEP	0.6	2.4	8.3	0.8 ms	7.9	5.4	1.0	0.3	25.9
Simulation, STL	0.6	2.4	8.2	0.6 ms	7.7	0.7	1.0	0.3	20.9
Simulation, OBJ	0.7	2.5	8.5	1 ms	8.1	13.2	1.1	0.2	34.3
Visual, GLB	0.7	2.5	8.4	1.0 ms	16.6	0.2	2.2	0.3	31.0
Visual, OBJ	0.6	2.6	8.4	0.6 ms	16.9	7.8	2.2	0.3	38.8

Board Repo: oresat/oresat-end-cards Board: esi-minusz-end-card.kicad_pcb Folder esi-minusz-end-card Complexity 385 / 1000 (size 205, features 180) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones, copper drawings, curved board outline, tracks bare of mask, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 67, 674, 490 Triangles, simulation 2,180,030 in 89 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 74 MB 907 MB STEP 258 MB 954 MB STL 109 MB 882 MB OBJ 229 MB 1.5 GB Visual GLB 44 MB 859 MB OBJ 137 MB 982 MB

20.74 esi-plusz-end-card

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	1.7	5.7	0.5 ms	5.7	0.2	0.8	0.3	15.1
Simulation, STEP	0.8	1.6	5.7	0.5 ms	5.4	3.9	0.8	0.3	18.5
Simulation, STL	0.7	1.6	5.6	0.5 ms	5.4	0.5	0.7	0.3	14.8
Simulation, OBJ	0.7	1.6	5.5	0.5 ms	5.5	9.0	0.7	0.2	23.3
Visual, GLB	0.7	1.7	5.7	0.5 ms	11.1	0.1	1.2	0.3	20.7
Visual, OBJ	0.7	1.6	5.6	0.5 ms	11.2	5.5	1.3	0.2	26.2

Board Repo: oresat/oresat-end-cards Board: esi-plusz-end-card.kicad_pcb Folder esi-plusz-end-card Complexity 321 / 1000 (size 196, features 125) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, drill offsets, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 50, 692, 275 Triangles, simulation 1,500,644 in 78 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 50 MB 571 MB STEP 192 MB 710 MB STL 75 MB 595 MB OBJ 155 MB 1.0 GB Visual GLB 32 MB 740 MB OBJ 96 MB 716 MB

20.75 plusz-end-card-with-turnstile

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.8	5.7	0.8 ms	6.1	0.2	0.6	0.2	15.0
Simulation, STEP	0.3	1.7	5.7	0.7 ms	6.1	2.8	0.6	0.2	17.4
Simulation, STL	0.3	1.7	5.7	0.7 ms	6.2	0.5	0.7	0.2	15.3
Simulation, OBJ	0.3	1.7	5.7	1.0 ms	6.2	7.2	0.6	0.2	22.1
Visual, GLB	0.3	1.8	5.5	0.6 ms	11.2	0.1	1.1	0.2	20.2
Visual, OBJ	0.3	1.6	5.9	0.7 ms	11.3	4.3	1.2	0.2	24.8

Board Repo: oresat/oresat-end-cards Board: plusz-end-card-with-turnstile.kicad_pcb Folder oresat0-plusz-end-card / card Complexity 313 / 1000 (size 193, features 120) KESE features through vias, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 27, 280, 513 Triangles, simulation 1,879,500 in 75 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 64 MB 721 MB STEP 197 MB 838 MB STL 94 MB 717 MB OBJ 197 MB 1.3 GB Visual GLB 35 MB 786 MB OBJ 108 MB 814 MB

20.76 plusz-end-card-with-turnstile-mezzanine

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	1.7	5.0	0.5 ms	5.8	0.2	0.4	0.3	13.7
Simulation, STEP	0.3	1.7	4.9	0.4 ms	6.1	2.1	0.4	0.3	15.7
Simulation, STL	0.2	1.7	4.9	0.4 ms	5.9	0.3	0.4	0.2	13.6
Simulation, OBJ	0.2	1.7	4.8	0.4 ms	5.9	6.6	0.4	0.3	19.9
Visual, GLB	0.2	1.7	5.0	0.4 ms	7.3	0.1	0.8	0.2	15.5
Visual, OBJ	0.2	1.7	4.9	0.5 ms	7.4	4.1	0.9	0.2	19.5

Board Repo: oresat/oresat-end-cards Board: plusz-end-card-with-turnstile-mezzanine.kicad_pcb Folder oresat0-plusz-end-card / mezzanine Complexity 260 / 1000 (size 190, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 22, 143, 536 Triangles, simulation 1,165,586 in 37 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 37 MB 542 MB STEP 75 MB 629 MB STL 58 MB 580 MB OBJ 116 MB 784 MB Visual GLB 23 MB 659 MB OBJ 71 MB 605 MB

20.77 oresat0.5-minusz-end-card

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.5	4.4	0.2 ms	4.3	0.2	0.5	0.3	11.7
Simulation, STEP	0.5	1.3	4.5	0.2 ms	4.3	2.4	0.5	0.2	13.8
Simulation, STL	0.6	1.4	4.8	0.2 ms	4.2	0.4	0.5	0.3	12.1
Simulation, OBJ	0.5	1.4	4.6	0.2 ms	4.4	7.3	0.5	0.2	18.9
Visual, GLB	0.6	1.4	4.8	0.4 ms	9.2	0.1	0.7	0.2	17.1
Visual, OBJ	0.6	1.4	4.5	0.3 ms	9.5	4.2	0.6	0.2	21.1

Board Repo: oresat/oresat-end-cards Board: oresat0.5-minusz-end-card.kicad_pcb Folder oresat0.5-minusz-end-card Complexity 335 / 1000 (size 175, features 160) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 10, 137, 350 Triangles, simulation 1,327,426 in 52 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 43 MB 577 MB STEP 125 MB 638 MB STL 66 MB 561 MB OBJ 134 MB 925 MB Visual GLB 24 MB 604 MB OBJ 73 MB 604 MB

20.78 oresat0.5-pluz-end-card

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	1.3	4.8	0.2 ms	4.3	0.2	0.5	0.2	12.2
Simulation, STEP	0.7	1.3	5.1	0.4 ms	4.5	2.6	0.6	0.2	15.0
Simulation, STL	0.7	1.2	4.6	0.4 ms	4.4	0.3	0.5	0.2	12.0
Simulation, OBJ	0.6	1.3	4.7	0.2 ms	4.4	7.7	0.6	0.2	19.6
Visual, GLB	0.6	1.2	4.8	0.2 ms	9.3	0.1	1.0	0.3	17.2
Visual, OBJ	0.7	1.4	4.8	0.5 ms	9.1	3.8	1.0	0.2	20.9

Board Repo: oresat/oresat-end-cards Board: oresat0.5-pluz-end-card.kicad_pcb Folder oresat0.5-plusz-end-card Complexity 319 / 1000 (size 179, features 140) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 14, 190, 328 Triangles, simulation 1,392,812 in 52 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 46 MB 595 MB STEP 150 MB 626 MB STL 70 MB 615 MB OBJ 142 MB 942 MB Visual GLB 26 MB 621 MB OBJ 78 MB 606 MB

20.79 oresat1-minusz-end-card

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.4	8.1	0.3 ms	7.5	0.3	1.0	0.3	20.2
Simulation, STEP	0.7	2.4	7.9	0.6 ms	7.6	4.8	1.0	0.3	24.7
Simulation, STL	0.7	2.4	7.9	0.3 ms	7.5	0.9	1.1	0.3	20.7
Simulation, OBJ	0.7	2.4	8.1	0.3 ms	7.4	12.2	1.0	0.3	32.1
Visual, GLB	0.7	2.5	8.2	0.5 ms	15.8	0.2	1.7	0.3	29.3
Visual, OBJ	0.7	2.4	8.0	0.4 ms	15.2	7.1	1.8	0.3	35.4

Board Repo: oresat/oresat-end-cards Board: oresat1-minusz-end-card.kicad_pcb Folder oresat1-minusz-end-card Complexity 394 / 1000 (size 204, features 190) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones, copper drawings, copper text, curved board outline, tracks bare of mask, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 65, 682, 477 Triangles, simulation 2,062,236 in 87 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 70 MB 785 MB STEP 235 MB 933 MB STL 103 MB 746 MB OBJ 216 MB 1.4 GB Visual GLB 42 MB 843 MB OBJ 130 MB 973 MB

20.80 oresat1-plusz-end-card

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.2	2.4	9.6	0.3 ms	7.7	0.3	0.9	0.3	22.4
Simulation, STEP	1.1	2.5	9.7	0.3 ms	7.8	5.5	0.9	0.2	27.8
Simulation, STL	1.1	2.6	9.6	0.5 ms	7.7	0.8	1.0	0.3	23.1
Simulation, OBJ	1.2	2.6	9.9	0.3 ms	8.1	13.4	1.0	0.3	36.3
Visual, GLB	1.2	2.4	9.6	0.4 ms	15.9	0.2	1.9	0.3	31.5
Visual, OBJ	1.1	2.5	10.0	0.6 ms	16.1	8.0	2.1	0.3	40.2

Board Repo: oresat/oresat-end-cards Board: oresat1-plusz-end-card.kicad_pcb Folder oresat1-plusz-end-card Complexity 375 / 1000 (size 205, features 170) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones, copper drawings, curved board outline, tracks bare of mask, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 74, 731, 445 Triangles, simulation 2,233,472 in 89 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 76 MB 866 MB STEP 280 MB 959 MB STL 112 MB 849 MB OBJ 236 MB 1.5 GB Visual GLB 45 MB 892 MB OBJ 141 MB 1.1 GB

20.81 esi-minusZ-end-cap

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.8	3.2	0.3 ms	2.9	0.1	0.4	0.2	8.0
Simulation, STEP	0.3	0.8	3.0	0.3 ms	2.9	2.3	0.4	0.2	9.9
Simulation, STL	0.3	0.9	3.0	0.3 ms	3.0	0.3	0.4	0.2	8.2
Simulation, OBJ	0.3	0.8	3.0	0.3 ms	2.9	4.9	0.4	0.2	12.7
Visual, GLB	0.3	0.9	2.9	0.3 ms	5.8	76 ms	0.5	0.2	10.7
Visual, OBJ	0.3	0.8	3.1	0.2 ms	6.1	2.7	0.5	0.2	13.7

Board Repo: oresat/oresat-endcaps Board: esi-minusZ-end-cap.kicad_pcb Folder esi-minusz-end-cap Complexity 289 / 1000 (size 184, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 33, 287, 220 Triangles, simulation 906,706 in 55 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 31 MB 498 MB STEP 103 MB 509 MB STL 45 MB 450 MB OBJ 93 MB 657 MB Visual GLB 17 MB 468 MB OBJ 52 MB 446 MB

20.82 esi-plusz-end-cap

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	0.7	2.7	0.2 ms	2.6	0.1	0.4	0.2	7.3
Simulation, STEP	0.5	0.8	2.5	0.3 ms	2.8	2.3	0.4	0.3	9.4
Simulation, STL	0.4	0.8	2.7	0.3 ms	2.7	0.2	0.4	0.3	7.5
Simulation, OBJ	0.5	0.7	2.7	0.2 ms	2.8	4.3	0.4	0.3	11.6
Visual, GLB	0.5	0.8	2.8	0.4 ms	6.1	79 ms	0.8	0.3	11.3
Visual, OBJ	0.5	0.8	2.9	0.3 ms	6.1	2.6	0.9	0.3	14.2

Board Repo: oresat/oresat-endcaps Board: esi-plusz-end-cap.kicad_pcb Folder esi-plusz-end-cap Complexity 285 / 1000 (size 180, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 34, 273, 146 Triangles, simulation 829,900 in 56 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 28 MB 439 MB STEP 105 MB 450 MB STL 41 MB 443 MB OBJ 85 MB 611 MB Visual GLB 17 MB 480 MB OBJ 53 MB 447 MB

20.83 oresat0-plusz-end-cap

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.7	2.9	0.2 ms	1.9	89 ms	0.3	0.2	6.4
Simulation, STEP	0.3	0.8	2.8	0.2 ms	2.0	1.6	0.3	0.3	8.1
Simulation, STL	0.3	0.7	2.8	0.1 ms	1.9	0.1	0.3	0.2	6.5
Simulation, OBJ	0.3	0.7	2.9	0.2 ms	1.9	3.0	0.3	0.2	9.3
Visual, GLB	0.3	0.7	2.9	0.2 ms	4.5	60 ms	0.4	0.2	9.1
Visual, OBJ	0.3	0.7	2.8	0.2 ms	4.4	2.1	0.5	0.2	11.1

Board Repo: oresat/oresat-endcaps Board: oresat0-plusz-end-cap.kicad_pcb Folder oresat0-plusz-end-cap / kicad Complexity 268 / 1000 (size 163, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 25, 242, 209 Triangles, simulation 598,388 in 30 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 21 MB 339 MB STEP 87 MB 390 MB STL 30 MB 359 MB OBJ 62 MB 462 MB Visual GLB 15 MB 385 MB OBJ 45 MB 388 MB

20.84 oresat0.5-minusz-end-cap

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	3.4	0.3 ms	2.1	97 ms	0.3	0.3	7.1
Simulation, STEP	0.2	0.7	3.0	0.4 ms	2.1	1.8	0.3	0.2	8.5
Simulation, STL	0.2	0.8	3.2	0.3 ms	2.1	0.2	0.3	0.3	7.1
Simulation, OBJ	0.2	0.7	3.3	0.6 ms	2.1	2.7	0.3	0.2	9.5
Visual, GLB	0.2	0.7	3.3	0.4 ms	4.8	66 ms	0.5	0.2	9.9
Visual, OBJ	0.2	0.8	3.1	0.4 ms	4.8	2.3	0.7	0.2	12.2

Board Repo: oresat/oresat-endcaps Board: oresat0.5-minusz-end-cap.kicad_pcb Folder oresat0.5-minusz-end-cap Complexity 271 / 1000 (size 166, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 26, 249, 267 Triangles, simulation 651,044 in 51 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 23 MB 383 MB STEP 86 MB 414 MB STL 33 MB 398 MB OBJ 66 MB 478 MB Visual GLB 17 MB 414 MB OBJ 51 MB 427 MB

20.85 oresat0.5-plusz-end-cap

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.7	3.4	0.4 ms	2.1	90 ms	0.3	0.2	7.1
Simulation, STEP	0.2	0.6	3.3	0.2 ms	2.1	1.7	0.4	0.2	8.6
Simulation, STL	0.2	0.7	3.4	0.3 ms	2.2	0.2	0.4	0.2	7.2
Simulation, OBJ	0.2	0.7	3.5	0.6 ms	2.1	3.0	0.4	0.3	10.2
Visual, GLB	0.2	0.7	3.4	0.4 ms	5.4	68 ms	0.7	0.2	10.7
Visual, OBJ	0.2	0.6	3.4	0.4 ms	5.3	2.2	0.6	0.3	12.6

Board Repo: oresat/oresat-endcaps Board: oresat0.5-plusz-end-cap.kicad_pcb Folder oresat0.5-plusz-end-cap Complexity 269 / 1000 (size 164, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 27, 254, 215 Triangles, simulation 616,052 in 48 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 22 MB 352 MB STEP 90 MB 388 MB STL 31 MB 378 MB OBJ 63 MB 463 MB Visual GLB 16 MB 395 MB OBJ 49 MB 406 MB

20.86 oresat1-minusZ-end-cap

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.9	3.1	0.4 ms	3.0	0.1	0.5	0.2	8.3
Simulation, STEP	0.3	1.1	2.9	0.3 ms	3.0	2.3	0.5	0.3	10.5
Simulation, STL	0.3	0.9	3.1	0.2 ms	3.2	0.3	0.5	0.3	8.5
Simulation, OBJ	0.3	0.8	3.0	0.3 ms	3.3	4.6	0.5	0.2	12.7
Visual, GLB	0.4	1.0	3.4	0.3 ms	6.5	92 ms	0.8	0.2	12.4
Visual, OBJ	0.4	0.9	3.3	0.3 ms	6.4	3.1	0.8	0.3	15.1

Board Repo: oresat/oresat-endcaps Board: oresat1-minusZ-end-cap.kicad_pcb Folder oresat1-minusz-end-cap Complexity 291 / 1000 (size 186, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 41, 260, 228 Triangles, simulation 984,700 in 60 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 33 MB 500 MB STEP 113 MB 545 MB STL 49 MB 494 MB OBJ 100 MB 681 MB Visual GLB 21 MB 524 MB OBJ 63 MB 543 MB

20.87 oresat1-plusz-end-cap

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.1	3.9	0.4 ms	3.5	0.2	0.6	0.3	10.1
Simulation, STEP	0.5	1.0	3.5	0.3 ms	3.4	2.4	0.6	0.2	11.7
Simulation, STL	0.5	1.0	3.7	0.4 ms	3.4	0.3	0.6	0.3	9.7
Simulation, OBJ	0.6	1.0	3.7	0.4 ms	3.5	5.7	0.6	0.2	15.2
Visual, GLB	0.5	1.0	3.5	0.4 ms	7.4	0.1	0.7	0.3	13.5
Visual, OBJ	0.5	1.0	3.7	0.5 ms	7.4	3.6	0.8	0.2	17.2

Board Repo: oresat/oresat-endcaps Board: oresat1-plusz-end-cap.kicad_pcb Folder oresat1-plusz-end-cap Complexity 293 / 1000 (size 188, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 42, 302, 240 Triangles, simulation 1,070,180 in 60 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 36 MB 520 MB STEP 124 MB 538 MB STL 54 MB 518 MB OBJ 109 MB 735 MB Visual GLB 22 MB 549 MB OBJ 69 MB 542 MB

20.88 backplane-debug

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.8	0.1 ms	0.9	35 ms	0.1	0.2	2.3
Simulation, STEP	0.1	0.2	0.8	0.2 ms	0.8	1.0	0.1	0.2	3.2
Simulation, STL	0.1	0.2	0.8	0.1 ms	0.7	39 ms	98 ms	0.2	2.2
Simulation, OBJ	0.1	0.2	0.8	0.2 ms	0.8	1.0	0.1	0.2	3.2
Visual, GLB	0.1	0.2	0.8	0.2 ms	2.0	26 ms	0.2	0.2	3.5
Visual, OBJ	98 ms	0.2	0.8	0.2 ms	1.9	0.8	0.1	0.2	4.0

Board Repo: oresat/oresat-flatsat Board: backplane-debug.kicad_pcb Folder backplane-debug-board Complexity 206 / 1000 (size 111, features 95) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 3, 76, 16 Triangles, simulation 213,296 in 24 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.5 MB 212 MB STEP 41 MB 240 MB STL 11 MB 228 MB OBJ 21 MB 232 MB Visual GLB 5.6 MB 210 MB OBJ 16 MB 211 MB

20.89 backplane-debug-breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	0.6	2.4	0.5 ms	2.2	75 ms	0.4	0.3	6.3
Simulation, STEP	0.4	0.5	2.2	0.4 ms	1.6	1.5	0.2	0.3	6.8
Simulation, STL	0.3	0.5	1.8	0.2 ms	1.7	0.1	0.3	0.2	5.0
Simulation, OBJ	0.3	0.4	1.9	0.4 ms	1.7	2.3	0.3	0.2	7.1
Visual, GLB	0.3	0.4	1.7	0.3 ms	3.3	50 ms	0.3	0.2	6.4
Visual, OBJ	0.3	0.4	1.8	0.3 ms	3.3	2.0	0.5	0.2	8.5

Board Repo: oresat/oresat-flatsat Board: backplane-debug-breakout.kicad_pcb Folder backplane-debug-breakout Complexity 240 / 1000 (size 135, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 15, 97, 39 Triangles, simulation 433,812 in 41 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 279 MB STEP 71 MB 332 MB STL 22 MB 291 MB OBJ 44 MB 358 MB Visual GLB 11 MB 326 MB OBJ 32 MB 323 MB

20.90 c3-proxy

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.5	5.2	0.9 ms	5.6	0.3	0.7	0.3	14.1
Simulation, STEP	0.6	1.6	5.3	0.6 ms	5.9	3.9	0.7	0.3	18.2
Simulation, STL	0.5	1.7	5.1	0.7 ms	5.7	0.5	0.8	0.2	14.6
Simulation, OBJ	0.6	1.6	5.5	0.7 ms	5.7	8.3	0.8	0.2	22.6
Visual, GLB	0.5	1.7	5.5	0.8 ms	12.1	0.2	1.3	0.2	21.4
Visual, OBJ	0.6	1.6	5.2	0.5 ms	11.9	5.2	1.6	0.2	26.3

Board Repo: oresat/oresat-flatsat Board: c3-proxy.kicad_pcb Folder c3-proxy Complexity 329 / 1000 (size 199, features 130) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, drill offsets, filled zones, TrueType text, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 64, 706, 265 Triangles, simulation 1,736,256 in 93 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 59 MB 665 MB STEP 243 MB 805 MB STL 87 MB 672 MB OBJ 182 MB 1.2 GB Visual GLB 38 MB 912 MB OBJ 115 MB 881 MB

20.91 oresat-c3-surrogate

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.4	5.5	0.7 ms	4.0	0.2	0.6	0.3	12.3
Simulation, STEP	0.3	1.3	5.6	0.7 ms	4.2	3.0	0.6	0.3	15.2
Simulation, STL	0.3	1.3	5.5	0.6 ms	3.8	0.4	0.6	0.3	12.4
Simulation, OBJ	0.3	1.3	5.6	0.7 ms	3.9	5.2	0.5	0.2	17.1
Visual, GLB	0.3	1.3	5.4	0.8 ms	9.0	0.1	1.4	0.3	17.8
Visual, OBJ	0.3	1.3	5.4	0.8 ms	8.8	3.8	1.4	0.3	21.3

Board Repo: oresat/oresat-flatsat Board: oresat-c3-surrogate.kicad_pcb Folder c3-surrogate-card Complexity 272 / 1000 (size 167, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, drill offsets, filled zones, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 37, 318, 185 Triangles, simulation 1,085,502 in 79 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 37 MB 462 MB STEP 152 MB 572 MB STL 54 MB 492 MB OBJ 110 MB 742 MB Visual GLB 26 MB 628 MB OBJ 80 MB 636 MB

20.92 c3s-card-adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	1.4	0.2 ms	1.6	65 ms	0.3	0.2	4.1
Simulation, STEP	0.1	0.4	1.5	0.3 ms	1.6	1.4	0.3	0.2	5.4
Simulation, STL	0.1	0.4	1.4	0.3 ms	1.6	69 ms	0.3	0.3	4.1
Simulation, OBJ	0.1	0.4	1.4	0.3 ms	1.6	1.5	0.3	0.2	5.5
Visual, GLB	0.2	0.4	1.5	0.3 ms	3.0	55 ms	0.4	0.2	5.7
Visual, OBJ	0.1	0.4	1.5	0.2 ms	3.0	1.3	0.4	0.2	6.8

Board Repo: oresat/oresat-flatsat Board: c3s-card-adapter.kicad_pcb Folder c3s-card-adapter Complexity 225 / 1000 (size 130, features 95) KESE features through vias, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 2, 213, 88 Triangles, simulation 289,626 in 53 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.6 MB 251 MB STEP 46 MB 278 MB STL 14 MB 247 MB OBJ 29 MB 246 MB Visual GLB 8.4 MB 406 MB OBJ 26 MB 406 MB

20.93 card-debug-board-2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.0	0.3 ms	1.8	71 ms	0.3	0.2	5.2
Simulation, STEP	0.2	0.6	2.1	0.3 ms	1.8	1.5	0.2	0.2	6.6
Simulation, STL	0.2	0.5	2.5	0.3 ms	2.0	0.1	0.3	0.2	5.9
Simulation, OBJ	0.2	0.5	2.2	0.2 ms	1.8	2.4	0.3	0.2	7.6
Visual, GLB	0.2	0.5	2.2	0.5 ms	3.7	54 ms	0.5	0.2	7.4
Visual, OBJ	0.2	0.5	1.8	0.3 ms	3.3	1.9	0.5	0.2	8.5

Board Repo: oresat/oresat-flatsat Board: card-debug-board-2.kicad_pcb Folder card-debug-board-2 Complexity 234 / 1000 (size 144, features 90) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 16, 198, 55 Triangles, simulation 428,828 in 58 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 277 MB STEP 70 MB 335 MB STL 21 MB 279 MB OBJ 43 MB 348 MB Visual GLB 12 MB 334 MB OBJ 34 MB 330 MB

20.94 card-debug-board-3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.6	4.9	0.7 ms	5.8	0.3	0.7	0.2	14.0
Simulation, STEP	0.5	1.5	5.2	0.5 ms	5.6	4.2	0.7	0.3	18.0
Simulation, STL	0.4	1.5	5.3	0.6 ms	5.9	0.5	0.7	0.3	14.6
Simulation, OBJ	0.5	1.5	5.4	0.6 ms	5.9	7.4	0.8	0.2	21.8
Visual, GLB	0.5	1.5	5.3	0.8 ms	11.1	0.1	1.3	0.2	20.1
Visual, OBJ	0.6	1.6	5.3	0.7 ms	11.2	4.9	1.5	0.3	25.3

Board Repo: oresat/oresat-flatsat Board: card-debug-board-3.kicad_pcb Folder card-debug-board-3 Complexity 354 / 1000 (size 239, features 115) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 78, 599, 249 Triangles, simulation 1,544,806 in 114 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 52 MB 591 MB STEP 208 MB 740 MB STL 77 MB 595 MB OBJ 160 MB 1.0 GB Visual GLB 34 MB 686 MB OBJ 104 MB 779 MB

20.95 flatsat-breakout-main

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.3	4.7	0.5 ms	4.3	0.2	0.7	0.3	11.7
Simulation, STEP	0.3	1.2	4.5	0.4 ms	4.4	2.7	0.7	0.3	14.0
Simulation, STL	0.3	1.3	4.8	0.4 ms	4.6	0.4	0.7	0.3	12.4
Simulation, OBJ	0.3	1.4	5.2	0.5 ms	4.3	7.4	0.7	0.2	19.5
Visual, GLB	0.3	1.2	4.7	0.5 ms	7.2	0.1	1.1	0.2	14.8
Visual, OBJ	0.3	1.4	5.1	0.5 ms	7.1	4.0	1.0	0.3	19.2

Board Repo: oresat/oresat-flatsat Board: flatsat-breakout-main.kicad_pcb Folder flatsat-breakout Complexity 269 / 1000 (size 164, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 5, 380, 162 Triangles, simulation 1,354,072 in 34 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 46 MB 512 MB STEP 140 MB 607 MB STL 68 MB 494 MB OBJ 140 MB 914 MB Visual GLB 23 MB 551 MB OBJ 70 MB 599 MB

20.96 oresat-flatsat-interface

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	1.0	5.2	0.3 ms	3.4	0.1	0.5	0.2	10.7
Simulation, STEP	0.2	1.0	5.3	0.4 ms	3.6	2.4	0.4	0.2	13.1
Simulation, STL	0.2	1.0	5.1	0.4 ms	3.6	0.3	0.5	0.2	11.0
Simulation, OBJ	0.2	1.0	5.1	0.5 ms	3.5	5.4	0.5	0.2	15.8
Visual, GLB	0.2	1.0	5.0	0.7 ms	6.9	91 ms	0.7	0.2	14.0
Visual, OBJ	0.2	1.0	4.9	0.3 ms	6.8	3.2	0.7	0.2	17.1

Board Repo: oresat/oresat-flatsat Board: oresat-flatsat-interface.kicad_pcb Folder flatsat-to-oresat-jumper-card Complexity 289 / 1000 (size 159, features 130) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones, copper drawings, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 11, 267, 291 Triangles, simulation 1,034,332 in 60 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 35 MB 491 MB STEP 126 MB 534 MB STL 52 MB 476 MB OBJ 105 MB 736 MB Visual GLB 21 MB 561 MB OBJ 64 MB 556 MB

20.97 swd-to-card-debug-3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	1.3	0.3 ms	1.3	50 ms	0.2	0.2	3.6
Simulation, STEP	0.1	0.4	1.3	0.3 ms	1.2	1.3	0.2	0.2	4.7
Simulation, STL	0.2	0.4	1.4	0.3 ms	1.4	0.1	0.2	0.2	3.8
Simulation, OBJ	0.1	0.4	1.4	0.4 ms	1.3	1.6	0.2	0.2	5.3
Visual, GLB	0.1	0.4	1.3	0.3 ms	2.8	43 ms	0.5	0.2	5.3
Visual, OBJ	0.1	0.4	1.4	0.3 ms	2.4	1.2	0.3	0.2	6.1

Board Repo: oresat/oresat-flatsat Board: swd-to-card-debug-3.kicad_pcb Folder swd-to-card-debug-3 Complexity 263 / 1000 (size 148, features 115) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 14, 184, 103 Triangles, simulation 405,560 in 39 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 272 MB STEP 57 MB 321 MB STL 20 MB 272 MB OBJ 41 MB 331 MB Visual GLB 11 MB 314 MB OBJ 32 MB 314 MB

20.98 usb_gps

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.8	8.2	0.9 ms	6.6	0.3	0.8	0.3	18.4
Simulation, STEP	0.4	1.9	7.1	0.8 ms	6.8	3.5	0.8	0.3	20.9
Simulation, STL	0.4	1.9	7.7	0.7 ms	6.3	0.6	0.8	0.3	17.9
Simulation, OBJ	0.4	1.8	7.5	0.6 ms	6.1	8.0	0.7	0.3	24.7
Visual, GLB	0.5	1.7	7.4	0.6 ms	11.9	0.2	1.4	0.3	23.3
Visual, OBJ	0.4	1.9	8.0	0.8 ms	12.4	4.8	1.6	0.3	29.5

Board Repo: oresat/oresat-gps-hardware Board: usb_gps.kicad_pcb Folder GPS-USB_Front_End_Board / kicad_board_design Complexity 284 / 1000 (size 239, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 91, 888, 119 Triangles, simulation 1,683,098 in 118 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 58 MB 742 MB STEP 200 MB 777 MB STL 84 MB 714 MB OBJ 176 MB 1.1 GB Visual GLB 34 MB 721 MB OBJ 101 MB 788 MB

20.99 BaseBoard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	95 ms	0.4	2.4	0.3 ms	1.4	81 ms	0.2	0.2	4.7
Simulation, STEP	0.1	0.4	2.3	0.4 ms	1.4	1.5	0.2	0.2	6.1
Simulation, STL	94 ms	0.4	2.3	0.3 ms	1.4	0.1	0.2	0.2	4.6
Simulation, OBJ	94 ms	0.4	2.4	0.3 ms	1.3	2.1	0.2	0.2	6.6
Visual, GLB	99 ms	0.4	2.3	0.4 ms	2.7	33 ms	0.4	0.2	6.0
Visual, OBJ	0.1	0.4	2.3	0.4 ms	2.8	1.0	0.2	0.2	7.1

Board Repo: oresat/oresat-gps-hardware Board: BaseBoard.kicad_pcb Folder MicroSemi_FPGA_Dev_Board / kicad_base_board_design / BaseBoard Complexity 136 / 1000 (size 126, features 10) KESE features rounded, trapezoid or chamfered pads Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 8, 189, 0 Triangles, simulation 486,040 in 102 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 314 MB STEP 85 MB 337 MB STL 24 MB 304 MB OBJ 49 MB 376 MB Visual GLB 8.1 MB 316 MB OBJ 24 MB 312 MB

20.100 1.5V_switcher_test

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	1.1	4.3	0.4 ms	2.9	0.1	0.4	0.2	9.3
Simulation, STEP	0.2	1.1	3.9	0.6 ms	3.0	2.1	0.5	0.2	11.0
Simulation, STL	0.2	1.2	4.0	0.5 ms	2.9	0.3	0.5	0.3	9.3
Simulation, OBJ	0.2	1.1	3.8	0.5 ms	2.9	4.0	0.4	0.2	12.6
Visual, GLB	0.2	1.1	4.4	0.8 ms	5.4	63 ms	0.5	0.3	11.9
Visual, OBJ	0.2	1.1	4.2	0.7 ms	5.4	2.1	0.7	0.3	13.9

Board Repo: oresat/oresat-gps-hardware Board: 1.5V_switcher_test.kicad_pcb Folder MicroSemi_FPGA_Dev_Board / kicad_board_design / A3P250_Dev_Board Complexity 257 / 1000 (size 212, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 39, 266, 50 Triangles, simulation 851,012 in 105 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 28 MB 366 MB STEP 115 MB 435 MB STL 43 MB 345 MB OBJ 87 MB 594 MB Visual GLB 14 MB 403 MB OBJ 42 MB 396 MB

20.101 A3P250_Dev_Board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	2.2	8.2	0.6 ms	7.0	0.3	1.0	0.3	19.4
Simulation, STEP	0.3	2.1	8.2	0.4 ms	6.8	4.5	1.2	0.2	23.3
Simulation, STL	0.4	2.2	8.1	0.6 ms	6.8	0.7	1.0	0.3	19.4
Simulation, OBJ	0.3	2.3	8.3	0.4 ms	6.9	9.6	1.0	0.2	28.6
Visual, GLB	0.3	2.0	7.3	0.4 ms	13.9	0.1	1.4	0.3	25.2
Visual, OBJ	0.3	2.0	7.2	0.6 ms	13.9	4.3	1.6	0.3	29.8

Board Repo: oresat/oresat-gps-hardware Board: A3P250_Dev_Board.kicad_pcb Folder MicroSemi_FPGA_Dev_Board / kicad_board_design / A3P250_Dev_Board Complexity 282 / 1000 (size 237, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 to 10th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 53, 1,191, 123 Triangles, simulation 1,856,362 in 107 parts Verifier PASS in all six runs Run again Simulation, GLB; Simulation, STEP; Simulation, STL; Simulation, OBJ: failed in the corpus run, run again with fixes to KESE made after the corpus run, and passed

File type File size Peak memory used Simulation GLB 65 MB 577 MB STEP 301 MB 698 MB STL 93 MB 602 MB OBJ 197 MB 1.3 GB Visual GLB 34 MB 685 MB OBJ 103 MB 758 MB

20.102 switcher

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.1	0.6	0.1 ms	0.7	21 ms	79 ms	0.2	1.8
Simulation, STEP	97 ms	0.2	0.6	0.1 ms	0.7	0.9	66 ms	0.2	2.6
Simulation, STL	0.1	0.1	0.6	0.1 ms	0.8	27 ms	69 ms	0.2	1.9
Simulation, OBJ	0.1	0.2	0.6	0.1 ms	0.7	0.7	72 ms	0.2	2.5
Visual, GLB	0.1	0.1	0.6	0.1 ms	1.3	15 ms	0.1	0.2	2.5
Visual, OBJ	0.1	0.1	0.6	0.1 ms	1.3	0.5	95 ms	0.2	3.0

Board Repo: oresat/oresat-gps-hardware Board: switcher.kicad_pcb Folder MicroSemi_FPGA_Dev_Board / kicad_switcher_board / switcher Complexity 187 / 1000 (size 142, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 12, 133, 2 Triangles, simulation 112,630 in 21 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.0 MB 182 MB STEP 22 MB 197 MB STL 5.6 MB 186 MB OBJ 11 MB 185 MB Visual GLB 2.6 MB 156 MB OBJ 7.2 MB 157 MB

20.103 switcher_close

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.1	0.6	0.1 ms	0.6	20 ms	80 ms	0.2	1.8
Simulation, STEP	93 ms	0.1	0.6	0.1 ms	0.6	0.8	67 ms	0.2	2.4
Simulation, STL	87 ms	0.1	0.6	0.1 ms	0.6	28 ms	66 ms	0.2	1.7
Simulation, OBJ	89 ms	0.1	0.6	0.2 ms	0.6	0.6	71 ms	0.2	2.3
Visual, GLB	91 ms	0.1	0.6	0.1 ms	1.2	19 ms	0.1	0.2	2.4
Visual, OBJ	91 ms	0.1	0.6	0.1 ms	1.2	0.4	87 ms	0.2	2.7

Board Repo: oresat/oresat-gps-hardware Board: switcher_close.kicad_pcb Folder MicroSemi_FPGA_Dev_Board / kicad_switcher_board / switcher Complexity 185 / 1000 (size 140, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 12, 114, 2 Triangles, simulation 116,008 in 21 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.1 MB 190 MB STEP 22 MB 202 MB STL 5.8 MB 186 MB OBJ 11 MB 186 MB Visual GLB 2.7 MB 157 MB OBJ 7.4 MB 158 MB

20.104 oresat-gps-card

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.0	6.4	23.0	2 ms	23.7	0.8	1.9	0.3	58.2
Simulation, STEP	1.9	6.7	22.1	2 ms	23.8	12.7	2.3	0.4	69.8
Simulation, STL	1.9	6.5	22.9	2 ms	24.5	1.8	2.1	0.3	60.1
Simulation, OBJ	2.1	6.9	23.1	2 ms	24.0	24.1	2.0	0.4	82.6
Visual, GLB	2.2	6.9	23.7	3 ms	43.2	0.6	6.1	0.3	83.0
Visual, OBJ	1.9	6.6	23.6	2 ms	42.7	15.6	6.4	0.3	97.1

Board Repo: oresat/oresat-gps-hardware Board: oresat-gps-card.kicad_pcb Folder oresat-gps-card Complexity 438 / 1000 (size 293, features 145) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones, copper drawings, tracks bare of mask, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 215, 3,296, 767 Triangles, simulation 4,929,222 in 472 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 170 MB 1.5 GB STEP 723 MB 2.0 GB STL 247 MB 1.5 GB OBJ 535 MB 3.2 GB Visual GLB 112 MB 1.8 GB OBJ 357 MB 2.3 GB

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