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Corpus Testing 21

github-actions[bot] edited this page Nov 11, 2026 · 2 revisions

Corpus Page 21

Part 21 of 30 of Corpus Testing: boards 2,161 to 2,268, six runs each, one file format a run, as Corpus Testing describes.

2161. receive_Path

receive_Path: stages 4 and 6 take 52% to 80% of a run. Simulation, GLB takes 6.8 s. Simulation, STEP takes 7.8 s. Simulation, STL takes 6.7 s. Simulation, OBJ takes 10 s. Visual, GLB takes 8.0 s. Visual, OBJ takes 10 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.9 2.3 0.3 ms 2.8 0.1 0.3 0.2 6.8
Simulation, STEP 0.2 0.9 2.2 0.4 ms 2.6 1.4 0.3 0.2 7.8
Simulation, STL 0.2 0.8 2.3 0.3 ms 2.7 0.2 0.3 0.2 6.7
Simulation, OBJ 0.2 0.8 2.4 0.3 ms 3.0 3.4 0.3 0.2 10.3
Visual, GLB 0.2 0.8 2.3 0.3 ms 4.1 57 ms 0.4 0.2 8.0
Visual, OBJ 0.2 0.9 2.2 0.3 ms 4.1 1.9 0.5 0.2 10.0
Board Repo: oresat/oresat-dxwifi-hardware
Board: receive_Path.kicad_pcb
Folder rf-receive-test
Complexity 291 / 1000 (size 186, features 105)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 8 (20240108)
Parts, tracks, vias 34, 120, 317
Triangles, simulation 849,594 in 45 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 29 MB 448 MB
STEP 64 MB 523 MB
STL 42 MB 436 MB
OBJ 86 MB 625 MB
Visual
GLB 15 MB 451 MB
OBJ 47 MB 422 MB

2162. balun-eval-board

balun-eval-board: stages 4 and 6 take 50% to 74% of a run. Simulation, GLB takes 4.5 s. Simulation, STEP takes 5.4 s. Simulation, STL takes 4.6 s. Simulation, OBJ takes 8.9 s. Visual, GLB takes 7.1 s. Visual, OBJ takes 8.0 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.6 1.3 0.2 ms 2.0 67 ms 0.2 0.2 4.5
Simulation, STEP 0.1 0.7 1.4 0.2 ms 1.9 1.0 0.2 0.2 5.4
Simulation, STL 0.1 0.6 1.3 0.2 ms 2.1 0.1 0.2 0.2 4.6
Simulation, OBJ 0.2 0.8 2.0 0.2 ms 2.5 2.9 0.3 0.3 8.9
Visual, GLB 0.2 0.9 1.9 0.3 ms 3.3 46 ms 0.3 0.4 7.1
Visual, OBJ 0.2 0.9 1.9 0.3 ms 3.0 1.5 0.3 0.3 8.0
Board Repo: oresat/oresat-end-cards
Board: balun-eval-board.kicad_pcb
Folder dev-boards / BalUn-eval-board
Complexity 266 / 1000 (size 161, features 105)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 5, 14, 239
Triangles, simulation 450,516 in 18 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 15 MB 319 MB
STEP 19 MB 355 MB
STL 23 MB 327 MB
OBJ 45 MB 342 MB
Visual
GLB 8.2 MB 285 MB
OBJ 25 MB 291 MB

2163. esi-minusz-end-card

esi-minusz-end-card: stages 4 and 6 take 48% to 81% of a run. Simulation, GLB takes 21 s. Simulation, STEP takes 26 s. Simulation, STL takes 21 s. Simulation, OBJ takes 34 s. Visual, GLB takes 31 s. Visual, OBJ takes 39 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.6 2.4 8.2 0.6 ms 7.9 0.4 1.1 0.3 20.8
Simulation, STEP 0.6 2.4 8.3 0.8 ms 7.9 5.4 1.0 0.3 25.9
Simulation, STL 0.6 2.4 8.2 0.6 ms 7.7 0.7 1.0 0.3 20.9
Simulation, OBJ 0.7 2.5 8.5 1 ms 8.1 13.2 1.1 0.2 34.3
Visual, GLB 0.7 2.5 8.4 1.0 ms 16.6 0.2 2.2 0.3 31.0
Visual, OBJ 0.6 2.6 8.4 0.6 ms 16.9 7.8 2.2 0.3 38.8
Board Repo: oresat/oresat-end-cards
Board: esi-minusz-end-card.kicad_pcb
Folder esi-minusz-end-card
Complexity 385 / 1000 (size 205, features 180)
KESE features through vias, slotted holes,
custom pads, rounded,
trapezoid or chamfered pads,
drill offsets, arc tracks,
filled zones, copper drawings,
curved board outline,
tracks bare of mask, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 67, 674, 490
Triangles, simulation 2,180,030 in 89 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 74 MB 907 MB
STEP 258 MB 954 MB
STL 109 MB 882 MB
OBJ 229 MB 1.5 GB
Visual
GLB 44 MB 859 MB
OBJ 137 MB 982 MB

2164. esi-plusz-end-card

esi-plusz-end-card: stages 4 and 6 take 47% to 81% of a run. Simulation, GLB takes 15 s. Simulation, STEP takes 19 s. Simulation, STL takes 15 s. Simulation, OBJ takes 23 s. Visual, GLB takes 21 s. Visual, OBJ takes 26 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.7 1.7 5.7 0.5 ms 5.7 0.2 0.8 0.3 15.1
Simulation, STEP 0.8 1.6 5.7 0.5 ms 5.4 3.9 0.8 0.3 18.5
Simulation, STL 0.7 1.6 5.6 0.5 ms 5.4 0.5 0.7 0.3 14.8
Simulation, OBJ 0.7 1.6 5.5 0.5 ms 5.5 9.0 0.7 0.2 23.3
Visual, GLB 0.7 1.7 5.7 0.5 ms 11.1 0.1 1.2 0.3 20.7
Visual, OBJ 0.7 1.6 5.6 0.5 ms 11.2 5.5 1.3 0.2 26.2
Board Repo: oresat/oresat-end-cards
Board: esi-plusz-end-card.kicad_pcb
Folder esi-plusz-end-card
Complexity 321 / 1000 (size 196, features 125)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
drill offsets, filled zones,
copper drawings,
curved board outline, stack-up,
dielectric εr and tanδ,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 50, 692, 275
Triangles, simulation 1,500,644 in 78 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 50 MB 571 MB
STEP 192 MB 710 MB
STL 75 MB 595 MB
OBJ 155 MB 1.0 GB
Visual
GLB 32 MB 740 MB
OBJ 96 MB 716 MB

2165. plusz-end-card-with-turnstile

plusz-end-card-with-turnstile: stages 4 and 6 take 54% to 83% of a run. Simulation, GLB takes 15 s. Simulation, STEP takes 17 s. Simulation, STL takes 15 s. Simulation, OBJ takes 22 s. Visual, GLB takes 20 s. Visual, OBJ takes 25 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 1.8 5.7 0.8 ms 6.1 0.2 0.6 0.2 15.0
Simulation, STEP 0.3 1.7 5.7 0.7 ms 6.1 2.8 0.6 0.2 17.4
Simulation, STL 0.3 1.7 5.7 0.7 ms 6.2 0.5 0.7 0.2 15.3
Simulation, OBJ 0.3 1.7 5.7 1.0 ms 6.2 7.2 0.6 0.2 22.1
Visual, GLB 0.3 1.8 5.5 0.6 ms 11.2 0.1 1.1 0.2 20.2
Visual, OBJ 0.3 1.6 5.9 0.7 ms 11.3 4.3 1.2 0.2 24.8
Board Repo: oresat/oresat-end-cards
Board: plusz-end-card-with-turnstile.kicad_pcb
Folder oresat0-plusz-end-card / card
Complexity 313 / 1000 (size 193, features 120)
KESE features through vias, rounded,
trapezoid or chamfered pads,
drill offsets, arc tracks,
filled zones, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 27, 280, 513
Triangles, simulation 1,879,500 in 75 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 64 MB 721 MB
STEP 197 MB 838 MB
STL 94 MB 717 MB
OBJ 197 MB 1.3 GB
Visual
GLB 35 MB 786 MB
OBJ 108 MB 814 MB

2166. plusz-end-card-with-turnstile-mezzanine

Stages 4 and 6 take 54% to 80% of a run. Simulation, GLB takes 14 s. Simulation, STEP takes 16 s. Simulation, STL takes 14 s. Simulation, OBJ takes 20 s. Visual, GLB takes 15 s. Visual, OBJ takes 19 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 1.7 5.0 0.5 ms 5.8 0.2 0.4 0.3 13.7
Simulation, STEP 0.3 1.7 4.9 0.4 ms 6.1 2.1 0.4 0.3 15.7
Simulation, STL 0.2 1.7 4.9 0.4 ms 5.9 0.3 0.4 0.2 13.6
Simulation, OBJ 0.2 1.7 4.8 0.4 ms 5.9 6.6 0.4 0.3 19.9
Visual, GLB 0.2 1.7 5.0 0.4 ms 7.3 0.1 0.8 0.2 15.5
Visual, OBJ 0.2 1.7 4.9 0.5 ms 7.4 4.1 0.9 0.2 19.5
Board Repo: oresat/oresat-end-cards
Board: plusz-end-card-with-turnstile-mezzanine.kicad_pcb
Folder oresat0-plusz-end-card / mezzanine
Complexity 260 / 1000 (size 190, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
arc tracks, filled zones,
curved board outline
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 22, 143, 536
Triangles, simulation 1,165,586 in 37 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 37 MB 542 MB
STEP 75 MB 629 MB
STL 58 MB 580 MB
OBJ 116 MB 784 MB
Visual
GLB 23 MB 659 MB
OBJ 71 MB 605 MB

2167. oresat0.5-minusz-end-card

oresat0.5-minusz-end-card: stages 4 and 6 take 48% to 82% of a run. Simulation, GLB takes 12 s. Simulation, STEP takes 14 s. Simulation, STL takes 12 s. Simulation, OBJ takes 19 s. Visual, GLB takes 17 s. Visual, OBJ takes 21 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 1.5 4.4 0.2 ms 4.3 0.2 0.5 0.3 11.7
Simulation, STEP 0.5 1.3 4.5 0.2 ms 4.3 2.4 0.5 0.2 13.8
Simulation, STL 0.6 1.4 4.8 0.2 ms 4.2 0.4 0.5 0.3 12.1
Simulation, OBJ 0.5 1.4 4.6 0.2 ms 4.4 7.3 0.5 0.2 18.9
Visual, GLB 0.6 1.4 4.8 0.4 ms 9.2 0.1 0.7 0.2 17.1
Visual, OBJ 0.6 1.4 4.5 0.3 ms 9.5 4.2 0.6 0.2 21.1
Board Repo: oresat/oresat-end-cards
Board: oresat0.5-minusz-end-card.kicad_pcb
Folder oresat0.5-minusz-end-card
Complexity 335 / 1000 (size 175, features 160)
KESE features through vias, slotted holes,
custom pads, rounded,
trapezoid or chamfered pads,
drill offsets, arc tracks,
filled zones, copper drawings,
curved board outline, stack-up,
dielectric εr and tanδ,
copper finish
Tested 9th November 2026
Copper layers 4
File format KiCad 8 (20240108)
Parts, tracks, vias 10, 137, 350
Triangles, simulation 1,327,426 in 52 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 43 MB 577 MB
STEP 125 MB 638 MB
STL 66 MB 561 MB
OBJ 134 MB 925 MB
Visual
GLB 24 MB 604 MB
OBJ 73 MB 604 MB

2168. oresat0.5-pluz-end-card

oresat0.5-pluz-end-card: stages 4 and 6 take 47% to 82% of a run. Simulation, GLB takes 12 s. Simulation, STEP takes 15 s. Simulation, STL takes 12 s. Simulation, OBJ takes 20 s. Visual, GLB takes 17 s. Visual, OBJ takes 21 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.7 1.3 4.8 0.2 ms 4.3 0.2 0.5 0.2 12.2
Simulation, STEP 0.7 1.3 5.1 0.4 ms 4.5 2.6 0.6 0.2 15.0
Simulation, STL 0.7 1.2 4.6 0.4 ms 4.4 0.3 0.5 0.2 12.0
Simulation, OBJ 0.6 1.3 4.7 0.2 ms 4.4 7.7 0.6 0.2 19.6
Visual, GLB 0.6 1.2 4.8 0.2 ms 9.3 0.1 1.0 0.3 17.2
Visual, OBJ 0.7 1.4 4.8 0.5 ms 9.1 3.8 1.0 0.2 20.9
Board Repo: oresat/oresat-end-cards
Board: oresat0.5-pluz-end-card.kicad_pcb
Folder oresat0.5-plusz-end-card
Complexity 319 / 1000 (size 179, features 140)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
drill offsets, arc tracks,
filled zones, copper drawings,
curved board outline, stack-up,
dielectric εr and tanδ,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 8 (20240108)
Parts, tracks, vias 14, 190, 328
Triangles, simulation 1,392,812 in 52 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 46 MB 595 MB
STEP 150 MB 626 MB
STL 70 MB 615 MB
OBJ 142 MB 942 MB
Visual
GLB 26 MB 621 MB
OBJ 78 MB 606 MB

2169. oresat1-minusz-end-card

oresat1-minusz-end-card: stages 4 and 6 take 48% to 82% of a run. Simulation, GLB takes 20 s. Simulation, STEP takes 25 s. Simulation, STL takes 21 s. Simulation, OBJ takes 32 s. Visual, GLB takes 29 s. Visual, OBJ takes 35 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.6 2.4 8.1 0.3 ms 7.5 0.3 1.0 0.3 20.2
Simulation, STEP 0.7 2.4 7.9 0.6 ms 7.6 4.8 1.0 0.3 24.7
Simulation, STL 0.7 2.4 7.9 0.3 ms 7.5 0.9 1.1 0.3 20.7
Simulation, OBJ 0.7 2.4 8.1 0.3 ms 7.4 12.2 1.0 0.3 32.1
Visual, GLB 0.7 2.5 8.2 0.5 ms 15.8 0.2 1.7 0.3 29.3
Visual, OBJ 0.7 2.4 8.0 0.4 ms 15.2 7.1 1.8 0.3 35.4
Board Repo: oresat/oresat-end-cards
Board: oresat1-minusz-end-card.kicad_pcb
Folder oresat1-minusz-end-card
Complexity 394 / 1000 (size 204, features 190)
KESE features through vias, slotted holes,
custom pads, rounded,
trapezoid or chamfered pads,
drill offsets, arc tracks,
filled zones, copper drawings,
copper text, curved board outline,
tracks bare of mask, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 65, 682, 477
Triangles, simulation 2,062,236 in 87 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 70 MB 785 MB
STEP 235 MB 933 MB
STL 103 MB 746 MB
OBJ 216 MB 1.4 GB
Visual
GLB 42 MB 843 MB
OBJ 130 MB 973 MB

2170. oresat1-plusz-end-card

oresat1-plusz-end-card: stages 4 and 6 take 50% to 81% of a run. Simulation, GLB takes 22 s. Simulation, STEP takes 28 s. Simulation, STL takes 23 s. Simulation, OBJ takes 36 s. Visual, GLB takes 31 s. Visual, OBJ takes 40 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.2 2.4 9.6 0.3 ms 7.7 0.3 0.9 0.3 22.4
Simulation, STEP 1.1 2.5 9.7 0.3 ms 7.8 5.5 0.9 0.2 27.8
Simulation, STL 1.1 2.6 9.6 0.5 ms 7.7 0.8 1.0 0.3 23.1
Simulation, OBJ 1.2 2.6 9.9 0.3 ms 8.1 13.4 1.0 0.3 36.3
Visual, GLB 1.2 2.4 9.6 0.4 ms 15.9 0.2 1.9 0.3 31.5
Visual, OBJ 1.1 2.5 10.0 0.6 ms 16.1 8.0 2.1 0.3 40.2
Board Repo: oresat/oresat-end-cards
Board: oresat1-plusz-end-card.kicad_pcb
Folder oresat1-plusz-end-card
Complexity 375 / 1000 (size 205, features 170)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
drill offsets, arc tracks,
filled zones, copper drawings,
curved board outline,
tracks bare of mask, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 74, 731, 445
Triangles, simulation 2,233,472 in 89 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 76 MB 866 MB
STEP 280 MB 959 MB
STL 112 MB 849 MB
OBJ 236 MB 1.5 GB
Visual
GLB 45 MB 892 MB
OBJ 141 MB 1.1 GB

2171. esi-minusZ-end-cap

esi-minusZ-end-cap: stages 4 and 6 take 47% to 81% of a run. Simulation, GLB takes 8.0 s. Simulation, STEP takes 9.9 s. Simulation, STL takes 8.2 s. Simulation, OBJ takes 13 s. Visual, GLB takes 11 s. Visual, OBJ takes 14 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.8 3.2 0.3 ms 2.9 0.1 0.4 0.2 8.0
Simulation, STEP 0.3 0.8 3.0 0.3 ms 2.9 2.3 0.4 0.2 9.9
Simulation, STL 0.3 0.9 3.0 0.3 ms 3.0 0.3 0.4 0.2 8.2
Simulation, OBJ 0.3 0.8 3.0 0.3 ms 2.9 4.9 0.4 0.2 12.7
Visual, GLB 0.3 0.9 2.9 0.3 ms 5.8 76 ms 0.5 0.2 10.7
Visual, OBJ 0.3 0.8 3.1 0.2 ms 6.1 2.7 0.5 0.2 13.7
Board Repo: oresat/oresat-endcaps
Board: esi-minusZ-end-cap.kicad_pcb
Folder esi-minusz-end-cap
Complexity 289 / 1000 (size 184, features 105)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 33, 287, 220
Triangles, simulation 906,706 in 55 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 31 MB 498 MB
STEP 103 MB 509 MB
STL 45 MB 450 MB
OBJ 93 MB 657 MB
Visual
GLB 17 MB 468 MB
OBJ 52 MB 446 MB

2172. esi-plusz-end-cap

esi-plusz-end-cap: stages 4 and 6 take 47% to 79% of a run. Simulation, GLB takes 7.3 s. Simulation, STEP takes 9.4 s. Simulation, STL takes 7.5 s. Simulation, OBJ takes 12 s. Visual, GLB takes 11 s. Visual, OBJ takes 14 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 0.7 2.7 0.2 ms 2.6 0.1 0.4 0.2 7.3
Simulation, STEP 0.5 0.8 2.5 0.3 ms 2.8 2.3 0.4 0.3 9.4
Simulation, STL 0.4 0.8 2.7 0.3 ms 2.7 0.2 0.4 0.3 7.5
Simulation, OBJ 0.5 0.7 2.7 0.2 ms 2.8 4.3 0.4 0.3 11.6
Visual, GLB 0.5 0.8 2.8 0.4 ms 6.1 79 ms 0.8 0.3 11.3
Visual, OBJ 0.5 0.8 2.9 0.3 ms 6.1 2.6 0.9 0.3 14.2
Board Repo: oresat/oresat-endcaps
Board: esi-plusz-end-cap.kicad_pcb
Folder esi-plusz-end-cap
Complexity 285 / 1000 (size 180, features 105)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 34, 273, 146
Triangles, simulation 829,900 in 56 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 28 MB 439 MB
STEP 105 MB 450 MB
STL 41 MB 443 MB
OBJ 85 MB 611 MB
Visual
GLB 17 MB 480 MB
OBJ 53 MB 447 MB

2173. oresat0-plusz-end-cap

oresat0-plusz-end-cap: stages 4 and 6 take 52% to 82% of a run. Simulation, GLB takes 6.4 s. Simulation, STEP takes 8.1 s. Simulation, STL takes 6.5 s. Simulation, OBJ takes 9.3 s. Visual, GLB takes 9.1 s. Visual, OBJ takes 11 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.7 2.9 0.2 ms 1.9 89 ms 0.3 0.2 6.4
Simulation, STEP 0.3 0.8 2.8 0.2 ms 2.0 1.6 0.3 0.3 8.1
Simulation, STL 0.3 0.7 2.8 0.1 ms 1.9 0.1 0.3 0.2 6.5
Simulation, OBJ 0.3 0.7 2.9 0.2 ms 1.9 3.0 0.3 0.2 9.3
Visual, GLB 0.3 0.7 2.9 0.2 ms 4.5 60 ms 0.4 0.2 9.1
Visual, OBJ 0.3 0.7 2.8 0.2 ms 4.4 2.1 0.5 0.2 11.1
Board Repo: oresat/oresat-endcaps
Board: oresat0-plusz-end-cap.kicad_pcb
Folder oresat0-plusz-end-cap / kicad
Complexity 268 / 1000 (size 163, features 105)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 2
File format KiCad 8 (20240108)
Parts, tracks, vias 25, 242, 209
Triangles, simulation 598,388 in 30 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 21 MB 339 MB
STEP 87 MB 390 MB
STL 30 MB 359 MB
OBJ 62 MB 462 MB
Visual
GLB 15 MB 385 MB
OBJ 45 MB 388 MB

2174. oresat0.5-minusz-end-cap

oresat0.5-minusz-end-cap: stages 4 and 6 take 57% to 82% of a run. Simulation, GLB takes 7.1 s. Simulation, STEP takes 8.5 s. Simulation, STL takes 7.1 s. Simulation, OBJ takes 9.5 s. Visual, GLB takes 9.9 s. Visual, OBJ takes 12 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.7 3.4 0.3 ms 2.1 97 ms 0.3 0.3 7.1
Simulation, STEP 0.2 0.7 3.0 0.4 ms 2.1 1.8 0.3 0.2 8.5
Simulation, STL 0.2 0.8 3.2 0.3 ms 2.1 0.2 0.3 0.3 7.1
Simulation, OBJ 0.2 0.7 3.3 0.6 ms 2.1 2.7 0.3 0.2 9.5
Visual, GLB 0.2 0.7 3.3 0.4 ms 4.8 66 ms 0.5 0.2 9.9
Visual, OBJ 0.2 0.8 3.1 0.4 ms 4.8 2.3 0.7 0.2 12.2
Board Repo: oresat/oresat-endcaps
Board: oresat0.5-minusz-end-cap.kicad_pcb
Folder oresat0.5-minusz-end-cap
Complexity 271 / 1000 (size 166, features 105)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 2
File format KiCad 8 (20240108)
Parts, tracks, vias 26, 249, 267
Triangles, simulation 651,044 in 51 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 23 MB 383 MB
STEP 86 MB 414 MB
STL 33 MB 398 MB
OBJ 66 MB 478 MB
Visual
GLB 17 MB 414 MB
OBJ 51 MB 427 MB

2175. oresat0.5-plusz-end-cap

oresat0.5-plusz-end-cap: stages 4 and 6 take 55% to 83% of a run. Simulation, GLB takes 7.1 s. Simulation, STEP takes 8.6 s. Simulation, STL takes 7.2 s. Simulation, OBJ takes 10 s. Visual, GLB takes 11 s. Visual, OBJ takes 13 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.7 3.4 0.4 ms 2.1 90 ms 0.3 0.2 7.1
Simulation, STEP 0.2 0.6 3.3 0.2 ms 2.1 1.7 0.4 0.2 8.6
Simulation, STL 0.2 0.7 3.4 0.3 ms 2.2 0.2 0.4 0.2 7.2
Simulation, OBJ 0.2 0.7 3.5 0.6 ms 2.1 3.0 0.4 0.3 10.2
Visual, GLB 0.2 0.7 3.4 0.4 ms 5.4 68 ms 0.7 0.2 10.7
Visual, OBJ 0.2 0.6 3.4 0.4 ms 5.3 2.2 0.6 0.3 12.6
Board Repo: oresat/oresat-endcaps
Board: oresat0.5-plusz-end-cap.kicad_pcb
Folder oresat0.5-plusz-end-cap
Complexity 269 / 1000 (size 164, features 105)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 27, 254, 215
Triangles, simulation 616,052 in 48 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 22 MB 352 MB
STEP 90 MB 388 MB
STL 31 MB 378 MB
OBJ 63 MB 463 MB
Visual
GLB 16 MB 395 MB
OBJ 49 MB 406 MB

2176. oresat1-minusZ-end-cap

oresat1-minusZ-end-cap: stages 4 and 6 take 50% to 80% of a run. Simulation, GLB takes 8.3 s. Simulation, STEP takes 10 s. Simulation, STL takes 8.5 s. Simulation, OBJ takes 13 s. Visual, GLB takes 12 s. Visual, OBJ takes 15 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.9 3.1 0.4 ms 3.0 0.1 0.5 0.2 8.3
Simulation, STEP 0.3 1.1 2.9 0.3 ms 3.0 2.3 0.5 0.3 10.5
Simulation, STL 0.3 0.9 3.1 0.2 ms 3.2 0.3 0.5 0.3 8.5
Simulation, OBJ 0.3 0.8 3.0 0.3 ms 3.3 4.6 0.5 0.2 12.7
Visual, GLB 0.4 1.0 3.4 0.3 ms 6.5 92 ms 0.8 0.2 12.4
Visual, OBJ 0.4 0.9 3.3 0.3 ms 6.4 3.1 0.8 0.3 15.1
Board Repo: oresat/oresat-endcaps
Board: oresat1-minusZ-end-cap.kicad_pcb
Folder oresat1-minusz-end-cap
Complexity 291 / 1000 (size 186, features 105)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 41, 260, 228
Triangles, simulation 984,700 in 60 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 33 MB 500 MB
STEP 113 MB 545 MB
STL 49 MB 494 MB
OBJ 100 MB 681 MB
Visual
GLB 21 MB 524 MB
OBJ 63 MB 543 MB

2177. oresat1-plusz-end-cap

oresat1-plusz-end-cap: stages 4 and 6 take 47% to 81% of a run. Simulation, GLB takes 10 s. Simulation, STEP takes 12 s. Simulation, STL takes 9.7 s. Simulation, OBJ takes 15 s. Visual, GLB takes 13 s. Visual, OBJ takes 17 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 1.1 3.9 0.4 ms 3.5 0.2 0.6 0.3 10.1
Simulation, STEP 0.5 1.0 3.5 0.3 ms 3.4 2.4 0.6 0.2 11.7
Simulation, STL 0.5 1.0 3.7 0.4 ms 3.4 0.3 0.6 0.3 9.7
Simulation, OBJ 0.6 1.0 3.7 0.4 ms 3.5 5.7 0.6 0.2 15.2
Visual, GLB 0.5 1.0 3.5 0.4 ms 7.4 0.1 0.7 0.3 13.5
Visual, OBJ 0.5 1.0 3.7 0.5 ms 7.4 3.6 0.8 0.2 17.2
Board Repo: oresat/oresat-endcaps
Board: oresat1-plusz-end-cap.kicad_pcb
Folder oresat1-plusz-end-cap
Complexity 293 / 1000 (size 188, features 105)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 42, 302, 240
Triangles, simulation 1,070,180 in 60 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 36 MB 520 MB
STEP 124 MB 538 MB
STL 54 MB 518 MB
OBJ 109 MB 735 MB
Visual
GLB 22 MB 549 MB
OBJ 69 MB 542 MB

2178. backplane-debug

backplane-debug: stages 4 and 6 take 48% to 80% of a run. Simulation, GLB takes 2.3 s. Simulation, STEP takes 3.2 s. Simulation, STL takes 2.2 s. Simulation, OBJ takes 3.2 s. Visual, GLB takes 3.5 s. Visual, OBJ takes 4.0 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.2 0.8 0.1 ms 0.9 35 ms 0.1 0.2 2.3
Simulation, STEP 0.1 0.2 0.8 0.2 ms 0.8 1.0 0.1 0.2 3.2
Simulation, STL 0.1 0.2 0.8 0.1 ms 0.7 39 ms 98 ms 0.2 2.2
Simulation, OBJ 0.1 0.2 0.8 0.2 ms 0.8 1.0 0.1 0.2 3.2
Visual, GLB 0.1 0.2 0.8 0.2 ms 2.0 26 ms 0.2 0.2 3.5
Visual, OBJ 98 ms 0.2 0.8 0.2 ms 1.9 0.8 0.1 0.2 4.0
Board Repo: oresat/oresat-flatsat
Board: backplane-debug.kicad_pcb
Folder backplane-debug-board
Complexity 206 / 1000 (size 111, features 95)
KESE features through vias, rounded,
trapezoid or chamfered pads,
arc tracks, filled zones, stack-up,
dielectric εr and tanδ,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 2
File format KiCad 6 (20211014)
Parts, tracks, vias 3, 76, 16
Triangles, simulation 213,296 in 24 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 7.5 MB 212 MB
STEP 41 MB 240 MB
STL 11 MB 228 MB
OBJ 21 MB 232 MB
Visual
GLB 5.6 MB 210 MB
OBJ 16 MB 211 MB

2179. backplane-debug-breakout

backplane-debug-breakout: stages 4 and 6 take 51% to 78% of a run. Simulation, GLB takes 6.3 s. Simulation, STEP takes 6.8 s. Simulation, STL takes 5.0 s. Simulation, OBJ takes 7.1 s. Visual, GLB takes 6.4 s. Visual, OBJ takes 8.5 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.4 0.6 2.4 0.5 ms 2.2 75 ms 0.4 0.3 6.3
Simulation, STEP 0.4 0.5 2.2 0.4 ms 1.6 1.5 0.2 0.3 6.8
Simulation, STL 0.3 0.5 1.8 0.2 ms 1.7 0.1 0.3 0.2 5.0
Simulation, OBJ 0.3 0.4 1.9 0.4 ms 1.7 2.3 0.3 0.2 7.1
Visual, GLB 0.3 0.4 1.7 0.3 ms 3.3 50 ms 0.3 0.2 6.4
Visual, OBJ 0.3 0.4 1.8 0.3 ms 3.3 2.0 0.5 0.2 8.5
Board Repo: oresat/oresat-flatsat
Board: backplane-debug-breakout.kicad_pcb
Folder backplane-debug-breakout
Complexity 240 / 1000 (size 135, features 105)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 2
File format KiCad 8 (20240108)
Parts, tracks, vias 15, 97, 39
Triangles, simulation 433,812 in 41 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 15 MB 279 MB
STEP 71 MB 332 MB
STL 22 MB 291 MB
OBJ 44 MB 358 MB
Visual
GLB 11 MB 326 MB
OBJ 32 MB 323 MB

2180. c3-proxy

c3-proxy: stages 4 and 6 take 49% to 82% of a run. Simulation, GLB takes 14 s. Simulation, STEP takes 18 s. Simulation, STL takes 15 s. Simulation, OBJ takes 23 s. Visual, GLB takes 21 s. Visual, OBJ takes 26 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 1.5 5.2 0.9 ms 5.6 0.3 0.7 0.3 14.1
Simulation, STEP 0.6 1.6 5.3 0.6 ms 5.9 3.9 0.7 0.3 18.2
Simulation, STL 0.5 1.7 5.1 0.7 ms 5.7 0.5 0.8 0.2 14.6
Simulation, OBJ 0.6 1.6 5.5 0.7 ms 5.7 8.3 0.8 0.2 22.6
Visual, GLB 0.5 1.7 5.5 0.8 ms 12.1 0.2 1.3 0.2 21.4
Visual, OBJ 0.6 1.6 5.2 0.5 ms 11.9 5.2 1.6 0.2 26.3
Board Repo: oresat/oresat-flatsat
Board: c3-proxy.kicad_pcb
Folder c3-proxy
Complexity 329 / 1000 (size 199, features 130)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
drill offsets, filled zones,
TrueType text, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 64, 706, 265
Triangles, simulation 1,736,256 in 93 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 59 MB 665 MB
STEP 243 MB 805 MB
STL 87 MB 672 MB
OBJ 182 MB 1.2 GB
Visual
GLB 38 MB 912 MB
OBJ 115 MB 881 MB

2181. oresat-c3-surrogate

oresat-c3-surrogate: stages 4 and 6 take 56% to 81% of a run. Simulation, GLB takes 12 s. Simulation, STEP takes 15 s. Simulation, STL takes 12 s. Simulation, OBJ takes 17 s. Visual, GLB takes 18 s. Visual, OBJ takes 21 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 1.4 5.5 0.7 ms 4.0 0.2 0.6 0.3 12.3
Simulation, STEP 0.3 1.3 5.6 0.7 ms 4.2 3.0 0.6 0.3 15.2
Simulation, STL 0.3 1.3 5.5 0.6 ms 3.8 0.4 0.6 0.3 12.4
Simulation, OBJ 0.3 1.3 5.6 0.7 ms 3.9 5.2 0.5 0.2 17.1
Visual, GLB 0.3 1.3 5.4 0.8 ms 9.0 0.1 1.4 0.3 17.8
Visual, OBJ 0.3 1.3 5.4 0.8 ms 8.8 3.8 1.4 0.3 21.3
Board Repo: oresat/oresat-flatsat
Board: oresat-c3-surrogate.kicad_pcb
Folder c3-surrogate-card
Complexity 272 / 1000 (size 167, features 105)
KESE features through vias, rounded,
trapezoid or chamfered pads,
drill offsets, filled zones,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 37, 318, 185
Triangles, simulation 1,085,502 in 79 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 37 MB 462 MB
STEP 152 MB 572 MB
STL 54 MB 492 MB
OBJ 110 MB 742 MB
Visual
GLB 26 MB 628 MB
OBJ 80 MB 636 MB

2182. c3s-card-adapter

c3s-card-adapter: stages 4 and 6 take 54% to 78% of a run. Simulation, GLB takes 4.1 s. Simulation, STEP takes 5.4 s. Simulation, STL takes 4.1 s. Simulation, OBJ takes 5.5 s. Visual, GLB takes 5.7 s. Visual, OBJ takes 6.8 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.4 1.4 0.2 ms 1.6 65 ms 0.3 0.2 4.1
Simulation, STEP 0.1 0.4 1.5 0.3 ms 1.6 1.4 0.3 0.2 5.4
Simulation, STL 0.1 0.4 1.4 0.3 ms 1.6 69 ms 0.3 0.3 4.1
Simulation, OBJ 0.1 0.4 1.4 0.3 ms 1.6 1.5 0.3 0.2 5.5
Visual, GLB 0.2 0.4 1.5 0.3 ms 3.0 55 ms 0.4 0.2 5.7
Visual, OBJ 0.1 0.4 1.5 0.2 ms 3.0 1.3 0.4 0.2 6.8
Board Repo: oresat/oresat-flatsat
Board: c3s-card-adapter.kicad_pcb
Folder c3s-card-adapter
Complexity 225 / 1000 (size 130, features 95)
KESE features through vias, filled zones,
curved board outline, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 2, 213, 88
Triangles, simulation 289,626 in 53 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 9.6 MB 251 MB
STEP 46 MB 278 MB
STL 14 MB 247 MB
OBJ 29 MB 246 MB
Visual
GLB 8.4 MB 406 MB
OBJ 26 MB 406 MB

2183. card-debug-board-2

card-debug-board-2: stages 4 and 6 take 52% to 80% of a run. Simulation, GLB takes 5.2 s. Simulation, STEP takes 6.6 s. Simulation, STL takes 5.9 s. Simulation, OBJ takes 7.6 s. Visual, GLB takes 7.4 s. Visual, OBJ takes 8.5 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.5 2.0 0.3 ms 1.8 71 ms 0.3 0.2 5.2
Simulation, STEP 0.2 0.6 2.1 0.3 ms 1.8 1.5 0.2 0.2 6.6
Simulation, STL 0.2 0.5 2.5 0.3 ms 2.0 0.1 0.3 0.2 5.9
Simulation, OBJ 0.2 0.5 2.2 0.2 ms 1.8 2.4 0.3 0.2 7.6
Visual, GLB 0.2 0.5 2.2 0.5 ms 3.7 54 ms 0.5 0.2 7.4
Visual, OBJ 0.2 0.5 1.8 0.3 ms 3.3 1.9 0.5 0.2 8.5
Board Repo: oresat/oresat-flatsat
Board: card-debug-board-2.kicad_pcb
Folder card-debug-board-2
Complexity 234 / 1000 (size 144, features 90)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ,
copper finish
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 16, 198, 55
Triangles, simulation 428,828 in 58 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 15 MB 277 MB
STEP 70 MB 335 MB
STL 21 MB 279 MB
OBJ 43 MB 348 MB
Visual
GLB 12 MB 334 MB
OBJ 34 MB 330 MB

2184. card-debug-board-3

card-debug-board-3: stages 4 and 6 take 52% to 81% of a run. Simulation, GLB takes 14 s. Simulation, STEP takes 18 s. Simulation, STL takes 15 s. Simulation, OBJ takes 22 s. Visual, GLB takes 20 s. Visual, OBJ takes 25 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 1.6 4.9 0.7 ms 5.8 0.3 0.7 0.2 14.0
Simulation, STEP 0.5 1.5 5.2 0.5 ms 5.6 4.2 0.7 0.3 18.0
Simulation, STL 0.4 1.5 5.3 0.6 ms 5.9 0.5 0.7 0.3 14.6
Simulation, OBJ 0.5 1.5 5.4 0.6 ms 5.9 7.4 0.8 0.2 21.8
Visual, GLB 0.5 1.5 5.3 0.8 ms 11.1 0.1 1.3 0.2 20.1
Visual, OBJ 0.6 1.6 5.3 0.7 ms 11.2 4.9 1.5 0.3 25.3
Board Repo: oresat/oresat-flatsat
Board: card-debug-board-3.kicad_pcb
Folder card-debug-board-3
Complexity 354 / 1000 (size 239, features 115)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 78, 599, 249
Triangles, simulation 1,544,806 in 114 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 52 MB 591 MB
STEP 208 MB 740 MB
STL 77 MB 595 MB
OBJ 160 MB 1.0 GB
Visual
GLB 34 MB 686 MB
OBJ 104 MB 779 MB

2185. flatsat-breakout-main

flatsat-breakout-main: stages 4 and 6 take 49% to 81% of a run. Simulation, GLB takes 12 s. Simulation, STEP takes 14 s. Simulation, STL takes 12 s. Simulation, OBJ takes 19 s. Visual, GLB takes 15 s. Visual, OBJ takes 19 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 1.3 4.7 0.5 ms 4.3 0.2 0.7 0.3 11.7
Simulation, STEP 0.3 1.2 4.5 0.4 ms 4.4 2.7 0.7 0.3 14.0
Simulation, STL 0.3 1.3 4.8 0.4 ms 4.6 0.4 0.7 0.3 12.4
Simulation, OBJ 0.3 1.4 5.2 0.5 ms 4.3 7.4 0.7 0.2 19.5
Visual, GLB 0.3 1.2 4.7 0.5 ms 7.2 0.1 1.1 0.2 14.8
Visual, OBJ 0.3 1.4 5.1 0.5 ms 7.1 4.0 1.0 0.3 19.2
Board Repo: oresat/oresat-flatsat
Board: flatsat-breakout-main.kicad_pcb
Folder flatsat-breakout
Complexity 269 / 1000 (size 164, features 105)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 9 (20241229)
Parts, tracks, vias 5, 380, 162
Triangles, simulation 1,354,072 in 34 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 46 MB 512 MB
STEP 140 MB 607 MB
STL 68 MB 494 MB
OBJ 140 MB 914 MB
Visual
GLB 23 MB 551 MB
OBJ 70 MB 599 MB

2186. oresat-flatsat-interface

oresat-flatsat-interface: stages 4 and 6 take 54% to 84% of a run. Simulation, GLB takes 11 s. Simulation, STEP takes 13 s. Simulation, STL takes 11 s. Simulation, OBJ takes 16 s. Visual, GLB takes 14 s. Visual, OBJ takes 17 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 1.0 5.2 0.3 ms 3.4 0.1 0.5 0.2 10.7
Simulation, STEP 0.2 1.0 5.3 0.4 ms 3.6 2.4 0.4 0.2 13.1
Simulation, STL 0.2 1.0 5.1 0.4 ms 3.6 0.3 0.5 0.2 11.0
Simulation, OBJ 0.2 1.0 5.1 0.5 ms 3.5 5.4 0.5 0.2 15.8
Visual, GLB 0.2 1.0 5.0 0.7 ms 6.9 91 ms 0.7 0.2 14.0
Visual, OBJ 0.2 1.0 4.9 0.3 ms 6.8 3.2 0.7 0.2 17.1
Board Repo: oresat/oresat-flatsat
Board: oresat-flatsat-interface.kicad_pcb
Folder flatsat-to-oresat-jumper-card
Complexity 289 / 1000 (size 159, features 130)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
drill offsets, arc tracks,
filled zones, copper drawings,
stack-up, dielectric εr and tanδ,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 2
File format KiCad 7 (20221018)
Parts, tracks, vias 11, 267, 291
Triangles, simulation 1,034,332 in 60 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 35 MB 491 MB
STEP 126 MB 534 MB
STL 52 MB 476 MB
OBJ 105 MB 736 MB
Visual
GLB 21 MB 561 MB
OBJ 64 MB 556 MB

2187. swd-to-card-debug-3

swd-to-card-debug-3: stages 4 and 6 take 52% to 76% of a run. Simulation, GLB takes 3.6 s. Simulation, STEP takes 4.7 s. Simulation, STL takes 3.8 s. Simulation, OBJ takes 5.3 s. Visual, GLB takes 5.3 s. Visual, OBJ takes 6.1 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.4 1.3 0.3 ms 1.3 50 ms 0.2 0.2 3.6
Simulation, STEP 0.1 0.4 1.3 0.3 ms 1.2 1.3 0.2 0.2 4.7
Simulation, STL 0.2 0.4 1.4 0.3 ms 1.4 0.1 0.2 0.2 3.8
Simulation, OBJ 0.1 0.4 1.4 0.4 ms 1.3 1.6 0.2 0.2 5.3
Visual, GLB 0.1 0.4 1.3 0.3 ms 2.8 43 ms 0.5 0.2 5.3
Visual, OBJ 0.1 0.4 1.4 0.3 ms 2.4 1.2 0.3 0.2 6.1
Board Repo: oresat/oresat-flatsat
Board: swd-to-card-debug-3.kicad_pcb
Folder swd-to-card-debug-3
Complexity 263 / 1000 (size 148, features 115)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 14, 184, 103
Triangles, simulation 405,560 in 39 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 14 MB 272 MB
STEP 57 MB 321 MB
STL 20 MB 272 MB
OBJ 41 MB 331 MB
Visual
GLB 11 MB 314 MB
OBJ 32 MB 314 MB

2188. usb_gps

usb_gps: stages 4 and 6 take 55% to 83% of a run. Simulation, GLB takes 18 s. Simulation, STEP takes 21 s. Simulation, STL takes 18 s. Simulation, OBJ takes 25 s. Visual, GLB takes 23 s. Visual, OBJ takes 29 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.4 1.8 8.2 0.9 ms 6.6 0.3 0.8 0.3 18.4
Simulation, STEP 0.4 1.9 7.1 0.8 ms 6.8 3.5 0.8 0.3 20.9
Simulation, STL 0.4 1.9 7.7 0.7 ms 6.3 0.6 0.8 0.3 17.9
Simulation, OBJ 0.4 1.8 7.5 0.6 ms 6.1 8.0 0.7 0.3 24.7
Visual, GLB 0.5 1.7 7.4 0.6 ms 11.9 0.2 1.4 0.3 23.3
Visual, OBJ 0.4 1.9 8.0 0.8 ms 12.4 4.8 1.6 0.3 29.5
Board Repo: oresat/oresat-gps-hardware
Board: usb_gps.kicad_pcb
Folder GPS-USB_Front_End_Board / kicad_board_design
Complexity 284 / 1000 (size 239, features 45)
KESE features through vias, slotted holes,
filled zones
Tested 9th November 2026
Copper layers 4
File format KiCad 4 (4)
Parts, tracks, vias 91, 888, 119
Triangles, simulation 1,683,098 in 118 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 58 MB 742 MB
STEP 200 MB 777 MB
STL 84 MB 714 MB
OBJ 176 MB 1.1 GB
Visual
GLB 34 MB 721 MB
OBJ 101 MB 788 MB

2189. BaseBoard

BaseBoard: stages 4 and 6 take 56% to 82% of a run. Simulation, GLB takes 4.7 s. Simulation, STEP takes 6.1 s. Simulation, STL takes 4.6 s. Simulation, OBJ takes 6.6 s. Visual, GLB takes 6.0 s. Visual, OBJ takes 7.1 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 95 ms 0.4 2.4 0.3 ms 1.4 81 ms 0.2 0.2 4.7
Simulation, STEP 0.1 0.4 2.3 0.4 ms 1.4 1.5 0.2 0.2 6.1
Simulation, STL 94 ms 0.4 2.3 0.3 ms 1.4 0.1 0.2 0.2 4.6
Simulation, OBJ 94 ms 0.4 2.4 0.3 ms 1.3 2.1 0.2 0.2 6.6
Visual, GLB 99 ms 0.4 2.3 0.4 ms 2.7 33 ms 0.4 0.2 6.0
Visual, OBJ 0.1 0.4 2.3 0.4 ms 2.8 1.0 0.2 0.2 7.1
Board Repo: oresat/oresat-gps-hardware
Board: BaseBoard.kicad_pcb
Folder MicroSemi_FPGA_Dev_Board / kicad_base_board_design / BaseBoard
Complexity 136 / 1000 (size 126, features 10)
KESE features rounded,
trapezoid or chamfered pads
Tested 9th November 2026
Copper layers 2
File format KiCad 5 (20171130)
Parts, tracks, vias 8, 189, 0
Triangles, simulation 486,040 in 102 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 17 MB 314 MB
STEP 85 MB 337 MB
STL 24 MB 304 MB
OBJ 49 MB 376 MB
Visual
GLB 8.1 MB 316 MB
OBJ 24 MB 312 MB

2190. 1.5V_switcher_test

1.5V_switcher_test: stages 4 and 6 take 53% to 82% of a run. Simulation, GLB takes 9.3 s. Simulation, STEP takes 11 s. Simulation, STL takes 9.3 s. Simulation, OBJ takes 13 s. Visual, GLB takes 12 s. Visual, OBJ takes 14 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 1.1 4.3 0.4 ms 2.9 0.1 0.4 0.2 9.3
Simulation, STEP 0.2 1.1 3.9 0.6 ms 3.0 2.1 0.5 0.2 11.0
Simulation, STL 0.2 1.2 4.0 0.5 ms 2.9 0.3 0.5 0.3 9.3
Simulation, OBJ 0.2 1.1 3.8 0.5 ms 2.9 4.0 0.4 0.2 12.6
Visual, GLB 0.2 1.1 4.4 0.8 ms 5.4 63 ms 0.5 0.3 11.9
Visual, OBJ 0.2 1.1 4.2 0.7 ms 5.4 2.1 0.7 0.3 13.9
Board Repo: oresat/oresat-gps-hardware
Board: 1.5V_switcher_test.kicad_pcb
Folder MicroSemi_FPGA_Dev_Board / kicad_board_design / A3P250_Dev_Board
Complexity 257 / 1000 (size 212, features 45)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones
Tested 9th November 2026
Copper layers 4
File format KiCad 5 (20171130)
Parts, tracks, vias 39, 266, 50
Triangles, simulation 851,012 in 105 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 28 MB 366 MB
STEP 115 MB 435 MB
STL 43 MB 345 MB
OBJ 87 MB 594 MB
Visual
GLB 14 MB 403 MB
OBJ 42 MB 396 MB

2191. A3P250_Dev_Board

A3P250_Dev_Board: stages 4 and 6 take 53% to 84% of a run. Simulation, GLB takes 19 s. Simulation, STEP takes 23 s. Simulation, STL takes 19 s. Simulation, OBJ takes 29 s. Visual, GLB takes 25 s. Visual, OBJ takes 30 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 2.2 8.2 0.6 ms 7.0 0.3 1.0 0.3 19.4
Simulation, STEP 0.3 2.1 8.2 0.4 ms 6.8 4.5 1.2 0.2 23.3
Simulation, STL 0.4 2.2 8.1 0.6 ms 6.8 0.7 1.0 0.3 19.4
Simulation, OBJ 0.3 2.3 8.3 0.4 ms 6.9 9.6 1.0 0.2 28.6
Visual, GLB 0.3 2.0 7.3 0.4 ms 13.9 0.1 1.4 0.3 25.2
Visual, OBJ 0.3 2.0 7.2 0.6 ms 13.9 4.3 1.6 0.3 29.8
Board Repo: oresat/oresat-gps-hardware
Board: A3P250_Dev_Board.kicad_pcb
Folder MicroSemi_FPGA_Dev_Board / kicad_board_design / A3P250_Dev_Board
Complexity 282 / 1000 (size 237, features 45)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones
Tested 9th November 2026 to 10th November 2026
Copper layers 4
File format KiCad 5 (20171130)
Parts, tracks, vias 53, 1,191, 123
Triangles, simulation 1,856,362 in 107 parts
Verifier PASS in all six runs
Run again Simulation, GLB; Simulation, STEP; Simulation, STL; Simulation, OBJ: failed in the corpus run, run again with fixes to KESE made after the corpus run, and passed
File
type
File
size
Peak memory
used
Simulation
GLB 65 MB 577 MB
STEP 301 MB 698 MB
STL 93 MB 602 MB
OBJ 197 MB 1.3 GB
Visual
GLB 34 MB 685 MB
OBJ 103 MB 758 MB

2192. switcher

switcher: stages 4 and 6 take 48% to 78% of a run. Simulation, GLB takes 1.8 s. Simulation, STEP takes 2.6 s. Simulation, STL takes 1.9 s. Simulation, OBJ takes 2.5 s. Visual, GLB takes 2.5 s. Visual, OBJ takes 3.0 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.1 0.6 0.1 ms 0.7 21 ms 79 ms 0.2 1.8
Simulation, STEP 97 ms 0.2 0.6 0.1 ms 0.7 0.9 66 ms 0.2 2.6
Simulation, STL 0.1 0.1 0.6 0.1 ms 0.8 27 ms 69 ms 0.2 1.9
Simulation, OBJ 0.1 0.2 0.6 0.1 ms 0.7 0.7 72 ms 0.2 2.5
Visual, GLB 0.1 0.1 0.6 0.1 ms 1.3 15 ms 0.1 0.2 2.5
Visual, OBJ 0.1 0.1 0.6 0.1 ms 1.3 0.5 95 ms 0.2 3.0
Board Repo: oresat/oresat-gps-hardware
Board: switcher.kicad_pcb
Folder MicroSemi_FPGA_Dev_Board / kicad_switcher_board / switcher
Complexity 187 / 1000 (size 142, features 45)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones
Tested 9th November 2026
Copper layers 4
File format KiCad 5 (20171130)
Parts, tracks, vias 12, 133, 2
Triangles, simulation 112,630 in 21 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 4.0 MB 182 MB
STEP 22 MB 197 MB
STL 5.6 MB 186 MB
OBJ 11 MB 185 MB
Visual
GLB 2.6 MB 156 MB
OBJ 7.2 MB 157 MB

2193. switcher_close

switcher_close: stages 4 and 6 take 47% to 75% of a run. Simulation, GLB takes 1.8 s. Simulation, STEP takes 2.4 s. Simulation, STL takes 1.7 s. Simulation, OBJ takes 2.3 s. Visual, GLB takes 2.4 s. Visual, OBJ takes 2.7 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.1 0.6 0.1 ms 0.6 20 ms 80 ms 0.2 1.8
Simulation, STEP 93 ms 0.1 0.6 0.1 ms 0.6 0.8 67 ms 0.2 2.4
Simulation, STL 87 ms 0.1 0.6 0.1 ms 0.6 28 ms 66 ms 0.2 1.7
Simulation, OBJ 89 ms 0.1 0.6 0.2 ms 0.6 0.6 71 ms 0.2 2.3
Visual, GLB 91 ms 0.1 0.6 0.1 ms 1.2 19 ms 0.1 0.2 2.4
Visual, OBJ 91 ms 0.1 0.6 0.1 ms 1.2 0.4 87 ms 0.2 2.7
Board Repo: oresat/oresat-gps-hardware
Board: switcher_close.kicad_pcb
Folder MicroSemi_FPGA_Dev_Board / kicad_switcher_board / switcher
Complexity 185 / 1000 (size 140, features 45)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones
Tested 9th November 2026
Copper layers 4
File format KiCad 5 (20171130)
Parts, tracks, vias 12, 114, 2
Triangles, simulation 116,008 in 21 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 4.1 MB 190 MB
STEP 22 MB 202 MB
STL 5.8 MB 186 MB
OBJ 11 MB 186 MB
Visual
GLB 2.7 MB 157 MB
OBJ 7.4 MB 158 MB

2194. oresat-gps-card

oresat-gps-card: stages 4 and 6 take 57% to 81% of a run. Simulation, GLB takes 58 s. Simulation, STEP takes 70 s. Simulation, STL takes 60 s. Simulation, OBJ takes 83 s. Visual, GLB takes 83 s. Visual, OBJ takes 97 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2.0 6.4 23.0 2 ms 23.7 0.8 1.9 0.3 58.2
Simulation, STEP 1.9 6.7 22.1 2 ms 23.8 12.7 2.3 0.4 69.8
Simulation, STL 1.9 6.5 22.9 2 ms 24.5 1.8 2.1 0.3 60.1
Simulation, OBJ 2.1 6.9 23.1 2 ms 24.0 24.1 2.0 0.4 82.6
Visual, GLB 2.2 6.9 23.7 3 ms 43.2 0.6 6.1 0.3 83.0
Visual, OBJ 1.9 6.6 23.6 2 ms 42.7 15.6 6.4 0.3 97.1
Board Repo: oresat/oresat-gps-hardware
Board: oresat-gps-card.kicad_pcb
Folder oresat-gps-card
Complexity 438 / 1000 (size 293, features 145)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
drill offsets, arc tracks,
filled zones, copper drawings,
tracks bare of mask, stack-up,
dielectric εr and tanδ,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 215, 3,296, 767
Triangles, simulation 4,929,222 in 472 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 170 MB 1.5 GB
STEP 723 MB 2.0 GB
STL 247 MB 1.5 GB
OBJ 535 MB 3.2 GB
Visual
GLB 112 MB 1.8 GB
OBJ 357 MB 2.3 GB

2195. helmholtz-controller-v2

helmholtz-controller-v2: stages 4 and 6 take 56% to 81% of a run. Simulation, GLB takes 8.2 s. Simulation, STEP takes 10 s. Simulation, STL takes 8.1 s. Simulation, OBJ takes 10 s. Visual, GLB takes 11 s. Visual, OBJ takes 13 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.8 3.0 0.5 ms 3.4 0.1 0.4 0.2 8.2
Simulation, STEP 0.2 0.9 3.0 0.7 ms 3.0 2.6 0.4 0.2 10.4
Simulation, STL 0.2 0.8 3.0 0.4 ms 3.3 0.2 0.4 0.2 8.1
Simulation, OBJ 0.2 0.8 2.9 0.5 ms 3.0 2.9 0.4 0.2 10.4
Visual, GLB 0.2 0.8 3.0 0.7 ms 5.6 77 ms 0.6 0.2 10.6
Visual, OBJ 0.2 0.9 3.0 0.6 ms 5.7 2.5 0.7 0.2 13.3
Board Repo: oresat/oresat-helmholtz
Board: helmholtz-controller-v2.kicad_pcb
Folder controller-v2
Complexity 277 / 1000 (size 172, features 105)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 46, 416, 200
Triangles, simulation 776,982 in 109 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 26 MB 433 MB
STEP 123 MB 514 MB
STL 39 MB 445 MB
OBJ 79 MB 565 MB
Visual
GLB 21 MB 594 MB
OBJ 64 MB 569 MB

2196. helmholtz-controller

helmholtz-controller: stages 4 and 6 take 51% to 84% of a run. Simulation, GLB takes 14 s. Simulation, STEP takes 18 s. Simulation, STL takes 15 s. Simulation, OBJ takes 21 s. Visual, GLB takes 27 s. Visual, OBJ takes 32 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.0 1.5 4.9 0.4 ms 5.9 0.2 0.6 0.3 14.4
Simulation, STEP 1.1 1.5 4.8 0.6 ms 5.7 4.3 0.5 0.3 18.1
Simulation, STL 1.2 1.6 4.8 0.6 ms 5.9 0.4 0.6 0.3 14.6
Simulation, OBJ 1.1 1.6 4.9 0.4 ms 5.8 6.6 0.6 0.3 20.9
Visual, GLB 1.1 1.6 5.0 0.6 ms 17.7 0.2 1.3 0.2 27.0
Visual, OBJ 1.1 1.6 4.8 0.5 ms 17.6 5.4 1.3 0.2 32.0
Board Repo: oresat/oresat-helmholtz
Board: helmholtz-controller.kicad_pcb
Folder controller-v3
Complexity 273 / 1000 (size 168, features 105)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 43, 272, 186
Triangles, simulation 1,060,614 in 66 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 39 MB 569 MB
STEP 176 MB 658 MB
STL 53 MB 560 MB
OBJ 114 MB 807 MB
Visual
GLB 32 MB 689 MB
OBJ 95 MB 762 MB

2197. at86rf215-design-block

at86rf215-design-block: stages 4 and 6 take 54% to 84% of a run. Simulation, GLB takes 15 s. Simulation, STEP takes 19 s. Simulation, STL takes 15 s. Simulation, OBJ takes 22 s. Visual, GLB takes 22 s. Visual, OBJ takes 25 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 1.7 6.2 0.9 ms 5.8 0.2 0.6 0.2 15.2
Simulation, STEP 0.4 1.7 6.1 0.7 ms 6.0 3.4 0.7 0.2 18.6
Simulation, STL 0.5 1.7 5.9 0.6 ms 5.6 0.4 0.6 0.2 14.9
Simulation, OBJ 0.5 1.7 6.4 0.7 ms 5.7 7.2 0.6 0.3 22.4
Visual, GLB 0.5 1.7 6.4 0.6 ms 11.6 0.1 1.1 0.2 21.6
Visual, OBJ 0.5 1.6 6.2 0.7 ms 11.3 4.2 1.1 0.2 25.2
Board Repo: oresat/oresat-kicad
Board: at86rf215-design-block.kicad_pcb
Folder oresat-design-blocks / at86rf215-design-block
Complexity 368 / 1000 (size 238, features 130)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
arc tracks, filled zones,
curved board outline, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 65, 419, 345
Triangles, simulation 1,570,480 in 76 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 54 MB 692 MB
STEP 195 MB 756 MB
STL 79 MB 694 MB
OBJ 165 MB 1.1 GB
Visual
GLB 32 MB 687 MB
OBJ 97 MB 759 MB

2198. transceiver-AX5043

transceiver-AX5043: stages 4 and 6 take 54% to 84% of a run. Simulation, GLB takes 10 s. Simulation, STEP takes 12 s. Simulation, STL takes 9.2 s. Simulation, OBJ takes 14 s. Visual, GLB takes 14 s. Visual, OBJ takes 17 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.9 4.9 0.3 ms 3.2 0.2 0.5 0.2 10.1
Simulation, STEP 0.3 0.9 4.5 0.3 ms 3.4 2.0 0.4 0.3 11.8
Simulation, STL 0.2 0.9 4.3 0.3 ms 2.9 0.3 0.4 0.2 9.2
Simulation, OBJ 0.2 0.9 4.4 0.3 ms 3.4 4.8 0.4 0.3 14.3
Visual, GLB 0.4 0.9 4.4 0.5 ms 7.1 67 ms 0.6 0.3 13.7
Visual, OBJ 0.3 0.9 4.5 0.3 ms 7.3 2.7 0.7 0.2 16.5
Board Repo: oresat/oresat-kicad
Board: transceiver-AX5043.kicad_pcb
Folder oresat-design-blocks / ax5043-design-block
Complexity 255 / 1000 (size 185, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
arc tracks, filled zones,
curved board outline
Tested 9th November 2026
Copper layers 4
File format KiCad 9 (20241229)
Parts, tracks, vias 43, 158, 234
Triangles, simulation 901,424 in 46 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 31 MB 446 MB
STEP 95 MB 483 MB
STL 45 MB 436 MB
OBJ 91 MB 646 MB
Visual
GLB 16 MB 426 MB
OBJ 49 MB 439 MB

2199. oresat-5V2A-regulator

oresat-5V2A-regulator: stages 4 and 6 take 47% to 72% of a run. Simulation, GLB takes 1.8 s. Simulation, STEP takes 2.6 s. Simulation, STL takes 1.9 s. Simulation, OBJ takes 2.4 s. Visual, GLB takes 2.2 s. Visual, OBJ takes 2.6 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.2 0.5 0.1 ms 0.7 20 ms 54 ms 0.2 1.8
Simulation, STEP 0.1 0.1 0.5 0.2 ms 0.8 0.9 57 ms 0.2 2.6
Simulation, STL 0.1 0.2 0.5 0.1 ms 0.7 32 ms 78 ms 0.3 1.9
Simulation, OBJ 0.1 0.1 0.5 0.1 ms 0.7 0.6 66 ms 0.3 2.4
Visual, GLB 0.1 0.2 0.5 0.1 ms 1.1 16 ms 95 ms 0.2 2.2
Visual, OBJ 0.1 0.1 0.5 0.1 ms 1.1 0.4 87 ms 0.2 2.6
Board Repo: oresat/oresat-kicad
Board: oresat-5V2A-regulator.kicad_pcb
Folder oresat-design-blocks / oresat-5V2A-regulator
Complexity 198 / 1000 (size 123, features 75)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 6 (20211014)
Parts, tracks, vias 10, 15, 39
Triangles, simulation 109,708 in 15 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 3.8 MB 199 MB
STEP 16 MB 201 MB
STL 5.5 MB 189 MB
OBJ 11 MB 194 MB
Visual
GLB 2.9 MB 159 MB
OBJ 8.0 MB 155 MB

2200. synthesizer-IF-Si4112

synthesizer-IF-Si4112: stages 4 and 6 take 52% to 83% of a run. Simulation, GLB takes 7.8 s. Simulation, STEP takes 9.9 s. Simulation, STL takes 8.0 s. Simulation, OBJ takes 12 s. Visual, GLB takes 10 s. Visual, OBJ takes 13 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.8 3.6 0.4 ms 2.5 0.1 0.3 0.2 7.8
Simulation, STEP 0.3 0.8 3.8 0.3 ms 2.6 1.9 0.3 0.2 9.9
Simulation, STL 0.2 0.8 3.5 0.2 ms 2.7 0.2 0.4 0.2 8.0
Simulation, OBJ 0.3 0.8 3.7 0.2 ms 2.6 4.3 0.4 0.2 12.2
Visual, GLB 0.3 0.8 3.7 0.3 ms 4.9 59 ms 0.3 0.3 10.3
Visual, OBJ 0.3 0.8 3.7 0.5 ms 5.1 2.4 0.4 0.2 12.9
Board Repo: oresat/oresat-kicad
Board: synthesizer-IF-Si4112.kicad_pcb
Folder oresat-design-blocks / si4112-design-block
Complexity 237 / 1000 (size 182, features 55)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 4
File format KiCad 9 (20241229)
Parts, tracks, vias 40, 202, 178
Triangles, simulation 778,938 in 35 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 27 MB 402 MB
STEP 88 MB 454 MB
STL 39 MB 403 MB
OBJ 80 MB 574 MB
Visual
GLB 14 MB 377 MB
OBJ 42 MB 377 MB

2201. stm32u595-breakout

stm32u595-breakout: stages 4 and 6 take 51% to 82% of a run. Simulation, GLB takes 26 s. Simulation, STEP takes 34 s. Simulation, STL takes 32 s. Simulation, OBJ takes 45 s. Visual, GLB takes 40 s. Visual, OBJ takes 50 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.7 2.7 11.0 0.9 ms 9.7 0.4 1.6 0.3 26.4
Simulation, STEP 0.7 3.0 11.2 0.8 ms 9.6 7.4 1.6 0.4 33.8
Simulation, STL 0.9 3.3 13.3 1 ms 11.2 1.0 1.8 0.4 31.9
Simulation, OBJ 0.8 3.2 12.2 0.8 ms 10.4 15.8 1.9 0.4 44.7
Visual, GLB 0.8 3.3 12.2 0.8 ms 20.4 0.2 2.7 0.4 39.8
Visual, OBJ 0.8 3.3 11.7 0.8 ms 22.1 9.0 2.8 0.4 50.2
Board Repo: oresat/oresat-kicad
Board: stm32u595-breakout.kicad_pcb
Folder oresat-design-blocks / stm32u595-design-block
Complexity 356 / 1000 (size 241, features 115)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 9 (20241229)
Parts, tracks, vias 61, 1,060, 268
Triangles, simulation 2,289,584 in 129 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 79 MB 796 MB
STEP 299 MB 942 MB
STL 114 MB 793 MB
OBJ 244 MB 1.5 GB
Visual
GLB 44 MB 845 MB
OBJ 136 MB 978 MB

2202. amp-PA-TQP7M9105-with-detect

amp-PA-TQP7M9105-with-detect: stages 4 and 6 take 55% to 84% of a run. Simulation, GLB takes 9.5 s. Simulation, STEP takes 11 s. Simulation, STL takes 9.6 s. Simulation, OBJ takes 13 s. Visual, GLB takes 13 s. Visual, OBJ takes 15 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.9 4.2 0.3 ms 3.3 0.2 0.4 0.3 9.5
Simulation, STEP 0.3 0.9 3.9 0.3 ms 3.4 2.1 0.3 0.3 11.3
Simulation, STL 0.3 0.9 3.9 0.3 ms 3.4 0.4 0.4 0.3 9.6
Simulation, OBJ 0.3 1.0 4.0 0.2 ms 3.4 4.2 0.4 0.2 13.5
Visual, GLB 0.3 0.9 4.2 0.3 ms 6.4 71 ms 0.6 0.2 12.7
Visual, OBJ 0.3 0.9 4.0 0.3 ms 6.3 2.2 0.7 0.3 14.6
Board Repo: oresat/oresat-kicad
Board: amp-PA-TQP7M9105-with-detect.kicad_pcb
Folder oresat-design-blocks / tqp7m9105-design-block
Complexity 256 / 1000 (size 186, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
arc tracks, filled zones,
curved board outline
Tested 9th November 2026
Copper layers 4
File format KiCad 9 (20241229)
Parts, tracks, vias 46, 178, 230
Triangles, simulation 869,786 in 41 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 30 MB 430 MB
STEP 85 MB 514 MB
STL 43 MB 416 MB
OBJ 88 MB 624 MB
Visual
GLB 15 MB 399 MB
OBJ 44 MB 405 MB

2203. 50_ohm_microstrip_experiment

50_ohm_microstrip_experiment: stages 4 and 6 take 51% to 77% of a run. Simulation, GLB takes 5.0 s. Simulation, STEP takes 5.7 s. Simulation, STL takes 5.2 s. Simulation, OBJ takes 7.3 s. Visual, GLB takes 5.4 s. Visual, OBJ takes 7.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.6 1.6 0.1 ms 2.2 66 ms 0.2 0.3 5.0
Simulation, STEP 0.1 0.6 1.6 0.1 ms 2.0 1.1 0.2 0.2 5.7
Simulation, STL 0.1 0.6 1.6 0.1 ms 2.3 0.1 0.3 0.2 5.2
Simulation, OBJ 0.1 0.6 1.6 0.2 ms 2.1 2.4 0.2 0.2 7.3
Visual, GLB 0.1 0.5 1.5 0.2 ms 2.7 34 ms 0.3 0.3 5.4
Visual, OBJ 0.2 0.7 1.6 0.1 ms 3.0 1.3 0.3 0.2 7.3
Board Repo: oresat/oresat-live-handheld-ground-station
Board: 50_ohm_microstrip_experiment.kicad_pcb
Folder PCB-Legos / Antenna tester / 50_ohm_microstrip_experiment
Complexity 240 / 1000 (size 165, features 75)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 6 (20211014)
Parts, tracks, vias 10, 21, 202
Triangles, simulation 417,758 in 20 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 14 MB 307 MB
STEP 23 MB 331 MB
STL 21 MB 307 MB
OBJ 42 MB 340 MB
Visual
GLB 7.4 MB 268 MB
OBJ 22 MB 271 MB

2204. HGS_antenna_tester

HGS_antenna_tester: stages 4 and 6 take 50% to 73% of a run. Simulation, GLB takes 4.8 s. Simulation, STEP takes 5.4 s. Simulation, STL takes 4.3 s. Simulation, OBJ takes 6.6 s. Visual, GLB takes 4.8 s. Visual, OBJ takes 5.8 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.6 1.1 0.4 ms 2.4 66 ms 0.3 0.2 4.8
Simulation, STEP 0.1 0.6 1.1 0.2 ms 2.1 1.1 0.2 0.3 5.4
Simulation, STL 0.1 0.6 1.1 0.2 ms 2.0 91 ms 0.2 0.3 4.3
Simulation, OBJ 0.1 0.7 1.2 0.2 ms 2.2 2.1 0.2 0.2 6.6
Visual, GLB 0.1 0.7 1.2 0.2 ms 2.2 33 ms 0.3 0.2 4.8
Visual, OBJ 0.1 0.6 1.2 0.2 ms 2.2 1.2 0.3 0.2 5.8
Board Repo: oresat/oresat-live-handheld-ground-station
Board: HGS_antenna_tester.kicad_pcb
Folder PCB-Legos / Antenna tester
Complexity 267 / 1000 (size 157, features 110)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 6 (20211014)
Parts, tracks, vias 4, 9, 209
Triangles, simulation 392,316 in 15 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 12 MB 313 MB
STEP 15 MB 340 MB
STL 20 MB 316 MB
OBJ 38 MB 329 MB
Visual
GLB 7.6 MB 299 MB
OBJ 22 MB 298 MB

2205. open_stub_experiment

Reading, start-up and exit take 38% to 56% of a run. Simulation, GLB takes 0.6 s. Simulation, STEP takes 0.7 s. Simulation, STL takes 0.6 s. Simulation, OBJ takes 0.6 s. Visual, GLB takes 0.8 s. Visual, OBJ takes 0.9 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 76 ms 27 ms 74 ms 0.1 ms 0.1 4 ms 22 ms 0.2 0.6
Simulation, STEP 80 ms 27 ms 67 ms 0.1 ms 0.1 96 ms 22 ms 0.2 0.7
Simulation, STL 72 ms 26 ms 66 ms 0.1 ms 0.1 4 ms 20 ms 0.3 0.6
Simulation, OBJ 73 ms 29 ms 71 ms 0.1 ms 0.1 50 ms 24 ms 0.2 0.6
Visual, GLB 89 ms 27 ms 89 ms 0.1 ms 0.4 4 ms 34 ms 0.2 0.8
Visual, OBJ 80 ms 26 ms 71 ms 0.1 ms 0.4 41 ms 34 ms 0.3 0.9
Board Repo: oresat/oresat-live-handheld-ground-station
Board: open_stub_experiment.kicad_pcb
Folder PCB-Legos / Antenna tester / open_stub_experiment
Complexity 67 / 1000 (size 47, features 20)
KESE features filled zones
Tested 9th November 2026
Copper layers 2
File format KiCad 6 (20211014)
Parts, tracks, vias 1, 3, 0
Triangles, simulation 10,008 in 12 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 375 kB 60 MB
STEP 2.1 MB 63 MB
STL 501 kB 60 MB
OBJ 950 kB 64 MB
Visual
GLB 295 kB 79 MB
OBJ 740 kB 80 MB

2206. LNA

LNA: stages 4 and 6 take 47% to 81% of a run. Simulation, GLB takes 4.4 s. Simulation, STEP takes 5.9 s. Simulation, STL takes 4.7 s. Simulation, OBJ takes 6.6 s. Visual, GLB takes 6.3 s. Visual, OBJ takes 7.2 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.5 1.7 0.3 ms 1.5 66 ms 0.2 0.2 4.4
Simulation, STEP 0.2 0.4 1.9 0.2 ms 1.6 1.4 0.2 0.2 5.9
Simulation, STL 0.2 0.5 1.8 0.3 ms 1.7 0.1 0.3 0.2 4.7
Simulation, OBJ 0.3 0.6 1.6 0.2 ms 1.5 2.2 0.2 0.2 6.6
Visual, GLB 0.2 0.5 1.9 0.2 ms 3.3 32 ms 0.3 0.2 6.3
Visual, OBJ 0.2 0.5 1.9 0.3 ms 3.1 1.1 0.3 0.2 7.2
Board Repo: oresat/oresat-live-handheld-ground-station
Board: LNA.kicad_pcb
Folder PCB-Legos / LNA
Complexity 249 / 1000 (size 174, features 75)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 6 (20211014)
Parts, tracks, vias 42, 110, 107
Triangles, simulation 454,982 in 44 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 16 MB 344 MB
STEP 61 MB 352 MB
STL 23 MB 321 MB
OBJ 48 MB 377 MB
Visual
GLB 9.1 MB 296 MB
OBJ 27 MB 297 MB

2207. transformer

transformer: stages 4 and 6 take 46% to 78% of a run. Simulation, GLB takes 1.6 s. Simulation, STEP takes 2.4 s. Simulation, STL takes 1.6 s. Simulation, OBJ takes 2.2 s. Visual, GLB takes 2.3 s. Visual, OBJ takes 2.5 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 75 ms 97 ms 0.5 0.2 ms 0.7 22 ms 94 ms 0.2 1.6
Simulation, STEP 93 ms 0.1 0.5 0.2 ms 0.6 0.8 89 ms 0.2 2.4
Simulation, STL 68 ms 93 ms 0.5 0.2 ms 0.6 32 ms 86 ms 0.2 1.6
Simulation, OBJ 78 ms 0.1 0.4 0.1 ms 0.6 0.7 82 ms 0.2 2.2
Visual, GLB 84 ms 0.1 0.5 0.2 ms 1.3 12 ms 68 ms 0.2 2.3
Visual, OBJ 76 ms 0.1 0.5 0.2 ms 1.2 0.3 64 ms 0.3 2.5
Board Repo: oresat/oresat-live-handheld-ground-station
Board: transformer.kicad_pcb
Folder PCB-Legos / transformer
Complexity 244 / 1000 (size 124, features 120)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ,
mask and silkscreen colours,
castellated pads
Tested 9th November 2026
Copper layers 4
File format KiCad 6 (20211014)
Parts, tracks, vias 2, 21, 33
Triangles, simulation 149,868 in 18 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 5.2 MB 190 MB
STEP 21 MB 195 MB
STL 7.5 MB 186 MB
OBJ 15 MB 191 MB
Visual
GLB 2.0 MB 162 MB
OBJ 5.5 MB 161 MB

2208. HGS_Reflector

HGS_Reflector: stages 4 and 6 take 50% to 81% of a run. Simulation, GLB takes 13 s. Simulation, STEP takes 16 s. Simulation, STL takes 13 s. Simulation, OBJ takes 19 s. Visual, GLB takes 16 s. Visual, OBJ takes 18 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.4 1.2 5.3 0.5 ms 4.6 0.2 0.6 0.3 12.7
Simulation, STEP 0.4 1.4 5.8 0.5 ms 4.5 2.9 0.5 0.3 15.8
Simulation, STL 0.4 1.3 5.3 0.5 ms 4.4 0.4 0.5 0.3 12.5
Simulation, OBJ 0.4 1.3 5.2 0.5 ms 4.2 6.8 0.5 0.3 18.7
Visual, GLB 0.4 1.4 5.7 0.8 ms 7.5 90 ms 0.9 0.3 16.4
Visual, OBJ 0.5 1.3 5.0 0.7 ms 6.7 3.1 1.0 0.3 18.0
Board Repo: oresat/oresat-live-handheld-ground-station
Board: HGS_Reflector.kicad_pcb
Folder pcba / KiCad
Complexity 270 / 1000 (size 180, features 90)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 8 (20240108)
Parts, tracks, vias 55, 145, 134
Triangles, simulation 1,008,332 in 63 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 34 MB 452 MB
STEP 119 MB 481 MB
STL 50 MB 463 MB
OBJ 103 MB 721 MB
Visual
GLB 18 MB 442 MB
OBJ 55 MB 467 MB

2209. oresat-live-card

oresat-live-card: stages 4 and 6 take 59% to 85% of a run. Simulation, GLB takes 49 s. Simulation, STEP takes 59 s. Simulation, STL takes 51 s. Simulation, OBJ takes 71 s. Visual, GLB takes 68 s. Visual, OBJ takes 81 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.3 4.5 22.6 0.7 ms 18.5 0.6 1.7 0.3 49.5
Simulation, STEP 1.3 4.8 22.5 1 ms 18.0 10.0 1.7 0.3 58.6
Simulation, STL 1.4 4.8 22.3 1 ms 18.7 1.3 1.7 0.3 50.5
Simulation, OBJ 1.4 4.8 22.7 0.7 ms 19.2 20.8 2.1 0.3 71.2
Visual, GLB 1.4 5.0 22.6 0.7 ms 34.8 0.3 3.4 0.3 67.9
Visual, OBJ 1.4 4.7 22.9 2 ms 35.7 12.6 3.5 0.3 81.0
Board Repo: oresat/oresat-proto-card
Board: oresat-live-card.kicad_pcb
Folder a8-proto-card / cad-files
Complexity 352 / 1000 (size 287, features 65)
KESE features through vias, rounded,
trapezoid or chamfered pads,
drill offsets, filled zones,
curved board outline
Tested 9th November 2026
Copper layers 4
File format KiCad 6 (20211014)
Parts, tracks, vias 239, 1,681, 632
Triangles, simulation 3,866,432 in 258 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 137 MB 1.3 GB
STEP 670 MB 1.7 GB
STL 193 MB 1.3 GB
OBJ 420 MB 2.6 GB
Visual
GLB 83 MB 1.5 GB
OBJ 260 MB 1.8 GB

2210. oresat-proto-card

oresat-proto-card: stages 4 and 6 take 55% to 87% of a run. Simulation, GLB takes 93 s. Simulation, STEP takes 2 min. Simulation, STL takes 94 s. Simulation, OBJ takes 2 min. Visual, GLB takes 2 min. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.9 7.1 41.8 1 ms 36.6 1.4 4.2 0.5 93.4
Simulation, STEP 1.8 7.3 41.2 0.8 ms 35.3 18.6 4.1 0.5 108.7
Simulation, STL 1.8 7.6 41.5 0.9 ms 34.7 3.4 4.1 0.5 93.6
Simulation, OBJ 1.8 7.1 41.1 2 ms 34.7 49.5 3.6 0.4 138.3
Visual, GLB 1.7 7.0 41.9 1 ms 64.0 0.6 6.4 0.4 122.0
Visual, OBJ 1.8 7.2 42.2 0.9 ms 65.9 22.0 7.0 0.3 146.5
Board Repo: oresat/oresat-proto-card
Board: oresat-proto-card.kicad_pcb
Folder m0-proto-card
Complexity 335 / 1000 (size 220, features 115)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
drill offsets, filled zones,
copper drawings, stack-up,
dielectric εr and tanδ,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 7 (20221018)
Parts, tracks, vias 102, 1,230, 987
Triangles, simulation 7,532,398 in 150 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 256 MB 1.9 GB
STEP 927 MB 2.4 GB
STL 377 MB 1.8 GB
OBJ 812 MB 4.8 GB
Visual
GLB 116 MB 2.2 GB
OBJ 377 MB 2.5 GB

2211. oresat-proto-card

oresat-proto-card: stages 4 and 6 take 55% to 85% of a run. Simulation, GLB takes 96 s. Simulation, STEP takes 2 min. Simulation, STL takes 99 s. Simulation, OBJ takes 2 min. Visual, GLB takes 2 min. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2.1 8.2 44.0 1 ms 35.0 1.9 4.1 0.5 95.8
Simulation, STEP 1.6 8.5 43.1 1 ms 35.5 20.0 4.9 0.5 114.2
Simulation, STL 2.1 8.0 43.6 2 ms 35.2 4.4 4.6 0.5 98.5
Simulation, OBJ 1.7 8.0 42.8 2 ms 35.2 49.4 4.8 0.5 142.3
Visual, GLB 2.0 7.8 42.1 1 ms 63.9 0.6 7.9 0.4 124.6
Visual, OBJ 1.8 7.7 42.6 2 ms 63.5 19.5 7.7 0.4 143.2
Board Repo: oresat/oresat-proto-card
Board: oresat-proto-card.kicad_pcb
Folder mcxn-proto-card
Complexity 379 / 1000 (size 264, features 115)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
drill offsets, filled zones,
copper drawings, stack-up,
dielectric εr and tanδ,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 117, 1,348, 1,117
Triangles, simulation 8,534,848 in 188 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 288 MB 2.0 GB
STEP 1.1 GB 2.7 GB
STL 427 MB 2.0 GB
OBJ 916 MB 5.4 GB
Visual
GLB 125 MB 2.3 GB
OBJ 406 MB 2.8 GB

2212. 1u_panel

1u_panel: stages 4 and 6 take 62% to 87% of a run. Simulation, GLB takes 45 s. Simulation, STEP takes 53 s. Simulation, STL takes 45 s. Simulation, OBJ takes 60 s. Visual, GLB takes 62 s. Visual, OBJ takes 71 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 4.1 24.2 0.4 ms 14.1 0.5 1.3 0.3 45.1
Simulation, STEP 0.5 4.1 24.0 0.5 ms 14.3 8.2 1.4 0.3 52.8
Simulation, STL 0.5 4.2 23.8 0.5 ms 13.8 1.1 1.3 0.3 45.0
Simulation, OBJ 0.5 3.9 23.7 0.6 ms 13.6 17.0 1.3 0.3 60.2
Visual, GLB 0.5 4.2 24.2 0.4 ms 29.9 0.3 3.0 0.3 62.3
Visual, OBJ 0.7 4.1 24.2 0.5 ms 29.1 9.9 3.2 0.3 71.5
Board Repo: oresat/oresat-solar-hardware
Board: 1u_panel.kicad_pcb
Folder 1u_panel / kicad
Complexity 262 / 1000 (size 202, features 60)
KESE features through vias, rounded,
trapezoid or chamfered pads,
arc tracks, filled zones
Tested 9th November 2026
Copper layers 2
File format KiCad 7 (20221018)
Parts, tracks, vias 77, 707, 1,280
Triangles, simulation 3,191,626 in 95 parts
Note panel
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 110 MB 1.0 GB
STEP 406 MB 1.4 GB
STL 160 MB 1.1 GB
OBJ 338 MB 2.1 GB
Visual
GLB 65 MB 1.2 GB
OBJ 201 MB 1.4 GB

2213. solar-extension

solar-extension: stages 4 and 6 take 45% to 76% of a run. Simulation, GLB takes 1.9 s. Simulation, STEP takes 2.9 s. Simulation, STL takes 1.9 s. Simulation, OBJ takes 2.6 s. Visual, GLB takes 2.6 s. Visual, OBJ takes 3.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.2 0.6 0.2 ms 0.7 27 ms 95 ms 0.2 1.9
Simulation, STEP 0.1 0.2 0.6 0.2 ms 0.7 0.9 91 ms 0.3 2.9
Simulation, STL 0.1 0.2 0.6 0.2 ms 0.7 44 ms 89 ms 0.2 1.9
Simulation, OBJ 90 ms 0.2 0.5 0.2 ms 0.7 0.7 89 ms 0.2 2.6
Visual, GLB 98 ms 0.2 0.6 0.2 ms 1.5 19 ms 0.1 0.2 2.6
Visual, OBJ 98 ms 0.2 0.6 0.2 ms 1.6 0.6 0.1 0.3 3.3
Board Repo: oresat/oresat-solar-hardware
Board: solar-extension.kicad_pcb
Folder solar-extension
Complexity 193 / 1000 (size 98, features 95)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 2, 34, 12
Triangles, simulation 163,872 in 18 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 5.7 MB 204 MB
STEP 23 MB 212 MB
STL 8.2 MB 203 MB
OBJ 16 MB 204 MB
Visual
GLB 3.8 MB 176 MB
OBJ 11 MB 176 MB

2214. solar-module-1u-gaas

solar-module-1u-gaas: stages 4 and 6 take 56% to 87% of a run. Simulation, GLB takes 82 s. Simulation, STEP takes 94 s. Simulation, STL takes 83 s. Simulation, OBJ takes 2 min. Visual, GLB takes 91 s. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.2 6.0 36.3 1 ms 33.6 1.3 3.7 0.4 82.5
Simulation, STEP 1.2 6.1 35.1 1 ms 32.4 15.6 3.2 0.4 94.0
Simulation, STL 1.2 6.0 34.6 1 ms 34.3 2.8 3.2 0.4 82.6
Simulation, OBJ 1.1 5.9 33.0 1 ms 33.2 41.0 3.1 0.4 117.8
Visual, GLB 1.2 5.7 34.2 1 ms 45.4 0.4 4.1 0.3 91.3
Visual, OBJ 1.1 5.8 34.9 1 ms 44.2 13.1 4.4 0.3 103.8
Board Repo: oresat/oresat-solar-hardware
Board: solar-module-1u-gaas.kicad_pcb
Folder solar-module-1u-gaas-MCXN
Complexity 397 / 1000 (size 262, features 135)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
arc tracks, filled zones,
copper drawings, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 85, 660, 1,503
Triangles, simulation 7,159,088 in 134 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 240 MB 1.9 GB
STEP 699 MB 2.7 GB
STL 358 MB 1.9 GB
OBJ 763 MB 4.5 GB
Visual
GLB 84 MB 1.8 GB
OBJ 272 MB 1.8 GB

2215. solar-module-1u-gaas

solar-module-1u-gaas: stages 4 and 6 take 62% to 86% of a run. Simulation, GLB takes 34 s. Simulation, STEP takes 42 s. Simulation, STL takes 36 s. Simulation, OBJ takes 46 s. Visual, GLB takes 45 s. Visual, OBJ takes 54 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 3.0 17.2 0.8 ms 11.7 0.5 1.2 0.3 34.5
Simulation, STEP 0.5 3.0 17.8 1 ms 12.3 6.6 1.2 0.3 41.6
Simulation, STL 0.5 2.8 17.3 0.7 ms 12.5 1.1 1.3 0.3 35.9
Simulation, OBJ 0.5 2.8 17.1 0.6 ms 11.6 12.8 1.1 0.3 46.1
Visual, GLB 0.4 2.9 17.3 1 ms 21.4 0.3 2.7 0.2 45.3
Visual, OBJ 0.5 2.9 17.1 0.7 ms 21.8 8.6 2.7 0.3 53.9
Board Repo: oresat/oresat-solar-hardware
Board: solar-module-1u-gaas.kicad_pcb
Folder solar-module-1u-gaas
Complexity 376 / 1000 (size 241, features 135)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
arc tracks, filled zones,
copper drawings, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 77, 689, 1,169
Triangles, simulation 2,823,184 in 97 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 97 MB 937 MB
STEP 350 MB 1.3 GB
STL 141 MB 925 MB
OBJ 300 MB 1.9 GB
Visual
GLB 57 MB 1.1 GB
OBJ 178 MB 1.3 GB

2216. solar-module-1u-si

solar-module-1u-si: stages 4 and 6 take 53% to 84% of a run. Simulation, GLB takes 47 s. Simulation, STEP takes 56 s. Simulation, STL takes 49 s. Simulation, OBJ takes 72 s. Visual, GLB takes 60 s. Visual, OBJ takes 74 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.2 5.3 20.9 0.8 ms 16.9 0.8 1.9 0.3 47.4
Simulation, STEP 1.3 5.0 20.9 0.8 ms 17.0 9.6 1.9 0.3 56.0
Simulation, STL 1.3 5.0 21.7 0.9 ms 17.4 1.5 2.0 0.3 49.1
Simulation, OBJ 1.3 4.9 20.8 0.8 ms 17.4 25.7 1.8 0.3 72.3
Visual, GLB 1.2 5.1 20.5 1.0 ms 29.8 0.4 2.6 0.3 60.0
Visual, OBJ 1.2 5.5 21.3 0.7 ms 30.0 12.9 2.8 0.3 73.9
Board Repo: oresat/oresat-solar-hardware
Board: solar-module-1u-si.kicad_pcb
Folder solar-module-1u-si-MCXN
Complexity 399 / 1000 (size 264, features 135)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
arc tracks, filled zones,
copper drawings, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 9 (20241229)
Parts, tracks, vias 123, 597, 1,365
Triangles, simulation 4,929,576 in 160 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 168 MB 1.8 GB
STEP 495 MB 2.0 GB
STL 246 MB 1.7 GB
OBJ 529 MB 3.2 GB
Visual
GLB 79 MB 1.5 GB
OBJ 252 MB 1.8 GB

2217. solar-module-1u-si

solar-module-1u-si: stages 4 and 6 take 59% to 86% of a run. Simulation, GLB takes 37 s. Simulation, STEP takes 44 s. Simulation, STL takes 38 s. Simulation, OBJ takes 53 s. Visual, GLB takes 52 s. Visual, OBJ takes 62 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.6 3.3 19.6 1 ms 11.9 0.6 1.3 0.3 37.5
Simulation, STEP 0.6 3.2 19.4 0.6 ms 12.0 7.3 1.2 0.3 44.1
Simulation, STL 0.7 3.2 19.4 1 ms 12.0 1.0 1.3 0.3 37.8
Simulation, OBJ 0.6 3.2 19.4 0.6 ms 12.0 16.3 1.3 0.3 53.1
Visual, GLB 0.6 3.2 19.9 0.6 ms 24.7 0.3 3.0 0.3 51.9
Visual, OBJ 0.6 3.3 19.5 0.6 ms 24.1 10.6 3.3 0.3 61.8
Board Repo: oresat/oresat-solar-hardware
Board: solar-module-1u-si.kicad_pcb
Folder solar-module-1u-si
Complexity 381 / 1000 (size 246, features 135)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
arc tracks, filled zones,
copper drawings, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 115, 807, 1,271
Triangles, simulation 3,165,724 in 112 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 109 MB 1.1 GB
STEP 409 MB 1.4 GB
STL 158 MB 1.1 GB
OBJ 337 MB 2.1 GB
Visual
GLB 66 MB 1.3 GB
OBJ 209 MB 1.4 GB

2218. 1u_panel_breakout

1u_panel_breakout: stages 4 and 6 take 50% to 78% of a run. Simulation, GLB takes 2.0 s. Simulation, STEP takes 2.9 s. Simulation, STL takes 2.0 s. Simulation, OBJ takes 2.8 s. Visual, GLB takes 3.0 s. Visual, OBJ takes 3.4 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 96 ms 0.2 0.8 0.1 ms 0.6 31 ms 0.1 0.2 2.0
Simulation, STEP 0.1 0.2 0.8 0.1 ms 0.7 0.9 93 ms 0.2 2.9
Simulation, STL 98 ms 0.1 0.8 0.1 ms 0.7 33 ms 0.1 0.2 2.0
Simulation, OBJ 0.1 0.2 0.7 0.1 ms 0.7 0.8 0.1 0.2 2.8
Visual, GLB 0.1 0.1 0.9 0.1 ms 1.5 24 ms 0.1 0.3 3.0
Visual, OBJ 0.1 0.1 0.8 0.1 ms 1.5 0.6 0.1 0.2 3.4
Board Repo: oresat/oresat-solar-hardware
Board: 1u_panel_breakout.kicad_pcb
Folder solar-module-breakout
Complexity 164 / 1000 (size 104, features 60)
KESE features through vias, arc tracks,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 3, 44, 13
Triangles, simulation 158,634 in 17 parts
Note panel
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 5.6 MB 193 MB
STEP 25 MB 206 MB
STL 7.9 MB 207 MB
OBJ 16 MB 199 MB
Visual
GLB 3.8 MB 167 MB
OBJ 11 MB 166 MB

2219. connector-breakout

connector-breakout: stages 4 and 6 take 46% to 77% of a run. Simulation, GLB takes 3.9 s. Simulation, STEP takes 5.3 s. Simulation, STL takes 4.4 s. Simulation, OBJ takes 6.0 s. Visual, GLB takes 5.6 s. Visual, OBJ takes 6.5 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.4 1.6 0.3 ms 1.2 62 ms 0.2 0.2 3.9
Simulation, STEP 0.1 0.4 1.7 0.3 ms 1.3 1.3 0.2 0.2 5.3
Simulation, STL 0.2 0.4 1.8 0.3 ms 1.5 0.1 0.2 0.2 4.4
Simulation, OBJ 0.2 0.5 1.6 0.2 ms 1.2 2.1 0.2 0.2 6.0
Visual, GLB 0.1 0.4 1.8 0.3 ms 2.6 43 ms 0.5 0.2 5.6
Visual, OBJ 0.1 0.4 1.5 0.2 ms 2.5 1.3 0.4 0.2 6.5
Board Repo: oresat/oresat-solar-simulator-hardware
Board: connector-breakout.kicad_pcb
Folder boards / connector-breakout
Complexity 226 / 1000 (size 131, features 95)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 5, 115, 69
Triangles, simulation 430,384 in 18 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 15 MB 303 MB
STEP 56 MB 321 MB
STL 22 MB 274 MB
OBJ 43 MB 342 MB
Visual
GLB 9.6 MB 292 MB
OBJ 28 MB 295 MB

2220. controller-board

controller-board: stages 4 and 6 take 53% to 85% of a run. Simulation, GLB takes 52 s. Simulation, STEP takes 61 s. Simulation, STL takes 53 s. Simulation, OBJ takes 80 s. Visual, GLB takes 67 s. Visual, OBJ takes 82 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.1 5.5 22.7 0.6 ms 19.7 0.9 2.1 0.3 52.2
Simulation, STEP 1.0 5.4 22.6 0.7 ms 19.4 10.1 2.2 0.3 61.0
Simulation, STL 0.9 5.6 22.5 0.8 ms 19.5 1.7 2.0 0.3 52.5
Simulation, OBJ 1.1 5.6 22.7 0.6 ms 19.5 28.8 2.1 0.4 80.2
Visual, GLB 1.2 5.4 22.4 0.7 ms 34.7 0.4 2.8 0.2 67.1
Visual, OBJ 1.0 5.5 23.0 0.8 ms 35.4 13.4 3.2 0.2 81.7
Board Repo: oresat/oresat-solar-simulator-hardware
Board: controller-board.kicad_pcb
Folder boards / controller-board
Complexity 329 / 1000 (size 224, features 105)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 96, 456, 1,687
Triangles, simulation 5,365,408 in 90 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 179 MB 1.8 GB
STEP 489 MB 2.1 GB
STL 268 MB 1.8 GB
OBJ 569 MB 3.4 GB
Visual
GLB 84 MB 1.7 GB
OBJ 272 MB 1.9 GB

2221. cree-xega-led-breakout

cree-xega-led-breakout: stages 4 and 6 take 44% to 57% of a run. Simulation, GLB takes 0.8 s. Simulation, STEP takes 1.0 s. Simulation, STL takes 0.7 s. Simulation, OBJ takes 1.0 s. Visual, GLB takes 0.9 s. Visual, OBJ takes 1.0 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 71 ms 35 ms 0.1 0.1 ms 0.3 6 ms 25 ms 0.2 0.8
Simulation, STEP 98 ms 36 ms 0.2 0.1 ms 0.3 0.2 24 ms 0.2 1.0
Simulation, STL 68 ms 35 ms 0.1 0.1 ms 0.3 8 ms 22 ms 0.2 0.7
Simulation, OBJ 77 ms 32 ms 0.1 0.1 ms 0.3 0.2 32 ms 0.2 1.0
Visual, GLB 76 ms 37 ms 0.1 0.1 ms 0.4 5 ms 29 ms 0.2 0.9
Visual, OBJ 71 ms 35 ms 0.1 0.1 ms 0.4 0.1 36 ms 0.2 1.0
Board Repo: oresat/oresat-solar-simulator-hardware
Board: cree-xega-led-breakout.kicad_pcb
Folder boards / cree-xega-led-breakout
Complexity 100 / 1000 (size 70, features 30)
KESE features filled zones, curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 8 (20240108)
Parts, tracks, vias 5, 7, 0
Triangles, simulation 31,162 in 15 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 1.1 MB 64 MB
STEP 5.5 MB 68 MB
STL 1.6 MB 65 MB
OBJ 3.0 MB 70 MB
Visual
GLB 788 kB 78 MB
OBJ 2.1 MB 88 MB

2222. sensor-board

sensor-board: stages 4 and 6 take 49% to 78% of a run. Simulation, GLB takes 2.2 s. Simulation, STEP takes 3.0 s. Simulation, STL takes 2.2 s. Simulation, OBJ takes 3.1 s. Visual, GLB takes 3.2 s. Visual, OBJ takes 4.0 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.2 0.8 0.2 ms 0.7 29 ms 93 ms 0.2 2.2
Simulation, STEP 0.1 0.2 0.8 0.1 ms 0.7 0.9 0.1 0.2 3.0
Simulation, STL 99 ms 0.3 0.8 0.2 ms 0.7 64 ms 0.1 0.2 2.2
Simulation, OBJ 0.1 0.3 0.8 0.1 ms 0.7 1.0 0.1 0.2 3.1
Visual, GLB 98 ms 0.3 0.8 0.2 ms 1.7 23 ms 0.2 0.2 3.2
Visual, OBJ 0.1 0.2 0.8 0.2 ms 1.7 0.7 0.2 0.2 4.0
Board Repo: oresat/oresat-solar-simulator-hardware
Board: sensor-board.kicad_pcb
Folder boards / sensor-board
Complexity 229 / 1000 (size 139, features 90)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 2
File format KiCad 8 (20240108)
Parts, tracks, vias 12, 59, 86
Triangles, simulation 236,226 in 20 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 8.2 MB 240 MB
STEP 32 MB 240 MB
STL 12 MB 236 MB
OBJ 24 MB 238 MB
Visual
GLB 6.0 MB 199 MB
OBJ 17 MB 198 MB

2223. star-tracker-card

star-tracker-card: stages 4 and 6 take 52% to 81% of a run. Simulation, GLB takes 59 s. Simulation, STEP takes 73 s. Simulation, STL takes 64 s. Simulation, OBJ takes 90 s. Visual, GLB takes 91 s. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2.1 7.0 21.7 2 ms 23.5 0.9 3.5 0.4 59.0
Simulation, STEP 2.3 7.0 22.1 2 ms 23.1 14.5 3.1 0.4 72.6
Simulation, STL 2.3 7.3 24.4 2 ms 24.7 1.6 3.3 0.3 64.0
Simulation, OBJ 2.2 7.4 23.3 2 ms 23.7 29.7 3.4 0.4 90.1
Visual, GLB 2.2 7.1 22.7 2 ms 50.3 0.5 7.3 0.3 90.6
Visual, OBJ 2.3 7.4 22.6 3 ms 51.6 21.2 7.0 0.3 112.6
Board Repo: oresat/oresat-star-tracker-hardware
Board: star-tracker-card.kicad_pcb
Folder hardware / star-tracker-2.0 / star-tracker-2.0-card
Complexity 406 / 1000 (size 286, features 120)
KESE features through vias, rounded,
trapezoid or chamfered pads,
drill offsets, arc tracks,
filled zones, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 172, 2,760, 568
Triangles, simulation 4,613,754 in 441 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 160 MB 1.4 GB
STEP 697 MB 1.9 GB
STL 231 MB 1.4 GB
OBJ 502 MB 3.1 GB
Visual
GLB 110 MB 2.0 GB
OBJ 353 MB 2.6 GB

2224. star-tracker-camera-board

star-tracker-camera-board: stages 4 and 6 take 44% to 81% of a run. Simulation, GLB takes 5.9 s. Simulation, STEP takes 7.7 s. Simulation, STL takes 6.0 s. Simulation, OBJ takes 9.5 s. Visual, GLB takes 8.9 s. Visual, OBJ takes 11 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.6 2.2 0.4 ms 2.1 98 ms 0.4 0.2 5.9
Simulation, STEP 0.3 0.6 2.2 0.8 ms 2.1 2.0 0.4 0.2 7.7
Simulation, STL 0.2 0.6 2.2 0.4 ms 2.2 0.2 0.4 0.2 6.0
Simulation, OBJ 0.2 0.6 2.1 0.5 ms 2.1 3.8 0.4 0.2 9.5
Visual, GLB 0.3 0.7 2.2 0.5 ms 4.9 81 ms 0.4 0.2 8.9
Visual, OBJ 0.3 0.6 2.1 0.3 ms 5.2 2.5 0.4 0.2 11.3
Board Repo: oresat/oresat-star-tracker-hardware
Board: star-tracker-camera-board.kicad_pcb
Folder hardware / star-tracker-2.0 / star-tracker-camera-board-2.0
Complexity 310 / 1000 (size 180, features 130)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 36, 402, 108
Triangles, simulation 670,218 in 55 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 23 MB 346 MB
STEP 106 MB 407 MB
STL 34 MB 349 MB
OBJ 69 MB 491 MB
Visual
GLB 16 MB 415 MB
OBJ 49 MB 414 MB

2225. star-tracker-camera-board

star-tracker-camera-board: stages 4 and 6 take 46% to 79% of a run. Simulation, GLB takes 5.5 s. Simulation, STEP takes 6.8 s. Simulation, STL takes 5.4 s. Simulation, OBJ takes 8.3 s. Visual, GLB takes 8.6 s. Visual, OBJ takes 11 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.6 1.9 0.4 ms 2.1 98 ms 0.4 0.2 5.5
Simulation, STEP 0.2 0.6 1.8 0.2 ms 2.0 1.7 0.3 0.2 6.8
Simulation, STL 0.2 0.6 1.8 0.2 ms 2.0 0.1 0.4 0.2 5.4
Simulation, OBJ 0.2 0.6 1.7 0.4 ms 2.1 3.0 0.3 0.2 8.3
Visual, GLB 0.2 0.6 1.9 0.2 ms 4.9 71 ms 0.6 0.2 8.6
Visual, OBJ 0.2 0.6 1.9 0.3 ms 4.8 2.1 0.6 0.3 10.6
Board Repo: oresat/oresat-star-tracker-hardware
Board: star-tracker-camera-board.kicad_pcb
Folder hardware / star-tracker-camera-board
Complexity 310 / 1000 (size 180, features 130)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 36, 393, 99
Triangles, simulation 610,342 in 55 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 21 MB 343 MB
STEP 95 MB 390 MB
STL 31 MB 336 MB
OBJ 63 MB 459 MB
Visual
GLB 15 MB 392 MB
OBJ 45 MB 383 MB

2226. star-tracker-card

star-tracker-card: stages 4 and 6 take 52% to 82% of a run. Simulation, GLB takes 57 s. Simulation, STEP takes 69 s. Simulation, STL takes 56 s. Simulation, OBJ takes 83 s. Visual, GLB takes 84 s. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2.1 6.0 24.0 0.9 ms 20.5 0.9 2.7 0.3 56.5
Simulation, STEP 2.1 6.3 24.2 1 ms 19.7 13.5 2.4 0.3 68.6
Simulation, STL 2.1 5.9 23.4 2 ms 20.0 1.7 2.8 0.3 56.1
Simulation, OBJ 1.9 5.9 23.6 0.9 ms 20.1 28.8 2.6 0.3 83.2
Visual, GLB 2.2 6.0 23.7 1 ms 45.8 0.6 5.8 0.3 84.4
Visual, OBJ 2.0 5.9 23.5 0.9 ms 44.8 19.9 6.2 0.3 102.5
Board Repo: oresat/oresat-star-tracker-hardware
Board: star-tracker-card.kicad_pcb
Folder hardware / star-tracker-card
Complexity 408 / 1000 (size 288, features 120)
KESE features through vias, rounded,
trapezoid or chamfered pads,
drill offsets, arc tracks,
filled zones, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 164, 3,450, 657
Triangles, simulation 5,239,886 in 447 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 182 MB 1.6 GB
STEP 850 MB 2.1 GB
STL 262 MB 1.6 GB
OBJ 572 MB 3.5 GB
Visual
GLB 126 MB 2.1 GB
OBJ 408 MB 2.7 GB

2227. GPIO to motor

GPIO to motor: stages 4 and 6 take 49% to 82% of a run. Simulation, GLB takes 3.6 s. Simulation, STEP takes 4.9 s. Simulation, STL takes 3.9 s. Simulation, OBJ takes 5.8 s. Visual, GLB takes 5.9 s. Visual, OBJ takes 7.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 1.4 0.2 ms 1.2 48 ms 0.2 0.2 3.6
Simulation, STEP 0.1 0.3 1.4 0.4 ms 1.2 1.4 0.3 0.2 4.9
Simulation, STL 0.2 0.4 1.4 0.3 ms 1.4 96 ms 0.3 0.2 3.9
Simulation, OBJ 0.2 0.4 1.6 0.2 ms 1.2 1.9 0.2 0.2 5.8
Visual, GLB 0.1 0.3 1.4 0.3 ms 3.4 39 ms 0.4 0.2 5.9
Visual, OBJ 0.1 0.3 1.5 0.6 ms 3.4 1.3 0.4 0.2 7.3
Board Repo: oresat/reaction-wheels
Board: GPIO to motor.kicad_pcb
Folder Edison_GPIO_Motor_Board
Complexity 193 / 1000 (size 148, features 45)
KESE features through vias, filled zones,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 4 (4)
Parts, tracks, vias 11, 326, 85
Triangles, simulation 399,388 in 41 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 13 MB 267 MB
STEP 54 MB 301 MB
STL 20 MB 287 MB
OBJ 39 MB 311 MB
Visual
GLB 9.0 MB 274 MB
OBJ 26 MB 274 MB

2228. Edison_Motor_Servo

Edison_Motor_Servo: stages 4 and 6 take 50% to 80% of a run. Simulation, GLB takes 2.1 s. Simulation, STEP takes 3.1 s. Simulation, STL takes 2.1 s. Simulation, OBJ takes 3.0 s. Visual, GLB takes 2.6 s. Visual, OBJ takes 3.2 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 96 ms 0.1 0.8 0.2 ms 0.8 26 ms 0.1 0.2 2.1
Simulation, STEP 0.1 0.1 0.7 0.2 ms 0.8 1.0 0.1 0.2 3.1
Simulation, STL 0.1 0.1 0.6 0.2 ms 0.8 39 ms 0.1 0.2 2.1
Simulation, OBJ 87 ms 0.1 0.7 0.2 ms 0.8 0.9 0.1 0.2 3.0
Visual, GLB 85 ms 0.1 0.7 0.2 ms 1.4 17 ms 0.1 0.2 2.6
Visual, OBJ 91 ms 0.1 0.7 0.2 ms 1.4 0.6 0.1 0.2 3.2
Board Repo: oresat/reaction-wheels
Board: Edison_Motor_Servo.kicad_pcb
Folder Edison_GPIO_Motor_via_servo
Complexity 130 / 1000 (size 90, features 40)
KESE features filled zones, copper text,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 4 (4)
Parts, tracks, vias 6, 23, 0
Triangles, simulation 156,220 in 35 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 4.8 MB 193 MB
STEP 25 MB 217 MB
STL 7.8 MB 193 MB
OBJ 15 MB 189 MB
Visual
GLB 3.3 MB 166 MB
OBJ 9.2 MB 165 MB

2229. MotCtrl

MotCtrl: stages 4 and 6 take 56% to 89% of a run. Simulation, GLB takes 44 s. Simulation, STEP takes 51 s. Simulation, STL takes 44 s. Simulation, OBJ takes 64 s. Visual, GLB takes 67 s. Visual, OBJ takes 79 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.6 3.5 18.3 1 ms 18.7 0.6 1.8 0.3 43.9
Simulation, STEP 0.5 3.5 17.9 1 ms 18.7 7.9 1.9 0.3 50.7
Simulation, STL 0.6 3.5 17.8 1 ms 18.7 1.3 1.9 0.3 44.1
Simulation, OBJ 0.6 3.5 17.5 1 ms 18.4 21.9 1.9 0.3 64.0
Visual, GLB 0.6 3.5 18.0 1 ms 41.9 0.3 2.7 0.3 67.2
Visual, OBJ 0.7 3.7 17.6 1 ms 42.9 11.0 3.0 0.3 79.2
Board Repo: osannolik/motctrl
Board: MotCtrl.kicad_pcb
Folder hw / kicad
Complexity 319 / 1000 (size 264, features 55)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 4
File format KiCad 4 (4)
Parts, tracks, vias 132, 2,127, 758
Triangles, simulation 3,514,890 in 119 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 122 MB 926 MB
STEP 429 MB 1.2 GB
STL 176 MB 908 MB
OBJ 377 MB 2.3 GB
Visual
GLB 61 MB 1.2 GB
OBJ 191 MB 1.4 GB

2230. logicbone

logicbone: stages 4 and 6 take 50% to 83% of a run. Simulation, GLB takes 82 s. Simulation, STEP takes 99 s. Simulation, STL takes 86 s. Simulation, OBJ takes 2 min. Visual, GLB takes 2 min. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.4 8.6 28.7 1 ms 35.7 1.6 5.9 0.4 82.3
Simulation, STEP 1.5 8.6 29.0 1 ms 34.6 19.6 5.3 0.4 98.9
Simulation, STL 1.4 8.2 29.8 1 ms 35.9 3.9 6.0 0.4 85.6
Simulation, OBJ 1.5 8.3 30.5 3 ms 36.8 52.7 5.2 0.4 135.4
Visual, GLB 1.4 8.5 30.8 2 ms 65.9 0.8 9.2 0.3 116.9
Visual, OBJ 1.5 8.3 29.4 1 ms 64.7 20.7 9.4 0.3 134.4
Board Repo: oskirby/logicbone
Board: logicbone.kicad_pcb
Complexity 419 / 1000 (size 329, features 90)
KESE features through vias, slotted holes,
custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 8
File format KiCad 5 (20171130)
Parts, tracks, vias 258, 9,859, 658
Triangles, simulation 9,046,192 in 404 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 311 MB 2.1 GB
STEP 1.2 GB 2.9 GB
STL 452 MB 2.2 GB
OBJ 997 MB 5.7 GB
Visual
GLB 145 MB 2.5 GB
OBJ 480 MB 3.1 GB

2231. icE1usb-rs422

icE1usb-rs422: stages 4 and 6 take 45% to 80% of a run. Simulation, GLB takes 7.6 s. Simulation, STEP takes 10 s. Simulation, STL takes 7.6 s. Simulation, OBJ takes 12 s. Visual, GLB takes 12 s. Visual, OBJ takes 14 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.8 2.4 2 ms 3.1 0.2 0.6 0.3 7.6
Simulation, STEP 0.2 1.0 2.3 0.3 ms 3.1 2.6 0.6 0.3 10.0
Simulation, STL 0.2 0.8 2.2 0.4 ms 3.2 0.3 0.6 0.3 7.6
Simulation, OBJ 0.2 0.9 2.2 0.4 ms 3.1 4.7 0.5 0.4 12.0
Visual, GLB 0.2 0.8 2.3 0.5 ms 7.0 87 ms 1.0 0.3 11.6
Visual, OBJ 0.3 0.8 2.1 0.6 ms 6.9 2.9 1.0 0.3 14.3
Board Repo: osmocom/osmo-e1-hardware
Board: icE1usb-rs422.kicad_pcb
Folder hardware / icE1usb-rs422
Complexity 272 / 1000 (size 187, features 85)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 6 (20211014)
Parts, tracks, vias 52, 501, 110
Triangles, simulation 713,298 in 68 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 24 MB 318 MB
STEP 89 MB 377 MB
STL 36 MB 353 MB
OBJ 71 MB 472 MB
Visual
GLB 15 MB 399 MB
OBJ 47 MB 390 MB

2232. icE1usb

icE1usb: stages 4 and 6 take 53% to 83% of a run. Simulation, GLB takes 23 s. Simulation, STEP takes 28 s. Simulation, STL takes 23 s. Simulation, OBJ takes 35 s. Visual, GLB takes 29 s. Visual, OBJ takes 36 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 2.4 9.4 0.5 ms 8.5 0.4 1.0 0.3 22.6
Simulation, STEP 0.6 2.6 9.6 0.5 ms 8.5 5.5 0.9 0.3 28.1
Simulation, STL 0.5 2.4 9.7 1.0 ms 8.4 0.7 1.0 0.3 22.9
Simulation, OBJ 0.5 2.5 9.4 0.7 ms 9.0 11.9 1.0 0.3 34.6
Visual, GLB 0.5 2.5 9.5 0.8 ms 14.9 0.2 1.5 0.3 29.3
Visual, OBJ 0.5 2.4 9.3 1.0 ms 15.4 6.7 1.6 0.3 36.3
Board Repo: osmocom/osmo-e1-hardware
Board: icE1usb.kicad_pcb
Folder hardware / icE1usb
Complexity 315 / 1000 (size 250, features 65)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 4
File format KiCad 6 (20211014)
Parts, tracks, vias 118, 1,527, 169
Triangles, simulation 1,851,700 in 171 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 64 MB 660 MB
STEP 281 MB 823 MB
STL 93 MB 635 MB
OBJ 195 MB 1.3 GB
Visual
GLB 35 MB 756 MB
OBJ 108 MB 852 MB

2233. icE1usb

icE1usb: stages 4 and 6 take 58% to 84% of a run. Simulation, GLB takes 19 s. Simulation, STEP takes 24 s. Simulation, STL takes 20 s. Simulation, OBJ takes 28 s. Visual, GLB takes 25 s. Visual, OBJ takes 30 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 1.9 7.7 0.8 ms 8.1 0.3 0.8 0.2 19.4
Simulation, STEP 0.4 2.1 8.4 0.5 ms 7.9 4.4 0.7 0.2 24.0
Simulation, STL 0.4 2.1 8.4 0.5 ms 7.7 0.6 0.8 0.3 20.3
Simulation, OBJ 0.3 1.9 8.3 0.7 ms 8.1 8.6 0.8 0.2 28.3
Visual, GLB 0.4 2.1 8.2 0.7 ms 12.4 0.1 1.2 0.2 24.6
Visual, OBJ 0.4 2.0 8.2 0.4 ms 12.4 5.2 1.5 0.2 29.8
Board Repo: osmocom/osmo-e1-hardware
Board: icE1usb.kicad_pcb
Folder hardware / icE1usb / r0.1
Complexity 316 / 1000 (size 251, features 65)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 4
File format KiCad 5 (20171130)
Parts, tracks, vias 116, 1,597, 187
Triangles, simulation 1,861,880 in 169 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 64 MB 656 MB
STEP 276 MB 833 MB
STL 93 MB 651 MB
OBJ 196 MB 1.3 GB
Visual
GLB 35 MB 811 MB
OBJ 108 MB 806 MB

2234. icE1usb-panel

icE1usb-panel: stages 4 and 6 take 57% to 83% of a run. Simulation, GLB takes 41 s. Simulation, STEP takes 49 s. Simulation, STL takes 40 s. Simulation, OBJ takes 58 s. Visual, GLB takes 52 s. Visual, OBJ takes 64 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.7 4.4 17.6 0.6 ms 15.7 0.7 1.4 0.3 40.8
Simulation, STEP 0.7 4.3 16.8 0.6 ms 16.4 8.7 1.4 0.3 48.7
Simulation, STL 0.6 4.1 16.3 0.6 ms 16.0 1.2 1.4 0.3 39.8
Simulation, OBJ 0.7 4.2 16.7 0.6 ms 16.5 18.0 1.5 0.3 57.8
Visual, GLB 0.6 4.2 17.3 0.6 ms 26.3 0.3 3.5 0.3 52.4
Visual, OBJ 0.6 4.4 17.4 1 ms 25.9 10.8 4.3 0.3 63.8
Board Repo: osmocom/osmo-e1-hardware
Board: icE1usb-panel.kicad_pcb
Folder hardware / icE1usb / r1.0
Complexity 341 / 1000 (size 276, features 65)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 4
File format KiCad 5 (20171130)
Parts, tracks, vias 240, 3,164, 370
Triangles, simulation 3,815,094 in 169 parts
Note panel
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 132 MB 1.1 GB
STEP 572 MB 1.5 GB
STL 191 MB 1.2 GB
OBJ 408 MB 2.5 GB
Visual
GLB 74 MB 1.3 GB
OBJ 232 MB 1.6 GB

2235. icE1usb

icE1usb: stages 4 and 6 take 56% to 84% of a run. Simulation, GLB takes 26 s. Simulation, STEP takes 31 s. Simulation, STL takes 25 s. Simulation, OBJ takes 37 s. Visual, GLB takes 33 s. Visual, OBJ takes 38 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 3.0 10.7 1 ms 10.3 0.4 0.9 0.3 26.1
Simulation, STEP 0.5 2.5 10.8 0.8 ms 10.2 6.0 1.0 0.3 31.2
Simulation, STL 0.5 2.6 10.5 0.7 ms 9.6 0.8 1.0 0.3 25.4
Simulation, OBJ 0.5 2.6 10.1 1 ms 10.3 12.0 1.0 0.3 36.7
Visual, GLB 0.4 2.9 11.1 1 ms 16.5 0.2 1.7 0.3 33.1
Visual, OBJ 0.5 2.4 10.3 0.8 ms 15.6 6.3 2.2 0.3 37.6
Board Repo: osmocom/osmo-e1-hardware
Board: icE1usb.kicad_pcb
Folder hardware / icE1usb / r1.0
Complexity 316 / 1000 (size 251, features 65)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 4
File format KiCad 5 (20171130)
Parts, tracks, vias 116, 1,582, 185
Triangles, simulation 1,857,088 in 169 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 64 MB 669 MB
STEP 275 MB 834 MB
STL 93 MB 640 MB
OBJ 195 MB 1.3 GB
Visual
GLB 35 MB 815 MB
OBJ 107 MB 870 MB

2236. clk-input-fmc

clk-input-fmc: stages 4 and 6 take 43% to 82% of a run. Simulation, GLB takes 25 s. Simulation, STEP takes 33 s. Simulation, STL takes 26 s. Simulation, OBJ takes 45 s. Visual, GLB takes 40 s. Visual, OBJ takes 51 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.7 3.1 8.3 0.8 ms 11.0 0.5 1.3 0.3 25.2
Simulation, STEP 0.7 3.2 8.5 0.7 ms 11.1 7.5 1.3 0.3 32.6
Simulation, STL 0.8 3.2 8.2 0.7 ms 10.8 1.2 1.3 0.3 25.7
Simulation, OBJ 0.8 3.2 8.2 0.8 ms 10.8 20.2 1.3 0.3 44.8
Visual, GLB 0.8 3.2 8.3 0.8 ms 24.4 0.3 2.7 0.2 40.0
Visual, OBJ 0.7 3.3 8.6 0.8 ms 24.2 10.6 3.3 0.2 51.0
Board Repo: osprey-dcs/clk-input-fmc
Board: clk-input-fmc.kicad_pcb
Complexity 417 / 1000 (size 272, features 145)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
arc tracks, filled zones,
curved board outline,
knockout text, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 6
File format KiCad 9 (20241229)
Parts, tracks, vias 139, 1,528, 348
Triangles, simulation 3,732,828 in 355 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 124 MB 1.3 GB
STEP 414 MB 1.5 GB
STL 187 MB 1.4 GB
OBJ 390 MB 2.4 GB
Visual
GLB 71 MB 1.6 GB
OBJ 225 MB 1.6 GB

2237. trigger-output-fmc

trigger-output-fmc: stages 4 and 6 take 43% to 82% of a run. Simulation, GLB takes 52 s. Simulation, STEP takes 66 s. Simulation, STL takes 54 s. Simulation, OBJ takes 95 s. Visual, GLB takes 81 s. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.6 6.4 16.2 1 ms 22.8 1.3 3.2 0.4 51.8
Simulation, STEP 2.1 6.5 16.8 1 ms 23.0 14.5 2.9 0.3 66.1
Simulation, STL 1.7 6.7 16.3 1 ms 23.2 2.9 2.8 0.4 54.1
Simulation, OBJ 1.5 7.1 17.4 1 ms 23.2 42.7 2.9 0.4 95.2
Visual, GLB 1.6 6.5 17.1 2 ms 48.7 0.7 5.7 0.3 80.7
Visual, OBJ 1.6 6.8 17.9 1 ms 47.3 20.9 5.1 0.3 99.9
Board Repo: osprey-dcs/trigger-output-fmc
Board: trigger-output-fmc.kicad_pcb
Complexity 428 / 1000 (size 298, features 130)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
knockout text, stack-up,
dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 8
File format KiCad 9 (20241229)
Parts, tracks, vias 323, 3,090, 543
Triangles, simulation 6,780,940 in 429 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 225 MB 2.1 GB
STEP 730 MB 2.3 GB
STL 339 MB 2.0 GB
OBJ 722 MB 4.2 GB
Visual
GLB 115 MB 2.0 GB
OBJ 373 MB 2.5 GB

2238. HarleyGhostRider

HarleyGhostRider: stages 4 and 6 take 46% to 83% of a run. Simulation, GLB takes 35 s. Simulation, STEP takes 41 s. Simulation, STL takes 35 s. Simulation, OBJ takes 58 s. Visual, GLB takes 51 s. Visual, OBJ takes 60 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.6 4.3 12.2 0.9 ms 14.6 0.7 2.4 0.3 35.0
Simulation, STEP 0.6 4.2 11.8 1 ms 14.2 8.0 2.3 0.3 41.4
Simulation, STL 0.6 4.4 11.6 1 ms 14.7 1.4 2.3 0.3 35.3
Simulation, OBJ 0.6 4.2 11.9 1 ms 14.9 23.7 2.4 0.3 57.9
Visual, GLB 0.6 4.4 12.8 1 ms 29.9 0.3 3.1 0.3 51.4
Visual, OBJ 0.6 4.5 12.4 0.9 ms 28.1 10.1 3.7 0.3 59.8
Board Repo: osrf/ovc
Board: HarleyGhostRider.kicad_pcb
Folder ovc0 / hardware / HarleyGhostRider
Complexity 393 / 1000 (size 318, features 75)
KESE features through vias, microvias,
filled zones
Tested 9th November 2026
Copper layers 10
File format KiCad 4 (4)
Parts, tracks, vias 172, 3,596, 586
Triangles, simulation 5,222,722 in 323 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 180 MB 1.1 GB
STEP 541 MB 1.5 GB
STL 261 MB 1.1 GB
OBJ 572 MB 3.3 GB
Visual
GLB 77 MB 1.4 GB
OBJ 259 MB 1.8 GB

2239. HarleyTandem

HarleyTandem: stages 4 and 6 take 49% to 81% of a run. Simulation, GLB takes 23 s. Simulation, STEP takes 28 s. Simulation, STL takes 24 s. Simulation, OBJ takes 36 s. Visual, GLB takes 36 s. Visual, OBJ takes 43 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.7 2.5 9.1 0.7 ms 8.4 0.5 1.2 0.3 22.8
Simulation, STEP 0.7 2.5 9.3 1 ms 8.2 5.9 1.2 0.3 28.1
Simulation, STL 0.7 2.6 9.3 0.9 ms 8.6 0.9 1.2 0.3 23.6
Simulation, OBJ 0.7 2.9 9.3 0.8 ms 8.4 13.3 1.2 0.3 36.0
Visual, GLB 0.7 2.7 9.7 1.0 ms 19.7 0.3 2.8 0.3 36.2
Visual, OBJ 0.7 2.7 9.1 0.7 ms 19.2 8.1 2.9 0.3 43.0
Board Repo: osrf/ovc
Board: HarleyTandem.kicad_pcb
Folder ovc0 / hardware / HarleyTandem
Complexity 334 / 1000 (size 289, features 45)
KESE features through vias, filled zones,
curved board outline
Tested 9th November 2026
Copper layers 6
File format KiCad 4 (4)
Parts, tracks, vias 118, 6,483, 276
Triangles, simulation 2,715,904 in 132 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 94 MB 935 MB
STEP 358 MB 995 MB
STL 136 MB 913 MB
OBJ 290 MB 1.8 GB
Visual
GLB 57 MB 1.2 GB
OBJ 178 MB 1.3 GB

2240. HarleyTandemRevB

HarleyTandemRevB: stages 4 and 6 take 49% to 82% of a run. Simulation, GLB takes 22 s. Simulation, STEP takes 28 s. Simulation, STL takes 24 s. Simulation, OBJ takes 37 s. Visual, GLB takes 32 s. Visual, OBJ takes 40 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 2.7 9.9 0.7 ms 7.4 0.4 1.2 0.3 22.4
Simulation, STEP 0.5 2.7 10.0 0.7 ms 7.5 5.3 1.3 0.3 27.6
Simulation, STL 0.6 2.8 10.1 0.7 ms 8.0 0.8 1.2 0.3 23.9
Simulation, OBJ 0.6 2.6 10.2 0.7 ms 7.8 13.8 1.3 0.3 36.5
Visual, GLB 0.5 2.7 10.2 0.6 ms 16.2 0.2 2.0 0.3 32.1
Visual, OBJ 0.5 2.6 9.9 1 ms 16.3 8.2 2.2 0.3 40.0
Board Repo: osrf/ovc
Board: HarleyTandemRevB.kicad_pcb
Folder ovc0 / hardware / HarleyTandem
Complexity 321 / 1000 (size 276, features 45)
KESE features through vias, filled zones,
curved board outline
Tested 9th November 2026
Copper layers 6
File format KiCad 5 (20160815)
Parts, tracks, vias 149, 2,035, 258
Triangles, simulation 2,500,382 in 162 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 88 MB 773 MB
STEP 298 MB 886 MB
STL 125 MB 805 MB
OBJ 268 MB 1.7 GB
Visual
GLB 49 MB 887 MB
OBJ 151 MB 1.1 GB

2241. ovc

ovc: stages 4 and 6 take 49% to 83% of a run. Simulation, GLB takes 72 s. Simulation, STEP takes 88 s. Simulation, STL takes 73 s. Simulation, OBJ takes 2 min. Visual, GLB takes 2 min. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.5 7.7 29.2 2 ms 27.9 1.5 3.6 0.5 71.9
Simulation, STEP 1.5 7.6 28.8 2 ms 28.5 17.4 3.5 0.5 87.8
Simulation, STL 1.3 7.5 28.9 2 ms 28.3 3.2 3.6 0.4 73.1
Simulation, OBJ 1.4 7.4 28.1 2 ms 27.6 45.0 3.4 0.4 113.2
Visual, GLB 1.4 7.3 28.9 2 ms 59.8 0.8 7.9 0.3 106.3
Visual, OBJ 1.7 7.4 27.8 2 ms 62.3 21.1 8.1 0.4 128.7
Board Repo: osrf/ovc
Board: ovc.kicad_pcb
Folder ovc1 / hardware
Complexity 358 / 1000 (size 313, features 45)
KESE features through vias, slotted holes,
filled zones
Tested 9th November 2026
Copper layers 6
File format KiCad 5 (20171130)
Parts, tracks, vias 379, 6,661, 835
Triangles, simulation 8,267,486 in 701 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 287 MB 1.9 GB
STEP 1.1 GB 2.6 GB
STL 413 MB 2.1 GB
OBJ 896 MB 5.3 GB
Visual
GLB 151 MB 2.5 GB
OBJ 485 MB 3.0 GB

2242. mobof

mobof: stages 4 and 6 take 59% to 86% of a run. Simulation, GLB takes 27 s. Simulation, STEP takes 34 s. Simulation, STL takes 28 s. Simulation, OBJ takes 38 s. Visual, GLB takes 38 s. Visual, OBJ takes 45 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.6 2.5 13.2 2 ms 9.3 0.4 0.9 0.3 27.2
Simulation, STEP 0.5 2.6 13.5 1 ms 9.3 6.3 1.0 0.3 33.5
Simulation, STL 0.6 2.6 13.6 1 ms 9.4 0.9 1.0 0.3 28.4
Simulation, OBJ 0.6 2.5 13.1 1 ms 9.1 11.1 1.0 0.3 37.7
Visual, GLB 0.6 2.6 13.1 1 ms 19.5 0.2 1.9 0.2 38.1
Visual, OBJ 0.6 2.7 13.1 2 ms 20.0 6.0 2.3 0.3 45.0
Board Repo: osrf/ovc
Board: mobof.kicad_pcb
Folder ovc2 / hardware / ovc2a / graveyard / mobof
Complexity 314 / 1000 (size 259, features 55)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones
Tested 9th November 2026
Copper layers 6
File format KiCad 5 (20171130)
Parts, tracks, vias 225, 323, 93
Triangles, simulation 2,331,998 in 555 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 78 MB 763 MB
STEP 364 MB 1.0 GB
STL 117 MB 741 MB
OBJ 248 MB 1.6 GB
Visual
GLB 42 MB 942 MB
OBJ 128 MB 942 MB

2243. ovc2_mono

ovc2_mono: stages 4 and 6 take 54% to 86% of a run. Simulation, GLB takes 17 s. Simulation, STEP takes 21 s. Simulation, STL takes 17 s. Simulation, OBJ takes 26 s. Visual, GLB takes 24 s. Visual, OBJ takes 32 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.4 1.6 8.1 0.9 ms 6.0 0.3 0.6 0.2 17.1
Simulation, STEP 0.4 1.7 7.8 0.6 ms 5.8 4.7 0.6 0.2 21.2
Simulation, STL 0.4 1.6 7.9 1 ms 5.9 0.5 0.6 0.2 17.2
Simulation, OBJ 0.4 1.6 7.9 0.8 ms 5.9 8.9 0.6 0.2 25.6
Visual, GLB 0.4 1.5 7.8 0.8 ms 13.1 0.1 1.1 0.3 24.4
Visual, OBJ 0.5 1.6 8.6 1 ms 13.9 5.4 1.3 0.2 31.6
Board Repo: osrf/ovc
Board: ovc2_mono.kicad_pcb
Folder ovc2 / hardware / ovc2a / graveyard / mono
Complexity 290 / 1000 (size 255, features 35)
KESE features through vias, filled zones
Tested 9th November 2026
Copper layers 6
File format KiCad 5 (20171130)
Parts, tracks, vias 134, 386, 90
Triangles, simulation 1,501,204 in 379 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 51 MB 559 MB
STEP 229 MB 763 MB
STL 75 MB 564 MB
OBJ 158 MB 1.1 GB
Visual
GLB 31 MB 679 MB
OBJ 94 MB 716 MB

2244. mono_imu

mono_imu: stages 4 and 6 take 40% to 72% of a run. Simulation, GLB takes 1.3 s. Simulation, STEP takes 1.9 s. Simulation, STL takes 1.3 s. Simulation, OBJ takes 1.6 s. Visual, GLB takes 1.7 s. Visual, OBJ takes 2.0 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 88 ms 0.1 0.4 0.2 ms 0.5 16 ms 54 ms 0.2 1.3
Simulation, STEP 79 ms 92 ms 0.3 0.1 ms 0.5 0.7 54 ms 0.2 1.9
Simulation, STL 86 ms 98 ms 0.3 0.2 ms 0.5 23 ms 71 ms 0.3 1.3
Simulation, OBJ 83 ms 0.1 0.3 0.3 ms 0.5 0.4 75 ms 0.2 1.6
Visual, GLB 93 ms 96 ms 0.3 0.2 ms 0.9 8 ms 62 ms 0.2 1.7
Visual, OBJ 85 ms 98 ms 0.3 0.2 ms 1.0 0.2 68 ms 0.2 2.0
Board Repo: osrf/ovc
Board: mono_imu.kicad_pcb
Folder ovc2 / hardware / ovc2a / graveyard / mono_imu
Complexity 134 / 1000 (size 114, features 20)
KESE features filled zones
Tested 9th November 2026
Copper layers 6
File format KiCad 5 (20171130)
Parts, tracks, vias 6, 20, 0
Triangles, simulation 77,536 in 43 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 2.6 MB 169 MB
STEP 8.0 MB 173 MB
STL 3.9 MB 168 MB
OBJ 7.5 MB 167 MB
Visual
GLB 1.2 MB 151 MB
OBJ 3.3 MB 151 MB

2245. ovc2_mobo

ovc2_mobo: stages 4 and 6 take 51% to 84% of a run. Simulation, GLB takes 47 s. Simulation, STEP takes 56 s. Simulation, STL takes 47 s. Simulation, OBJ takes 72 s. Visual, GLB takes 64 s. Visual, OBJ takes 78 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.9 4.9 20.6 1 ms 17.2 0.8 2.4 0.4 47.1
Simulation, STEP 0.8 4.9 20.4 2 ms 16.7 10.3 2.0 0.3 55.5
Simulation, STL 0.9 4.8 20.7 1 ms 16.7 1.5 2.4 0.3 47.3
Simulation, OBJ 0.8 4.8 20.2 1 ms 16.6 27.4 2.2 0.3 72.4
Visual, GLB 0.8 4.7 20.2 2 ms 33.0 0.4 4.3 0.3 63.7
Visual, OBJ 0.8 4.7 20.4 1 ms 33.5 14.0 4.3 0.3 77.9
Board Repo: osrf/ovc
Board: ovc2_mobo.kicad_pcb
Folder ovc2 / hardware / ovc2a / mobo
Complexity 330 / 1000 (size 275, features 55)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones
Tested 9th November 2026
Copper layers 6
File format KiCad 5 (20171130)
Parts, tracks, vias 181, 2,473, 450
Triangles, simulation 4,341,994 in 430 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 150 MB 1.3 GB
STEP 529 MB 1.5 GB
STL 217 MB 1.2 GB
OBJ 468 MB 2.9 GB
Visual
GLB 76 MB 1.4 GB
OBJ 246 MB 1.7 GB

2246. ovc2_stereo

ovc2_stereo: stages 4 and 6 take 48% to 83% of a run. Simulation, GLB takes 56 s. Simulation, STEP takes 70 s. Simulation, STL takes 57 s. Simulation, OBJ takes 93 s. Visual, GLB takes 83 s. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.1 6.2 22.6 1 ms 22.0 1.1 2.7 0.4 56.2
Simulation, STEP 1.2 6.3 23.0 3 ms 22.4 13.8 2.7 0.3 69.7
Simulation, STL 1.1 6.2 22.9 1 ms 22.0 2.2 2.8 0.4 57.4
Simulation, OBJ 1.1 6.2 22.4 2 ms 21.9 37.8 2.7 0.4 92.6
Visual, GLB 1.2 6.3 22.9 3 ms 46.1 0.6 5.7 0.4 83.1
Visual, OBJ 1.2 6.3 23.6 1 ms 49.9 20.3 6.3 0.3 108.0
Board Repo: osrf/ovc
Board: ovc2_stereo.kicad_pcb
Folder ovc2 / hardware / ovc2a / stereo
Complexity 345 / 1000 (size 300, features 45)
KESE features through vias, filled zones,
curved board outline
Tested 9th November 2026
Copper layers 6
File format KiCad 5 (20171130)
Parts, tracks, vias 215, 4,411, 693
Triangles, simulation 5,974,648 in 519 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 207 MB 1.5 GB
STEP 751 MB 2.0 GB
STL 299 MB 1.5 GB
OBJ 648 MB 3.8 GB
Visual
GLB 111 MB 1.9 GB
OBJ 356 MB 2.4 GB

2247. ovc2_mobo

ovc2_mobo: stages 4 and 6 take 57% to 84% of a run. Simulation, GLB takes 50 s. Simulation, STEP takes 57 s. Simulation, STL takes 50 s. Simulation, OBJ takes 71 s. Visual, GLB takes 70 s. Visual, OBJ takes 79 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.8 5.4 23.7 2 ms 16.9 0.7 2.1 0.3 50.0
Simulation, STEP 0.8 5.2 22.3 2 ms 16.5 9.6 2.0 0.3 56.6
Simulation, STL 0.6 5.3 23.3 1 ms 16.8 1.7 2.1 0.3 50.0
Simulation, OBJ 0.7 5.3 23.3 1 ms 17.1 22.1 2.1 0.3 70.9
Visual, GLB 0.7 5.3 23.9 2 ms 35.0 0.4 4.3 0.3 69.9
Visual, OBJ 0.8 5.4 24.0 2 ms 32.5 11.6 4.5 0.3 79.1
Board Repo: osrf/ovc
Board: ovc2_mobo.kicad_pcb
Folder ovc2 / hardware / ovc2b / mobo
Complexity 341 / 1000 (size 286, features 55)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones
Tested 9th November 2026
Copper layers 6
File format KiCad 5 (20171130)
Parts, tracks, vias 189, 3,726, 442
Triangles, simulation 4,626,256 in 447 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 160 MB 1.2 GB
STEP 623 MB 1.6 GB
STL 231 MB 1.2 GB
OBJ 499 MB 3.0 GB
Visual
GLB 81 MB 1.5 GB
OBJ 262 MB 1.9 GB

2248. ovc2_stereo

ovc2_stereo: stages 4 and 6 take 47% to 83% of a run. Simulation, GLB takes 62 s. Simulation, STEP takes 77 s. Simulation, STL takes 61 s. Simulation, OBJ takes 2 min. Visual, GLB takes 86 s. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.1 8.0 25.2 1 ms 22.5 1.3 3.0 0.4 61.5
Simulation, STEP 1.3 8.1 24.9 1 ms 23.2 15.1 3.9 0.4 77.0
Simulation, STL 1.6 8.3 23.9 1 ms 22.1 2.2 2.7 0.4 61.2
Simulation, OBJ 1.3 8.1 24.3 2 ms 22.8 40.1 3.3 0.4 100.2
Visual, GLB 1.2 8.1 24.5 2 ms 46.5 0.6 4.7 0.3 86.0
Visual, OBJ 1.2 8.0 24.8 1 ms 47.3 19.7 4.7 0.3 106.1
Board Repo: osrf/ovc
Board: ovc2_stereo.kicad_pcb
Folder ovc2 / hardware / ovc2b / stereo
Complexity 355 / 1000 (size 300, features 55)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 6
File format KiCad 5 (20171130)
Parts, tracks, vias 244, 5,057, 740
Triangles, simulation 6,710,900 in 522 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 232 MB 1.6 GB
STEP 900 MB 2.2 GB
STL 336 MB 1.6 GB
OBJ 727 MB 4.3 GB
Visual
GLB 122 MB 2.1 GB
OBJ 394 MB 2.7 GB

2249. backpack

backpack: stages 4 and 6 take 52% to 82% of a run. Simulation, GLB takes 12 s. Simulation, STEP takes 15 s. Simulation, STL takes 13 s. Simulation, OBJ takes 18 s. Visual, GLB takes 17 s. Visual, OBJ takes 20 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 1.6 5.7 0.8 ms 3.8 0.2 0.5 0.2 12.3
Simulation, STEP 0.3 1.6 5.8 0.4 ms 3.8 2.9 0.6 0.2 15.2
Simulation, STL 0.3 1.7 5.7 0.6 ms 3.9 0.3 0.5 0.2 12.7
Simulation, OBJ 0.3 1.7 5.8 0.5 ms 3.8 6.2 0.5 0.2 18.4
Visual, GLB 0.3 1.5 5.5 0.5 ms 8.3 0.1 1.0 0.2 17.0
Visual, OBJ 0.3 1.6 5.3 0.6 ms 8.6 3.3 1.0 0.2 20.3
Board Repo: osrf/ovc
Board: backpack.kicad_pcb
Folder ovc3 / hardware / ovc3a / ovc3a / backpack
Complexity 235 / 1000 (size 190, features 45)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones
Tested 9th November 2026
Copper layers 4
File format KiCad 6 (20190605)
Parts, tracks, vias 54, 692, 106
Triangles, simulation 1,324,744 in 127 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 46 MB 509 MB
STEP 205 MB 551 MB
STL 66 MB 494 MB
OBJ 138 MB 925 MB
Visual
GLB 25 MB 556 MB
OBJ 75 MB 621 MB

2250. ovc3

ovc3: stages 4 and 6 take 47% to 81% of a run. Simulation, GLB takes 49 s. Simulation, STEP takes 59 s. Simulation, STL takes 49 s. Simulation, OBJ takes 78 s. Visual, GLB takes 65 s. Visual, OBJ takes 81 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.1 7.1 18.6 1 ms 18.8 1.1 2.6 0.3 49.5
Simulation, STEP 1.1 6.6 18.2 2 ms 18.5 11.5 2.8 0.4 59.0
Simulation, STL 1.1 6.8 18.5 1 ms 18.6 1.6 2.6 0.3 49.4
Simulation, OBJ 1.0 6.9 17.6 2 ms 18.7 30.6 2.5 0.3 77.6
Visual, GLB 1.1 6.7 18.2 1 ms 35.1 0.5 3.6 0.3 65.4
Visual, OBJ 1.0 6.8 19.1 1 ms 35.1 15.1 3.2 0.3 80.5
Board Repo: osrf/ovc
Board: ovc3.kicad_pcb
Folder ovc3 / hardware / ovc3a / ovc3a / camera
Complexity 373 / 1000 (size 303, features 70)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings
Tested 9th November 2026
Copper layers 6
File format KiCad 6 (20190331)
Parts, tracks, vias 148, 4,165, 531
Triangles, simulation 5,090,930 in 380 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 176 MB 1.2 GB
STEP 618 MB 1.6 GB
STL 255 MB 1.2 GB
OBJ 548 MB 3.3 GB
Visual
GLB 84 MB 1.5 GB
OBJ 271 MB 1.8 GB

2251. external_camera

external_camera: stages 4 and 6 take 45% to 79% of a run. Simulation, GLB takes 12 s. Simulation, STEP takes 14 s. Simulation, STL takes 12 s. Simulation, OBJ takes 19 s. Visual, GLB takes 16 s. Visual, OBJ takes 21 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 1.6 4.3 0.5 ms 4.4 0.2 0.6 0.3 11.7
Simulation, STEP 0.3 1.6 4.3 0.5 ms 4.2 3.2 0.5 0.2 14.3
Simulation, STL 0.3 1.7 4.3 0.7 ms 4.2 0.4 0.6 0.3 11.7
Simulation, OBJ 0.3 1.6 4.3 0.5 ms 4.3 8.0 0.6 0.3 19.3
Visual, GLB 0.3 1.6 4.4 0.7 ms 8.6 0.1 1.1 0.2 16.4
Visual, OBJ 0.3 1.6 4.4 0.6 ms 8.7 4.6 1.1 0.2 20.9
Board Repo: osrf/ovc
Board: external_camera.kicad_pcb
Folder ovc3 / hardware / ovc3a / ovc3a / external_camera
Complexity 339 / 1000 (size 264, features 75)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 6
File format KiCad 6 (20190905)
Parts, tracks, vias 62, 818, 144
Triangles, simulation 1,370,156 in 90 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 46 MB 514 MB
STEP 180 MB 569 MB
STL 69 MB 511 MB
OBJ 142 MB 936 MB
Visual
GLB 25 MB 580 MB
OBJ 77 MB 607 MB

2252. ovc3

ovc3: stages 4 and 6 take 49% to 81% of a run. Simulation, GLB takes 47 s. Simulation, STEP takes 56 s. Simulation, STL takes 47 s. Simulation, OBJ takes 72 s. Visual, GLB takes 65 s. Visual, OBJ takes 80 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.3 6.4 17.7 1 ms 17.9 0.9 2.4 0.3 46.9
Simulation, STEP 1.3 6.4 17.5 1 ms 17.6 10.5 2.4 0.4 56.0
Simulation, STL 1.2 6.2 18.1 1 ms 17.4 1.9 2.3 0.3 47.4
Simulation, OBJ 1.1 6.0 17.5 1 ms 17.9 26.3 2.7 0.4 71.9
Visual, GLB 1.2 6.5 17.6 1 ms 35.1 0.4 4.4 0.3 65.4
Visual, OBJ 1.3 6.8 17.5 1 ms 35.9 13.1 4.9 0.3 79.8
Board Repo: osrf/ovc
Board: ovc3.kicad_pcb
Folder ovc3 / hardware / ovc3b / ovc3b / camera
Complexity 411 / 1000 (size 306, features 105)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
stack-up, dielectric εr and tanδ,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 6
File format KiCad 6 (20200119)
Parts, tracks, vias 166, 4,554, 549
Triangles, simulation 5,252,182 in 401 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 178 MB 1.4 GB
STEP 668 MB 1.7 GB
STL 263 MB 1.4 GB
OBJ 564 MB 3.4 GB
Visual
GLB 90 MB 1.7 GB
OBJ 290 MB 2.0 GB

2253. vectornav_carrier

vectornav_carrier: stages 4 and 6 take 48% to 78% of a run. Simulation, GLB takes 4.9 s. Simulation, STEP takes 6.3 s. Simulation, STL takes 4.9 s. Simulation, OBJ takes 7.2 s. Visual, GLB takes 6.5 s. Visual, OBJ takes 8.1 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.6 1.8 0.3 ms 1.6 87 ms 0.3 0.3 4.9
Simulation, STEP 0.2 0.7 1.9 0.3 ms 1.5 1.5 0.3 0.2 6.3
Simulation, STL 0.2 0.6 1.9 0.2 ms 1.5 0.1 0.3 0.2 4.9
Simulation, OBJ 0.2 0.7 1.9 0.2 ms 1.6 2.4 0.3 0.2 7.2
Visual, GLB 0.2 0.6 1.6 0.4 ms 3.5 49 ms 0.3 0.3 6.5
Visual, OBJ 0.2 0.7 2.0 0.3 ms 3.3 1.4 0.3 0.2 8.1
Board Repo: osrf/ovc
Board: vectornav_carrier.kicad_pcb
Folder ovc3 / hardware / ovc3b / ovc3b / vectornav_carrier
Complexity 225 / 1000 (size 170, features 55)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 4
File format KiCad 6 (20200104)
Parts, tracks, vias 23, 374, 44
Triangles, simulation 529,270 in 74 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 18 MB 310 MB
STEP 72 MB 317 MB
STL 26 MB 276 MB
OBJ 54 MB 406 MB
Visual
GLB 10 MB 297 MB
OBJ 30 MB 301 MB

2254. ovc4

ovc4: stages 4 and 6 take 53% to 83% of a run. Simulation, GLB takes 46 s. Simulation, STEP takes 52 s. Simulation, STL takes 45 s. Simulation, OBJ takes 69 s. Visual, GLB takes 66 s. Visual, OBJ takes 82 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.1 4.4 19.4 2 ms 17.8 1.0 2.1 0.4 46.2
Simulation, STEP 1.1 4.1 18.4 2 ms 16.7 9.8 2.0 0.3 52.3
Simulation, STL 1.0 4.2 18.5 1 ms 17.1 2.1 2.1 0.3 45.4
Simulation, OBJ 1.2 3.9 18.9 1 ms 17.4 25.1 2.0 0.3 68.7
Visual, GLB 1.3 4.2 19.2 1 ms 35.6 0.5 4.6 0.3 65.7
Visual, OBJ 1.2 4.8 20.0 2 ms 36.4 13.8 5.2 0.3 81.6
Board Repo: osrf/ovc
Board: ovc4.kicad_pcb
Folder ovc4 / hardware / carrier
Complexity 400 / 1000 (size 295, features 105)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
stack-up, dielectric εr and tanδ,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 6
File format KiCad 6 (20200614)
Parts, tracks, vias 180, 4,476, 494
Triangles, simulation 4,999,158 in 351 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 168 MB 1.5 GB
STEP 636 MB 1.7 GB
STL 250 MB 1.4 GB
OBJ 536 MB 3.2 GB
Visual
GLB 87 MB 1.5 GB
OBJ 280 MB 2.0 GB

2255. ovc5

ovc5: stages 4 and 6 take 46% to 81% of a run. Simulation, GLB takes 52 s. Simulation, STEP takes 67 s. Simulation, STL takes 55 s. Simulation, OBJ takes 89 s. Visual, GLB takes 80 s. Visual, OBJ takes 97 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.5 6.0 16.0 1.0 ms 23.9 1.0 2.7 0.3 51.5
Simulation, STEP 1.6 6.3 16.8 2 ms 24.5 14.5 2.9 0.3 66.8
Simulation, STL 1.6 6.0 16.8 2 ms 24.6 2.8 2.7 0.3 54.8
Simulation, OBJ 1.5 6.1 16.4 1.0 ms 24.2 37.3 2.8 0.3 88.6
Visual, GLB 1.6 6.1 16.8 1 ms 48.3 0.5 6.2 0.3 80.0
Visual, OBJ 1.6 6.2 15.7 1 ms 46.8 19.6 6.4 0.3 96.7
Board Repo: osrf/ovc
Board: ovc5.kicad_pcb
Folder ovc5 / hardware / carrier
Complexity 425 / 1000 (size 295, features 130)
KESE features through vias, slotted holes,
custom pads, rounded,
trapezoid or chamfered pads,
arc tracks, filled zones,
copper drawings, stack-up,
dielectric εr and tanδ,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 6
File format KiCad 6 (20210722)
Parts, tracks, vias 197, 4,301, 769
Triangles, simulation 6,161,454 in 408 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 203 MB 1.7 GB
STEP 687 MB 2.2 GB
STL 308 MB 1.7 GB
OBJ 654 MB 3.8 GB
Visual
GLB 116 MB 2.0 GB
OBJ 378 MB 2.5 GB

2256. battery_contact

battery_contact: stages 4 and 6 take 31% to 57% of a run. Simulation, GLB takes 0.8 s. Simulation, STEP takes 1.3 s. Simulation, STL takes 0.9 s. Simulation, OBJ takes 1.1 s. Visual, GLB takes 1.0 s. Visual, OBJ takes 1.2 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 82 ms 68 ms 0.1 0.1 ms 0.3 11 ms 20 ms 0.2 0.8
Simulation, STEP 88 ms 66 ms 0.1 0.1 ms 0.3 0.6 19 ms 0.2 1.3
Simulation, STL 87 ms 66 ms 0.1 1.0 ms 0.3 18 ms 29 ms 0.2 0.9
Simulation, OBJ 0.1 93 ms 0.1 0.1 ms 0.3 0.2 23 ms 0.3 1.1
Visual, GLB 85 ms 70 ms 0.1 0.1 ms 0.4 8 ms 59 ms 0.2 1.0
Visual, OBJ 95 ms 74 ms 0.1 0.1 ms 0.4 0.2 55 ms 0.2 1.2
Board Repo: osusat/cubesat
Board: battery_contact.kicad_pcb
Folder eps / v1 / battery_contact_l
Complexity 161 / 1000 (size 101, features 60)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 2, 9, 25
Triangles, simulation 52,764 in 14 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 1.8 MB 70 MB
STEP 3.8 MB 172 MB
STL 2.6 MB 71 MB
OBJ 5.1 MB 93 MB
Visual
GLB 1.4 MB 110 MB
OBJ 3.9 MB 112 MB

2257. battery_contact_panel

battery_contact_panel: stages 4 and 6 take 39% to 70% of a run. Simulation, GLB takes 1.6 s. Simulation, STEP takes 2.3 s. Simulation, STL takes 1.6 s. Simulation, OBJ takes 2.2 s. Visual, GLB takes 2.2 s. Visual, OBJ takes 2.9 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.2 0.3 0.1 ms 0.6 38 ms 57 ms 0.2 1.6
Simulation, STEP 0.1 0.2 0.3 0.1 ms 0.6 0.8 51 ms 0.2 2.3
Simulation, STL 0.1 0.2 0.3 0.1 ms 0.6 32 ms 58 ms 0.3 1.6
Simulation, OBJ 0.1 0.2 0.3 0.1 ms 0.6 0.6 70 ms 0.2 2.2
Visual, GLB 0.1 0.2 0.3 0.1 ms 1.2 20 ms 0.1 0.2 2.2
Visual, OBJ 0.2 0.2 0.3 0.1 ms 1.3 0.5 0.1 0.3 2.9
Board Repo: osusat/cubesat
Board: battery_contact_panel.kicad_pcb
Folder eps / v1 / battery_contact_panel
Complexity 178 / 1000 (size 118, features 60)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 4, 18, 50
Triangles, simulation 118,252 in 18 parts
Note panel
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 4.1 MB 194 MB
STEP 8.1 MB 196 MB
STL 5.9 MB 199 MB
OBJ 12 MB 196 MB
Visual
GLB 2.9 MB 154 MB
OBJ 8.5 MB 154 MB

2258. battery_contact

battery_contact: stages 4 and 6 take 33% to 57% of a run. Simulation, GLB takes 0.9 s. Simulation, STEP takes 1.6 s. Simulation, STL takes 1.0 s. Simulation, OBJ takes 1.3 s. Visual, GLB takes 1.2 s. Visual, OBJ takes 1.4 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 92 ms 0.1 0.1 ms 0.3 10 ms 24 ms 0.2 0.9
Simulation, STEP 0.1 95 ms 0.2 0.1 ms 0.3 0.7 22 ms 0.2 1.6
Simulation, STL 0.1 87 ms 0.2 0.1 ms 0.4 19 ms 23 ms 0.3 1.0
Simulation, OBJ 0.1 90 ms 0.2 0.1 ms 0.4 0.3 34 ms 0.2 1.3
Visual, GLB 0.1 80 ms 0.2 0.1 ms 0.5 10 ms 73 ms 0.2 1.2
Visual, OBJ 99 ms 91 ms 0.2 0.1 ms 0.5 0.2 58 ms 0.2 1.4
Board Repo: osusat/cubesat
Board: battery_contact.kicad_pcb
Folder eps / v1 / battery_contact_r
Complexity 161 / 1000 (size 101, features 60)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 2, 9, 25
Triangles, simulation 53,024 in 14 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 1.8 MB 70 MB
STEP 3.9 MB 169 MB
STL 2.7 MB 72 MB
OBJ 5.1 MB 92 MB
Visual
GLB 1.4 MB 111 MB
OBJ 3.9 MB 110 MB

2259. eps

eps: stages 4 and 6 take 45% to 82% of a run. Simulation, GLB takes 51 s. Simulation, STEP takes 66 s. Simulation, STL takes 52 s. Simulation, OBJ takes 86 s. Visual, GLB takes 81 s. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2.0 6.3 17.9 1 ms 20.5 0.9 2.9 0.3 50.7
Simulation, STEP 1.9 6.3 17.7 1 ms 20.6 16.3 3.0 0.3 66.1
Simulation, STL 2.0 6.3 17.7 0.8 ms 20.8 1.9 3.0 0.4 52.1
Simulation, OBJ 1.9 6.5 17.6 0.7 ms 20.9 35.8 2.9 0.3 86.0
Visual, GLB 1.9 6.4 17.7 0.8 ms 49.4 0.6 5.1 0.3 81.5
Visual, OBJ 1.9 6.3 17.7 0.8 ms 50.2 21.8 4.9 0.3 103.1
Board Repo: osusat/cubesat
Board: eps.kicad_pcb
Folder eps / v1 / hardware
Complexity 426 / 1000 (size 301, features 125)
KESE features through vias, slotted holes,
custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
TrueType text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 6
File format KiCad 10 (20260206)
Parts, tracks, vias 365, 4,165, 712
Triangles, simulation 6,530,910 in 332 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 221 MB 1.8 GB
STEP 981 MB 2.3 GB
STL 327 MB 1.8 GB
OBJ 694 MB 4.2 GB
Visual
GLB 139 MB 2.3 GB
OBJ 442 MB 2.8 GB

2260. obc

obc: stages 4 and 6 take 48% to 79% of a run. Simulation, GLB takes 34 s. Simulation, STEP takes 41 s. Simulation, STL takes 35 s. Simulation, OBJ takes 56 s. Visual, GLB takes 57 s. Visual, OBJ takes 67 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.0 4.7 12.5 1 ms 13.2 0.6 1.6 0.3 33.8
Simulation, STEP 1.1 4.6 12.4 1 ms 13.2 8.4 1.4 0.3 41.3
Simulation, STL 1.0 4.8 12.6 2 ms 13.3 1.1 1.6 0.4 34.7
Simulation, OBJ 1.0 4.7 12.9 0.7 ms 14.0 21.0 1.6 0.3 55.6
Visual, GLB 1.0 5.8 13.6 2 ms 31.1 0.4 4.5 0.3 56.8
Visual, OBJ 1.1 5.7 13.8 1 ms 28.6 12.9 4.7 0.3 67.2
Board Repo: osusat/cubesat
Board: obc.kicad_pcb
Folder obc / v1 / hardware
Complexity 397 / 1000 (size 262, features 135)
KESE features through vias, slotted holes,
custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
copper text, knockout text,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 144, 1,011, 940
Triangles, simulation 3,414,442 in 208 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 116 MB 1.4 GB
STEP 338 MB 1.6 GB
STL 171 MB 1.4 GB
OBJ 358 MB 2.2 GB
Visual
GLB 70 MB 1.2 GB
OBJ 220 MB 1.5 GB

2261. payload

payload: stages 4 and 6 take 48% to 79% of a run. Simulation, GLB takes 20 s. Simulation, STEP takes 26 s. Simulation, STL takes 22 s. Simulation, OBJ takes 32 s. Visual, GLB takes 28 s. Visual, OBJ takes 34 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.6 3.1 7.4 0.4 ms 7.4 0.4 0.8 0.2 20.0
Simulation, STEP 0.6 2.9 7.3 0.4 ms 8.3 5.5 0.9 0.3 25.8
Simulation, STL 0.5 3.2 8.0 0.5 ms 7.9 0.8 0.8 0.2 21.6
Simulation, OBJ 0.6 3.0 7.3 0.8 ms 7.8 11.8 0.9 0.2 31.6
Visual, GLB 0.6 3.0 7.3 0.5 ms 14.9 0.2 1.7 0.3 28.0
Visual, OBJ 0.5 3.0 7.2 0.5 ms 14.8 6.6 2.0 0.2 34.4
Board Repo: osusat/cubesat
Board: payload.kicad_pcb
Folder payload / v1 / hardware
Complexity 387 / 1000 (size 247, features 140)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
arc tracks, filled zones,
copper drawings, copper text,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 55, 844, 641
Triangles, simulation 2,501,626 in 225 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 84 MB 1.0 GB
STEP 236 MB 1.2 GB
STL 125 MB 1.0 GB
OBJ 259 MB 1.7 GB
Visual
GLB 49 MB 968 MB
OBJ 153 MB 1.1 GB

2262. usb_c

usb_c: stages 4 and 6 take 41% to 73% of a run. Simulation, GLB takes 1.3 s. Simulation, STEP takes 1.9 s. Simulation, STL takes 1.2 s. Simulation, OBJ takes 1.7 s. Visual, GLB takes 1.8 s. Visual, OBJ takes 1.9 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 90 ms 0.1 0.3 0.2 ms 0.6 15 ms 47 ms 0.2 1.3
Simulation, STEP 80 ms 79 ms 0.3 0.1 ms 0.5 0.7 44 ms 0.2 1.9
Simulation, STL 93 ms 78 ms 0.3 0.1 ms 0.5 22 ms 46 ms 0.2 1.2
Simulation, OBJ 0.1 80 ms 0.3 0.2 ms 0.6 0.4 56 ms 0.2 1.7
Visual, GLB 0.1 84 ms 0.2 0.1 ms 1.1 11 ms 63 ms 0.2 1.8
Visual, OBJ 84 ms 88 ms 0.3 0.2 ms 0.9 0.3 59 ms 0.2 1.9
Board Repo: osusat/cubesat
Board: usb_c.kicad_pcb
Folder shared / kicad / subsheets / usb_c
Complexity 228 / 1000 (size 133, features 95)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 9, 73, 8
Triangles, simulation 94,590 in 24 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 3.2 MB 183 MB
STEP 15 MB 187 MB
STL 4.7 MB 174 MB
OBJ 9.0 MB 182 MB
Visual
GLB 2.2 MB 150 MB
OBJ 6.2 MB 153 MB

2263. daughterboard

daughterboard: stages 4 and 6 take 52% to 76% of a run. Simulation, GLB takes 2.2 s. Simulation, STEP takes 3.3 s. Simulation, STL takes 2.2 s. Simulation, OBJ takes 3.1 s. Visual, GLB takes 2.4 s. Visual, OBJ takes 2.8 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 77 ms 0.2 0.8 0.2 ms 0.8 25 ms 97 ms 0.2 2.2
Simulation, STEP 75 ms 0.1 0.8 0.2 ms 0.9 1.1 96 ms 0.2 3.3
Simulation, STL 81 ms 0.2 0.8 0.3 ms 0.8 50 ms 96 ms 0.2 2.2
Simulation, OBJ 75 ms 0.1 0.9 0.2 ms 0.8 0.8 0.1 0.2 3.1
Visual, GLB 77 ms 0.2 0.8 0.2 ms 1.0 12 ms 0.1 0.2 2.4
Visual, OBJ 77 ms 0.1 0.8 0.2 ms 1.1 0.4 0.1 0.2 2.8
Board Repo: osusat/cubesat
Board: daughterboard.kicad_pcb
Folder shared / kicad / templates / daughterboard
Complexity 44 / 1000 (size 24, features 20)
KESE features drill offsets,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 1, 0, 0
Triangles, simulation 168,952 in 34 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 5.2 MB 187 MB
STEP 22 MB 207 MB
STL 8.5 MB 191 MB
OBJ 16 MB 195 MB
Visual
GLB 2.4 MB 195 MB
OBJ 6.9 MB 190 MB

2264. film_capacitors

film_capacitors: stages 4 and 6 take 48% to 79% of a run. Simulation, GLB takes 2.4 s. Simulation, STEP takes 3.5 s. Simulation, STL takes 2.4 s. Simulation, OBJ takes 3.6 s. Visual, GLB takes 3.4 s. Visual, OBJ takes 4.0 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 78 ms 0.2 0.8 0.2 ms 1.0 41 ms 0.1 0.2 2.4
Simulation, STEP 91 ms 0.2 0.9 0.2 ms 0.9 1.1 0.1 0.2 3.5
Simulation, STL 71 ms 0.2 0.8 0.2 ms 0.9 83 ms 0.1 0.2 2.4
Simulation, OBJ 80 ms 0.2 0.9 0.2 ms 0.8 1.3 0.1 0.2 3.6
Visual, GLB 98 ms 0.2 0.9 0.2 ms 1.8 26 ms 0.2 0.2 3.4
Visual, OBJ 75 ms 0.2 0.9 0.2 ms 1.8 0.7 0.2 0.2 4.0
Board Repo: owntech-foundation/micro-inverter
Board: film_capacitors.kicad_pcb
Folder KiCAD_Files
Complexity 89 / 1000 (size 39, features 50)
KESE features filled zones, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 7, 0, 0
Triangles, simulation 260,380 in 13 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 8.6 MB 217 MB
STEP 35 MB 228 MB
STL 13 MB 216 MB
OBJ 26 MB 216 MB
Visual
GLB 5.3 MB 186 MB
OBJ 15 MB 187 MB

2265. uVerter

uVerter: stages 4 and 6 take 54% to 88% of a run. Simulation, GLB takes 36 s. Simulation, STEP takes 45 s. Simulation, STL takes 38 s. Simulation, OBJ takes 56 s. Visual, GLB takes 68 s. Visual, OBJ takes 77 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.0 2.9 13.8 0.7 ms 15.4 0.7 1.7 0.3 35.9
Simulation, STEP 1.0 3.0 13.8 0.8 ms 15.6 9.2 1.9 0.3 44.9
Simulation, STL 1.0 2.9 14.5 0.8 ms 15.6 1.6 1.8 0.3 37.8
Simulation, OBJ 1.0 3.3 14.5 0.9 ms 15.6 19.4 1.8 0.3 55.9
Visual, GLB 1.0 3.1 14.3 1.0 ms 45.0 0.4 3.7 0.3 67.7
Visual, OBJ 1.0 3.1 13.5 0.7 ms 46.2 10.1 2.8 0.3 77.0
Board Repo: owntech-foundation/micro-inverter
Board: uVerter.kicad_pcb
Folder KiCAD_Files
Complexity 453 / 1000 (size 228, features 225)
KESE features through vias, microvias,
slotted holes, custom pads,
rounded,
trapezoid or chamfered pads,
drill offsets, arc tracks,
filled zones, copper drawings,
curved board outline,
TrueType text, stack-up,
dielectric εr and tanδ,
castellated pads
Tested 9th November 2026
Copper layers 4
File format KiCad 9 (20241229)
Parts, tracks, vias 322, 1,492, 529
Triangles, simulation 4,476,104 in 240 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 153 MB 1.5 GB
STEP 651 MB 1.5 GB
STL 224 MB 1.4 GB
OBJ 478 MB 2.8 GB
Visual
GLB 84 MB 1.5 GB
OBJ 266 MB 1.8 GB

2266. ownverter

ownverter: stages 4 and 6 take 52% to 85% of a run. Simulation, GLB takes 60 s. Simulation, STEP takes 74 s. Simulation, STL takes 65 s. Simulation, OBJ takes 2 min. Visual, GLB takes 84 s. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.5 5.2 24.8 0.7 ms 24.6 1.1 2.7 0.3 60.0
Simulation, STEP 1.5 5.4 25.5 1 ms 24.9 14.0 2.7 0.3 74.4
Simulation, STL 1.7 6.3 25.8 0.8 ms 24.5 2.8 3.0 0.4 64.5
Simulation, OBJ 1.6 5.6 26.9 0.7 ms 25.2 37.4 2.8 0.3 99.8
Visual, GLB 1.6 5.5 24.7 1 ms 47.0 0.4 4.8 0.3 84.4
Visual, OBJ 1.6 5.3 25.4 2 ms 47.2 17.0 5.1 0.3 101.9
Board Repo: owntech-foundation/ownverter
Board: ownverter.kicad_pcb
Folder KiCAD_files
Complexity 384 / 1000 (size 244, features 140)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
drill offsets, filled zones,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours,
castellated pads
Tested 9th November 2026
Copper layers 6
File format KiCad 9 (20241229)
Parts, tracks, vias 377, 2,173, 658
Triangles, simulation 6,467,298 in 253 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 219 MB 1.4 GB
STEP 880 MB 2.0 GB
STL 323 MB 1.4 GB
OBJ 701 MB 4.2 GB
Visual
GLB 106 MB 1.9 GB
OBJ 340 MB 2.4 GB

2267. heatsink_drawing

heatsink_drawing: stages 4 and 6 take 46% to 74% of a run. Simulation, GLB takes 2.7 s. Simulation, STEP takes 3.9 s. Simulation, STL takes 2.9 s. Simulation, OBJ takes 4.6 s. Visual, GLB takes 3.9 s. Visual, OBJ takes 4.2 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 94 ms 0.2 1.0 0.2 ms 1.0 41 ms 0.2 0.3 2.7
Simulation, STEP 91 ms 0.2 1.1 0.2 ms 0.9 1.2 0.2 0.2 3.9
Simulation, STL 0.1 0.2 1.0 0.2 ms 1.0 60 ms 0.2 0.3 2.9
Simulation, OBJ 82 ms 0.2 1.0 0.2 ms 1.1 1.7 0.2 0.2 4.6
Visual, GLB 0.1 0.3 1.1 0.2 ms 1.8 20 ms 0.4 0.3 3.9
Visual, OBJ 89 ms 0.3 1.0 0.4 ms 1.8 0.5 0.3 0.2 4.2
Board Repo: owntech-foundation/twist
Board: heatsink_drawing.kicad_pcb
Folder KiCAD_files
Complexity 148 / 1000 (size 58, features 90)
KESE features slotted holes, rounded,
trapezoid or chamfered pads,
filled zones, TrueType text,
stack-up, dielectric εr and tanδ,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 6
File format KiCad 8 (20240108)
Parts, tracks, vias 3, 0, 0
Triangles, simulation 232,880 in 16 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 7.5 MB 202 MB
STEP 27 MB 213 MB
STL 12 MB 199 MB
OBJ 23 MB 206 MB
Visual
GLB 3.0 MB 203 MB
OBJ 8.5 MB 215 MB

2268. Power

Power: stages 4 and 6 take 49% to 84% of a run. Simulation, GLB takes 60 s. Simulation, STEP takes 75 s. Simulation, STL takes 60 s. Simulation, OBJ takes 95 s. Visual, GLB takes 81 s. Visual, OBJ takes 97 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.6 5.6 26.3 1 ms 21.8 1.1 2.9 0.3 59.7
Simulation, STEP 1.8 5.8 27.8 0.8 ms 22.3 13.9 3.1 0.4 75.0
Simulation, STL 1.7 6.0 26.6 3 ms 20.5 2.1 2.9 0.4 60.2
Simulation, OBJ 1.8 5.8 25.7 0.8 ms 20.8 37.9 2.7 0.4 95.2
Visual, GLB 1.7 5.5 25.4 1 ms 43.1 0.4 4.6 0.3 81.2
Visual, OBJ 1.7 5.8 25.4 0.8 ms 42.7 16.2 4.5 0.3 96.6
Board Repo: owntech-foundation/twist
Board: Power.kicad_pcb
Folder KiCAD_files
Complexity 405 / 1000 (size 240, features 165)
KESE features through vias, slotted holes,
custom pads, rounded,
trapezoid or chamfered pads,
drill offsets, filled zones,
copper drawings, TrueType text,
stack-up, dielectric εr and tanδ,
mask and silkscreen colours,
castellated pads
Tested 9th November 2026
Copper layers 6
File format KiCad 8 (20240108)
Parts, tracks, vias 312, 1,740, 643
Triangles, simulation 6,140,102 in 230 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 208 MB 1.4 GB
STEP 808 MB 1.8 GB
STL 307 MB 1.4 GB
OBJ 661 MB 3.9 GB
Visual
GLB 98 MB 1.8 GB
OBJ 312 MB 2.2 GB
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