Corpus Testing 03

Corpus Page 3

Part 3 of 29 of Corpus Testing: boards 217 to 324, six runs each, one file format a run, as Corpus Testing describes.

217. Power and Reset

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.6	0.2 ms	1.8	81 ms	0.3	0.2	5.7
Simulation, STEP	0.2	0.5	2.6	0.2 ms	1.7	1.6	0.3	0.3	7.2
Simulation, STL	0.2	0.5	2.5	0.2 ms	1.7	0.1	0.3	0.2	5.5
Simulation, OBJ	0.2	0.4	2.5	0.2 ms	1.7	2.9	0.3	0.2	8.2
Visual, GLB	0.2	0.5	2.5	0.4 ms	4.3	55 ms	0.4	0.2	8.2
Visual, OBJ	0.2	0.5	2.5	0.4 ms	4.3	1.8	0.4	0.2	9.8

Board Repo: andrewpaterson/658-Computer Board: Power and Reset.kicad_pcb Folder Kicad / Computer / Power / Power and Reset Complexity 233 / 1000 (size 148, features 85) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 23, 285, 29 Triangles, simulation 503,998 in 51 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 283 MB STEP 70 MB 340 MB STL 25 MB 292 MB OBJ 50 MB 375 MB Visual GLB 11 MB 342 MB OBJ 34 MB 342 MB

218. Address Decode V2 to V3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.5	2.7	0.3 ms	1.7	91 ms	0.3	0.2	5.6
Simulation, STEP	0.1	0.5	2.6	0.5 ms	1.8	2.0	0.3	0.3	7.5
Simulation, STL	0.2	0.6	2.7	0.7 ms	1.9	0.2	0.3	0.2	6.0
Simulation, OBJ	0.1	0.6	2.7	0.4 ms	1.8	3.2	0.4	0.3	9.1
Visual, GLB	0.1	0.5	2.7	0.8 ms	3.4	57 ms	0.4	0.2	7.6
Visual, OBJ	0.2	0.5	2.7	0.5 ms	3.7	1.9	0.5	0.2	9.7

Board Repo: andrewpaterson/658-Computer Board: Address Decode V2 to V3.kicad_pcb Folder Kicad / Computer / Processor / Address Decode V2 to V3 Complexity 162 / 1000 (size 97, features 65) KESE features rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 2, 65, 0 Triangles, simulation 556,592 in 64 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 297 MB STEP 67 MB 347 MB STL 28 MB 294 MB OBJ 55 MB 409 MB Visual GLB 10 MB 334 MB OBJ 30 MB 336 MB

219. Clock Hold V1 to V2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	1.9	0.2 ms	1.6	83 ms	0.3	0.3	4.7
Simulation, STEP	0.1	0.3	1.9	0.3 ms	1.9	1.8	0.3	0.3	6.6
Simulation, STL	0.1	0.4	2.1	0.5 ms	1.6	0.2	0.3	0.3	5.0
Simulation, OBJ	0.1	0.4	1.9	0.4 ms	1.7	2.3	0.3	0.3	6.9
Visual, GLB	0.1	0.3	2.1	0.4 ms	3.4	34 ms	0.5	0.2	6.7
Visual, OBJ	0.1	0.4	2.3	0.4 ms	3.6	1.4	0.6	0.3	8.7

Board Repo: andrewpaterson/658-Computer Board: Clock Hold V1 to V2.kicad_pcb Folder Kicad / Computer / Processor / Clock Hold V1 to V2 Complexity 195 / 1000 (size 115, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 3, 132, 9 Triangles, simulation 424,936 in 51 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 260 MB STEP 54 MB 303 MB STL 21 MB 262 MB OBJ 42 MB 329 MB Visual GLB 8.2 MB 280 MB OBJ 24 MB 275 MB

220. HCP65 Board Presence

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	1.5	0.5 ms	1.4	95 ms	0.3	0.3	4.2
Simulation, STEP	0.2	0.4	1.4	0.4 ms	1.5	1.6	0.2	0.3	5.5
Simulation, STL	0.2	0.5	1.5	0.5 ms	1.5	0.1	0.2	0.2	4.2
Simulation, OBJ	0.2	0.4	1.5	2 ms	1.5	2.0	0.2	0.2	6.0
Visual, GLB	0.2	0.4	1.5	0.5 ms	3.7	56 ms	0.4	0.3	6.6
Visual, OBJ	0.2	0.4	1.6	0.3 ms	3.6	1.7	0.5	0.2	8.3

Board Repo: andrewpaterson/658-Computer Board: HCP65 Board Presence.kicad_pcb Folder Kicad / Computer / Processor / HCP65 Board Presence Complexity 228 / 1000 (size 158, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 21, 509, 64 Triangles, simulation 391,638 in 50 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 279 MB STEP 62 MB 310 MB STL 20 MB 290 MB OBJ 40 MB 320 MB Visual GLB 12 MB 332 MB OBJ 34 MB 334 MB

221. HCP65 Device Interrupts

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.7	3.0	0.5 ms	2.5	0.1	0.4	0.2	7.2
Simulation, STEP	0.2	0.7	3.0	0.3 ms	2.7	2.3	0.4	0.2	9.6
Simulation, STL	0.2	0.7	3.1	0.3 ms	2.7	0.2	0.5	0.2	7.6
Simulation, OBJ	0.2	0.7	3.1	0.4 ms	2.6	3.8	0.5	0.2	11.2
Visual, GLB	0.2	0.7	2.9	0.3 ms	7.0	0.1	0.8	0.2	12.0
Visual, OBJ	0.2	0.7	3.2	0.4 ms	6.8	3.5	0.7	0.2	15.3

Board Repo: andrewpaterson/658-Computer Board: HCP65 Device Interrupts.kicad_pcb Folder Kicad / Computer / Processor / HCP65 Device Interrupts Complexity 238 / 1000 (size 168, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 18, 1,070, 123 Triangles, simulation 656,798 in 59 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 23 MB 384 MB STEP 112 MB 413 MB STL 33 MB 359 MB OBJ 67 MB 491 MB Visual GLB 19 MB 533 MB OBJ 59 MB 516 MB

222. HCP65 Device Reset

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.5	1.9	0.2 ms	1.5	71 ms	0.3	0.2	4.5
Simulation, STEP	0.1	0.4	1.8	0.3 ms	1.5	1.4	0.3	0.2	5.7
Simulation, STL	0.1	0.5	1.9	0.5 ms	1.4	0.1	0.2	0.2	4.5
Simulation, OBJ	0.1	0.4	1.7	0.2 ms	1.4	1.9	0.3	0.2	6.0
Visual, GLB	0.1	0.4	1.7	0.2 ms	3.9	58 ms	0.5	0.2	7.0
Visual, OBJ	0.1	0.4	1.7	0.3 ms	3.8	1.6	0.6	0.2	8.4

Board Repo: andrewpaterson/658-Computer Board: HCP65 Device Reset.kicad_pcb Folder Kicad / Computer / Processor / HCP65 Device Reset Complexity 228 / 1000 (size 158, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 14, 677, 74 Triangles, simulation 490,122 in 61 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 309 MB STEP 81 MB 349 MB STL 25 MB 310 MB OBJ 50 MB 377 MB Visual GLB 14 MB 392 MB OBJ 41 MB 388 MB

223. HCP65 Hold Count

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	1.3	0.3 ms	1.2	57 ms	0.2	0.3	3.6
Simulation, STEP	0.1	0.4	1.3	0.3 ms	1.3	1.3	0.2	0.2	4.9
Simulation, STL	0.1	0.4	1.3	0.2 ms	1.2	82 ms	0.2	0.2	3.6
Simulation, OBJ	0.1	0.3	1.3	0.2 ms	1.3	1.9	0.2	0.2	5.4
Visual, GLB	0.1	0.4	1.3	0.3 ms	3.3	60 ms	0.3	0.3	5.8
Visual, OBJ	0.2	0.4	1.5	0.2 ms	3.3	1.7	0.4	0.3	7.6

Board Repo: andrewpaterson/658-Computer Board: HCP65 Hold Count.kicad_pcb Folder Kicad / Computer / Processor / HCP65 Hold Count Complexity 217 / 1000 (size 147, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 12, 344, 56 Triangles, simulation 316,504 in 40 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 244 MB STEP 49 MB 273 MB STL 16 MB 245 MB OBJ 32 MB 245 MB Visual GLB 9.0 MB 284 MB OBJ 27 MB 279 MB

224. HCP65 Instruction Code

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.1	4.7	0.5 ms	4.2	0.2	0.6	0.3	11.4
Simulation, STEP	0.3	1.1	4.7	0.4 ms	4.1	3.3	0.5	0.2	14.1
Simulation, STL	0.3	1.1	4.7	0.5 ms	4.1	0.3	0.5	0.2	11.3
Simulation, OBJ	0.3	1.1	4.7	0.5 ms	4.0	6.2	0.6	0.2	17.1
Visual, GLB	0.3	1.1	4.9	0.8 ms	11.3	0.2	1.1	0.2	19.0
Visual, OBJ	0.3	1.2	4.8	0.5 ms	10.6	5.4	1.1	0.2	23.6

Board Repo: andrewpaterson/658-Computer Board: HCP65 Instruction Code.kicad_pcb Folder Kicad / Computer / Processor / HCP65 Instruction Code Complexity 255 / 1000 (size 185, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 36, 2,035, 222 Triangles, simulation 1,150,168 in 107 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 40 MB 533 MB STEP 194 MB 631 MB STL 58 MB 534 MB OBJ 118 MB 790 MB Visual GLB 35 MB 759 MB OBJ 106 MB 768 MB

225. HCP65 Kernal Mode

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.3	5.0	0.6 ms	4.6	0.2	0.7	0.2	12.3
Simulation, STEP	0.3	1.3	5.0	0.7 ms	4.6	3.7	0.6	0.3	15.7
Simulation, STL	0.3	1.1	4.7	0.6 ms	4.4	0.3	0.7	0.3	11.8
Simulation, OBJ	0.4	1.4	5.0	0.8 ms	4.5	6.3	0.6	0.3	18.5
Visual, GLB	0.3	1.3	4.9	0.5 ms	11.3	0.2	1.1	0.2	19.3
Visual, OBJ	0.3	1.2	5.2	0.6 ms	11.0	5.8	1.3	0.2	25.0

Board Repo: andrewpaterson/658-Computer Board: HCP65 Kernal Mode.kicad_pcb Folder Kicad / Computer / Processor / HCP65 Kernal Mode Complexity 253 / 1000 (size 183, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 30, 1,942, 242 Triangles, simulation 1,154,594 in 103 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 40 MB 554 MB STEP 188 MB 622 MB STL 58 MB 527 MB OBJ 118 MB 832 MB Visual GLB 35 MB 746 MB OBJ 106 MB 732 MB

226. HCP65 Main Memory Address

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.8	0.4 ms	2.1	0.1	0.4	0.3	6.5
Simulation, STEP	0.2	0.6	2.8	0.3 ms	2.2	1.9	0.3	0.2	8.2
Simulation, STL	0.2	0.6	2.7	0.5 ms	2.2	0.1	0.4	0.2	6.3
Simulation, OBJ	0.2	0.6	2.6	0.5 ms	2.2	3.3	0.4	0.2	9.6
Visual, GLB	0.2	0.6	2.8	0.3 ms	5.1	71 ms	0.5	0.2	9.4
Visual, OBJ	0.2	0.5	2.5	0.5 ms	4.7	2.1	0.5	0.3	10.8

Board Repo: andrewpaterson/658-Computer Board: HCP65 Main Memory Address.kicad_pcb Folder Kicad / Computer / Processor / HCP65 Main Memory Address Complexity 222 / 1000 (size 152, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 12, 559, 48 Triangles, simulation 548,882 in 78 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 19 MB 313 MB STEP 93 MB 376 MB STL 27 MB 297 MB OBJ 56 MB 417 MB Visual GLB 13 MB 385 MB OBJ 40 MB 375 MB

227. HCP65 Main Memory Data

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.4	1 ms	1.4	53 ms	0.3	0.3	3.7
Simulation, STEP	0.2	0.3	1.5	0.3 ms	1.2	1.3	0.3	0.3	5.1
Simulation, STL	0.2	0.3	1.3	0.3 ms	1.3	98 ms	0.2	0.2	3.6
Simulation, OBJ	0.1	0.3	1.5	0.2 ms	1.2	1.8	0.4	0.3	5.6
Visual, GLB	0.2	0.4	1.6	0.2 ms	3.3	46 ms	0.4	0.3	6.1
Visual, OBJ	0.2	0.3	1.6	0.2 ms	3.6	1.4	0.3	0.3	7.6

Board Repo: andrewpaterson/658-Computer Board: HCP65 Main Memory Data.kicad_pcb Folder Kicad / Computer / Processor / HCP65 Main Memory Data Complexity 213 / 1000 (size 143, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 12, 312, 30 Triangles, simulation 299,074 in 46 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 10 MB 234 MB STEP 48 MB 269 MB STL 15 MB 234 MB OBJ 30 MB 258 MB Visual GLB 7.6 MB 252 MB OBJ 22 MB 254 MB

228. HCP65 MPU Address Decode

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.1	4.0	0.5 ms	3.8	0.2	0.5	0.3	10.1
Simulation, STEP	0.3	1.0	3.9	0.4 ms	3.7	2.9	0.6	0.3	12.6
Simulation, STL	0.3	1.0	3.9	0.5 ms	3.7	0.3	0.5	0.3	10.1
Simulation, OBJ	0.3	1.0	3.9	0.7 ms	3.6	4.7	0.6	0.3	14.3
Visual, GLB	0.3	1.0	4.0	0.9 ms	11.0	0.1	1.4	0.3	18.2
Visual, OBJ	0.3	1.1	4.0	0.5 ms	10.8	4.3	1.6	0.3	22.4

Board Repo: andrewpaterson/658-Computer Board: HCP65 MPU Address Decode.kicad_pcb Folder Kicad / Computer / Processor / HCP65 MPU Address Decode Complexity 251 / 1000 (size 181, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 44, 1,273, 168 Triangles, simulation 917,410 in 131 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 32 MB 475 MB STEP 149 MB 530 MB STL 46 MB 476 MB OBJ 94 MB 661 MB Visual GLB 27 MB 687 MB OBJ 84 MB 644 MB

229. HCP65 MPU Memory

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.5	2.4	0.2 ms	2.1	0.1	0.4	0.2	5.8
Simulation, STEP	0.1	0.5	2.4	0.3 ms	2.2	1.8	0.3	0.2	7.5
Simulation, STL	0.1	0.6	2.4	0.3 ms	2.2	0.2	0.4	0.2	6.0
Simulation, OBJ	0.2	0.5	2.3	0.3 ms	2.1	3.0	0.4	0.2	8.7
Visual, GLB	0.2	0.6	2.4	0.4 ms	5.4	81 ms	0.6	0.2	9.4
Visual, OBJ	0.1	0.5	2.3	0.3 ms	5.6	2.4	0.6	0.2	11.9

Board Repo: andrewpaterson/658-Computer Board: HCP65 MPU Memory.kicad_pcb Folder Kicad / Computer / Processor / HCP65 MPU Memory Complexity 232 / 1000 (size 162, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 13, 868, 117 Triangles, simulation 752,164 in 70 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 26 MB 420 MB STEP 109 MB 442 MB STL 38 MB 409 MB OBJ 76 MB 531 MB Visual GLB 20 MB 529 MB OBJ 60 MB 526 MB

230. HCP65 MPU NMI

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.0	0.3 ms	1.9	88 ms	0.3	0.2	5.2
Simulation, STEP	0.2	0.5	2.0	0.4 ms	1.9	1.5	0.3	0.2	6.7
Simulation, STL	0.2	0.5	2.0	0.3 ms	1.9	0.1	0.3	0.2	5.2
Simulation, OBJ	0.1	0.5	2.0	0.4 ms	2.1	2.5	0.3	0.2	7.6
Visual, GLB	0.2	0.5	2.1	0.4 ms	6.0	97 ms	0.7	0.3	9.8
Visual, OBJ	0.2	0.6	2.1	0.3 ms	5.2	2.3	0.8	0.2	11.4

Board Repo: andrewpaterson/658-Computer Board: HCP65 MPU NMI.kicad_pcb Folder Kicad / Computer / Processor / HCP65 MPU NMI Complexity 239 / 1000 (size 169, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 24, 916, 137 Triangles, simulation 628,840 in 68 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 22 MB 352 MB STEP 101 MB 405 MB STL 31 MB 376 MB OBJ 64 MB 457 MB Visual GLB 19 MB 479 MB OBJ 58 MB 498 MB

231. HCP65 MPU Timer

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	1.5	0.3 ms	1.4	75 ms	0.2	0.2	4.0
Simulation, STEP	0.1	0.4	1.6	0.4 ms	1.4	1.4	0.2	0.2	5.3
Simulation, STL	0.1	0.4	1.5	0.3 ms	1.4	0.1	0.2	0.2	4.0
Simulation, OBJ	0.1	0.4	1.5	0.3 ms	1.4	1.9	0.3	0.2	5.7
Visual, GLB	0.1	0.4	1.5	0.3 ms	3.8	58 ms	0.4	0.2	6.5
Visual, OBJ	0.1	0.3	1.5	0.5 ms	3.8	1.7	0.5	0.2	8.2

Board Repo: andrewpaterson/658-Computer Board: HCP65 MPU Timer.kicad_pcb Folder Kicad / Computer / Processor / HCP65 MPU Timer Complexity 230 / 1000 (size 160, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 18, 645, 81 Triangles, simulation 471,844 in 75 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 16 MB 318 MB STEP 79 MB 339 MB STL 24 MB 318 MB OBJ 48 MB 365 MB Visual GLB 14 MB 381 MB OBJ 41 MB 377 MB

232. Processor Board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	6.6	28.1	3 ms	24.1	1.1	3.3	0.3	64.3
Simulation, STEP	0.8	6.3	28.4	4 ms	23.4	15.6	3.3	0.4	78.0
Simulation, STL	0.8	6.0	27.7	2 ms	23.2	2.5	3.0	0.4	63.5
Simulation, OBJ	0.7	6.1	27.4	3 ms	23.0	33.7	2.6	0.3	93.9
Visual, GLB	0.8	6.2	27.3	3 ms	76.8	0.7	9.2	0.3	121.3
Visual, OBJ	0.8	5.8	26.7	2 ms	75.5	24.2	10.4	0.3	143.7

Board Repo: andrewpaterson/658-Computer Board: Processor Board.kicad_pcb Folder Kicad / Computer / Processor / Processor Board Complexity 283 / 1000 (size 203, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 40, 4,940, 868 Triangles, simulation 7,131,364 in 393 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 240 MB 2.1 GB STEP 1.1 GB 2.6 GB STL 357 MB 2.1 GB OBJ 758 MB 4.4 GB Visual GLB 176 MB 2.9 GB OBJ 566 MB 3.6 GB

233. W65C816 Breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.5	6.1	0.7 ms	5.0	0.3	0.6	0.2	14.0
Simulation, STEP	0.3	1.4	5.8	0.7 ms	4.9	4.0	0.6	0.3	17.3
Simulation, STL	0.4	1.4	5.8	0.6 ms	4.8	0.5	0.7	0.3	13.8
Simulation, OBJ	0.4	1.4	5.5	0.5 ms	5.0	7.7	0.6	0.3	20.9
Visual, GLB	0.3	1.4	5.9	0.9 ms	13.4	0.2	1.2	0.2	22.7
Visual, OBJ	0.4	1.5	5.9	0.8 ms	13.6	7.4	1.6	0.2	30.6

Board Repo: andrewpaterson/658-Computer Board: W65C816 Breakout.kicad_pcb Folder Kicad / Computer / Processor / W65C816 Breakout Complexity 260 / 1000 (size 190, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 51, 2,018, 270 Triangles, simulation 1,320,418 in 119 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 46 MB 610 MB STEP 217 MB 675 MB STL 66 MB 624 MB OBJ 136 MB 889 MB Visual GLB 40 MB 823 MB OBJ 122 MB 964 MB

234. W65C816 Clock Hold

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.6	0.4 ms	1.5	66 ms	0.2	0.2	4.1
Simulation, STEP	0.1	0.4	1.4	0.2 ms	1.3	1.5	0.3	0.3	5.2
Simulation, STL	0.1	0.3	1.5	0.3 ms	1.4	91 ms	0.2	0.2	3.9
Simulation, OBJ	0.2	0.4	1.4	0.3 ms	1.4	1.8	0.3	0.3	5.7
Visual, GLB	0.1	0.3	1.5	0.3 ms	3.7	54 ms	0.4	0.2	6.3
Visual, OBJ	0.1	0.3	1.4	0.3 ms	3.7	1.5	0.3	0.2	7.6

Board Repo: andrewpaterson/658-Computer Board: W65C816 Clock Hold.kicad_pcb Folder Kicad / Computer / Processor / W65C816 Clock Hold Complexity 225 / 1000 (size 155, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 20, 458, 55 Triangles, simulation 357,774 in 45 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 12 MB 244 MB STEP 61 MB 291 MB STL 18 MB 261 MB OBJ 36 MB 291 MB Visual GLB 10 MB 307 MB OBJ 31 MB 308 MB

235. W65C816 Debug Display

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.9	6.7	0.9 ms	5.5	0.3	0.7	0.3	16.0
Simulation, STEP	0.6	2.0	6.9	0.9 ms	5.6	4.5	0.7	0.2	20.5
Simulation, STL	0.5	1.8	6.4	0.7 ms	5.2	0.4	0.6	0.2	15.1
Simulation, OBJ	0.5	1.7	6.5	0.9 ms	5.1	7.9	0.7	0.3	22.6
Visual, GLB	0.5	1.7	6.3	0.9 ms	15.1	0.2	1.2	0.2	25.3
Visual, OBJ	0.5	1.8	6.3	1 ms	14.8	7.4	1.3	0.2	32.3

Board Repo: andrewpaterson/658-Computer Board: W65C816 Debug Display.kicad_pcb Folder Kicad / Computer / Processor / W65C816 Debug Display Complexity 273 / 1000 (size 193, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 81, 1,782, 276 Triangles, simulation 1,312,130 in 243 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 46 MB 588 MB STEP 216 MB 715 MB STL 66 MB 572 MB OBJ 137 MB 1.1 GB Visual GLB 41 MB 868 MB OBJ 126 MB 1.1 GB

236. W65C816 Latch

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.1	0.5	0.1 ms	0.7	25 ms	82 ms	0.3	1.8
Simulation, STEP	0.1	0.1	0.5	0.2 ms	0.8	0.8	77 ms	0.2	2.7
Simulation, STL	96 ms	0.1	0.5	0.1 ms	0.6	34 ms	71 ms	0.2	1.7
Simulation, OBJ	98 ms	0.1	0.5	0.2 ms	0.7	0.6	85 ms	0.2	2.4
Visual, GLB	0.1	0.1	0.5	0.2 ms	1.6	19 ms	0.1	0.2	2.8
Visual, OBJ	0.1	0.1	0.5	0.2 ms	1.6	0.5	0.1	0.2	3.2

Board Repo: andrewpaterson/658-Computer Board: W65C816 Latch.kicad_pcb Folder Kicad / Computer / Processor / W65C816 Latch Complexity 194 / 1000 (size 124, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 11, 102, 12 Triangles, simulation 134,178 in 27 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.6 MB 190 MB STEP 21 MB 204 MB STL 6.7 MB 192 MB OBJ 13 MB 190 MB Visual GLB 3.4 MB 164 MB OBJ 9.7 MB 164 MB

237. W65C816 Minimal

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.1	0.4 ms	2.2	99 ms	0.3	0.2	5.6
Simulation, STEP	0.2	0.6	2.2	0.4 ms	2.2	1.8	0.3	0.2	7.5
Simulation, STL	0.2	0.6	2.2	0.4 ms	2.2	0.2	0.3	0.2	5.9
Simulation, OBJ	0.2	0.5	2.5	0.3 ms	2.3	2.7	0.4	0.3	8.9
Visual, GLB	0.2	0.5	2.2	0.3 ms	5.4	88 ms	0.6	0.2	9.2
Visual, OBJ	0.2	0.5	2.0	0.4 ms	5.7	2.2	0.7	0.2	11.4

Board Repo: andrewpaterson/658-Computer Board: W65C816 Minimal.kicad_pcb Folder Kicad / Computer / Processor / W65C816 Minimal Complexity 239 / 1000 (size 169, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 27, 868, 98 Triangles, simulation 641,526 in 93 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 22 MB 354 MB STEP 103 MB 405 MB STL 32 MB 354 MB OBJ 65 MB 462 MB Visual GLB 19 MB 452 MB OBJ 56 MB 488 MB

238. W65C816 Opcode Display

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.6	6.1	0.8 ms	6.1	0.3	0.8	0.2	15.4
Simulation, STEP	0.4	1.6	6.3	0.9 ms	6.0	4.7	0.7	0.2	19.9
Simulation, STL	0.4	1.6	6.2	1.0 ms	5.9	0.4	0.7	0.2	15.4
Simulation, OBJ	0.4	1.6	6.2	0.9 ms	6.2	7.3	0.7	0.2	22.7
Visual, GLB	0.4	1.6	6.0	0.8 ms	16.0	0.3	2.0	0.2	26.5
Visual, OBJ	0.4	1.6	6.2	0.9 ms	16.0	6.8	2.2	0.2	33.3

Board Repo: andrewpaterson/658-Computer Board: W65C816 Opcode Display.kicad_pcb Folder Kicad / Computer / Processor / W65C816 Opcode Display Complexity 279 / 1000 (size 199, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 79, 2,531, 374 Triangles, simulation 1,650,672 in 283 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 58 MB 675 MB STEP 304 MB 897 MB STL 83 MB 692 MB OBJ 174 MB 1.4 GB Visual GLB 53 MB 1.1 GB OBJ 163 MB 1.5 GB

239. W65C816 Power

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	86 ms	0.1	0.4	0.1 ms	0.5	15 ms	52 ms	0.2	1.3
Simulation, STEP	86 ms	97 ms	0.4	0.2 ms	0.5	0.7	59 ms	0.2	2.1
Simulation, STL	92 ms	89 ms	0.4	0.1 ms	0.5	24 ms	51 ms	0.2	1.3
Simulation, OBJ	94 ms	85 ms	0.4	0.1 ms	0.5	0.4	53 ms	0.2	1.7
Visual, GLB	89 ms	89 ms	0.4	0.2 ms	1.0	11 ms	67 ms	0.2	1.8
Visual, OBJ	92 ms	96 ms	0.4	0.1 ms	1.0	0.3	56 ms	0.2	2.1

Board Repo: andrewpaterson/658-Computer Board: W65C816 Power.kicad_pcb Folder Kicad / Computer / Processor / W65C816 Power Complexity 142 / 1000 (size 87, features 55) KESE features rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 4, 24, 0 Triangles, simulation 80,774 in 22 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 2.8 MB 173 MB STEP 11 MB 178 MB STL 4.0 MB 172 MB OBJ 7.7 MB 171 MB Visual GLB 1.7 MB 150 MB OBJ 4.7 MB 151 MB

240. PS2 Board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.9	9.9	1 ms	7.7	0.4	1.1	0.3	21.7
Simulation, STEP	0.3	1.9	10.3	1 ms	7.8	6.3	1.1	0.3	28.0
Simulation, STL	0.4	2.0	10.3	0.8 ms	8.8	0.8	1.1	0.3	23.6
Simulation, OBJ	0.3	2.0	11.2	1 ms	8.0	12.1	1.1	0.3	35.1
Visual, GLB	0.3	2.0	10.4	1 ms	22.3	0.3	2.4	0.3	38.0
Visual, OBJ	0.3	2.0	10.2	2 ms	22.5	7.3	2.7	0.3	45.3

Board Repo: andrewpaterson/658-Computer Board: PS2 Board.kicad_pcb Folder Kicad / Computer / PS2 / PS2 Board Complexity 254 / 1000 (size 174, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 23, 1,396, 151 Triangles, simulation 2,527,776 in 268 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 84 MB 881 MB STEP 348 MB 1.0 GB STL 126 MB 831 MB OBJ 263 MB 1.7 GB Visual GLB 55 MB 1.2 GB OBJ 170 MB 1.2 GB

241. PS2 FIFO

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.2	0.3 ms	2.4	86 ms	0.3	0.3	6.1
Simulation, STEP	0.2	0.6	2.4	0.5 ms	2.2	2.1	0.4	0.3	8.1
Simulation, STL	0.2	0.6	2.7	0.3 ms	2.2	0.2	0.3	0.2	6.4
Simulation, OBJ	0.2	0.5	2.4	0.4 ms	2.3	2.8	0.3	0.3	8.7
Visual, GLB	0.2	0.6	2.8	0.6 ms	6.0	0.1	0.8	0.3	10.7
Visual, OBJ	0.2	0.6	2.4	0.4 ms	6.1	2.1	0.8	0.3	12.5

Board Repo: andrewpaterson/658-Computer Board: PS2 FIFO.kicad_pcb Folder Kicad / Computer / PS2 / PS2 FIFO Complexity 233 / 1000 (size 163, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 20, 710, 91 Triangles, simulation 502,188 in 79 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 289 MB STEP 81 MB 365 MB STL 25 MB 298 MB OBJ 51 MB 389 MB Visual GLB 14 MB 391 MB OBJ 43 MB 395 MB

242. PS2 Timing

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.6	0.4 ms	1.5	85 ms	0.2	0.2	4.1
Simulation, STEP	0.2	0.4	1.7	0.2 ms	1.4	1.7	0.3	0.3	6.0
Simulation, STL	0.2	0.4	1.8	0.2 ms	1.4	98 ms	0.2	0.3	4.3
Simulation, OBJ	0.2	0.4	1.8	0.2 ms	1.5	1.9	0.2	0.3	6.2
Visual, GLB	0.2	0.3	1.7	0.2 ms	3.3	40 ms	0.3	0.3	6.1
Visual, OBJ	0.2	0.3	1.7	0.3 ms	3.3	1.3	0.2	0.2	7.2

Board Repo: andrewpaterson/658-Computer Board: PS2 Timing.kicad_pcb Folder Kicad / Computer / PS2 / PS2 Timing Complexity 205 / 1000 (size 135, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 15, 150, 21 Triangles, simulation 315,974 in 44 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 249 MB STEP 43 MB 265 MB STL 16 MB 235 MB OBJ 31 MB 257 MB Visual GLB 7.5 MB 254 MB OBJ 22 MB 252 MB

243. SD Card Board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	4.6	27.3	3 ms	21.5	1.0	3.0	0.4	58.6
Simulation, STEP	0.7	4.7	27.2	2 ms	20.4	14.0	3.0	0.4	70.5
Simulation, STL	0.6	4.6	28.3	3 ms	21.2	2.6	3.3	0.5	61.1
Simulation, OBJ	0.7	4.6	28.1	1 ms	21.8	33.7	3.6	0.4	92.8
Visual, GLB	0.9	5.4	31.5	3 ms	53.7	0.5	6.0	0.4	98.4
Visual, OBJ	0.7	4.9	27.5	1 ms	53.4	20.6	6.2	0.3	113.6

Board Repo: andrewpaterson/658-Computer Board: SD Card Board.kicad_pcb Folder Kicad / Computer / SD Card / SD Card Board Complexity 269 / 1000 (size 189, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 30, 2,871, 323 Triangles, simulation 4,703,678 in 427 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 159 MB 1.6 GB STEP 740 MB 1.8 GB STL 235 MB 1.7 GB OBJ 501 MB 3.0 GB Visual GLB 101 MB 1.8 GB OBJ 322 MB 2.2 GB

244. SD Card Clock

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.3	0.1 ms	1.2	47 ms	0.2	0.2	3.3
Simulation, STEP	0.1	0.3	1.3	0.2 ms	1.3	1.3	0.2	0.2	4.6
Simulation, STL	0.1	0.3	1.2	0.2 ms	1.1	89 ms	0.2	0.3	3.3
Simulation, OBJ	0.1	0.3	1.2	0.2 ms	1.2	1.6	0.2	0.2	4.7
Visual, GLB	0.1	0.3	1.3	0.2 ms	2.5	38 ms	0.2	0.2	4.6
Visual, OBJ	0.1	0.3	1.2	0.2 ms	2.8	1.3	0.3	0.2	6.2

Board Repo: andrewpaterson/658-Computer Board: SD Card Clock.kicad_pcb Folder Kicad / Computer / SD Card / SD Card Clock Complexity 219 / 1000 (size 149, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 14, 370, 52 Triangles, simulation 311,854 in 38 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 242 MB STEP 50 MB 275 MB STL 16 MB 239 MB OBJ 31 MB 252 MB Visual GLB 8.6 MB 271 MB OBJ 25 MB 272 MB

245. SD Card Full Socket

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.1	0.2 ms	1.1	48 ms	0.2	0.3	3.0
Simulation, STEP	0.1	0.3	1.1	0.2 ms	1.0	1.1	0.2	0.2	3.9
Simulation, STL	0.1	0.3	1.1	0.2 ms	1.0	77 ms	0.2	0.2	2.9
Simulation, OBJ	0.1	0.3	1.2	0.4 ms	1.0	1.3	0.2	0.2	4.3
Visual, GLB	0.1	0.3	1.1	0.2 ms	2.6	35 ms	0.2	0.2	4.5
Visual, OBJ	0.1	0.3	1.1	0.2 ms	2.5	1.0	0.2	0.2	5.3

Board Repo: andrewpaterson/658-Computer Board: SD Card Full Socket.kicad_pcb Folder Kicad / Computer / SD Card / SD Card Full Socket Complexity 224 / 1000 (size 144, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 15, 261, 41 Triangles, simulation 349,590 in 57 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 249 MB STEP 47 MB 285 MB STL 17 MB 246 MB OBJ 35 MB 281 MB Visual GLB 8.4 MB 278 MB OBJ 25 MB 268 MB

246. SD Card Micro Socket

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.0	0.2 ms	1.0	44 ms	0.2	0.2	2.8
Simulation, STEP	0.1	0.3	1.2	0.2 ms	1.1	1.1	0.2	0.2	4.2
Simulation, STL	0.1	0.3	1.1	0.2 ms	1.1	74 ms	0.1	0.2	3.1
Simulation, OBJ	0.1	0.3	1.1	0.3 ms	1.1	1.5	0.2	0.3	4.5
Visual, GLB	0.1	0.3	1.2	0.2 ms	2.2	37 ms	0.3	0.2	4.3
Visual, OBJ	0.1	0.3	1.1	0.2 ms	2.6	1.3	0.2	0.2	5.9

Board Repo: andrewpaterson/658-Computer Board: SD Card Micro Socket.kicad_pcb Folder Kicad / Computer / SD Card / SD Card Micro Socket Complexity 216 / 1000 (size 146, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 14, 285, 49 Triangles, simulation 292,164 in 45 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.9 MB 236 MB STEP 42 MB 271 MB STL 15 MB 238 MB OBJ 29 MB 253 MB Visual GLB 7.9 MB 259 MB OBJ 23 MB 259 MB

247. SD Card Read Data

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.1	0.2 ms	1.0	38 ms	0.1	0.2	2.9
Simulation, STEP	0.1	0.2	1.1	0.2 ms	1.0	1.2	0.1	0.2	4.0
Simulation, STL	0.1	0.2	1.1	0.3 ms	1.1	82 ms	0.1	0.2	3.0
Simulation, OBJ	0.1	0.2	1.2	0.2 ms	0.9	1.4	0.2	0.2	4.3
Visual, GLB	0.1	0.2	1.1	0.2 ms	2.3	34 ms	0.2	0.2	4.3
Visual, OBJ	0.1	0.3	1.2	0.4 ms	2.3	1.1	0.2	0.2	5.3

Board Repo: andrewpaterson/658-Computer Board: SD Card Read Data.kicad_pcb Folder Kicad / Computer / SD Card / SD Card Read Data Complexity 204 / 1000 (size 134, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 7, 235, 29 Triangles, simulation 225,026 in 40 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.8 MB 216 MB STEP 35 MB 239 MB STL 11 MB 213 MB OBJ 22 MB 215 MB Visual GLB 5.7 MB 204 MB OBJ 16 MB 203 MB

248. SD Card Read Function

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	2.6	0.5 ms	2.7	0.1	0.5	0.2	6.9
Simulation, STEP	0.2	0.7	2.7	0.3 ms	2.6	2.4	0.5	0.2	9.3
Simulation, STL	0.2	0.7	2.8	0.3 ms	2.8	0.2	0.5	0.2	7.4
Simulation, OBJ	0.2	0.7	2.7	0.5 ms	2.8	3.9	0.4	0.2	10.9
Visual, GLB	0.2	0.7	2.7	0.3 ms	6.5	93 ms	0.7	0.2	11.2
Visual, OBJ	0.2	0.7	2.7	0.6 ms	6.6	3.2	0.8	0.2	14.4

Board Repo: andrewpaterson/658-Computer Board: SD Card Read Function.kicad_pcb Folder Kicad / Computer / SD Card / SD Card Read Function Complexity 238 / 1000 (size 168, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 16, 1,121, 157 Triangles, simulation 707,944 in 71 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 24 MB 354 MB STEP 114 MB 443 MB STL 35 MB 360 MB OBJ 72 MB 487 MB Visual GLB 20 MB 549 MB OBJ 61 MB 537 MB

249. SD Card Read Signals

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.4	0.3 ms	2.1	79 ms	0.4	0.2	5.9
Simulation, STEP	0.2	0.6	2.7	0.4 ms	2.1	2.1	0.3	0.2	8.3
Simulation, STL	0.2	0.5	2.5	0.3 ms	2.3	0.2	0.4	0.3	6.3
Simulation, OBJ	0.3	0.7	2.7	0.2 ms	2.5	3.3	0.4	0.3	10.2
Visual, GLB	0.2	0.7	2.6	0.4 ms	5.4	84 ms	0.7	0.2	9.9
Visual, OBJ	0.2	0.6	2.6	0.4 ms	5.3	4.0	0.9	0.2	13.7

Board Repo: andrewpaterson/658-Computer Board: SD Card Read Signals.kicad_pcb Folder Kicad / Computer / SD Card / SD Card Read Signals Complexity 230 / 1000 (size 160, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 18, 620, 94 Triangles, simulation 495,498 in 62 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 288 MB STEP 78 MB 356 MB STL 25 MB 293 MB OBJ 50 MB 384 MB Visual GLB 14 MB 412 MB OBJ 42 MB 392 MB

250. SD Card Write Data

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	91 ms	0.2	0.8	0.2 ms	0.7	34 ms	0.1	0.2	2.1
Simulation, STEP	98 ms	0.2	0.8	0.2 ms	0.7	0.9	0.1	0.2	2.9
Simulation, STL	86 ms	0.2	0.7	0.2 ms	0.7	49 ms	0.1	0.2	2.0
Simulation, OBJ	95 ms	0.2	0.8	0.3 ms	0.7	0.9	0.1	0.2	3.0
Visual, GLB	89 ms	0.2	0.7	0.2 ms	1.8	24 ms	0.2	0.2	3.1
Visual, OBJ	95 ms	0.2	0.8	0.2 ms	1.8	0.6	0.2	0.2	3.8

Board Repo: andrewpaterson/658-Computer Board: SD Card Write Data.kicad_pcb Folder Kicad / Computer / SD Card / SD Card Write Data Complexity 205 / 1000 (size 135, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 7, 255, 32 Triangles, simulation 231,652 in 40 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.0 MB 227 MB STEP 36 MB 243 MB STL 12 MB 222 MB OBJ 23 MB 218 MB Visual GLB 5.8 MB 212 MB OBJ 17 MB 209 MB

251. SD Card Write Signals

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.5	0.3 ms	1.4	65 ms	0.2	0.3	3.9
Simulation, STEP	0.2	0.3	1.5	0.2 ms	1.3	1.5	0.2	0.3	5.3
Simulation, STL	0.2	0.4	1.5	0.2 ms	1.4	91 ms	0.2	0.2	4.0
Simulation, OBJ	0.2	0.3	1.5	0.3 ms	1.3	1.9	0.2	0.3	5.7
Visual, GLB	0.1	0.3	1.6	0.3 ms	3.3	43 ms	0.3	0.2	6.0
Visual, OBJ	0.2	0.3	1.5	0.2 ms	3.4	1.4	0.3	0.2	7.3

Board Repo: andrewpaterson/658-Computer Board: SD Card Write Signals.kicad_pcb Folder Kicad / Computer / SD Card / SD Card Write Signals Complexity 220 / 1000 (size 150, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 18, 348, 43 Triangles, simulation 334,140 in 58 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 249 MB STEP 51 MB 282 MB STL 17 MB 243 MB OBJ 34 MB 262 MB Visual GLB 8.8 MB 277 MB OBJ 26 MB 279 MB

252. SNES Controller Clock

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.5	0.2 ms	1.3	50 ms	0.2	0.2	3.6
Simulation, STEP	0.1	0.3	1.5	0.3 ms	1.4	1.5	0.2	0.2	5.2
Simulation, STL	0.1	0.3	1.5	0.3 ms	1.4	98 ms	0.3	0.2	3.9
Simulation, OBJ	0.1	0.4	1.4	0.3 ms	1.4	1.8	0.2	0.2	5.5
Visual, GLB	0.2	0.3	1.5	0.2 ms	3.0	43 ms	0.3	0.3	5.6
Visual, OBJ	0.1	0.3	1.6	0.4 ms	2.9	1.3	0.3	0.2	6.6

Board Repo: andrewpaterson/658-Computer Board: SNES Controller Clock.kicad_pcb Folder Kicad / Computer / SNES / SNES Controller Clock Complexity 216 / 1000 (size 146, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 14, 328, 43 Triangles, simulation 339,970 in 52 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 12 MB 245 MB STEP 55 MB 288 MB STL 17 MB 244 MB OBJ 34 MB 259 MB Visual GLB 9.1 MB 286 MB OBJ 27 MB 290 MB

253. SNES Controller Reader

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.5	0.2 ms	1.4	64 ms	0.2	0.3	4.0
Simulation, STEP	0.1	0.3	1.3	0.2 ms	1.3	1.3	0.2	0.3	4.8
Simulation, STL	0.1	0.3	1.3	0.2 ms	1.3	0.1	0.2	0.2	3.6
Simulation, OBJ	0.1	0.3	1.3	0.3 ms	1.3	2.0	0.2	0.2	5.5
Visual, GLB	0.1	0.3	1.4	0.2 ms	3.2	53 ms	0.3	0.3	5.7
Visual, OBJ	0.1	0.3	1.5	0.3 ms	3.1	1.5	0.3	0.2	7.0

Board Repo: andrewpaterson/658-Computer Board: SNES Controller Reader.kicad_pcb Folder Kicad / Computer / SNES / SNES Controller Reader Complexity 215 / 1000 (size 145, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 12, 332, 39 Triangles, simulation 305,672 in 37 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 10 MB 244 MB STEP 45 MB 272 MB STL 15 MB 237 MB OBJ 30 MB 268 MB Visual GLB 7.9 MB 259 MB OBJ 23 MB 255 MB

254. RS232

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.2	0.4 ms	1.9	78 ms	0.3	0.2	5.3
Simulation, STEP	0.2	0.4	2.1	0.5 ms	2.0	1.6	0.3	0.2	6.9
Simulation, STL	0.2	0.5	2.2	0.4 ms	1.9	0.1	0.3	0.3	5.4
Simulation, OBJ	0.2	0.5	2.2	0.4 ms	1.9	2.5	0.3	0.2	7.8
Visual, GLB	0.1	0.5	2.1	0.4 ms	4.4	72 ms	0.5	0.2	8.0
Visual, OBJ	0.2	0.5	2.1	0.5 ms	4.5	2.0	0.6	0.2	10.1

Board Repo: andrewpaterson/658-Computer Board: RS232.kicad_pcb Folder Kicad / Computer / UART / RS232 Complexity 281 / 1000 (size 201, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 21, 611, 87 Triangles, simulation 533,172 in 85 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 18 MB 303 MB STEP 82 MB 372 MB STL 27 MB 300 MB OBJ 54 MB 410 MB Visual GLB 14 MB 389 MB OBJ 43 MB 382 MB

255. TTL5V

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.8	0.2 ms	1.6	64 ms	0.3	0.3	4.6
Simulation, STEP	0.2	0.4	1.7	0.5 ms	1.6	1.5	0.2	0.2	5.7
Simulation, STL	0.2	0.4	1.8	0.2 ms	1.6	0.1	0.2	0.2	4.5
Simulation, OBJ	0.2	0.4	1.7	0.2 ms	1.7	2.3	0.3	0.2	6.7
Visual, GLB	0.2	0.4	1.6	0.3 ms	3.7	49 ms	0.4	0.2	6.6
Visual, OBJ	0.2	0.4	1.8	0.2 ms	3.5	1.8	0.5	0.3	8.5

Board Repo: andrewpaterson/658-Computer Board: TTL5V.kicad_pcb Folder Kicad / Computer / UART / TTL5V Complexity 276 / 1000 (size 196, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 16, 558, 69 Triangles, simulation 432,350 in 70 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 275 MB STEP 65 MB 327 MB STL 22 MB 272 MB OBJ 44 MB 342 MB Visual GLB 11 MB 328 MB OBJ 34 MB 332 MB

256. UART Board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.7	8.3	0.7 ms	6.2	0.3	0.9	0.4	18.2
Simulation, STEP	0.3	1.3	8.5	0.9 ms	6.7	5.1	0.8	0.3	23.0
Simulation, STL	0.3	1.4	8.9	0.8 ms	6.3	0.9	0.8	0.2	18.8
Simulation, OBJ	0.3	1.4	9.0	0.9 ms	5.6	9.2	0.9	0.3	26.8
Visual, GLB	0.4	1.3	8.4	0.8 ms	15.5	0.2	1.7	0.2	27.7
Visual, OBJ	0.3	1.5	8.6	1 ms	15.9	5.5	2.2	0.3	34.3

Board Repo: andrewpaterson/658-Computer Board: UART Board.kicad_pcb Folder Kicad / Computer / UART / UART Board Complexity 243 / 1000 (size 163, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 14, 873, 123 Triangles, simulation 1,667,694 in 181 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 57 MB 728 MB STEP 265 MB 728 MB STL 83 MB 717 MB OBJ 174 MB 1.1 GB Visual GLB 37 MB 719 MB OBJ 112 MB 843 MB

257. UART Signals

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.1	0.6	0.2 ms	0.6	24 ms	94 ms	0.3	1.8
Simulation, STEP	0.1	0.2	0.7	0.2 ms	0.7	0.9	83 ms	0.2	2.8
Simulation, STL	0.1	0.1	0.6	0.2 ms	0.7	33 ms	0.1	0.2	2.0
Simulation, OBJ	0.1	0.1	0.7	0.2 ms	0.7	0.8	91 ms	0.2	2.7
Visual, GLB	0.1	0.1	0.6	0.2 ms	1.6	21 ms	0.1	0.3	2.9
Visual, OBJ	0.1	0.1	0.7	0.3 ms	1.5	0.6	0.1	0.3	3.4

Board Repo: andrewpaterson/658-Computer Board: UART Signals.kicad_pcb Folder Kicad / Computer / UART / UART Signals Complexity 192 / 1000 (size 122, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 9, 105, 9 Triangles, simulation 124,004 in 28 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.4 MB 195 MB STEP 21 MB 196 MB STL 6.2 MB 189 MB OBJ 12 MB 189 MB Visual GLB 3.4 MB 162 MB OBJ 9.6 MB 160 MB

258. VIA Board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	4.1	20.1	2 ms	15.1	0.8	2.2	0.3	43.3
Simulation, STEP	0.7	4.3	19.8	2 ms	15.4	10.6	2.2	0.3	53.2
Simulation, STL	0.6	4.1	19.8	2 ms	14.7	1.3	2.0	0.3	42.9
Simulation, OBJ	0.7	4.2	20.0	1 ms	15.5	24.8	2.3	0.4	68.0
Visual, GLB	0.6	4.4	20.3	1 ms	47.4	0.5	3.9	0.3	77.5
Visual, OBJ	0.7	4.5	20.7	2 ms	46.6	16.0	3.8	0.3	92.6

Board Repo: andrewpaterson/658-Computer Board: VIA Board.kicad_pcb Folder Kicad / Computer / VIA / VIA Board Complexity 269 / 1000 (size 189, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 28, 3,012, 337 Triangles, simulation 4,037,762 in 338 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 136 MB 1.3 GB STEP 568 MB 1.6 GB STL 202 MB 1.3 GB OBJ 424 MB 2.5 GB Visual GLB 92 MB 1.6 GB OBJ 294 MB 2.0 GB

259. VIA Breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.5	0.5 ms	1.9	97 ms	0.4	0.2	5.8
Simulation, STEP	0.1	0.6	2.6	0.5 ms	1.9	1.7	0.4	0.2	7.4
Simulation, STL	0.2	0.5	2.8	0.4 ms	2.1	0.1	0.4	0.2	6.2
Simulation, OBJ	0.2	0.6	2.5	0.4 ms	1.9	2.7	0.3	0.2	8.3
Visual, GLB	0.2	0.5	2.6	0.4 ms	4.1	59 ms	0.4	0.3	8.1
Visual, OBJ	0.2	0.5	2.6	0.6 ms	4.0	2.0	0.4	0.2	9.8

Board Repo: andrewpaterson/658-Computer Board: VIA Breakout.kicad_pcb Folder Kicad / Computer / VIA / VIA Breakout Complexity 257 / 1000 (size 187, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 6, 393, 47 Triangles, simulation 493,712 in 79 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 297 MB STEP 72 MB 344 MB STL 25 MB 296 MB OBJ 50 MB 354 MB Visual GLB 12 MB 355 MB OBJ 35 MB 343 MB

260. VIA Control

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.9	3.4	0.5 ms	3.4	0.1	0.5	0.2	8.8
Simulation, STEP	0.2	0.9	3.5	0.4 ms	3.1	2.4	0.4	0.2	10.7
Simulation, STL	0.2	0.8	3.2	0.7 ms	3.3	0.3	0.4	0.3	8.4
Simulation, OBJ	0.2	0.9	3.2	0.5 ms	3.1	3.9	0.4	0.2	12.0
Visual, GLB	0.2	0.8	3.4	0.5 ms	7.4	0.1	0.9	0.3	13.2
Visual, OBJ	0.2	0.8	3.2	0.6 ms	7.4	2.7	1.0	0.3	15.5

Board Repo: andrewpaterson/658-Computer Board: VIA Control.kicad_pcb Folder Kicad / Computer / VIA / VIA Control Complexity 243 / 1000 (size 173, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 28, 1,020, 154 Triangles, simulation 807,056 in 106 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 28 MB 373 MB STEP 126 MB 478 MB STL 40 MB 387 MB OBJ 82 MB 584 MB Visual GLB 23 MB 559 MB OBJ 68 MB 585 MB

261. Video Address Reader

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	1.7	0.2 ms	1.4	70 ms	0.3	0.2	4.2
Simulation, STEP	0.1	0.4	1.6	0.2 ms	1.5	1.4	0.2	0.2	5.5
Simulation, STL	0.1	0.4	1.6	0.3 ms	1.5	0.1	0.3	0.2	4.1
Simulation, OBJ	0.1	0.4	1.6	0.2 ms	1.4	2.0	0.2	0.2	6.0
Visual, GLB	0.1	0.4	1.6	0.2 ms	3.4	68 ms	0.4	0.2	6.2
Visual, OBJ	0.1	0.4	1.7	0.2 ms	3.5	1.6	0.6	0.2	8.1

Board Repo: andrewpaterson/658-Computer Board: Video Address Reader.kicad_pcb Folder Kicad / Computer / Video / Video Address Reader Complexity 227 / 1000 (size 157, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 14, 612, 88 Triangles, simulation 507,084 in 52 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 18 MB 320 MB STEP 82 MB 354 MB STL 25 MB 324 MB OBJ 51 MB 391 MB Visual GLB 13 MB 379 MB OBJ 40 MB 381 MB

262. Video Blank and Sync

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.4	0.2 ms	1.2	52 ms	0.2	0.3	3.5
Simulation, STEP	0.1	0.3	1.5	0.2 ms	1.2	1.3	0.2	0.2	4.8
Simulation, STL	0.2	0.3	1.4	0.2 ms	1.2	90 ms	0.2	0.3	3.6
Simulation, OBJ	0.1	0.3	1.4	0.2 ms	1.2	1.6	0.2	0.2	5.1
Visual, GLB	0.1	0.4	1.4	0.2 ms	3.4	49 ms	0.3	0.2	5.8
Visual, OBJ	0.1	0.3	1.4	0.2 ms	3.3	1.3	0.3	0.3	7.0

Board Repo: andrewpaterson/658-Computer Board: Video Blank and Sync.kicad_pcb Folder Kicad / Computer / Video / Video Blank and Sync Complexity 213 / 1000 (size 143, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 10, 301, 49 Triangles, simulation 336,140 in 44 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 12 MB 246 MB STEP 51 MB 287 MB STL 17 MB 254 MB OBJ 34 MB 270 MB Visual GLB 8.8 MB 285 MB OBJ 26 MB 277 MB

263. Video Board - Memory

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	7.2	31.3	2 ms	24.9	1.2	3.7	0.3	69.6
Simulation, STEP	1.0	6.6	31.3	2 ms	25.4	17.8	3.6	0.4	86.1
Simulation, STL	1.0	7.0	33.4	3 ms	26.7	2.6	3.7	0.4	74.8
Simulation, OBJ	1.0	6.8	31.2	3 ms	26.2	40.6	3.9	0.4	110.1
Visual, GLB	0.9	6.6	31.3	2 ms	79.1	0.8	8.3	0.3	127.3
Visual, OBJ	1.0	6.7	32.0	3 ms	76.5	27.4	8.3	0.3	152.2

Board Repo: andrewpaterson/658-Computer Board: Video Board - Memory.kicad_pcb Folder Kicad / Computer / Video / Video Board - Memory Complexity 282 / 1000 (size 202, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 30, 6,354, 685 Triangles, simulation 7,111,072 in 328 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 240 MB 2.2 GB STEP 1.1 GB 2.6 GB STL 356 MB 2.1 GB OBJ 755 MB 4.4 GB Visual GLB 167 MB 2.7 GB OBJ 542 MB 3.5 GB

264. Video Board - Signals

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	5.3	26.6	2 ms	22.7	0.9	3.0	0.3	59.5
Simulation, STEP	0.7	5.4	26.5	2 ms	22.5	14.5	2.6	0.3	72.5
Simulation, STL	0.7	5.2	25.9	3 ms	21.9	2.4	3.0	0.3	59.5
Simulation, OBJ	0.7	5.2	27.0	3 ms	21.8	32.3	3.2	0.3	90.5
Visual, GLB	0.6	5.3	27.1	3 ms	63.0	0.7	8.5	0.3	105.4
Visual, OBJ	0.7	5.0	25.0	2 ms	61.5	19.7	8.8	0.3	121.0

Board Repo: andrewpaterson/658-Computer Board: Video Board - Signals.kicad_pcb Folder Kicad / Computer / Video / Video Board - Signals Complexity 280 / 1000 (size 200, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 38, 4,452, 608 Triangles, simulation 6,820,772 in 505 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 228 MB 2.0 GB STEP 968 MB 2.5 GB STL 341 MB 1.9 GB OBJ 720 MB 4.3 GB Visual GLB 153 MB 2.5 GB OBJ 492 MB 3.0 GB

265. Video Clock

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.7	3.1	1.0 ms	2.9	0.1	0.4	0.3	7.7
Simulation, STEP	0.3	0.7	3.0	0.4 ms	2.9	2.4	0.4	0.2	9.9
Simulation, STL	0.2	0.7	2.9	0.5 ms	2.9	0.2	0.4	0.2	7.5
Simulation, OBJ	0.3	0.7	3.0	0.5 ms	2.8	4.2	0.5	0.3	11.7
Visual, GLB	0.3	0.8	3.2	0.7 ms	6.9	94 ms	0.7	0.2	12.3
Visual, OBJ	0.3	0.7	2.9	0.4 ms	6.6	3.5	0.8	0.2	14.9

Board Repo: andrewpaterson/658-Computer Board: Video Clock.kicad_pcb Folder Kicad / Computer / Video / Video Clock Complexity 242 / 1000 (size 172, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 39, 778, 111 Triangles, simulation 623,350 in 103 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 21 MB 343 MB STEP 98 MB 414 MB STL 31 MB 335 MB OBJ 63 MB 459 MB Visual GLB 18 MB 483 MB OBJ 52 MB 480 MB

266. Video Counter 12bit

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	2.7	0.3 ms	2.6	0.1	0.4	0.2	6.8
Simulation, STEP	0.2	0.6	2.4	0.4 ms	2.3	2.0	0.4	0.3	8.2
Simulation, STL	0.2	0.6	2.6	0.3 ms	2.2	0.2	0.3	0.2	6.4
Simulation, OBJ	0.2	0.6	2.5	0.4 ms	2.3	3.4	0.4	0.2	9.7
Visual, GLB	0.2	0.6	2.5	0.3 ms	5.2	79 ms	0.5	0.3	9.3
Visual, OBJ	0.2	0.7	2.7	0.3 ms	5.2	2.7	0.4	0.2	12.1

Board Repo: andrewpaterson/658-Computer Board: Video Counter 12bit.kicad_pcb Folder Kicad / Computer / Video / Video Counter 12bit Complexity 233 / 1000 (size 163, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 18, 761, 104 Triangles, simulation 561,818 in 51 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 19 MB 323 MB STEP 92 MB 386 MB STL 28 MB 312 MB OBJ 57 MB 399 MB Visual GLB 15 MB 404 MB OBJ 46 MB 408 MB

267. Video DAC

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.7	3.2	0.4 ms	3.1	0.1	0.5	0.3	8.2
Simulation, STEP	0.2	0.7	3.4	1 ms	3.0	2.7	0.5	0.3	10.8
Simulation, STL	0.2	0.7	3.3	0.5 ms	3.2	0.2	0.5	0.3	8.4
Simulation, OBJ	0.2	0.7	3.1	0.5 ms	3.2	3.5	0.5	0.3	11.4
Visual, GLB	0.2	0.7	3.3	0.4 ms	5.8	81 ms	0.7	0.2	11.0
Visual, OBJ	0.2	0.8	3.8	0.3 ms	6.5	2.9	0.7	0.3	15.2

Board Repo: andrewpaterson/658-Computer Board: Video DAC.kicad_pcb Folder Kicad / Computer / Video / Video DAC Complexity 285 / 1000 (size 205, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 26, 714, 84 Triangles, simulation 618,172 in 73 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 21 MB 322 MB STEP 96 MB 407 MB STL 31 MB 319 MB OBJ 63 MB 453 MB Visual GLB 16 MB 415 MB OBJ 49 MB 451 MB

268. Video Data Select

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.2	0.3 ms	1.8	75 ms	0.3	0.2	5.3
Simulation, STEP	0.1	0.5	2.2	0.2 ms	1.8	1.8	0.3	0.3	7.0
Simulation, STL	0.2	0.5	2.2	0.3 ms	1.8	0.1	0.3	0.2	5.3
Simulation, OBJ	0.2	0.5	2.3	0.4 ms	2.0	3.0	0.3	0.2	8.6
Visual, GLB	0.1	0.5	2.3	0.3 ms	4.9	62 ms	0.4	0.2	8.5
Visual, OBJ	0.2	0.5	2.4	0.3 ms	4.9	2.2	0.4	0.2	10.9

Board Repo: andrewpaterson/658-Computer Board: Video Data Select.kicad_pcb Folder Kicad / Computer / Video / Video Data Select Complexity 230 / 1000 (size 160, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 18, 596, 99 Triangles, simulation 539,780 in 54 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 19 MB 327 MB STEP 88 MB 370 MB STL 27 MB 331 MB OBJ 55 MB 413 MB Visual GLB 15 MB 396 MB OBJ 44 MB 401 MB

269. Video Device RAM Select

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	2.0	0.3 ms	1.8	72 ms	0.3	0.2	4.9
Simulation, STEP	0.2	0.4	1.9	0.2 ms	1.6	1.7	0.3	0.2	6.3
Simulation, STL	0.2	0.5	1.9	0.3 ms	1.7	0.1	0.3	0.2	4.9
Simulation, OBJ	0.2	0.5	2.0	0.3 ms	1.7	2.4	0.3	0.2	7.2
Visual, GLB	0.2	0.4	1.9	0.2 ms	3.8	60 ms	0.3	0.2	6.9
Visual, OBJ	0.2	0.4	2.0	0.2 ms	3.7	2.0	0.3	0.2	8.9

Board Repo: andrewpaterson/658-Computer Board: Video Device RAM Select.kicad_pcb Folder Kicad / Computer / Video / Video Device RAM Select Complexity 227 / 1000 (size 157, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 18, 519, 73 Triangles, simulation 431,068 in 55 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 272 MB STEP 70 MB 334 MB STL 22 MB 271 MB OBJ 44 MB 345 MB Visual GLB 12 MB 342 MB OBJ 35 MB 353 MB

270. Video Memory 2MB

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.5	6.1	1 ms	5.3	0.2	0.8	0.3	14.5
Simulation, STEP	0.3	1.5	6.9	1.0 ms	5.7	4.1	0.7	0.3	19.5
Simulation, STL	0.4	1.4	6.3	0.6 ms	5.4	0.4	0.8	0.2	15.0
Simulation, OBJ	0.5	1.6	6.8	0.5 ms	5.8	7.7	0.7	0.3	23.4
Visual, GLB	0.3	1.5	6.4	0.8 ms	13.8	0.2	1.6	0.2	24.0
Visual, OBJ	0.3	1.4	5.9	0.8 ms	12.6	6.5	1.9	0.3	29.0

Board Repo: andrewpaterson/658-Computer Board: Video Memory 2MB.kicad_pcb Folder Kicad / Computer / Video / Video Memory 2MB Complexity 252 / 1000 (size 182, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 29, 1,720, 272 Triangles, simulation 1,213,368 in 122 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 41 MB 500 MB STEP 190 MB 625 MB STL 61 MB 536 MB OBJ 124 MB 828 MB Visual GLB 34 MB 690 MB OBJ 105 MB 817 MB

271. Video Pixel Advance

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.2	0.5 ms	2.0	96 ms	0.3	0.2	5.6
Simulation, STEP	0.2	0.5	2.2	0.3 ms	2.2	1.9	0.3	0.2	7.4
Simulation, STL	0.2	0.5	2.1	0.4 ms	2.2	0.2	0.4	0.2	5.8
Simulation, OBJ	0.2	0.6	2.2	0.3 ms	2.3	3.1	0.4	0.2	8.9
Visual, GLB	0.2	0.6	2.2	0.2 ms	4.3	89 ms	0.7	0.2	8.2
Visual, OBJ	0.2	0.5	2.2	0.3 ms	4.2	2.6	0.8	0.2	10.7

Board Repo: andrewpaterson/658-Computer Board: Video Pixel Advance.kicad_pcb Folder Kicad / Computer / Video / Video Pixel Advance Complexity 231 / 1000 (size 161, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 17, 711, 98 Triangles, simulation 498,308 in 66 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 295 MB STEP 78 MB 356 MB STL 25 MB 297 MB OBJ 50 MB 384 MB Visual GLB 14 MB 388 MB OBJ 43 MB 408 MB

272. Video Row Latch

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	1.1	0.3 ms	1.0	46 ms	0.2	0.2	2.9
Simulation, STEP	0.1	0.2	1.0	0.2 ms	1.1	1.1	0.2	0.2	3.9
Simulation, STL	0.1	0.2	1.1	0.3 ms	1.0	73 ms	0.2	0.2	3.0
Simulation, OBJ	0.1	0.3	1.0	0.2 ms	1.1	1.4	0.2	0.2	4.3
Visual, GLB	0.1	0.3	1.0	0.2 ms	2.5	35 ms	0.2	0.2	4.4
Visual, OBJ	0.1	0.3	1.0	0.2 ms	2.6	1.0	0.3	0.3	5.4

Board Repo: andrewpaterson/658-Computer Board: Video Row Latch.kicad_pcb Folder Kicad / Computer / Video / Video Row Latch Complexity 215 / 1000 (size 145, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 12, 327, 42 Triangles, simulation 277,850 in 49 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.6 MB 227 MB STEP 43 MB 262 MB STL 14 MB 245 MB OBJ 28 MB 234 MB Visual GLB 7.3 MB 246 MB OBJ 21 MB 246 MB

273. Video Signal Dragger

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	1.9	0.2 ms	1.8	79 ms	0.3	0.3	4.8
Simulation, STEP	0.2	0.4	1.9	0.3 ms	1.7	1.6	0.3	0.3	6.3
Simulation, STL	0.2	0.5	2.0	0.2 ms	1.7	0.1	0.2	0.2	5.0
Simulation, OBJ	0.2	0.4	1.9	0.3 ms	1.8	2.1	0.3	0.2	6.9
Visual, GLB	0.2	0.5	1.9	0.3 ms	4.3	60 ms	0.5	0.3	7.6
Visual, OBJ	0.1	0.5	1.9	0.4 ms	4.1	1.8	0.5	0.2	9.1

Board Repo: andrewpaterson/658-Computer Board: Video Signal Dragger.kicad_pcb Folder Kicad / Computer / Video / Video Signal Dragger Complexity 225 / 1000 (size 155, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 12, 612, 73 Triangles, simulation 470,334 in 64 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 16 MB 287 MB STEP 76 MB 346 MB STL 24 MB 284 MB OBJ 48 MB 369 MB Visual GLB 13 MB 362 MB OBJ 38 MB 357 MB

274. Video Signals Output

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.1	0.2 ms	1.0	46 ms	0.2	0.2	3.0
Simulation, STEP	0.1	0.3	1.1	0.2 ms	1.0	1.1	0.2	0.3	4.1
Simulation, STL	0.1	0.2	1.1	0.2 ms	1.0	92 ms	0.2	0.2	3.0
Simulation, OBJ	0.1	0.2	1.1	0.5 ms	1.1	1.3	0.2	0.2	4.2
Visual, GLB	0.1	0.3	1.2	0.2 ms	2.7	33 ms	0.2	0.3	4.8
Visual, OBJ	0.1	0.3	1.1	0.3 ms	2.5	1.0	0.2	0.3	5.4

Board Repo: andrewpaterson/658-Computer Board: Video Signals Output.kicad_pcb Folder Kicad / Computer / Video / Video Signals Output Complexity 205 / 1000 (size 135, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 10, 220, 22 Triangles, simulation 264,788 in 42 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.1 MB 229 MB STEP 41 MB 250 MB STL 13 MB 230 MB OBJ 27 MB 229 MB Visual GLB 6.4 MB 226 MB OBJ 19 MB 225 MB

275. Keypad

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.3	0.3 ms	1.0	44 ms	0.2	0.3	3.3
Simulation, STEP	0.1	0.3	1.4	0.3 ms	1.0	1.2	0.2	0.3	4.4
Simulation, STL	0.1	0.3	1.2	0.2 ms	1.0	61 ms	0.2	0.2	3.0
Simulation, OBJ	0.1	0.3	1.2	0.2 ms	1.0	1.4	0.2	0.2	4.4
Visual, GLB	0.2	0.3	1.3	0.2 ms	2.2	28 ms	0.2	0.2	4.4
Visual, OBJ	0.2	0.3	1.3	0.2 ms	2.3	1.0	0.3	0.3	5.5

Board Repo: andrewpaterson/658-Computer Board: Keypad.kicad_pcb Folder Kicad / Keypad Complexity 195 / 1000 (size 130, features 65) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 8, 205, 11 Triangles, simulation 239,644 in 40 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.0 MB 223 MB STEP 33 MB 241 MB STL 12 MB 227 MB OBJ 24 MB 222 MB Visual GLB 5.6 MB 225 MB OBJ 16 MB 224 MB

276. GPIO 32bit Board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.9	5.6	0.5 ms	4.4	0.2	0.6	0.2	12.1
Simulation, STEP	0.3	0.9	5.6	0.5 ms	4.5	3.3	0.6	0.3	15.4
Simulation, STL	0.2	0.9	5.6	0.6 ms	4.3	0.3	0.5	0.2	12.2
Simulation, OBJ	0.2	0.8	5.6	0.7 ms	4.2	7.2	0.6	0.2	18.8
Visual, GLB	0.2	1.0	5.6	0.5 ms	7.4	0.1	0.8	0.2	15.4
Visual, OBJ	0.2	0.9	5.5	0.6 ms	7.3	3.7	0.9	0.2	18.7

Board Repo: andrewpaterson/658-Computer Board: GPIO 32bit Board.kicad_pcb Folder Kicad / Pico / GPIO 32bit Board Complexity 226 / 1000 (size 156, features 70) KESE features through vias, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 12, 771, 35 Triangles, simulation 1,137,618 in 108 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 38 MB 482 MB STEP 154 MB 569 MB STL 57 MB 446 MB OBJ 114 MB 1.0 GB Visual GLB 22 MB 612 MB OBJ 67 MB 651 MB

277. GPIO Address Decode

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.6	0.8 ms	2.4	95 ms	0.4	0.3	6.7
Simulation, STEP	0.2	0.7	2.6	0.5 ms	2.5	1.9	0.4	0.2	8.5
Simulation, STL	0.3	0.6	2.5	0.3 ms	2.5	0.1	0.4	0.2	6.7
Simulation, OBJ	0.2	0.6	2.5	0.4 ms	2.4	3.2	0.4	0.2	9.5
Visual, GLB	0.2	0.6	2.7	0.4 ms	5.6	76 ms	0.5	0.2	10.0
Visual, OBJ	0.2	0.6	2.7	0.4 ms	5.8	2.7	0.6	0.2	12.9

Board Repo: andrewpaterson/658-Computer Board: GPIO Address Decode.kicad_pcb Folder Kicad / Pico / GPIO Address Decode Complexity 239 / 1000 (size 169, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 30, 882, 89 Triangles, simulation 601,896 in 108 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 21 MB 332 MB STEP 100 MB 416 MB STL 30 MB 331 MB OBJ 62 MB 451 MB Visual GLB 18 MB 440 MB OBJ 53 MB 434 MB

278. GPIO Backplane Board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.8	6.1	0.5 ms	5.2	0.2	0.6	0.3	13.4
Simulation, STEP	0.2	0.9	6.3	0.5 ms	5.1	3.7	0.7	0.3	17.1
Simulation, STL	0.2	0.9	5.6	0.5 ms	4.6	0.4	0.7	0.3	12.6
Simulation, OBJ	0.2	0.9	6.0	0.5 ms	4.4	6.5	0.7	0.3	18.9
Visual, GLB	0.2	1.1	6.3	0.7 ms	8.7	0.1	1.1	0.3	17.7
Visual, OBJ	0.2	1.0	5.3	1 ms	9.1	4.3	1.3	0.3	21.5

Board Repo: andrewpaterson/658-Computer Board: GPIO Backplane Board.kicad_pcb Folder Kicad / Pico / GPIO Backplane Board Complexity 229 / 1000 (size 149, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 6, 733, 49 Triangles, simulation 1,207,452 in 92 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 39 MB 477 MB STEP 157 MB 603 MB STL 60 MB 501 MB OBJ 121 MB 810 MB Visual GLB 23 MB 653 MB OBJ 69 MB 572 MB

279. GPIO Bus

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	2.2	0.3 ms	1.9	73 ms	0.3	0.3	5.5
Simulation, STEP	0.2	0.5	2.1	0.4 ms	2.1	2.1	0.3	0.2	7.5
Simulation, STL	0.3	0.6	2.3	0.5 ms	2.2	0.2	0.4	0.3	6.1
Simulation, OBJ	0.3	0.6	2.4	0.5 ms	2.1	3.1	0.3	0.3	9.1
Visual, GLB	0.2	0.6	2.1	0.4 ms	4.9	76 ms	0.6	0.3	8.8
Visual, OBJ	0.2	0.6	1.9	0.3 ms	5.1	3.1	0.7	0.2	11.8

Board Repo: andrewpaterson/658-Computer Board: GPIO Bus.kicad_pcb Folder Kicad / Pico / GPIO Bus Complexity 226 / 1000 (size 156, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 19, 484, 64 Triangles, simulation 448,136 in 86 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 297 MB STEP 67 MB 331 MB STL 22 MB 289 MB OBJ 45 MB 355 MB Visual GLB 12 MB 348 MB OBJ 36 MB 347 MB

280. GPIO Controller Board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.4	7.6	0.8 ms	5.8	0.3	0.9	0.3	16.5
Simulation, STEP	0.3	1.4	7.8	0.7 ms	5.8	4.8	0.9	0.3	21.2
Simulation, STL	0.3	1.4	7.7	0.7 ms	6.0	0.6	1.0	0.3	17.3
Simulation, OBJ	0.3	1.4	7.5	1 ms	6.3	8.3	0.9	0.2	24.9
Visual, GLB	0.3	1.5	7.7	1 ms	15.2	0.2	1.6	0.2	26.6
Visual, OBJ	0.3	1.5	7.8	0.8 ms	15.9	6.0	1.6	0.3	33.2

Board Repo: andrewpaterson/658-Computer Board: GPIO Controller Board.kicad_pcb Folder Kicad / Pico / GPIO Controller Board Complexity 240 / 1000 (size 170, features 70) KESE features through vias, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 17, 1,375, 127 Triangles, simulation 1,707,516 in 183 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 57 MB 666 MB STEP 237 MB 791 MB STL 85 MB 649 MB OBJ 175 MB 1.1 GB Visual GLB 38 MB 828 MB OBJ 116 MB 876 MB

281. GPIO Power Switch

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.7	2.5	0.5 ms	2.0	92 ms	0.3	0.3	6.1
Simulation, STEP	0.3	0.7	2.6	0.4 ms	2.0	1.8	0.3	0.3	8.0
Simulation, STL	0.3	0.7	2.6	0.3 ms	2.0	0.1	0.3	0.2	6.2
Simulation, OBJ	0.3	0.7	2.9	0.4 ms	2.0	3.3	0.3	0.2	9.7
Visual, GLB	0.3	0.7	2.8	0.4 ms	5.1	0.1	0.9	0.2	10.1
Visual, OBJ	0.3	0.8	2.6	0.4 ms	4.5	2.7	0.5	0.2	11.6

Board Repo: andrewpaterson/658-Computer Board: GPIO Power Switch.kicad_pcb Folder Kicad / Pico / GPIO Power Switch Complexity 264 / 1000 (size 164, features 100) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 48, 415, 65 Triangles, simulation 549,758 in 60 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 19 MB 325 MB STEP 83 MB 378 MB STL 27 MB 315 MB OBJ 56 MB 410 MB Visual GLB 15 MB 427 MB OBJ 44 MB 360 MB

282. HCP65 24 Pin Tester

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.1	4.6	0.6 ms	4.6	0.2	0.5	0.3	11.7
Simulation, STEP	0.3	1.2	4.8	0.6 ms	4.1	3.5	0.6	0.3	14.8
Simulation, STL	0.3	1.1	4.8	1.0 ms	4.0	0.4	0.5	0.3	11.4
Simulation, OBJ	0.3	1.1	4.6	0.5 ms	4.1	5.4	0.6	0.3	16.5
Visual, GLB	0.3	1.2	4.6	0.9 ms	9.4	0.1	1.1	0.3	17.1
Visual, OBJ	0.3	1.2	4.8	0.6 ms	9.3	4.5	1.3	0.2	21.6

Board Repo: andrewpaterson/658-Computer Board: HCP65 24 Pin Tester.kicad_pcb Folder Kicad / Pico / HCP65 24 Pin Tester Complexity 263 / 1000 (size 183, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 67, 1,028, 187 Triangles, simulation 1,062,808 in 104 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 37 MB 459 MB STEP 167 MB 604 MB STL 53 MB 470 MB OBJ 109 MB 744 MB Visual GLB 28 MB 673 MB OBJ 86 MB 654 MB

283. HCP65 32 Pin Tester

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.3	5.9	0.5 ms	4.5	0.2	0.6	0.3	13.1
Simulation, STEP	0.4	1.4	5.8	0.5 ms	4.3	4.2	0.6	0.3	16.9
Simulation, STL	0.4	1.2	6.1	0.5 ms	4.6	0.4	0.7	0.2	13.7
Simulation, OBJ	0.4	1.2	5.7	0.5 ms	4.3	7.1	0.7	0.2	19.7
Visual, GLB	0.4	1.4	5.7	0.9 ms	11.0	0.2	1.1	0.3	20.0
Visual, OBJ	0.4	1.3	5.5	0.7 ms	10.9	5.4	1.2	0.2	24.9

Board Repo: andrewpaterson/658-Computer Board: HCP65 32 Pin Tester.kicad_pcb Folder Kicad / Pico / HCP65 32 Pin Tester Complexity 268 / 1000 (size 188, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 80, 1,295, 212 Triangles, simulation 1,295,928 in 131 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 45 MB 548 MB STEP 206 MB 674 MB STL 65 MB 525 MB OBJ 134 MB 880 MB Visual GLB 34 MB 805 MB OBJ 104 MB 778 MB

284. HCP65 40 Pin Tester

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.5	6.9	0.9 ms	5.5	0.3	0.7	0.3	15.6
Simulation, STEP	0.4	1.4	7.2	0.9 ms	5.4	4.3	0.6	0.2	19.5
Simulation, STL	0.4	1.6	7.0	0.8 ms	5.0	0.4	0.6	0.3	15.2
Simulation, OBJ	0.4	1.6	7.1	0.8 ms	5.5	7.5	0.6	0.3	23.0
Visual, GLB	0.3	1.4	6.9	1 ms	13.0	0.2	1.9	0.2	24.0
Visual, OBJ	0.5	1.5	6.8	1 ms	13.4	6.5	2.0	0.3	30.9

Board Repo: andrewpaterson/658-Computer Board: HCP65 40 Pin Tester.kicad_pcb Folder Kicad / Pico / HCP65 40 Pin Tester Complexity 273 / 1000 (size 193, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 92, 1,612, 251 Triangles, simulation 1,612,774 in 173 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 56 MB 601 MB STEP 256 MB 779 MB STL 81 MB 639 MB OBJ 168 MB 1.1 GB Visual GLB 42 MB 840 MB OBJ 128 MB 911 MB

285. HCP65 56 Pin Tester

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.9	8.8	0.8 ms	6.6	0.3	0.8	0.3	19.3
Simulation, STEP	0.5	1.8	9.1	1.0 ms	6.5	5.7	0.9	0.2	24.7
Simulation, STL	0.5	1.9	9.2	0.9 ms	7.1	0.6	1.0	0.2	20.4
Simulation, OBJ	0.6	2.0	9.0	0.8 ms	6.9	10.7	1.0	0.3	30.4
Visual, GLB	0.5	2.0	9.3	2 ms	17.9	0.2	2.4	0.2	32.6
Visual, OBJ	0.5	1.9	9.2	1 ms	17.6	8.5	2.6	0.2	40.6

Board Repo: andrewpaterson/658-Computer Board: HCP65 56 Pin Tester.kicad_pcb Folder Kicad / Pico / HCP65 56 Pin Tester Complexity 281 / 1000 (size 201, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 116, 2,318, 308 Triangles, simulation 1,963,298 in 205 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 68 MB 705 MB STEP 322 MB 933 MB STL 98 MB 706 MB OBJ 207 MB 1.3 GB Visual GLB 52 MB 1.0 GB OBJ 161 MB 1.1 GB

286. HCP65 64 Pin Tester

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.7	11.4	0.9 ms	8.9	0.4	1.3	0.3	25.6
Simulation, STEP	0.7	2.4	11.3	1 ms	10.1	7.1	1.2	0.3	33.2
Simulation, STL	1.0	2.7	10.9	1 ms	8.5	0.9	1.2	0.3	25.4
Simulation, OBJ	0.6	2.6	11.0	4 ms	8.5	14.1	1.2	0.3	38.4
Visual, GLB	0.7	2.6	11.7	1 ms	21.6	0.3	3.4	0.3	40.7
Visual, OBJ	0.8	2.8	11.3	2 ms	21.0	10.3	3.1	0.3	49.5

Board Repo: andrewpaterson/658-Computer Board: HCP65 64 Pin Tester.kicad_pcb Folder Kicad / Pico / HCP65 64 Pin Tester Complexity 283 / 1000 (size 203, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 129, 2,539, 331 Triangles, simulation 2,145,474 in 232 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 74 MB 774 MB STEP 332 MB 1.0 GB STL 107 MB 750 MB OBJ 225 MB 1.4 GB Visual GLB 57 MB 1.0 GB OBJ 177 MB 1.2 GB

287. HCP65 Board Tester

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	2.3	9.6	1 ms	8.7	0.4	1.2	0.4	22.9
Simulation, STEP	0.4	2.2	10.0	2 ms	9.0	6.5	1.2	0.4	29.6
Simulation, STL	0.3	2.2	10.4	1 ms	8.3	0.7	1.2	0.3	23.3
Simulation, OBJ	0.4	2.1	10.0	0.9 ms	8.6	12.5	1.2	0.3	35.0
Visual, GLB	0.3	2.5	10.9	1 ms	18.8	0.2	2.2	0.3	35.2
Visual, OBJ	0.4	2.2	9.7	1 ms	18.5	7.5	2.8	0.3	41.3

Board Repo: andrewpaterson/658-Computer Board: HCP65 Board Tester.kicad_pcb Folder Kicad / Pico / HCP65 Board Tester Complexity 242 / 1000 (size 162, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 8, 1,437, 88 Triangles, simulation 2,280,818 in 161 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 77 MB 786 MB STEP 313 MB 982 MB STL 114 MB 804 MB OBJ 236 MB 1.5 GB Visual GLB 46 MB 1.1 GB OBJ 141 MB 1.0 GB

288. HCP65 Narrow Analyser

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.8	5.4	0.4 ms	5.4	0.2	0.5	0.3	12.7
Simulation, STEP	0.1	0.9	5.4	0.4 ms	5.1	3.6	0.5	0.2	15.8
Simulation, STL	0.2	0.9	5.4	0.5 ms	5.1	0.4	0.5	0.2	12.8
Simulation, OBJ	0.2	0.9	5.4	0.6 ms	5.0	5.6	0.5	0.2	17.9
Visual, GLB	0.2	0.8	5.6	0.4 ms	8.2	92 ms	0.9	0.3	16.2
Visual, OBJ	0.2	0.8	5.3	0.5 ms	7.7	2.9	0.9	0.3	18.0

Board Repo: andrewpaterson/658-Computer Board: HCP65 Narrow Analyser.kicad_pcb Folder Kicad / Pico / HCP65 Narrow Analyser Complexity 191 / 1000 (size 126, features 65) KESE features rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 7, 203, 0 Triangles, simulation 1,202,636 in 75 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 38 MB 466 MB STEP 147 MB 584 MB STL 60 MB 471 MB OBJ 120 MB 824 MB Visual GLB 20 MB 582 MB OBJ 60 MB 581 MB

289. HCP65 Wide Analyser

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.9	5.8	0.4 ms	5.0	0.2	0.5	0.2	12.8
Simulation, STEP	0.2	0.8	5.9	0.3 ms	5.1	3.3	0.5	0.2	16.2
Simulation, STL	0.2	0.9	5.9	0.6 ms	5.0	0.3	0.5	0.2	13.0
Simulation, OBJ	0.2	0.9	5.7	0.4 ms	4.9	6.8	0.5	0.2	19.3
Visual, GLB	0.2	0.9	5.8	0.5 ms	7.1	0.1	0.6	0.2	14.8
Visual, OBJ	0.2	0.9	5.9	0.4 ms	7.0	3.3	0.7	0.2	18.2

Board Repo: andrewpaterson/658-Computer Board: HCP65 Wide Analyser.kicad_pcb Folder Kicad / Pico / HCP65 Wide Analyser Complexity 191 / 1000 (size 126, features 65) KESE features rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 7, 203, 0 Triangles, simulation 1,203,908 in 75 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 38 MB 471 MB STEP 147 MB 592 MB STL 60 MB 466 MB OBJ 120 MB 826 MB Visual GLB 20 MB 552 MB OBJ 60 MB 586 MB

290. LED Digit Tester

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.3	0.3 ms	1.9	89 ms	0.4	0.2	5.6
Simulation, STEP	0.1	0.4	2.4	0.6 ms	1.8	1.6	0.3	0.2	6.9
Simulation, STL	0.2	0.4	2.4	0.3 ms	1.8	0.2	0.4	0.2	5.6
Simulation, OBJ	0.2	0.5	2.4	0.3 ms	1.8	3.1	0.4	0.2	8.6
Visual, GLB	0.2	0.5	2.7	0.5 ms	4.8	60 ms	0.6	0.2	9.1
Visual, OBJ	0.2	0.5	2.5	0.3 ms	4.6	1.9	0.6	0.2	10.6

Board Repo: andrewpaterson/658-Computer Board: LED Digit Tester.kicad_pcb Folder Kicad / Pico / LED Digit Tester Complexity 219 / 1000 (size 154, features 65) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 21, 482, 30 Triangles, simulation 586,786 in 91 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 20 MB 340 MB STEP 84 MB 374 MB STL 29 MB 314 MB OBJ 59 MB 544 MB Visual GLB 13 MB 380 MB OBJ 39 MB 380 MB

291. SDRAM

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	3.3	0.6 ms	2.9	0.1	0.5	0.3	8.0
Simulation, STEP	0.2	0.7	3.2	0.5 ms	2.9	2.5	0.5	0.3	10.3
Simulation, STL	0.2	0.7	3.3	0.5 ms	2.8	0.3	0.4	0.3	8.0
Simulation, OBJ	0.2	0.7	3.1	2 ms	2.7	3.9	0.4	0.2	11.3
Visual, GLB	0.2	0.7	3.1	0.5 ms	7.3	0.1	0.7	0.2	12.4
Visual, OBJ	0.2	0.7	3.2	0.6 ms	7.2	2.9	0.8	0.2	15.1

Board Repo: andrewpaterson/658-Computer Board: SDRAM.kicad_pcb Folder Kicad / Pico / SDRAM Complexity 248 / 1000 (size 168, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 25, 928, 96 Triangles, simulation 791,702 in 138 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 27 MB 379 MB STEP 118 MB 456 MB STL 40 MB 363 MB OBJ 80 MB 569 MB Visual GLB 20 MB 497 MB OBJ 62 MB 558 MB

292. Signal Protection

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.0	0.2 ms	1.6	76 ms	0.2	0.2	4.8
Simulation, STEP	0.2	0.5	2.0	0.2 ms	1.7	1.6	0.3	0.2	6.5
Simulation, STL	0.2	0.5	2.1	0.5 ms	1.6	0.1	0.3	0.3	5.0
Simulation, OBJ	0.2	0.5	2.0	0.2 ms	1.6	2.6	0.3	0.2	7.5
Visual, GLB	0.2	0.5	2.0	0.2 ms	3.9	60 ms	0.4	0.3	7.3
Visual, OBJ	0.2	0.5	1.9	0.2 ms	3.6	2.0	0.4	0.2	8.8

Board Repo: andrewpaterson/658-Computer Board: Signal Protection.kicad_pcb Folder Kicad / Pico / Signal Protection Complexity 252 / 1000 (size 162, features 90) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 49, 344, 65 Triangles, simulation 462,784 in 43 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 16 MB 283 MB STEP 68 MB 344 MB STL 23 MB 293 MB OBJ 47 MB 417 MB Visual GLB 12 MB 355 MB OBJ 36 MB 357 MB

293. EPM570 Programmer

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.9	4.0	0.6 ms	3.2	0.1	0.5	0.2	9.2
Simulation, STEP	0.3	0.9	4.3	0.6 ms	2.9	2.8	0.5	0.2	11.9
Simulation, STL	0.2	0.9	4.4	0.6 ms	3.0	0.4	0.5	0.3	9.6
Simulation, OBJ	0.3	0.9	4.3	0.5 ms	2.8	5.6	0.5	0.3	14.7
Visual, GLB	0.3	0.9	4.2	0.5 ms	6.4	77 ms	0.6	0.3	12.8
Visual, OBJ	0.3	0.8	4.4	0.5 ms	6.5	2.8	0.8	0.2	15.9

Board Repo: andrewpaterson/658-Computer Board: EPM570 Programmer.kicad_pcb Folder Kicad / Programmers / EPM570 Programmer Complexity 259 / 1000 (size 179, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 19, 226, 6 Triangles, simulation 745,970 in 106 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 24 MB 350 MB STEP 98 MB 408 MB STL 37 MB 350 MB OBJ 75 MB 534 MB Visual GLB 15 MB 435 MB OBJ 46 MB 448 MB

294. EPM7032S Programmer

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	2.0	0.3 ms	1.5	66 ms	0.3	0.2	4.7
Simulation, STEP	0.2	0.4	2.0	0.3 ms	1.5	1.5	0.3	0.2	6.1
Simulation, STL	0.2	0.4	2.0	0.6 ms	1.6	0.2	0.3	0.2	4.8
Simulation, OBJ	0.2	0.5	2.0	0.3 ms	1.6	2.5	0.3	0.2	7.3
Visual, GLB	0.2	0.4	2.0	0.3 ms	3.0	39 ms	0.3	0.2	6.2
Visual, OBJ	0.2	0.4	2.1	0.5 ms	3.1	1.4	0.3	0.3	7.8

Board Repo: andrewpaterson/658-Computer Board: EPM7032S Programmer.kicad_pcb Folder Kicad / Programmers / EPM7032S Programmer Complexity 198 / 1000 (size 128, features 70) KESE features through vias, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 14, 130, 6 Triangles, simulation 411,288 in 55 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 262 MB STEP 52 MB 300 MB STL 21 MB 263 MB OBJ 41 MB 306 MB Visual GLB 8.1 MB 282 MB OBJ 24 MB 285 MB

295. EPM7160S Programmer

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	3.3	0.9 ms	2.3	0.1	0.4	0.3	7.4
Simulation, STEP	0.2	0.7	3.4	0.7 ms	2.4	2.0	0.4	0.2	9.3
Simulation, STL	0.2	0.6	3.2	0.6 ms	2.4	0.2	0.4	0.2	7.2
Simulation, OBJ	0.2	0.6	3.3	0.3 ms	2.3	3.7	0.4	0.2	10.7
Visual, GLB	0.2	0.6	3.2	0.6 ms	5.7	68 ms	0.5	0.2	10.5
Visual, OBJ	0.2	0.7	3.6	0.4 ms	5.5	2.1	0.5	0.2	12.9

Board Repo: andrewpaterson/658-Computer Board: EPM7160S Programmer.kicad_pcb Folder Kicad / Programmers / EPM7160S Programmer Complexity 246 / 1000 (size 176, features 70) KESE features through vias, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 16, 197, 7 Triangles, simulation 738,980 in 109 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 24 MB 352 MB STEP 95 MB 408 MB STL 37 MB 321 MB OBJ 74 MB 525 MB Visual GLB 15 MB 447 MB OBJ 45 MB 438 MB

296. Speed

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.3	11.3	1.0 ms	7.9	0.4	1.1	0.3	23.9
Simulation, STEP	0.5	2.2	11.2	0.9 ms	8.0	6.4	1.2	0.2	29.7
Simulation, STL	0.5	2.2	11.1	1 ms	7.8	0.7	1.0	0.3	23.8
Simulation, OBJ	0.4	2.1	11.1	0.9 ms	7.9	12.6	1.1	0.2	35.3
Visual, GLB	0.4	2.2	10.7	0.7 ms	21.0	0.3	2.4	0.3	37.2
Visual, OBJ	0.4	2.2	11.1	1 ms	21.5	9.9	2.8	0.3	48.1

Board Repo: andrewpaterson/658-Computer Board: Speed.kicad_pcb Folder Kicad / Speed Complexity 268 / 1000 (size 188, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 50, 1,767, 278 Triangles, simulation 2,444,740 in 242 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 82 MB 894 MB STEP 347 MB 1.0 GB STL 122 MB 896 MB OBJ 254 MB 1.6 GB Visual GLB 59 MB 1.1 GB OBJ 184 MB 1.2 GB

297. LCD 14 Segment Tester

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	3.3	0.4 ms	2.5	0.1	0.4	0.2	7.2
Simulation, STEP	0.2	0.5	3.3	0.6 ms	2.4	2.2	0.4	0.3	9.3
Simulation, STL	0.2	0.6	3.4	0.5 ms	2.3	0.2	0.4	0.2	7.3
Simulation, OBJ	0.2	0.5	3.2	0.5 ms	2.4	4.0	0.3	0.2	10.9
Visual, GLB	0.2	0.5	3.2	0.4 ms	5.0	70 ms	0.5	0.2	9.7
Visual, OBJ	0.2	0.6	3.2	0.5 ms	5.1	2.4	0.5	0.2	12.2

Board Repo: andrewpaterson/658-Computer Board: LCD 14 Segment Tester.kicad_pcb Folder Kicad / Tester / LCD 14 Segment Tester Complexity 273 / 1000 (size 208, features 65) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 26, 660, 42 Triangles, simulation 730,016 in 81 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 25 MB 387 MB STEP 125 MB 427 MB STL 37 MB 381 MB OBJ 75 MB 671 MB Visual GLB 16 MB 425 MB OBJ 48 MB 434 MB

298. LCD Dual 7 Segment Tester

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	2.1	0.2 ms	1.5	72 ms	0.3	0.2	4.7
Simulation, STEP	0.1	0.4	2.2	0.5 ms	1.7	1.5	0.3	0.2	6.4
Simulation, STL	0.1	0.4	2.3	0.3 ms	1.6	0.1	0.3	0.2	4.9
Simulation, OBJ	0.1	0.4	2.2	0.4 ms	1.6	2.5	0.3	0.2	7.2
Visual, GLB	0.1	0.4	2.3	0.4 ms	3.6	50 ms	0.5	0.2	7.3
Visual, OBJ	0.1	0.4	2.3	0.4 ms	3.6	1.6	0.3	0.2	8.5

Board Repo: andrewpaterson/658-Computer Board: LCD Dual 7 Segment Tester.kicad_pcb Folder Kicad / Tester / LCD Dual 7 Segment Tester Complexity 206 / 1000 (size 151, features 55) KESE features through vias, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 20, 386, 32 Triangles, simulation 566,016 in 60 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 20 MB 332 MB STEP 93 MB 362 MB STL 28 MB 331 MB OBJ 58 MB 478 MB Visual GLB 12 MB 363 MB OBJ 36 MB 361 MB

299. RAM 48K Select

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	71 ms	67 ms	0.3	0.1 ms	0.4	13 ms	43 ms	0.2	1.1
Simulation, STEP	72 ms	74 ms	0.3	0.1 ms	0.4	0.6	42 ms	0.2	1.8
Simulation, STL	67 ms	63 ms	0.3	0.1 ms	0.4	21 ms	46 ms	0.2	1.1
Simulation, OBJ	68 ms	66 ms	0.3	0.1 ms	0.4	0.4	46 ms	0.2	1.4
Visual, GLB	67 ms	62 ms	0.3	0.2 ms	0.8	8 ms	50 ms	0.2	1.5
Visual, OBJ	71 ms	64 ms	0.3	0.1 ms	0.8	0.2	48 ms	0.2	1.7

Board Repo: andrewpaterson/658-Computer Board: RAM 48K Select.kicad_pcb Folder Kicad / Tester / RAM 48K Select Complexity 103 / 1000 (size 78, features 25) KESE features through vias, rounded, trapezoid or chamfered pads Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 1, 13, 4 Triangles, simulation 76,744 in 21 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 2.4 MB 171 MB STEP 9.0 MB 177 MB STL 3.8 MB 168 MB OBJ 7.1 MB 169 MB Visual GLB 1.5 MB 148 MB OBJ 4.1 MB 149 MB

300. ROM 2316 to 2716

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	1.1	0.3 ms	1.0	40 ms	0.2	0.2	2.8
Simulation, STEP	95 ms	0.2	1.0	0.2 ms	1.0	1.2	0.1	0.2	3.9
Simulation, STL	0.1	0.2	0.9	0.3 ms	1.0	67 ms	0.1	0.3	2.7
Simulation, OBJ	96 ms	0.2	0.9	0.2 ms	1.0	1.2	0.2	0.2	3.8
Visual, GLB	91 ms	0.2	0.9	0.2 ms	1.6	19 ms	0.1	0.2	3.2
Visual, OBJ	0.1	0.2	1.0	0.2 ms	1.7	0.6	0.1	0.2	3.9

Board Repo: andrewpaterson/658-Computer Board: ROM 2316 to 2716.kicad_pcb Folder Kicad / Tester / ROM 2316 to 2716 Complexity 114 / 1000 (size 104, features 10) KESE features rounded, trapezoid or chamfered pads Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 6, 55, 0 Triangles, simulation 216,216 in 36 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 6.8 MB 204 MB STEP 24 MB 224 MB STL 11 MB 200 MB OBJ 21 MB 203 MB Visual GLB 3.8 MB 184 MB OBJ 11 MB 184 MB

301. TSSOP32-14mm Adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	1.1	0.2 ms	0.9	34 ms	0.1	0.2	2.6
Simulation, STEP	94 ms	0.2	0.9	0.2 ms	0.8	1.0	0.1	0.2	3.4
Simulation, STL	89 ms	0.2	1.0	0.2 ms	0.9	68 ms	0.1	0.2	2.5
Simulation, OBJ	0.1	0.2	0.9	0.2 ms	0.9	1.0	0.1	0.3	3.4
Visual, GLB	0.1	0.2	1.0	0.2 ms	1.9	25 ms	0.2	0.2	3.5
Visual, OBJ	96 ms	0.2	0.9	0.3 ms	2.0	0.7	0.2	0.3	4.3

Board Repo: andrewpaterson/658-Computer Board: TSSOP32-14mm Adapter.kicad_pcb Folder Kicad / Tester / TSSOP32-14mm Adapter Complexity 170 / 1000 (size 115, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 2, 146, 15 Triangles, simulation 213,532 in 44 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.0 MB 218 MB STEP 29 MB 227 MB STL 11 MB 217 MB OBJ 21 MB 208 MB Visual GLB 4.8 MB 207 MB OBJ 14 MB 205 MB

302. W65C64

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.3	5.4	0.5 ms	4.9	0.2	0.5	0.2	12.9
Simulation, STEP	0.3	1.2	5.5	0.8 ms	4.9	4.1	0.7	0.2	16.9
Simulation, STL	0.4	1.4	5.2	0.8 ms	4.9	0.4	0.6	0.2	13.0
Simulation, OBJ	0.4	1.3	5.3	0.7 ms	4.8	6.4	0.6	0.3	19.0
Visual, GLB	0.3	1.3	5.8	0.5 ms	12.6	0.1	1.4	0.3	21.9
Visual, OBJ	0.3	1.4	5.3	0.8 ms	13.4	5.3	1.5	0.2	27.4

Board Repo: andrewpaterson/658-Computer Board: W65C64.kicad_pcb Folder Kicad / W65C64 Complexity 260 / 1000 (size 190, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 51, 2,018, 270 Triangles, simulation 1,320,418 in 119 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 46 MB 599 MB STEP 217 MB 668 MB STL 66 MB 594 MB OBJ 136 MB 890 MB Visual GLB 40 MB 746 MB OBJ 122 MB 919 MB

303. CommonCathode60A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	1.3	4.1	0.4 ms	3.3	0.2	0.6	0.3	10.0
Simulation, STEP	0.2	1.3	4.2	0.4 ms	3.3	3.3	0.6	0.2	13.2
Simulation, STL	0.2	1.4	4.4	0.3 ms	3.3	0.4	0.5	0.2	10.4
Simulation, OBJ	0.3	1.3	4.3	0.4 ms	3.5	6.5	0.5	0.3	16.6
Visual, GLB	0.2	1.3	4.4	0.3 ms	5.9	83 ms	0.8	0.3	13.0
Visual, OBJ	0.2	1.3	4.3	0.3 ms	5.6	3.1	0.8	0.3	15.7

Board Repo: antevens/boatcontrol Board: CommonCathode60A.kicad_pcb Folder addon / CommonCathode60A Complexity 186 / 1000 (size 156, features 30) KESE features filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 11, 337, 0 Triangles, simulation 1,116,070 in 46 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 38 MB 391 MB STEP 151 MB 477 MB STL 56 MB 402 MB OBJ 113 MB 772 MB Visual GLB 15 MB 428 MB OBJ 45 MB 421 MB

304. CurrentSensor

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	1.2	0.2 ms	1.0	41 ms	0.2	0.3	3.2
Simulation, STEP	0.2	0.4	1.1	0.2 ms	0.9	1.2	0.1	0.3	4.2
Simulation, STL	0.1	0.4	1.2	0.2 ms	0.9	58 ms	0.1	0.3	3.0
Simulation, OBJ	0.1	0.4	1.1	0.1 ms	0.9	1.4	0.1	0.2	4.4
Visual, GLB	0.2	0.4	1.1	0.2 ms	1.9	25 ms	0.2	0.2	4.0
Visual, OBJ	0.2	0.4	1.2	0.2 ms	1.9	0.7	0.2	0.2	4.7

Board Repo: antevens/boatcontrol Board: CurrentSensor.kicad_pcb Folder addon / CurrentSensor Complexity 85 / 1000 (size 50, features 35) KESE features custom pads, rounded, trapezoid or chamfered pads, copper drawings Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 20, 0, 0 Triangles, simulation 222,452 in 34 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.7 MB 221 MB STEP 36 MB 237 MB STL 11 MB 215 MB OBJ 23 MB 215 MB Visual GLB 4.3 MB 189 MB OBJ 12 MB 197 MB

305. NonLatchingNO30A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.5	5.6	0.8 ms	3.8	0.2	0.6	0.3	12.2
Simulation, STEP	0.3	1.5	5.9	0.6 ms	3.9	3.6	0.6	0.3	16.2
Simulation, STL	0.3	1.6	5.5	0.6 ms	3.7	0.4	0.8	0.3	12.6
Simulation, OBJ	0.3	1.5	5.6	0.5 ms	4.0	7.5	0.9	0.3	20.0
Visual, GLB	0.5	1.9	6.5	0.5 ms	10.0	0.2	1.1	0.3	20.6
Visual, OBJ	0.4	1.9	6.4	0.6 ms	9.2	3.9	1.1	0.3	23.1

Board Repo: antevens/boatcontrol Board: NonLatchingNO30A.kicad_pcb Folder addon / NonLatchingNO30A Complexity 198 / 1000 (size 168, features 30) KESE features filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 19, 499, 0 Triangles, simulation 1,069,614 in 62 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 37 MB 420 MB STEP 163 MB 481 MB STL 53 MB 418 MB OBJ 109 MB 751 MB Visual GLB 18 MB 449 MB OBJ 54 MB 445 MB

306. ac922interposer

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	0.1	0.1 ms	75 ms	3 ms	8 ms	0.2	1.3
Simulation, STEP	0.2	0.7	0.1	0.1 ms	78 ms	86 ms	8 ms	0.2	1.4
Simulation, STL	0.2	0.7	0.1	0.2 ms	81 ms	5 ms	13 ms	0.2	1.3
Simulation, OBJ	0.2	0.7	0.1	0.1 ms	79 ms	71 ms	9 ms	0.2	1.4
Visual, GLB	0.2	0.7	0.1	0.1 ms	0.2	6 ms	19 ms	0.2	1.5
Visual, OBJ	0.2	0.7	0.1	0.1 ms	0.2	59 ms	14 ms	0.2	1.4

Board Repo: antmicro/ac922interposer Board: ac922interposer.kicad_pcb Complexity 212 / 1000 (size 177, features 35) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline Tested 9th November 2026 Copper layers 6 File format KiCad 5 (20171130) Parts, tracks, vias 15, 449, 43 Triangles, simulation 15,704 in 7 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 345 kB 159 MB STEP 227 kB 160 MB STL 786 kB 160 MB OBJ 1.4 MB 158 MB Visual GLB 352 kB 160 MB OBJ 1.1 MB 160 MB

307. jetson-agx-thor-baseboard-pcie-x1-interposer

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.4	5.5	16.0	0.9 ms	26.5	0.9	2.1	0.4	54.7
Simulation, STEP	3.0	5.2	15.6	0.9 ms	28.7	12.2	2.0	0.4	67.2
Simulation, STL	3.1	5.2	15.7	0.9 ms	25.1	2.0	2.1	0.4	53.6
Simulation, OBJ	3.1	4.9	15.2	0.9 ms	25.9	27.3	2.3	0.4	79.1
Visual, GLB	2.9	4.8	15.4	0.9 ms	44.3	0.5	5.7	0.3	74.0
Visual, OBJ	2.9	4.7	14.9	1.0 ms	41.1	18.5	5.8	0.3	88.2

Board Repo: antmicro/agx-thor-baseboard-pcie-interposer Board: jetson-agx-thor-baseboard-pcie-x1-interposer.kicad_pcb Complexity 364 / 1000 (size 214, features 150) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, copper text, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 68, 948, 940 Triangles, simulation 4,223,912 in 375 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 143 MB 1.4 GB STEP 533 MB 1.9 GB STL 211 MB 1.4 GB OBJ 444 MB 2.8 GB Visual GLB 101 MB 1.7 GB OBJ 318 MB 2.1 GB

308. antmicro-alvium-flex-csi-adapter-100mm-double-opposite-sides

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	2.2	0.4 ms	2.7	0.1	0.4	0.3	6.6
Simulation, STEP	0.3	0.9	2.3	0.2 ms	2.7	1.7	0.4	0.2	8.5
Simulation, STL	0.2	0.8	2.1	0.2 ms	2.5	0.2	0.4	0.2	6.3
Simulation, OBJ	0.2	0.7	2.3	0.2 ms	2.7	2.9	0.4	0.2	9.4
Visual, GLB	0.2	0.8	2.2	0.3 ms	5.7	87 ms	0.8	0.2	10.1
Visual, OBJ	0.3	0.8	2.1	0.3 ms	5.9	2.9	0.9	0.2	13.3

Board Repo: antmicro/alvium-flexible-csi-adapter Board: antmicro-alvium-flex-csi-adapter-100mm-double-opposite-sides.kicad_pcb Folder 100mm-double-opposite-sides Complexity 200 / 1000 (size 165, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 5, 1,782, 294 Triangles, simulation 631,300 in 56 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 22 MB 397 MB STEP 86 MB 455 MB STL 32 MB 401 MB OBJ 63 MB 458 MB Visual GLB 20 MB 498 MB OBJ 61 MB 534 MB

309. antmicro-alvium-flex-csi-adapter-100mm-double-same-side

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	2.9	0.2 ms	3.8	0.1	0.4	0.2	8.3
Simulation, STEP	0.2	0.8	2.7	0.2 ms	3.9	2.7	0.3	0.2	10.8
Simulation, STL	0.2	0.7	2.7	0.2 ms	3.7	0.2	0.4	0.2	8.2
Simulation, OBJ	0.2	0.8	2.8	0.2 ms	3.8	2.9	0.3	0.2	11.0
Visual, GLB	0.2	0.8	2.8	0.2 ms	6.3	0.1	0.8	0.2	11.3
Visual, OBJ	0.2	0.8	2.7	0.2 ms	6.5	2.8	0.8	0.2	14.0

Board Repo: antmicro/alvium-flexible-csi-adapter Board: antmicro-alvium-flex-csi-adapter-100mm-double-same-side.kicad_pcb Folder 100mm-double-same-side Complexity 206 / 1000 (size 171, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 5, 2,906, 269 Triangles, simulation 704,936 in 56 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 24 MB 433 MB STEP 108 MB 511 MB STL 35 MB 425 MB OBJ 70 MB 539 MB Visual GLB 23 MB 628 MB OBJ 69 MB 594 MB

310. antmicro-alvium-flex-csi-adapter-100mm-single-opposite-sides

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	0.9	0.2 ms	1.3	44 ms	0.1	0.3	3.3
Simulation, STEP	0.2	0.5	0.9	0.3 ms	1.2	1.2	0.1	0.2	4.3
Simulation, STL	0.2	0.5	0.9	0.3 ms	1.1	65 ms	0.2	0.2	3.2
Simulation, OBJ	0.2	0.5	0.9	0.3 ms	1.2	1.4	0.1	0.2	4.4
Visual, GLB	0.2	0.5	0.9	0.2 ms	2.5	38 ms	0.3	0.2	4.5
Visual, OBJ	0.2	0.4	0.9	0.3 ms	2.4	1.3	0.2	0.2	5.6

Board Repo: antmicro/alvium-flexible-csi-adapter Board: antmicro-alvium-flex-csi-adapter-100mm-single-opposite-sides.kicad_pcb Folder 100mm-single-opposite-sides Complexity 179 / 1000 (size 144, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 3, 630, 96 Triangles, simulation 239,248 in 55 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.3 MB 231 MB STEP 36 MB 265 MB STL 12 MB 232 MB OBJ 24 MB 232 MB Visual GLB 7.5 MB 235 MB OBJ 22 MB 236 MB

311. antmicro-alvium-flex-csi-adapter_100mm-single-same-side

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	1.0	0.4 ms	1.4	47 ms	0.1	0.2	3.5
Simulation, STEP	0.2	0.6	1.0	0.2 ms	1.4	1.5	0.1	0.2	5.0
Simulation, STL	0.2	0.4	0.9	0.2 ms	1.3	91 ms	0.2	0.2	3.3
Simulation, OBJ	0.2	0.5	1.1	0.3 ms	1.4	1.5	0.1	0.2	5.0
Visual, GLB	0.2	0.5	1.0	0.3 ms	3.0	42 ms	0.2	0.2	5.1
Visual, OBJ	0.2	0.5	1.1	0.2 ms	2.8	1.5	0.3	0.3	6.6

Board Repo: antmicro/alvium-flexible-csi-adapter Board: antmicro-alvium-flex-csi-adapter_100mm-single-same-side.kicad_pcb Folder 100mm-single-same-side Complexity 184 / 1000 (size 149, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 3, 918, 115 Triangles, simulation 282,484 in 55 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.8 MB 248 MB STEP 42 MB 289 MB STL 14 MB 251 MB OBJ 28 MB 255 MB Visual GLB 9.2 MB 281 MB OBJ 27 MB 284 MB

312. antmicro-alvium-flex-csi-adapter-200mm-single-opposite-sides

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	1.0	1.5	0.3 ms	1.9	73 ms	0.3	0.4	5.5
Simulation, STEP	0.3	1.0	1.6	0.7 ms	2.0	2.1	0.2	0.4	7.6
Simulation, STL	0.3	0.8	1.5	0.4 ms	1.8	0.1	0.2	0.4	5.2
Simulation, OBJ	0.2	0.7	1.3	0.2 ms	1.6	1.8	0.2	0.3	6.1
Visual, GLB	0.2	0.6	1.2	0.3 ms	3.3	62 ms	0.4	0.2	6.0
Visual, OBJ	0.2	0.7	1.3	0.3 ms	3.5	2.0	0.5	0.3	8.4

Board Repo: antmicro/alvium-flexible-csi-adapter Board: antmicro-alvium-flex-csi-adapter-200mm-single-opposite-sides.kicad_pcb Folder 200mm-single-opposite-sides Complexity 182 / 1000 (size 147, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 3, 635, 173 Triangles, simulation 306,536 in 55 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 257 MB STEP 39 MB 296 MB STL 15 MB 259 MB OBJ 30 MB 264 MB Visual GLB 9.5 MB 280 MB OBJ 28 MB 317 MB

313. antmicro-alvium-flex-csi-adapter_200mm-single-same-side

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	1.1	0.2 ms	1.7	62 ms	0.2	0.2	4.0
Simulation, STEP	0.2	0.6	1.3	0.3 ms	1.7	1.5	0.2	0.2	5.5
Simulation, STL	0.2	0.5	1.2	0.2 ms	1.5	0.1	0.2	0.2	3.9
Simulation, OBJ	0.2	0.6	1.2	0.2 ms	1.5	1.5	0.2	0.2	5.4
Visual, GLB	0.2	0.6	1.1	0.4 ms	3.3	51 ms	0.4	0.2	5.9
Visual, OBJ	0.2	0.6	1.0	0.3 ms	3.2	1.5	0.4	0.2	7.1

Board Repo: antmicro/alvium-flexible-csi-adapter Board: antmicro-alvium-flex-csi-adapter_200mm-single-same-side.kicad_pcb Folder 200mm-single-same-side Complexity 186 / 1000 (size 151, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 3, 913, 181 Triangles, simulation 337,742 in 55 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 12 MB 268 MB STEP 44 MB 317 MB STL 17 MB 267 MB OBJ 33 MB 266 MB Visual GLB 11 MB 329 MB OBJ 32 MB 328 MB

314. artix-dc-scm

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	18.8	18.1	45.4	2 ms	53.3	3.2	7.1	0.7	146.5
Simulation, STEP	18.4	16.7	42.7	3 ms	48.5	29.1	6.8	0.7	162.7
Simulation, STL	17.9	18.2	43.7	3 ms	49.1	5.4	6.3	0.7	141.4
Simulation, OBJ	17.8	17.1	40.9	2 ms	49.6	91.4	7.0	0.7	224.5
Visual, GLB	18.4	18.0	43.9	3 ms	105.7	1.1	9.7	0.5	197.4
Visual, OBJ	18.1	17.4	42.1	3 ms	106.0	44.3	9.9	0.5	238.4

Board Repo: antmicro/artix-dc-scm Board: artix-dc-scm.kicad_pcb Complexity 504 / 1000 (size 344, features 160) KESE features through vias, blind and buried vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 8 File format KiCad 9 (20241229) Parts, tracks, vias 529, 12,682, 1,558 Triangles, simulation 12,211,974 in 719 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 411 MB 3.2 GB STEP 1.4 GB 4.2 GB STL 611 MB 3.1 GB OBJ 1.4 GB 8.0 GB Visual GLB 209 MB 3.7 GB OBJ 707 MB 4.7 GB

315. arty-a7-expansion

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.9	9.3	0.7 ms	7.6	0.3	0.8	0.2	20.6
Simulation, STEP	0.4	1.9	9.0	0.8 ms	7.4	4.7	0.8	0.3	24.4
Simulation, STL	0.4	2.0	9.5	0.6 ms	7.0	0.4	0.7	0.3	20.4
Simulation, OBJ	0.4	1.9	9.7	2 ms	7.3	7.3	0.7	0.3	27.5
Visual, GLB	0.4	1.8	9.3	0.6 ms	14.7	0.2	1.2	0.2	27.8
Visual, OBJ	0.5	1.9	9.6	0.9 ms	15.3	4.6	1.3	0.2	33.5

Board Repo: antmicro/arty-expansion-board Board: arty-a7-expansion.kicad_pcb Complexity 325 / 1000 (size 260, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 108, 3,485, 134 Triangles, simulation 1,746,946 in 137 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 62 MB 700 MB STEP 317 MB 803 MB STL 87 MB 736 MB OBJ 185 MB 1.2 GB Visual GLB 36 MB 847 MB OBJ 109 MB 911 MB

316. arty-mpw-tester

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	5.0	2.2	7.2	0.9 ms	7.4	0.3	1.0	0.3	23.4
Simulation, STEP	5.3	2.2	7.5	1 ms	7.3	5.5	1.2	0.3	29.2
Simulation, STL	5.1	2.0	7.2	1.0 ms	7.2	0.8	1.2	0.4	23.9
Simulation, OBJ	5.3	2.2	7.2	0.8 ms	7.1	10.7	1.0	0.4	33.9
Visual, GLB	4.9	2.4	7.2	0.9 ms	17.8	0.2	2.1	0.3	34.8
Visual, OBJ	4.8	2.3	6.8	0.8 ms	17.8	6.8	2.0	0.3	40.8

Board Repo: antmicro/arty-mpw-tester Board: arty-mpw-tester.kicad_pcb Complexity 378 / 1000 (size 248, features 130) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, knockout text, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 109, 1,456, 147 Triangles, simulation 2,103,228 in 162 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 72 MB 891 MB STEP 309 MB 968 MB STL 105 MB 854 MB OBJ 219 MB 1.5 GB Visual GLB 44 MB 949 MB OBJ 134 MB 1.1 GB

317. arvsom

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.1	17.9	53.5	2 ms	72.8	4.0	8.9	0.7	161.0
Simulation, STEP	3.3	17.4	52.3	2 ms	70.9	34.9	9.2	0.6	188.6
Simulation, STL	3.3	16.8	52.6	2 ms	80.7	8.7	11.6	0.7	174.5
Simulation, OBJ	3.2	17.3	53.1	3 ms	72.8	120.8	9.7	0.6	277.5
Visual, GLB	3.1	17.6	54.4	2 ms	126.4	1.3	12.1	0.5	215.3
Visual, OBJ	3.5	17.3	53.1	2 ms	123.1	41.3	11.2	0.5	250.0

Board Repo: antmicro/arvsom Board: arvsom.kicad_pcb Complexity 404 / 1000 (size 349, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper text Tested 9th November 2026 Copper layers 12 File format KiCad 5 (20171130) Parts, tracks, vias 427, 15,505, 1,202 Triangles, simulation 15,923,766 in 682 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 544 MB 2.6 GB STEP 1.7 GB 4.3 GB STL 796 MB 3.1 GB OBJ 1.8 GB 10 GB Visual GLB 208 MB 3.6 GB OBJ 709 MB 4.6 GB

318. audio-latency-tester-board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	4.6	2.5	8.5	0.9 ms	11.4	0.4	0.9	0.3	28.6
Simulation, STEP	4.5	2.4	8.3	0.8 ms	11.0	7.6	0.9	0.3	35.0
Simulation, STL	4.6	2.4	8.0	0.9 ms	11.8	0.8	0.9	0.3	28.8
Simulation, OBJ	4.6	2.4	8.7	1 ms	11.6	14.2	1.0	0.3	42.7
Visual, GLB	4.7	2.5	8.4	1 ms	24.0	0.3	2.4	0.4	42.7
Visual, OBJ	4.7	2.5	8.4	0.8 ms	23.6	10.6	2.4	0.4	52.4

Board Repo: antmicro/audio-latency-tester-board Board: audio-latency-tester-board.kicad_pcb Complexity 410 / 1000 (size 270, features 140) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper text, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 212, 2,202, 302 Triangles, simulation 2,357,376 in 214 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 81 MB 953 MB STEP 375 MB 1.1 GB STL 118 MB 958 MB OBJ 247 MB 1.7 GB Visual GLB 60 MB 1.2 GB OBJ 184 MB 1.4 GB

319. caravel_breakout_QFN

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.1	0.3 ms	2.5	91 ms	0.4	0.3	6.0
Simulation, STEP	0.2	0.5	2.1	0.3 ms	2.4	1.9	0.4	0.2	7.7
Simulation, STL	0.2	0.4	2.1	0.3 ms	2.4	0.2	0.3	0.2	5.9
Simulation, OBJ	0.2	0.5	2.2	0.4 ms	2.5	2.9	0.3	0.2	8.8
Visual, GLB	0.2	0.5	2.1	0.4 ms	5.1	74 ms	0.6	0.2	8.8
Visual, OBJ	0.2	0.5	2.1	0.3 ms	5.2	2.3	0.8	0.2	11.2

Board Repo: antmicro/caravel_board Board: caravel_breakout_QFN.kicad_pcb Folder hardware / caravel_breakout_QFN Complexity 275 / 1000 (size 200, features 75) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 14, 775, 99 Triangles, simulation 693,354 in 70 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 24 MB 360 MB STEP 123 MB 433 MB STL 35 MB 361 MB OBJ 71 MB 514 MB Visual GLB 18 MB 437 MB OBJ 54 MB 497 MB

320. Caravel_breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	2.4	0.3 ms	2.1	86 ms	0.3	0.2	5.6
Simulation, STEP	0.1	0.4	2.4	0.3 ms	2.0	1.7	0.3	0.2	7.1
Simulation, STL	0.2	0.5	2.4	0.3 ms	2.1	0.2	0.3	0.2	5.8
Simulation, OBJ	0.1	0.4	2.5	0.3 ms	2.1	2.8	0.3	0.2	8.4
Visual, GLB	0.1	0.4	2.4	0.3 ms	4.6	57 ms	0.5	0.2	8.3
Visual, OBJ	0.2	0.4	2.5	0.5 ms	4.6	1.7	0.6	0.2	10.1

Board Repo: antmicro/caravel_board Board: Caravel_breakout.kicad_pcb Folder hardware / caravel_breakout_v1 Complexity 244 / 1000 (size 199, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 12, 449, 28 Triangles, simulation 689,454 in 66 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 24 MB 334 MB STEP 107 MB 398 MB STL 34 MB 355 MB OBJ 70 MB 489 MB Visual GLB 15 MB 403 MB OBJ 46 MB 445 MB

321. Caravel_breakout_v2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.5	0.4 ms	2.6	91 ms	0.4	0.3	6.6
Simulation, STEP	0.3	0.5	2.5	0.4 ms	2.5	2.1	0.4	0.2	8.4
Simulation, STL	0.2	0.4	2.5	0.5 ms	2.5	0.1	0.5	0.3	6.5
Simulation, OBJ	0.2	0.4	2.5	0.4 ms	3.0	3.3	0.4	0.2	10.1
Visual, GLB	0.3	0.5	2.6	0.3 ms	4.9	90 ms	0.4	0.3	9.1
Visual, OBJ	0.3	0.4	2.5	0.4 ms	4.6	2.4	0.4	0.2	10.9

Board Repo: antmicro/caravel_board Board: Caravel_breakout_v2.kicad_pcb Folder hardware / caravel_breakout_v2 Complexity 275 / 1000 (size 200, features 75) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 12, 469, 28 Triangles, simulation 522,928 in 69 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 18 MB 300 MB STEP 97 MB 365 MB STL 26 MB 302 MB OBJ 54 MB 383 MB Visual GLB 13 MB 364 MB OBJ 38 MB 369 MB

322. Caravel_daughter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.9	1.9	0.5 ms	1.7	74 ms	0.2	0.2	5.1
Simulation, STEP	0.2	0.9	1.7	0.5 ms	1.6	1.6	0.2	0.2	6.4
Simulation, STL	0.2	0.9	1.7	0.3 ms	1.6	0.1	0.2	0.3	5.0
Simulation, OBJ	0.2	0.8	1.7	0.6 ms	1.5	2.0	0.2	0.3	6.7
Visual, GLB	0.2	0.8	1.8	0.3 ms	3.4	41 ms	0.3	0.2	6.7
Visual, OBJ	0.2	0.9	1.8	0.4 ms	3.6	1.1	0.3	0.3	8.1

Board Repo: antmicro/caravel_board Board: Caravel_daughter.kicad_pcb Folder hardware / caravel_daughter Complexity 138 / 1000 (size 108, features 30) KESE features rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 36, 0, 0 Triangles, simulation 390,448 in 66 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 269 MB STEP 76 MB 318 MB STL 20 MB 265 MB OBJ 41 MB 322 MB Visual GLB 7.5 MB 267 MB OBJ 22 MB 266 MB

323. caravel_FTDI_QFN_test_socket

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.2	6.3	1 ms	5.7	0.2	0.6	0.3	14.7
Simulation, STEP	0.3	1.1	6.4	1 ms	5.5	4.5	0.6	0.2	18.7
Simulation, STL	0.3	1.3	6.7	1 ms	6.4	0.5	0.7	0.2	16.1
Simulation, OBJ	0.4	1.3	6.5	0.9 ms	5.3	6.6	0.6	0.2	20.9
Visual, GLB	0.3	1.2	6.7	0.8 ms	12.4	0.2	1.7	0.2	22.8
Visual, OBJ	0.3	1.1	6.3	0.9 ms	12.7	5.0	1.4	0.2	27.1

Board Repo: antmicro/caravel_board Board: caravel_FTDI_QFN_test_socket.kicad_pcb Folder hardware / caravel_FTDI_QFN_test_socket Complexity 315 / 1000 (size 230, features 85) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 72, 1,076, 164 Triangles, simulation 1,635,312 in 99 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 56 MB 606 MB STEP 277 MB 809 MB STL 82 MB 588 MB OBJ 169 MB 1.1 GB Visual GLB 41 MB 784 MB OBJ 126 MB 936 MB

324. caravel_Nucleo

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.9	9.9	1 ms	8.7	0.4	1.1	0.3	22.7
Simulation, STEP	0.5	1.7	9.8	2 ms	8.9	6.4	1.2	0.3	28.7
Simulation, STL	0.5	1.8	9.9	1 ms	8.4	0.8	1.1	0.3	22.8
Simulation, OBJ	0.5	1.9	9.5	0.9 ms	8.4	10.5	1.1	0.3	32.3
Visual, GLB	0.5	1.9	9.8	1 ms	20.4	0.3	2.8	0.3	35.9
Visual, OBJ	0.5	2.2	10.1	1 ms	20.5	7.6	2.8	0.2	43.9

Board Repo: antmicro/caravel_board Board: caravel_Nucleo.kicad_pcb Folder hardware / caravel_Nucleo Complexity 333 / 1000 (size 228, features 105) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, drill offsets, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 89, 1,284, 162 Triangles, simulation 2,223,932 in 208 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 75 MB 745 MB STEP 364 MB 998 MB STL 111 MB 756 MB OBJ 232 MB 1.5 GB Visual GLB 55 MB 1.1 GB OBJ 169 MB 1.2 GB

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