Corpus Testing 16

Corpus Page 16

Part 16 of 30 of Corpus Testing: boards 1,621 to 1,728, six runs each, one file format a run, as Corpus Testing describes.

1621. AVIONICS_BOARD

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	3.4	12.4	2 ms	13.4	0.5	1.6	0.3	32.5
Simulation, STEP	0.7	3.3	12.9	2 ms	12.7	8.6	1.6	0.3	40.0
Simulation, STL	0.8	3.0	12.4	2 ms	13.4	1.2	1.7	0.3	32.8
Simulation, OBJ	0.8	3.4	12.4	2 ms	13.1	15.9	1.7	0.3	47.6
Visual, GLB	0.9	3.3	12.0	2 ms	26.4	0.3	3.3	0.3	46.6
Visual, OBJ	0.9	3.1	12.8	2 ms	26.9	10.1	3.3	0.3	57.4

Board Repo: matthiasgeorgimhof/hardware_csat Board: AVIONICS_BOARD.kicad_pcb Folder avionics_board Complexity 367 / 1000 (size 262, features 105) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, drill offsets, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 182, 2,001, 367 Triangles, simulation 3,369,990 in 275 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 113 MB 1.1 GB STEP 435 MB 1.4 GB STL 169 MB 1.1 GB OBJ 355 MB 2.2 GB Visual GLB 69 MB 1.3 GB OBJ 217 MB 1.4 GB

1622. comm_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	2.6	9.9	1 ms	11.1	0.5	1.1	0.3	26.3
Simulation, STEP	0.8	2.4	9.6	0.9 ms	11.8	7.2	1.2	0.3	33.3
Simulation, STL	0.9	2.4	9.7	1 ms	11.5	0.8	1.5	0.4	27.2
Simulation, OBJ	1.0	2.6	10.1	1 ms	11.8	14.0	1.2	0.4	41.0
Visual, GLB	0.8	2.7	9.9	1 ms	21.0	0.2	2.1	0.3	37.1
Visual, OBJ	0.8	2.4	9.6	1 ms	20.1	8.8	2.2	0.3	44.1

Board Repo: matthiasgeorgimhof/hardware_csat Board: comm_board.kicad_pcb Folder comm_board Complexity 365 / 1000 (size 260, features 105) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, drill offsets, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 178, 1,254, 204 Triangles, simulation 2,325,158 in 222 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 78 MB 811 MB STEP 326 MB 973 MB STL 116 MB 822 MB OBJ 243 MB 1.5 GB Visual GLB 51 MB 1.1 GB OBJ 158 MB 1.1 GB

1623. EPS

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	4.0	20.0	1 ms	18.4	0.7	2.6	0.3	47.1
Simulation, STEP	1.1	3.9	19.9	1 ms	18.7	12.2	2.6	0.4	58.7
Simulation, STL	1.0	3.8	19.9	0.9 ms	18.6	1.7	2.6	0.3	47.9
Simulation, OBJ	1.1	3.9	20.2	1.0 ms	18.7	26.9	2.7	0.3	73.7
Visual, GLB	1.0	3.9	20.5	2 ms	36.2	0.5	4.2	0.3	66.6
Visual, OBJ	1.2	4.0	20.2	1.0 ms	35.8	14.3	3.9	0.4	79.7

Board Repo: matthiasgeorgimhof/hardware_csat Board: EPS.kicad_pcb Folder eps_board Complexity 372 / 1000 (size 267, features 105) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, drill offsets, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 242, 2,354, 416 Triangles, simulation 4,561,054 in 261 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 153 MB 1.4 GB STEP 630 MB 1.6 GB STL 228 MB 1.3 GB OBJ 484 MB 2.9 GB Visual GLB 82 MB 1.5 GB OBJ 259 MB 1.7 GB

1624. sci_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	4.2	14.0	2 ms	15.5	0.5	1.7	0.3	37.3
Simulation, STEP	1.0	4.2	13.8	0.7 ms	15.2	9.3	1.8	0.3	45.6
Simulation, STL	1.1	4.2	13.8	0.9 ms	15.2	1.1	1.6	0.3	37.2
Simulation, OBJ	1.1	4.1	14.4	1 ms	14.9	22.8	2.8	0.3	60.4
Visual, GLB	1.4	5.8	18.9	2 ms	36.3	0.4	3.5	0.4	66.8
Visual, OBJ	1.1	4.6	14.9	0.8 ms	37.7	13.5	5.3	0.3	77.4

Board Repo: matthiasgeorgimhof/hardware_csat Board: sci_board.kicad_pcb Folder sci_board.inactive Complexity 397 / 1000 (size 267, features 130) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, drill offsets, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 210, 2,498, 466 Triangles, simulation 3,299,186 in 282 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 111 MB 1.1 GB STEP 450 MB 1.4 GB STL 165 MB 1.1 GB OBJ 348 MB 2.2 GB Visual GLB 75 MB 1.5 GB OBJ 237 MB 1.6 GB

1625. sci_board_wo_switches

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	2.7	10.0	0.6 ms	11.0	0.4	1.3	0.2	26.5
Simulation, STEP	0.8	2.9	10.3	1 ms	10.5	6.7	1.3	0.2	32.7
Simulation, STL	0.8	2.8	10.4	0.6 ms	10.8	0.9	1.4	0.2	27.3
Simulation, OBJ	0.8	2.8	10.1	0.7 ms	10.6	14.4	1.3	0.3	40.1
Visual, GLB	0.7	3.0	10.5	0.7 ms	21.2	0.3	2.4	0.3	38.3
Visual, OBJ	0.8	3.0	10.2	1 ms	22.0	9.6	2.7	0.2	48.5

Board Repo: matthiasgeorgimhof/hardware_csat Board: sci_board_wo_switches.kicad_pcb Folder sci_board_wo_switches Complexity 391 / 1000 (size 261, features 130) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, drill offsets, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 181, 1,838, 364 Triangles, simulation 2,773,664 in 240 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 93 MB 918 MB STEP 370 MB 1.1 GB STL 139 MB 927 MB OBJ 291 MB 1.8 GB Visual GLB 62 MB 1.1 GB OBJ 194 MB 1.3 GB

1626. bodge

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	0.8	0.3 ms	1.1	50 ms	0.2	0.2	2.8
Simulation, STEP	0.1	0.3	0.7	0.2 ms	1.1	1.2	0.2	0.2	3.8
Simulation, STL	0.1	0.3	0.7	0.2 ms	1.1	85 ms	0.2	0.2	2.8
Simulation, OBJ	0.1	0.3	0.7	0.2 ms	1.1	1.6	0.2	0.2	4.2
Visual, GLB	0.2	0.3	0.7	0.2 ms	2.6	34 ms	0.2	0.3	4.4
Visual, OBJ	0.1	0.3	0.7	0.2 ms	2.5	1.1	0.3	0.2	5.3

Board Repo: matthiasgeorgimhof/hardware_csat Board: bodge.kicad_pcb Folder sci_extra / bodge Complexity 234 / 1000 (size 159, features 75) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 9, 315, 48 Triangles, simulation 273,140 in 48 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.6 MB 239 MB STEP 38 MB 247 MB STL 14 MB 236 MB OBJ 27 MB 235 MB Visual GLB 6.4 MB 246 MB OBJ 19 MB 242 MB

1627. bodge_oshkosh

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	0.7	0.2 ms	1.1	53 ms	0.2	0.2	2.6
Simulation, STEP	0.1	0.3	0.6	0.2 ms	1.0	1.2	0.2	0.2	3.6
Simulation, STL	0.1	0.3	0.7	0.2 ms	1.0	75 ms	0.2	0.2	2.6
Simulation, OBJ	0.1	0.3	0.7	0.2 ms	1.0	1.5	0.2	0.2	4.0
Visual, GLB	0.1	0.3	0.6	0.2 ms	2.4	30 ms	0.2	0.2	3.9
Visual, OBJ	0.1	0.3	0.7	0.2 ms	2.4	1.0	0.2	0.2	4.9

Board Repo: matthiasgeorgimhof/hardware_csat Board: bodge_oshkosh.kicad_pcb Folder sci_extra / bodge_oshkosh Complexity 234 / 1000 (size 159, features 75) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 9, 316, 48 Triangles, simulation 273,466 in 48 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.6 MB 241 MB STEP 38 MB 247 MB STL 14 MB 247 MB OBJ 27 MB 239 MB Visual GLB 6.4 MB 221 MB OBJ 19 MB 243 MB

1628. antenna_switch

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	2.0	7.3	0.2 ms	7.5	0.3	0.6	0.2	18.2
Simulation, STEP	0.2	2.1	7.5	0.2 ms	7.6	3.0	0.6	0.2	21.1
Simulation, STL	0.2	2.0	7.3	0.2 ms	7.4	0.7	0.6	0.2	18.4
Simulation, OBJ	0.2	2.1	7.3	0.1 ms	7.4	9.1	0.6	0.2	27.0
Visual, GLB	0.2	2.0	7.4	0.4 ms	15.2	0.1	1.1	0.2	26.4
Visual, OBJ	0.2	1.9	7.1	0.3 ms	15.8	4.6	1.2	0.2	31.2

Board Repo: matthuszagh/fmcw Board: antenna_switch.kicad_pcb Folder hardware / antenna-switch Complexity 238 / 1000 (size 193, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20190905) Parts, tracks, vias 32, 143, 525 Triangles, simulation 1,784,972 in 40 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 59 MB 786 MB STEP 138 MB 845 MB STL 89 MB 750 MB OBJ 185 MB 1.2 GB Visual GLB 29 MB 719 MB OBJ 91 MB 777 MB

1629. fmcw

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.3	8.1	42.8	1 ms	30.0	1.1	3.2	0.3	86.9
Simulation, STEP	1.3	7.1	42.3	1 ms	30.3	17.1	3.5	0.3	101.9
Simulation, STL	1.3	7.6	43.2	1 ms	30.1	2.3	3.3	0.4	88.2
Simulation, OBJ	1.3	7.5	43.3	1 ms	29.1	33.9	3.4	0.3	118.9
Visual, GLB	1.3	7.3	41.5	2 ms	61.8	0.7	7.2	0.3	120.2
Visual, OBJ	1.4	7.2	41.7	1 ms	62.7	21.5	7.4	0.3	142.3

Board Repo: matthuszagh/fmcw Board: fmcw.kicad_pcb Folder hardware / boards / rev1 Complexity 387 / 1000 (size 307, features 80) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 406, 3,575, 947 Triangles, simulation 6,589,000 in 448 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 229 MB 1.9 GB STEP 1.0 GB 2.5 GB STL 329 MB 1.9 GB OBJ 729 MB 4.3 GB Visual GLB 143 MB 2.3 GB OBJ 461 MB 3.0 GB

1630. fmcw

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	8.9	34.7	1.0 ms	56.5	1.1	3.6	0.4	106.8
Simulation, STEP	1.6	9.7	36.3	1 ms	58.7	18.6	3.7	0.4	129.1
Simulation, STL	1.7	9.2	34.7	1.0 ms	58.1	2.6	3.7	0.4	110.4
Simulation, OBJ	1.4	9.3	35.5	1 ms	58.4	43.8	3.6	0.4	152.3
Visual, GLB	1.5	9.0	34.5	1 ms	72.3	0.7	6.9	0.3	125.3
Visual, OBJ	1.6	9.4	35.9	1 ms	80.2	28.7	7.7	0.4	163.9

Board Repo: matthuszagh/fmcw Board: fmcw.kicad_pcb Folder hardware / boards / rev2a Complexity 400 / 1000 (size 310, features 90) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 436, 3,927, 835 Triangles, simulation 6,594,472 in 280 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 228 MB 1.7 GB STEP 1.0 GB 2.4 GB STL 330 MB 1.7 GB OBJ 726 MB 4.3 GB Visual GLB 138 MB 2.3 GB OBJ 447 MB 2.8 GB

1631. fmcw

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	11.3	36.8	2 ms	33.9	1.6	4.4	0.4	89.9
Simulation, STEP	1.4	11.8	36.6	1 ms	33.5	18.4	4.5	0.4	106.7
Simulation, STL	1.3	11.3	36.4	2 ms	33.6	3.6	4.7	0.4	91.4
Simulation, OBJ	1.3	10.9	36.2	1 ms	33.4	44.1	4.5	0.4	130.9
Visual, GLB	1.3	10.8	35.2	1 ms	87.6	0.8	9.3	0.4	145.4
Visual, OBJ	1.6	11.1	35.5	1 ms	84.8	26.5	9.4	0.3	169.4

Board Repo: matthuszagh/fmcw Board: fmcw.kicad_pcb Folder hardware / boards / rev2b Complexity 406 / 1000 (size 316, features 90) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 436, 4,693, 1,437 Triangles, simulation 7,841,176 in 279 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 269 MB 2.8 GB STEP 1.1 GB 2.9 GB STL 392 MB 2.6 GB OBJ 860 MB 5.0 GB Visual GLB 170 MB 2.7 GB OBJ 554 MB 3.5 GB

1632. fmcw_nightly

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.2	13.7	20.6	1 ms	16.3	0.7	1.6	0.3	54.5
Simulation, STEP	1.3	14.0	21.1	1 ms	16.0	10.0	1.5	0.3	64.1
Simulation, STL	1.2	13.6	20.8	1 ms	16.2	1.3	1.6	0.3	55.0
Simulation, OBJ	1.2	13.5	20.7	1 ms	16.5	23.2	1.5	0.3	76.8
Visual, GLB	1.1	14.2	21.3	2 ms	32.2	0.4	3.5	0.3	73.0
Visual, OBJ	1.4	13.8	20.9	1 ms	32.4	13.1	3.2	0.3	85.1

Board Repo: matthuszagh/fmcw Board: fmcw_nightly.kicad_pcb Folder hardware / boards / rev2b Complexity 435 / 1000 (size 295, features 140) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20200119) Parts, tracks, vias 437, 1,170, 439 Triangles, simulation 3,680,954 in 245 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 126 MB 1.3 GB STEP 586 MB 1.5 GB STL 184 MB 1.2 GB OBJ 395 MB 2.4 GB Visual GLB 74 MB 1.3 GB OBJ 235 MB 1.6 GB

1633. caps

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	2.0	4.9	0.5 ms	6.9	0.3	0.6	0.3	15.1
Simulation, STEP	0.2	1.9	5.0	0.6 ms	7.5	2.7	0.5	0.3	18.1
Simulation, STL	0.2	1.8	4.8	0.4 ms	6.6	0.4	0.5	0.3	14.7
Simulation, OBJ	0.2	1.8	5.0	0.2 ms	6.8	8.6	0.6	0.2	23.2
Visual, GLB	0.2	1.8	5.2	0.2 ms	6.9	99 ms	0.7	0.2	15.1
Visual, OBJ	0.2	1.8	5.0	0.3 ms	6.2	3.5	0.8	0.2	17.9

Board Repo: matthuszagh/fmcw Board: caps.kicad_pcb Folder hardware / prototypes / caps Complexity 225 / 1000 (size 180, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 11, 10, 492 Triangles, simulation 1,512,272 in 19 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 48 MB 646 MB STEP 113 MB 753 MB STL 76 MB 682 MB OBJ 154 MB 992 MB Visual GLB 21 MB 615 MB OBJ 65 MB 663 MB

1634. caps_nightly

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	2.0	5.7	0.5 ms	7.9	0.2	0.6	0.2	16.8
Simulation, STEP	0.2	1.9	6.2	0.3 ms	7.8	2.7	0.6	0.2	19.6
Simulation, STL	0.2	1.9	5.8	0.3 ms	7.7	0.5	0.6	0.2	16.8
Simulation, OBJ	0.2	1.9	5.9	0.5 ms	7.9	8.3	0.6	0.3	25.0
Visual, GLB	0.2	2.0	5.9	0.4 ms	8.0	0.1	1.0	0.2	17.4
Visual, OBJ	0.2	2.0	5.9	0.3 ms	7.6	3.7	1.0	0.3	20.7

Board Repo: matthuszagh/fmcw Board: caps_nightly.kicad_pcb Folder hardware / prototypes / caps Complexity 264 / 1000 (size 184, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20200119) Parts, tracks, vias 11, 11, 636 Triangles, simulation 1,737,368 in 19 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 55 MB 783 MB STEP 118 MB 861 MB STL 87 MB 770 MB OBJ 176 MB 1.1 GB Visual GLB 25 MB 706 MB OBJ 77 MB 738 MB

1635. coupler

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.7	1.8	0.1 ms	2.7	0.1	0.3	0.2	5.9
Simulation, STEP	0.1	0.8	1.8	0.1 ms	2.7	1.3	0.3	0.2	7.3
Simulation, STL	0.1	0.8	1.7	0.1 ms	2.8	0.1	0.3	0.2	6.1
Simulation, OBJ	0.1	0.7	1.8	0.1 ms	2.8	3.3	0.3	0.2	9.2
Visual, GLB	0.1	0.7	1.8	0.2 ms	2.6	42 ms	0.3	0.2	5.7
Visual, OBJ	0.1	0.7	1.9	0.3 ms	2.8	1.6	0.3	0.2	7.6

Board Repo: matthuszagh/fmcw Board: coupler.kicad_pcb Folder hardware / prototypes / coupler Complexity 199 / 1000 (size 164, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 5, 72, 278 Triangles, simulation 647,556 in 18 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 21 MB 396 MB STEP 38 MB 446 MB STL 32 MB 404 MB OBJ 65 MB 435 MB Visual GLB 10 MB 377 MB OBJ 31 MB 373 MB

1636. coupler_nightly

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.6	1.7	0.2 ms	2.5	81 ms	0.3	0.2	5.5
Simulation, STEP	0.1	0.7	1.7	0.1 ms	2.6	1.1	0.2	0.2	6.7
Simulation, STL	0.1	0.7	1.7	0.1 ms	2.5	0.1	0.3	0.2	5.7
Simulation, OBJ	0.1	0.7	1.6	0.1 ms	2.5	2.5	0.2	0.2	7.8
Visual, GLB	0.1	0.6	1.6	0.1 ms	2.8	42 ms	0.3	0.2	5.8
Visual, OBJ	0.1	0.7	1.7	0.2 ms	2.6	1.2	0.3	0.2	6.8

Board Repo: matthuszagh/fmcw Board: coupler_nightly.kicad_pcb Folder hardware / prototypes / coupler Complexity 237 / 1000 (size 167, features 70) KESE features through vias, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20200119) Parts, tracks, vias 5, 137, 305 Triangles, simulation 659,588 in 18 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 21 MB 412 MB STEP 30 MB 458 MB STL 33 MB 407 MB OBJ 65 MB 434 MB Visual GLB 11 MB 357 MB OBJ 32 MB 382 MB

1637. microstrip_width

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	1.2	2.8	0.3 ms	4.4	0.2	0.4	0.2	9.3
Simulation, STEP	0.1	1.2	2.9	0.1 ms	4.6	1.7	0.4	0.2	11.0
Simulation, STL	0.1	1.2	2.8	0.1 ms	4.6	0.2	0.4	0.3	9.5
Simulation, OBJ	0.1	1.2	2.8	0.1 ms	4.6	4.4	0.4	0.3	13.8
Visual, GLB	0.1	1.1	2.8	0.1 ms	4.4	63 ms	0.5	0.2	9.2
Visual, OBJ	0.1	1.1	2.6	0.2 ms	4.1	2.0	0.6	0.2	10.8

Board Repo: matthuszagh/fmcw Board: microstrip_width.kicad_pcb Folder hardware / prototypes / microstrip_width Complexity 207 / 1000 (size 172, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 6, 3, 421 Triangles, simulation 947,684 in 16 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 30 MB 519 MB STEP 49 MB 571 MB STL 47 MB 510 MB OBJ 95 MB 675 MB Visual GLB 15 MB 428 MB OBJ 45 MB 424 MB

1638. microstrip_width_nightly

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	93 ms	0.7	2.0	0.4 ms	3.3	94 ms	0.3	0.2	6.6
Simulation, STEP	0.1	0.7	2.0	0.3 ms	3.0	1.3	0.3	0.2	7.7
Simulation, STL	96 ms	0.7	2.1	0.3 ms	3.1	0.2	0.2	0.2	6.6
Simulation, OBJ	95 ms	0.7	2.0	0.2 ms	2.8	2.8	0.3	0.2	8.8
Visual, GLB	98 ms	0.7	2.1	0.3 ms	2.9	40 ms	0.4	0.2	6.3
Visual, OBJ	92 ms	0.7	2.0	0.3 ms	2.9	1.5	0.4	0.2	7.8

Board Repo: matthuszagh/fmcw Board: microstrip_width_nightly.kicad_pcb Folder hardware / prototypes / microstrip_width Complexity 238 / 1000 (size 168, features 70) KESE features through vias, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20200119) Parts, tracks, vias 6, 3, 335 Triangles, simulation 749,524 in 16 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 23 MB 446 MB STEP 30 MB 478 MB STL 37 MB 448 MB OBJ 74 MB 482 MB Visual GLB 12 MB 372 MB OBJ 35 MB 401 MB

1639. basic-ecp5-pcb

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	2.5	12.8	2 ms	8.7	0.4	1.0	0.3	26.2
Simulation, STEP	0.4	2.6	12.9	1 ms	8.8	5.9	1.1	0.2	32.0
Simulation, STL	0.4	2.7	12.9	2 ms	8.8	0.8	1.1	0.3	27.0
Simulation, OBJ	0.4	2.7	13.5	2 ms	9.1	12.7	1.1	0.3	39.7
Visual, GLB	0.4	2.6	13.5	1 ms	16.7	0.2	1.6	0.2	35.2
Visual, OBJ	0.4	2.7	13.4	1 ms	17.0	6.3	1.8	0.3	42.0

Board Repo: mattvenn/basic-ecp5-pcb Board: basic-ecp5-pcb.kicad_pcb Folder hardware Complexity 305 / 1000 (size 250, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 62, 1,148, 130 Triangles, simulation 2,343,666 in 255 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 81 MB 707 MB STEP 348 MB 928 MB STL 117 MB 708 MB OBJ 248 MB 1.6 GB Visual GLB 42 MB 927 MB OBJ 126 MB 925 MB

1640. ai-camera

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.1	6.4	0.7 ms	6.4	0.3	0.9	0.3	17.0
Simulation, STEP	0.6	2.1	5.8	0.8 ms	6.5	4.6	0.9	0.3	20.8
Simulation, STL	0.6	2.1	6.1	0.7 ms	6.4	0.6	0.8	0.2	16.9
Simulation, OBJ	0.5	2.0	6.1	1 ms	6.7	10.2	0.9	0.2	26.7
Visual, GLB	0.6	2.1	6.2	0.9 ms	17.5	0.2	1.9	0.3	28.9
Visual, OBJ	0.5	2.2	6.3	0.9 ms	17.4	7.6	2.1	0.2	36.2

Board Repo: maxlab-io/tokay-lite-pcb Board: ai-camera.kicad_pcb Folder ai-camera-rev0 Complexity 339 / 1000 (size 214, features 125) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 130, 1,351, 340 Triangles, simulation 2,141,088 in 108 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 72 MB 876 MB STEP 293 MB 965 MB STL 107 MB 812 MB OBJ 223 MB 1.4 GB Visual GLB 51 MB 1.1 GB OBJ 158 MB 1.2 GB

1641. ai-camera

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	2.3	7.5	0.6 ms	7.6	0.4	1.0	0.2	19.6
Simulation, STEP	0.6	2.3	7.4	0.6 ms	7.7	6.1	1.1	0.3	25.4
Simulation, STL	0.7	2.4	7.5	0.4 ms	7.6	0.6	1.0	0.3	20.0
Simulation, OBJ	0.7	2.2	7.4	0.7 ms	7.4	12.9	1.0	0.3	31.9
Visual, GLB	0.6	2.2	7.2	0.6 ms	19.1	0.3	2.0	0.2	31.7
Visual, OBJ	0.7	2.2	7.2	0.4 ms	19.2	9.6	2.2	0.3	41.3

Board Repo: maxlab-io/tokay-lite-pcb Board: ai-camera.kicad_pcb Folder ai-camera-rev1 Complexity 339 / 1000 (size 214, features 125) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 151, 1,227, 305 Triangles, simulation 2,114,240 in 113 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 71 MB 818 MB STEP 308 MB 943 MB STL 106 MB 851 MB OBJ 221 MB 1.4 GB Visual GLB 52 MB 958 MB OBJ 160 MB 1.1 GB

1642. ai-camera-rev2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.0	6.6	1 ms	7.0	0.3	1.0	0.2	17.8
Simulation, STEP	0.6	2.2	6.2	0.3 ms	7.0	5.2	0.9	0.2	22.3
Simulation, STL	0.6	2.0	6.5	1.0 ms	6.8	0.5	0.9	0.2	17.4
Simulation, OBJ	0.6	1.9	6.5	0.5 ms	6.8	11.4	1.0	0.2	28.4
Visual, GLB	0.6	2.0	6.3	0.6 ms	17.2	0.2	2.2	0.2	28.6
Visual, OBJ	0.6	2.0	6.5	0.3 ms	17.0	8.2	2.4	0.2	36.9

Board Repo: maxlab-io/tokay-lite-pcb Board: ai-camera-rev2.kicad_pcb Folder ai-camera-rev2 Complexity 314 / 1000 (size 214, features 100) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 153, 1,208, 330 Triangles, simulation 2,131,926 in 113 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 72 MB 874 MB STEP 309 MB 989 MB STL 107 MB 793 MB OBJ 222 MB 1.4 GB Visual GLB 52 MB 1.0 GB OBJ 159 MB 1.1 GB

1643. ai-camera-rev3.1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.2	7.5	0.6 ms	7.4	0.3	1.1	0.3	19.4
Simulation, STEP	0.6	2.2	7.2	0.4 ms	7.4	5.3	0.9	0.3	23.9
Simulation, STL	0.6	2.2	7.0	0.7 ms	7.5	0.7	1.0	0.3	19.3
Simulation, OBJ	0.7	2.1	7.5	0.4 ms	7.5	12.2	1.0	0.3	31.3
Visual, GLB	0.6	2.3	7.6	0.7 ms	18.6	0.3	2.2	0.2	31.7
Visual, OBJ	0.6	2.4	7.8	0.4 ms	18.9	9.4	2.5	0.2	41.7

Board Repo: maxlab-io/tokay-lite-pcb Board: ai-camera-rev3.1.kicad_pcb Folder ai-camera-rev3.1 Complexity 314 / 1000 (size 214, features 100) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 153, 1,223, 330 Triangles, simulation 2,082,322 in 113 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 70 MB 809 MB STEP 291 MB 929 MB STL 104 MB 822 MB OBJ 217 MB 1.4 GB Visual GLB 51 MB 933 MB OBJ 156 MB 1.1 GB

1644. ai-camera-rev3.2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.1	6.5	0.4 ms	6.8	0.3	0.9	0.2	17.5
Simulation, STEP	0.6	2.0	6.3	0.3 ms	6.8	4.8	0.9	0.2	21.6
Simulation, STL	0.6	2.0	6.3	0.3 ms	6.9	0.5	0.9	0.3	17.5
Simulation, OBJ	0.6	2.1	6.6	0.7 ms	6.9	10.6	0.9	0.3	28.2
Visual, GLB	0.6	2.1	6.3	0.6 ms	16.2	0.2	1.5	0.2	27.2
Visual, OBJ	0.6	2.0	6.4	0.5 ms	16.1	7.8	1.5	0.2	34.6

Board Repo: maxlab-io/tokay-lite-pcb Board: ai-camera-rev3.2.kicad_pcb Folder ai-camera-rev3.2 Complexity 315 / 1000 (size 215, features 100) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 153, 1,274, 330 Triangles, simulation 2,092,308 in 113 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 70 MB 827 MB STEP 294 MB 949 MB STL 105 MB 874 MB OBJ 218 MB 1.4 GB Visual GLB 51 MB 919 MB OBJ 157 MB 1.1 GB

1645. ai-camera-rev3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.0	6.1	0.7 ms	7.0	0.3	0.9	0.3	17.2
Simulation, STEP	0.6	2.0	6.2	2 ms	6.8	4.9	0.9	0.2	21.6
Simulation, STL	0.6	2.1	6.2	0.6 ms	6.7	0.5	0.9	0.3	17.3
Simulation, OBJ	0.5	2.1	6.8	0.7 ms	6.7	11.8	0.8	0.2	29.1
Visual, GLB	0.6	2.0	6.5	0.7 ms	16.5	0.2	1.5	0.2	27.5
Visual, OBJ	0.6	2.1	6.3	0.3 ms	15.9	7.9	1.6	0.2	34.5

Board Repo: maxlab-io/tokay-lite-pcb Board: ai-camera-rev3.kicad_pcb Folder ai-camera-rev3 Complexity 314 / 1000 (size 214, features 100) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 153, 1,215, 330 Triangles, simulation 2,090,940 in 113 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 70 MB 807 MB STEP 293 MB 903 MB STL 105 MB 790 MB OBJ 218 MB 1.4 GB Visual GLB 51 MB 1.1 GB OBJ 156 MB 1.1 GB

1646. CM4_NAS

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.4	6.0	1 ms	6.3	0.3	0.9	0.3	15.8
Simulation, STEP	0.5	1.5	5.8	1.0 ms	6.5	4.5	0.9	0.2	20.0
Simulation, STL	0.5	1.5	5.8	0.9 ms	6.3	0.5	0.9	0.2	15.8
Simulation, OBJ	0.5	1.6	5.8	0.9 ms	6.3	8.0	0.9	0.2	23.3
Visual, GLB	0.5	1.5	6.0	0.9 ms	12.9	0.2	1.5	0.2	22.8
Visual, OBJ	0.5	1.6	5.9	1 ms	12.9	4.9	1.6	0.2	27.5

Board Repo: mebs/CM4-NAS Board: CM4_NAS.kicad_pcb Complexity 297 / 1000 (size 197, features 100) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20201002) Parts, tracks, vias 32, 1,776, 141 Triangles, simulation 1,943,028 in 179 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 66 MB 675 MB STEP 306 MB 880 MB STL 97 MB 675 MB OBJ 202 MB 1.3 GB Visual GLB 41 MB 866 MB OBJ 125 MB 934 MB

1647. ecp5-dev-board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	3.3	13.7	1 ms	12.2	0.5	1.3	0.3	32.1
Simulation, STEP	0.5	3.2	13.8	0.9 ms	11.8	7.9	1.3	0.2	38.7
Simulation, STL	0.5	3.0	13.3	1 ms	11.9	0.8	1.2	0.3	31.0
Simulation, OBJ	0.5	2.8	13.9	1 ms	12.1	14.8	1.3	0.3	45.7
Visual, GLB	0.5	3.0	13.5	1 ms	24.5	0.3	3.0	0.3	45.0
Visual, OBJ	0.5	3.0	14.3	1 ms	25.0	8.6	2.9	0.3	54.6

Board Repo: medhyal/ecp5-dev-board Board: ecp5-dev-board.kicad_pcb Folder v0.1 Complexity 331 / 1000 (size 276, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 107, 3,371, 336 Triangles, simulation 2,965,762 in 283 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 102 MB 1.0 GB STEP 457 MB 1.2 GB STL 148 MB 1.1 GB OBJ 314 MB 1.9 GB Visual GLB 60 MB 1.1 GB OBJ 188 MB 1.3 GB

1648. mega65-kbd

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.4	5.3	22.9	1 ms	20.1	0.9	2.6	0.4	53.6
Simulation, STEP	1.5	5.2	22.1	1 ms	18.7	14.5	2.5	0.4	64.9
Simulation, STL	1.4	5.2	22.5	1 ms	19.3	1.8	2.4	0.4	53.0
Simulation, OBJ	1.5	5.1	22.0	1 ms	19.8	28.0	2.5	0.3	79.3
Visual, GLB	1.4	5.4	22.1	1 ms	48.7	0.6	5.8	0.3	84.3
Visual, OBJ	1.4	5.1	21.1	1.0 ms	46.4	20.9	7.3	0.3	102.5

Board Repo: MEGA65/mega65-kbd-pcb Board: mega65-kbd.kicad_pcb Complexity 237 / 1000 (size 192, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 105, 1,364, 210 Triangles, simulation 4,669,240 in 287 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 157 MB 1.7 GB STEP 680 MB 1.9 GB STL 233 MB 1.7 GB OBJ 493 MB 3.0 GB Visual GLB 112 MB 2.0 GB OBJ 357 MB 2.3 GB

1649. expansion_connector_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.9	4.8	0.4 ms	3.8	0.2	0.6	0.3	10.8
Simulation, STEP	0.3	0.9	4.8	0.6 ms	3.6	2.8	0.6	0.2	13.2
Simulation, STL	0.3	0.9	4.6	0.3 ms	3.6	0.3	0.6	0.3	10.5
Simulation, OBJ	0.3	0.8	4.6	0.6 ms	4.0	5.8	0.6	0.2	16.4
Visual, GLB	0.3	0.9	4.7	0.5 ms	8.7	0.1	0.9	0.2	15.7
Visual, OBJ	0.3	0.9	4.7	0.4 ms	8.7	4.0	1.0	0.2	19.8

Board Repo: MEGA65/mega65-r3-expansion-board Board: expansion_connector_board.kicad_pcb Folder expansion_connector_board Complexity 284 / 1000 (size 159, features 125) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones, copper drawings, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 18, 683, 47 Triangles, simulation 1,114,064 in 92 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 38 MB 511 MB STEP 167 MB 568 MB STL 56 MB 494 MB OBJ 112 MB 768 MB Visual GLB 26 MB 622 MB OBJ 77 MB 605 MB

1650. external_drive_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.0	5.7	0.3 ms	4.2	0.2	0.6	0.2	12.2
Simulation, STEP	0.3	0.9	5.4	0.4 ms	4.2	3.2	0.6	0.2	14.7
Simulation, STL	0.2	0.9	5.5	0.3 ms	4.2	0.4	0.6	0.2	12.1
Simulation, OBJ	0.3	0.9	5.6	0.4 ms	4.4	5.9	0.6	0.2	17.8
Visual, GLB	0.2	1.0	5.8	0.3 ms	9.6	0.1	1.1	0.2	18.0
Visual, OBJ	0.2	1.0	5.7	0.4 ms	8.9	3.9	1.2	0.2	21.1

Board Repo: MEGA65/mega65-r3-expansion-board Board: external_drive_board.kicad_pcb Folder external_drive_board Complexity 208 / 1000 (size 163, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 30, 578, 60 Triangles, simulation 1,447,024 in 69 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 49 MB 612 MB STEP 221 MB 666 MB STL 72 MB 678 MB OBJ 148 MB 971 MB Visual GLB 33 MB 712 MB OBJ 98 MB 773 MB

1651. jtag_base_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	4.4	0.5 ms	2.8	0.1	0.5	0.3	9.0
Simulation, STEP	0.2	0.7	4.3	0.8 ms	2.9	2.6	0.5	0.2	11.3
Simulation, STL	0.2	0.6	4.3	0.6 ms	3.1	0.2	0.5	0.2	9.2
Simulation, OBJ	0.2	0.7	4.4	0.6 ms	3.1	5.0	0.5	0.2	14.1
Visual, GLB	0.2	0.6	4.5	0.7 ms	6.4	91 ms	0.6	0.3	12.7
Visual, OBJ	0.2	0.6	4.3	0.5 ms	6.5	3.1	0.6	0.2	15.5

Board Repo: MEGA65/mega65-r3-expansion-board Board: jtag_base_board.kicad_pcb Folder jtag_base_board Complexity 197 / 1000 (size 132, features 65) KESE features through vias, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 10, 229, 2 Triangles, simulation 936,044 in 72 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 32 MB 406 MB STEP 139 MB 505 MB STL 47 MB 416 MB OBJ 95 MB 668 MB Visual GLB 20 MB 530 MB OBJ 59 MB 567 MB

1652. mega65-r3-expansion-board.kicad

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	4.5	14.8	0.9 ms	15.1	0.7	2.0	0.3	38.3
Simulation, STEP	0.9	4.4	15.4	0.7 ms	14.7	9.8	2.2	0.3	47.6
Simulation, STL	0.9	4.5	15.3	0.8 ms	14.6	1.9	2.0	0.3	39.6
Simulation, OBJ	1.0	4.4	14.7	0.8 ms	14.7	24.5	2.2	0.4	61.9
Visual, GLB	0.8	4.7	14.9	0.9 ms	32.6	0.4	4.3	0.3	58.0
Visual, OBJ	0.9	4.7	15.7	1.0 ms	30.5	12.3	4.6	0.3	68.9

Board Repo: MEGA65/mega65-r3-expansion-board Board: mega65-r3-expansion-board.kicad.kicad_pcb Complexity 304 / 1000 (size 219, features 85) KESE features through vias, slotted holes, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 102, 2,880, 310 Triangles, simulation 5,028,540 in 186 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 169 MB 1.3 GB STEP 591 MB 1.7 GB STL 251 MB 1.3 GB OBJ 538 MB 3.2 GB Visual GLB 85 MB 1.6 GB OBJ 272 MB 1.9 GB

1653. pmod_connector_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.5	0.2 ms	1.0	53 ms	0.2	0.2	3.4
Simulation, STEP	0.1	0.3	1.5	0.2 ms	1.1	1.3	0.2	0.3	4.7
Simulation, STL	0.1	0.3	1.6	0.2 ms	1.0	77 ms	0.2	0.2	3.6
Simulation, OBJ	0.1	0.3	1.5	0.3 ms	1.0	1.8	0.2	0.2	5.2
Visual, GLB	0.1	0.3	1.5	0.3 ms	2.6	36 ms	0.3	0.2	5.1
Visual, OBJ	0.1	0.3	1.5	0.4 ms	2.5	1.3	0.3	0.2	6.2

Board Repo: MEGA65/mega65-r3-expansion-board Board: pmod_connector_board.kicad_pcb Folder pmod_connector_board Complexity 170 / 1000 (size 125, features 45) KESE features through vias, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 4, 212, 16 Triangles, simulation 310,928 in 29 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 227 MB STEP 47 MB 258 MB STL 16 MB 240 MB OBJ 32 MB 259 MB Visual GLB 7.5 MB 242 MB OBJ 23 MB 245 MB

1654. IIsi-to-ztex

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.7	15.5	0.8 ms	13.3	0.6	2.1	0.3	35.1
Simulation, STEP	0.6	2.6	15.2	1 ms	12.8	8.7	2.2	0.3	42.4
Simulation, STL	0.6	2.7	14.9	1 ms	13.3	1.0	2.2	0.3	34.9
Simulation, OBJ	0.7	2.6	14.7	1 ms	13.0	16.0	2.2	0.3	49.5
Visual, GLB	0.7	2.6	15.3	0.9 ms	27.4	0.3	3.0	0.3	49.6
Visual, OBJ	0.6	2.8	15.7	1 ms	26.7	9.2	3.3	0.3	58.6

Board Repo: MelkhiorVintageComputing/IIsiFPGA Board: IIsi-to-ztex.kicad_pcb Folder IIsi-to-ztex Complexity 256 / 1000 (size 211, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 63, 2,837, 112 Triangles, simulation 3,427,216 in 267 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 114 MB 1.0 GB STEP 444 MB 1.3 GB STL 171 MB 1.0 GB OBJ 359 MB 2.2 GB Visual GLB 65 MB 1.3 GB OBJ 204 MB 1.4 GB

1655. IIsiA7_Mini

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.3	4.7	21.1	1 ms	24.1	1.1	3.4	0.4	56.1
Simulation, STEP	1.4	4.9	20.7	1 ms	24.3	15.2	3.5	0.4	70.4
Simulation, STL	1.2	5.1	20.6	1 ms	23.3	2.5	3.7	0.4	57.0
Simulation, OBJ	1.3	4.7	20.5	1 ms	24.5	33.6	3.6	0.3	88.6
Visual, GLB	1.4	4.9	20.2	1 ms	51.7	0.6	6.5	0.3	85.6
Visual, OBJ	1.4	4.8	20.4	1 ms	51.3	18.6	6.3	0.3	103.1

Board Repo: MelkhiorVintageComputing/IIsiFPGA Board: IIsiA7_Mini.kicad_pcb Folder IIsiA7_Mini Complexity 410 / 1000 (size 310, features 100) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 6 File format KiCad 9 (20241229) Parts, tracks, vias 218, 5,573, 523 Triangles, simulation 6,574,296 in 382 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 219 MB 1.7 GB STEP 881 MB 2.3 GB STL 329 MB 1.7 GB OBJ 695 MB 4.2 GB Visual GLB 132 MB 2.1 GB OBJ 419 MB 2.7 GB

1656. nubus-to-ztex

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	4.8	25.8	0.8 ms	16.3	0.7	2.5	0.3	51.5
Simulation, STEP	1.2	4.8	25.5	0.9 ms	16.3	12.7	2.6	0.3	63.4
Simulation, STL	1.2	4.9	25.5	0.7 ms	15.9	1.7	2.4	0.3	52.0
Simulation, OBJ	1.1	4.6	24.9	0.7 ms	16.2	24.6	2.5	0.3	74.3
Visual, GLB	1.2	4.8	25.7	1 ms	33.8	0.3	3.9	0.3	70.1
Visual, OBJ	1.2	4.7	24.9	0.7 ms	35.8	13.9	4.2	0.3	85.0

Board Repo: MelkhiorVintageComputing/NuBusFPGA Board: nubus-to-ztex.kicad_pcb Folder nubus-to-ztex Complexity 290 / 1000 (size 225, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 101, 5,227, 164 Triangles, simulation 4,022,564 in 220 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 138 MB 1.3 GB STEP 640 MB 1.5 GB STL 201 MB 1.3 GB OBJ 430 MB 2.7 GB Visual GLB 80 MB 1.4 GB OBJ 251 MB 1.7 GB

1657. PicoBerry_V1.0

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.9	4.4	0.5 ms	3.0	0.2	0.4	0.2	9.3
Simulation, STEP	0.3	0.9	4.5	0.4 ms	3.0	2.6	0.4	0.2	11.9
Simulation, STL	0.2	0.8	4.2	0.4 ms	3.0	0.2	0.4	0.2	9.1
Simulation, OBJ	0.3	0.9	4.4	0.6 ms	3.1	4.3	0.4	0.2	13.6
Visual, GLB	0.3	0.9	4.5	0.4 ms	7.1	91 ms	0.8	0.2	13.9
Visual, OBJ	0.4	1.0	4.6	0.4 ms	6.8	3.0	0.8	0.2	16.8

Board Repo: mfolejewski/PicoBerry Board: PicoBerry_V1.0.kicad_pcb Folder source files / KiCad Complexity 285 / 1000 (size 160, features 125) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 21, 637, 52 Triangles, simulation 823,516 in 98 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 29 MB 398 MB STEP 164 MB 495 MB STL 41 MB 406 MB OBJ 84 MB 592 MB Visual GLB 20 MB 494 MB OBJ 60 MB 533 MB

1658. CM5IO

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	4.1	16.0	1 ms	15.1	0.6	2.0	0.3	38.9
Simulation, STEP	0.9	4.1	15.5	1 ms	14.5	8.9	2.1	0.3	46.3
Simulation, STL	0.8	4.1	15.4	0.6 ms	14.8	1.1	2.1	0.3	38.6
Simulation, OBJ	0.9	4.0	16.0	0.6 ms	14.8	20.8	2.1	0.3	58.8
Visual, GLB	0.9	4.5	16.4	0.7 ms	31.5	0.5	4.3	0.3	58.2
Visual, OBJ	0.8	4.1	15.7	1 ms	32.2	14.7	4.1	0.2	71.8

Board Repo: mibs510/openxtcm5-head-unit Board: CM5IO.kicad_pcb Folder pcb / lib / RPI-CM5-IO Complexity 347 / 1000 (size 222, features 125) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper text, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 64, 4,090, 703 Triangles, simulation 3,764,542 in 226 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 126 MB 1.2 GB STEP 497 MB 1.6 GB STL 188 MB 1.2 GB OBJ 397 MB 2.5 GB Visual GLB 86 MB 1.5 GB OBJ 274 MB 1.8 GB

1659. 2070-S-100-bus-analyzer

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.4	7.5	36.6	2 ms	28.9	1.5	4.9	0.4	82.1
Simulation, STEP	2.3	7.1	36.2	2 ms	28.2	20.1	4.5	0.4	98.7
Simulation, STL	2.2	7.0	36.1	2 ms	29.2	2.8	4.7	0.4	82.5
Simulation, OBJ	2.2	7.0	36.8	1 ms	28.4	43.9	4.7	0.3	123.3
Visual, GLB	2.3	7.3	36.9	1 ms	62.1	0.7	7.9	0.4	117.6
Visual, OBJ	2.2	7.6	37.0	1 ms	60.0	25.5	8.4	0.3	141.2

Board Repo: MichaelPetry/2070-S-100-bus-analyzer Board: 2070-S-100-bus-analyzer.kicad_pcb Complexity 366 / 1000 (size 216, features 150) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 90, 1,959, 520 Triangles, simulation 7,342,844 in 412 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 244 MB 2.1 GB STEP 1.0 GB 2.8 GB STL 367 MB 2.0 GB OBJ 780 MB 4.7 GB Visual GLB 151 MB 2.4 GB OBJ 479 MB 3.1 GB

1660. EDA-02327-V2-0_pcb

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.3	3.1	8.9	1 ms	11.2	0.5	1.5	0.3	26.8
Simulation, STEP	1.2	3.3	8.7	1 ms	11.3	8.8	1.5	0.3	35.1
Simulation, STL	1.3	3.3	9.0	0.9 ms	11.7	0.9	1.4	0.3	27.9
Simulation, OBJ	1.3	3.1	8.9	1 ms	10.8	17.1	1.4	0.3	42.9
Visual, GLB	1.4	3.1	8.5	1 ms	25.1	0.4	3.5	0.3	42.3
Visual, OBJ	1.2	3.2	8.7	0.9 ms	25.5	11.9	3.4	0.2	54.2

Board Repo: michalgaska/fmc-tester-v2 Board: EDA-02327-V2-0_pcb.kicad_pcb Complexity 377 / 1000 (size 272, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 169, 4,424, 556 Triangles, simulation 3,191,776 in 347 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 108 MB 945 MB STEP 425 MB 1.4 GB STL 160 MB 958 MB OBJ 348 MB 2.1 GB Visual GLB 74 MB 1.3 GB OBJ 246 MB 1.7 GB

1661. moteus_c1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.1	5.7	0.6 ms	6.2	0.3	0.8	0.2	15.8
Simulation, STEP	0.5	2.2	5.7	0.6 ms	6.1	4.3	0.8	0.3	19.9
Simulation, STL	0.5	2.2	5.7	0.6 ms	6.2	0.5	0.8	0.3	16.2
Simulation, OBJ	0.5	2.1	5.9	0.5 ms	6.3	10.0	0.8	0.3	25.9
Visual, GLB	0.7	2.1	5.7	0.8 ms	13.5	0.2	1.5	0.3	23.9
Visual, OBJ	0.5	2.2	5.9	0.9 ms	13.3	6.1	1.5	0.3	29.9

Board Repo: mjbots/moteus Board: moteus_c1.kicad_pcb Folder hw / c1 Complexity 340 / 1000 (size 250, features 90) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 120, 1,099, 290 Triangles, simulation 1,697,714 in 114 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 58 MB 613 MB STEP 200 MB 687 MB STL 85 MB 589 MB OBJ 175 MB 1.2 GB Visual GLB 35 MB 738 MB OBJ 107 MB 831 MB

1662. moteus_c1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.6	4.4	0.7 ms	4.8	0.3	0.6	0.2	12.3
Simulation, STEP	0.4	1.5	4.3	0.6 ms	4.9	3.0	0.6	0.2	14.9
Simulation, STL	0.4	1.7	4.3	0.5 ms	4.6	0.5	0.6	0.2	12.3
Simulation, OBJ	0.4	1.5	4.6	0.8 ms	5.0	7.0	0.6	0.2	19.4
Visual, GLB	0.4	1.6	4.7	0.9 ms	11.3	0.1	1.1	0.2	19.5
Visual, OBJ	0.4	1.5	4.4	0.7 ms	11.3	4.2	1.1	0.2	23.1

Board Repo: mjbots/moteus Board: moteus_c1.kicad_pcb Folder hw / c1 / r1.0 Complexity 340 / 1000 (size 250, features 90) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 130, 1,083, 286 Triangles, simulation 1,709,492 in 121 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 58 MB 599 MB STEP 205 MB 681 MB STL 85 MB 566 MB OBJ 176 MB 1.1 GB Visual GLB 36 MB 732 MB OBJ 109 MB 866 MB

1663. moteus_c1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.3	6.7	0.6 ms	7.0	0.3	0.8	0.3	18.0
Simulation, STEP	0.6	2.5	6.3	0.6 ms	7.3	4.5	0.9	0.3	22.4
Simulation, STL	0.6	2.6	7.5	0.6 ms	7.4	0.7	1.1	0.3	20.2
Simulation, OBJ	0.6	2.5	6.5	0.6 ms	6.6	10.3	0.9	0.4	27.7
Visual, GLB	0.5	2.2	6.0	0.9 ms	14.9	0.2	1.7	0.3	25.9
Visual, OBJ	0.6	2.4	6.3	0.6 ms	14.7	6.5	1.8	0.3	32.7

Board Repo: mjbots/moteus Board: moteus_c1.kicad_pcb Folder hw / c1 / r1.1 Complexity 339 / 1000 (size 249, features 90) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 120, 1,088, 289 Triangles, simulation 1,693,562 in 114 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 58 MB 597 MB STEP 199 MB 664 MB STL 85 MB 609 MB OBJ 174 MB 1.2 GB Visual GLB 35 MB 767 MB OBJ 107 MB 819 MB

1664. mjuart

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	0.7	0.2 ms	0.9	41 ms	0.1	0.3	2.5
Simulation, STEP	0.2	0.3	0.8	0.3 ms	1.0	1.1	0.1	0.3	3.8
Simulation, STL	0.2	0.3	0.7	0.2 ms	0.9	91 ms	0.2	0.2	2.6
Simulation, OBJ	0.2	0.3	0.7	0.2 ms	1.0	1.5	0.1	0.2	3.9
Visual, GLB	0.2	0.3	0.7	0.2 ms	2.4	39 ms	0.2	0.2	4.1
Visual, OBJ	0.1	0.3	0.7	0.4 ms	2.6	1.1	0.2	0.3	5.3

Board Repo: mjbots/moteus Board: mjuart.kicad_pcb Folder hw / mjuart Complexity 245 / 1000 (size 155, features 90) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 16, 150, 37 Triangles, simulation 222,280 in 38 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.7 MB 220 MB STEP 28 MB 232 MB STL 11 MB 219 MB OBJ 22 MB 226 MB Visual GLB 5.4 MB 209 MB OBJ 15 MB 212 MB

1665. moteus_x1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	5.8	16.4	0.6 ms	18.2	0.8	2.2	0.3	44.5
Simulation, STEP	0.8	5.8	16.6	0.8 ms	17.7	8.7	2.2	0.3	52.1
Simulation, STL	0.8	6.0	15.8	1 ms	17.9	1.6	2.2	0.3	44.6
Simulation, OBJ	0.8	5.9	16.0	1.0 ms	18.0	31.1	2.3	0.3	74.6
Visual, GLB	0.9	6.0	16.6	0.7 ms	62.8	0.4	2.8	0.3	89.6
Visual, OBJ	0.9	5.9	16.4	0.7 ms	62.4	13.0	2.8	0.2	101.5

Board Repo: mjbots/moteus Board: moteus_x1.kicad_pcb Folder hw / x1 Complexity 408 / 1000 (size 278, features 130) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 8 (20240108) Parts, tracks, vias 183, 1,473, 1,087 Triangles, simulation 5,602,952 in 146 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 183 MB 1.2 GB STEP 471 MB 1.6 GB STL 280 MB 1.2 GB OBJ 588 MB 3.5 GB Visual GLB 86 MB 1.6 GB OBJ 275 MB 1.9 GB

1666. amiga-gfxcard-before-pour

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.5	6.8	0.7 ms	5.3	0.3	0.8	0.2	15.2
Simulation, STEP	0.3	1.5	6.5	1 ms	5.1	4.1	0.8	0.3	18.6
Simulation, STL	0.3	1.5	6.8	0.9 ms	5.6	0.4	0.8	0.3	15.6
Simulation, OBJ	0.3	1.4	7.1	1 ms	5.4	8.3	0.8	0.3	23.5
Visual, GLB	0.4	1.5	6.9	1 ms	12.0	0.2	1.4	0.3	22.6
Visual, OBJ	0.3	1.5	6.8	0.8 ms	12.4	5.9	1.5	0.3	28.7

Board Repo: mntmn/amiga2000-gfxcard Board: amiga-gfxcard-before-pour.kicad_pcb Folder kicad Complexity 245 / 1000 (size 230, features 15) KESE features through vias Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 21, 1,740, 290 Triangles, simulation 1,270,194 in 237 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 44 MB 525 MB STEP 204 MB 645 MB STL 64 MB 522 MB OBJ 132 MB 881 MB Visual GLB 33 MB 684 MB OBJ 101 MB 768 MB

1667. amiga-gfxcard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.9	4.3	0.8 ms	2.9	0.2	0.5	0.3	9.3
Simulation, STEP	0.2	0.8	4.3	0.7 ms	2.9	2.4	0.5	0.3	11.3
Simulation, STL	0.2	0.8	4.2	0.8 ms	2.9	0.2	0.5	0.2	9.2
Simulation, OBJ	0.2	0.9	4.3	0.7 ms	2.9	4.2	0.5	0.2	13.2
Visual, GLB	0.2	0.9	4.0	0.7 ms	7.1	0.1	0.9	0.3	13.5
Visual, OBJ	0.2	0.8	4.2	0.7 ms	7.5	3.1	0.9	0.2	16.9

Board Repo: mntmn/amiga2000-gfxcard Board: amiga-gfxcard.kicad_pcb Folder kicad Complexity 206 / 1000 (size 171, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 32, 871, 112 Triangles, simulation 842,260 in 159 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 30 MB 401 MB STEP 147 MB 472 MB STL 42 MB 423 MB OBJ 87 MB 621 MB Visual GLB 21 MB 538 MB OBJ 65 MB 524 MB

1668. videoslot

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	3.6	0.5 ms	2.8	0.1	0.4	0.3	8.0
Simulation, STEP	0.2	0.6	3.6	0.4 ms	2.8	2.3	0.4	0.2	10.1
Simulation, STL	0.2	0.6	3.6	0.4 ms	2.7	0.2	0.4	0.3	8.0
Simulation, OBJ	0.2	0.6	3.6	0.4 ms	2.9	4.0	0.4	0.2	12.0
Visual, GLB	0.2	0.6	3.7	0.5 ms	6.0	81 ms	0.6	0.2	11.6
Visual, OBJ	0.2	0.7	3.6	0.8 ms	6.0	2.8	0.6	0.3	14.2

Board Repo: mntmn/amiga2000-gfxcard Board: videoslot.kicad_pcb Folder videoslot Complexity 184 / 1000 (size 149, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20160815) Parts, tracks, vias 13, 425, 49 Triangles, simulation 689,736 in 107 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 24 MB 343 MB STEP 121 MB 403 MB STL 34 MB 339 MB OBJ 70 MB 495 MB Visual GLB 16 MB 419 MB OBJ 49 MB 420 MB

1669. adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	0.3	0.8	0.4 ms	1.2	38 ms	0.2	0.2	3.2
Simulation, STEP	0.5	0.3	0.9	0.2 ms	1.2	1.3	0.1	0.2	4.5
Simulation, STL	0.5	0.3	0.8	0.3 ms	1.2	66 ms	0.1	0.3	3.3
Simulation, OBJ	0.5	0.3	0.8	0.2 ms	1.2	1.1	0.1	0.2	4.2
Visual, GLB	0.5	0.3	0.8	0.2 ms	2.1	29 ms	0.2	0.2	4.1
Visual, OBJ	0.5	0.3	0.8	0.3 ms	2.2	0.9	0.2	0.2	5.1

Board Repo: Modos-Labs/Glider Board: adapter.kicad_pcb Folder pcb / 34p-adapter-a Complexity 214 / 1000 (size 139, features 75) KESE features through vias, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 6, 255, 74 Triangles, simulation 197,086 in 71 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 6.9 MB 231 MB STEP 32 MB 256 MB STL 9.9 MB 232 MB OBJ 20 MB 232 MB Visual GLB 5.8 MB 226 MB OBJ 17 MB 227 MB

1670. adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	80 ms	0.1	0.4	0.1 ms	0.9	24 ms	82 ms	0.2	1.8
Simulation, STEP	0.1	0.1	0.4	0.1 ms	0.7	1.0	76 ms	0.2	2.5
Simulation, STL	94 ms	0.2	0.5	0.2 ms	0.8	41 ms	77 ms	0.2	1.9
Simulation, OBJ	84 ms	0.1	0.4	0.2 ms	0.8	0.5	89 ms	0.2	2.2
Visual, GLB	81 ms	0.1	0.4	0.3 ms	1.5	17 ms	0.1	0.2	2.4
Visual, OBJ	85 ms	0.1	0.4	0.3 ms	1.5	0.4	0.1	0.2	2.8

Board Repo: Modos-Labs/Glider Board: adapter.kicad_pcb Folder pcb / 34p-adapter-b Complexity 189 / 1000 (size 124, features 65) KESE features through vias, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 2, 216, 40 Triangles, simulation 123,848 in 47 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.3 MB 199 MB STEP 21 MB 207 MB STL 6.2 MB 201 MB OBJ 12 MB 199 MB Visual GLB 3.5 MB 173 MB OBJ 10 MB 171 MB

1671. adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.5	0.2 ms	1.1	33 ms	0.1	0.2	2.3
Simulation, STEP	0.1	0.2	0.5	0.3 ms	1.1	1.2	0.1	0.2	3.4
Simulation, STL	0.1	0.2	0.5	0.2 ms	1.1	49 ms	0.1	0.2	2.3
Simulation, OBJ	0.1	0.2	0.5	0.2 ms	1.0	0.8	0.1	0.2	3.1
Visual, GLB	0.1	0.2	0.5	0.2 ms	1.9	24 ms	0.2	0.2	3.1
Visual, OBJ	0.1	0.2	0.5	0.2 ms	1.9	0.7	0.1	0.2	3.8

Board Repo: Modos-Labs/Glider Board: adapter.kicad_pcb Folder pcb / 35p-adapter-a Complexity 190 / 1000 (size 125, features 65) KESE features through vias, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 2, 195, 53 Triangles, simulation 155,366 in 50 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 5.4 MB 210 MB STEP 27 MB 223 MB STL 7.8 MB 211 MB OBJ 15 MB 210 MB Visual GLB 4.5 MB 199 MB OBJ 13 MB 199 MB

1672. adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.1	0.4	0.1 ms	0.9	29 ms	0.1	0.2	1.9
Simulation, STEP	0.1	0.2	0.4	0.2 ms	0.9	1.0	0.1	0.2	3.0
Simulation, STL	0.1	0.2	0.4	0.3 ms	0.9	53 ms	0.1	0.2	1.9
Simulation, OBJ	0.1	0.2	0.4	0.1 ms	0.9	0.8	86 ms	0.2	2.7
Visual, GLB	0.1	0.2	0.4	0.2 ms	1.7	22 ms	0.1	0.2	2.7
Visual, OBJ	0.1	0.2	0.4	0.2 ms	1.6	0.6	0.1	0.2	3.3

Board Repo: Modos-Labs/Glider Board: adapter.kicad_pcb Folder pcb / 39p-adapter-b Complexity 191 / 1000 (size 126, features 65) KESE features through vias, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 2, 264, 42 Triangles, simulation 141,810 in 48 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.9 MB 216 MB STEP 24 MB 216 MB STL 7.1 MB 218 MB OBJ 14 MB 217 MB Visual GLB 3.9 MB 188 MB OBJ 11 MB 186 MB

1673. adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.4	0.2 ms	0.9	25 ms	0.1	0.2	1.9
Simulation, STEP	0.1	0.2	0.4	0.2 ms	0.8	1.0	0.1	0.2	2.9
Simulation, STL	95 ms	0.2	0.4	0.2 ms	0.9	39 ms	99 ms	0.2	1.9
Simulation, OBJ	98 ms	0.2	0.3	0.2 ms	0.9	0.7	0.1	0.2	2.6
Visual, GLB	0.1	0.2	0.3	0.2 ms	1.8	21 ms	0.1	0.2	2.7
Visual, OBJ	0.1	0.2	0.4	0.2 ms	1.7	0.6	0.1	0.2	3.3

Board Repo: Modos-Labs/Glider Board: adapter.kicad_pcb Folder pcb / 39p-adapter-c Complexity 204 / 1000 (size 129, features 75) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 3, 259, 42 Triangles, simulation 145,288 in 59 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 5.1 MB 211 MB STEP 24 MB 218 MB STL 7.3 MB 206 MB OBJ 14 MB 205 MB Visual GLB 4.0 MB 187 MB OBJ 12 MB 190 MB

1674. adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.7	0.2 ms	1.0	37 ms	0.1	0.2	2.3
Simulation, STEP	0.1	0.2	0.7	0.3 ms	1.0	1.1	0.1	0.2	3.4
Simulation, STL	0.1	0.2	0.7	0.2 ms	1.0	50 ms	0.1	0.2	2.3
Simulation, OBJ	0.1	0.2	0.7	0.2 ms	1.0	0.9	0.1	0.2	3.2
Visual, GLB	0.1	0.2	0.7	0.2 ms	2.1	28 ms	0.2	0.2	3.6
Visual, OBJ	0.1	0.2	0.8	0.2 ms	2.2	0.8	0.2	0.2	4.4

Board Repo: Modos-Labs/Glider Board: adapter.kicad_pcb Folder pcb / 40p-adapter-ab Complexity 211 / 1000 (size 146, features 65) KESE features through vias, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 8, 401, 69 Triangles, simulation 232,152 in 79 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.2 MB 239 MB STEP 41 MB 259 MB STL 12 MB 239 MB OBJ 23 MB 239 MB Visual GLB 6.9 MB 246 MB OBJ 20 MB 244 MB

1675. adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.8	0.2 ms	1.1	33 ms	0.2	0.2	2.7
Simulation, STEP	0.1	0.2	0.7	0.2 ms	1.1	1.2	0.1	0.2	3.7
Simulation, STL	0.1	0.2	0.7	0.3 ms	1.2	66 ms	0.2	0.2	2.6
Simulation, OBJ	0.1	0.2	0.7	0.2 ms	1.1	1.0	0.1	0.2	3.5
Visual, GLB	0.1	0.2	0.7	0.2 ms	2.2	26 ms	0.2	0.2	3.7
Visual, OBJ	0.1	0.2	0.7	0.3 ms	2.0	0.9	0.2	0.2	4.2

Board Repo: Modos-Labs/Glider Board: adapter.kicad_pcb Folder pcb / 50p-adapter-b Complexity 211 / 1000 (size 136, features 75) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 5, 311, 44 Triangles, simulation 190,560 in 62 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 6.6 MB 214 MB STEP 31 MB 233 MB STL 9.5 MB 217 MB OBJ 19 MB 216 MB Visual GLB 5.5 MB 215 MB OBJ 16 MB 212 MB

1676. adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.1	0.4 ms	2.6	92 ms	0.4	0.2	6.2
Simulation, STEP	0.2	0.5	2.1	0.3 ms	2.4	2.1	0.3	0.2	7.9
Simulation, STL	0.2	0.5	2.2	0.3 ms	2.7	0.2	0.4	0.2	6.3
Simulation, OBJ	0.2	0.5	2.2	0.4 ms	2.6	3.1	0.4	0.2	9.2
Visual, GLB	0.2	0.5	2.2	0.4 ms	4.3	78 ms	0.4	0.3	8.0
Visual, OBJ	0.2	0.5	2.1	0.4 ms	4.4	2.6	0.4	0.2	10.4

Board Repo: Modos-Labs/Glider Board: adapter.kicad_pcb Folder pcb / 50p-adapter-c Complexity 244 / 1000 (size 169, features 75) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 26, 982, 90 Triangles, simulation 554,128 in 87 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 19 MB 328 MB STEP 100 MB 395 MB STL 28 MB 332 MB OBJ 56 MB 424 MB Visual GLB 16 MB 405 MB OBJ 46 MB 464 MB

1677. pcb

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	6.0	22.6	1 ms	29.9	1.2	3.0	0.3	64.5
Simulation, STEP	1.6	6.1	22.9	1 ms	30.2	16.5	3.1	0.4	80.8
Simulation, STL	1.5	6.2	23.0	2 ms	31.0	2.4	3.1	0.5	67.6
Simulation, OBJ	1.5	5.9	23.9	2 ms	31.8	35.8	3.3	0.4	102.7
Visual, GLB	1.7	6.3	23.4	1 ms	58.4	0.7	8.1	0.4	98.9
Visual, OBJ	1.6	6.1	22.8	1 ms	57.5	20.0	8.1	0.3	116.5

Board Repo: Modos-Labs/Glider Board: pcb.kicad_pcb Folder pcb / mainboard Complexity 464 / 1000 (size 309, features 155) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, knockout text, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 375, 8,883, 900 Triangles, simulation 5,797,268 in 472 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 199 MB 1.7 GB STEP 870 MB 2.2 GB STL 290 MB 1.7 GB OBJ 626 MB 3.7 GB Visual GLB 127 MB 2.1 GB OBJ 413 MB 2.6 GB

1678. adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	1.6	0.4 ms	2.9	90 ms	0.3	0.2	5.9
Simulation, STEP	0.2	0.6	1.7	0.4 ms	2.8	2.3	0.3	0.2	8.0
Simulation, STL	0.2	0.5	1.7	0.4 ms	2.9	0.2	0.3	0.2	5.9
Simulation, OBJ	0.2	0.6	1.6	0.5 ms	2.9	2.6	0.3	0.2	8.3
Visual, GLB	0.2	0.6	1.7	0.4 ms	5.1	77 ms	0.7	0.2	8.7
Visual, OBJ	0.2	0.6	1.6	0.5 ms	5.3	2.2	0.8	0.2	10.9

Board Repo: Modos-Labs/Glider Board: adapter.kicad_pcb Folder pcb / mega_adapter Complexity 261 / 1000 (size 171, features 90) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 16, 1,300, 195 Triangles, simulation 655,760 in 108 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 23 MB 400 MB STEP 117 MB 446 MB STL 33 MB 403 MB OBJ 66 MB 477 MB Visual GLB 19 MB 428 MB OBJ 57 MB 514 MB

1679. adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	0.8	0.4 ms	1.3	44 ms	0.2	0.2	3.1
Simulation, STEP	0.1	0.3	1.0	0.3 ms	1.5	1.5	0.2	0.2	4.8
Simulation, STL	0.1	0.3	0.9	0.2 ms	1.4	0.1	0.2	0.2	3.3
Simulation, OBJ	0.1	0.3	0.8	0.2 ms	1.3	1.4	0.2	0.2	4.3
Visual, GLB	0.1	0.3	0.8	0.4 ms	2.7	40 ms	0.2	0.2	4.5
Visual, OBJ	0.1	0.3	0.9	0.2 ms	2.7	1.6	0.2	0.3	6.1

Board Repo: Modos-Labs/Glider Board: adapter.kicad_pcb Folder pcb / u133_adapter Complexity 229 / 1000 (size 144, features 85) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 7, 340, 86 Triangles, simulation 229,622 in 70 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.0 MB 234 MB STEP 35 MB 260 MB STL 11 MB 233 MB OBJ 23 MB 234 MB Visual GLB 6.6 MB 243 MB OBJ 20 MB 240 MB

1680. pcb

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	3.6	11.4	1 ms	12.9	0.6	1.4	0.3	31.2
Simulation, STEP	0.8	3.5	11.2	1 ms	12.1	8.4	1.3	0.3	37.6
Simulation, STL	0.8	3.5	11.9	1 ms	12.5	0.9	1.5	0.3	31.4
Simulation, OBJ	0.7	3.5	11.5	1 ms	12.0	18.7	1.5	0.3	48.2
Visual, GLB	0.8	3.7	11.5	1 ms	26.2	0.4	2.8	0.3	45.7
Visual, OBJ	0.8	3.5	11.6	1 ms	25.7	12.5	2.9	0.3	57.2

Board Repo: Modos-Labs/Lancer Board: pcb.kicad_pcb Folder pcb / epdc_poc_board Complexity 390 / 1000 (size 285, features 105) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20210824) Parts, tracks, vias 152, 2,972, 478 Triangles, simulation 2,984,120 in 302 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 103 MB 941 MB STEP 437 MB 1.2 GB STL 149 MB 929 MB OBJ 315 MB 2.0 GB Visual GLB 71 MB 1.2 GB OBJ 225 MB 1.5 GB

1681. pcb

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.3	4.5	20.5	2 ms	22.0	0.6	2.5	0.3	51.6
Simulation, STEP	1.2	4.6	20.0	2 ms	21.8	13.5	2.5	0.3	63.8
Simulation, STL	1.3	4.7	20.4	2 ms	22.2	1.2	2.2	0.3	52.3
Simulation, OBJ	1.2	4.4	20.2	2 ms	21.5	19.1	2.3	0.3	69.0
Visual, GLB	1.3	4.5	20.1	2 ms	37.3	0.4	4.5	0.3	68.4
Visual, OBJ	1.3	4.7	20.7	2 ms	36.6	15.1	4.5	0.3	83.2

Board Repo: Modos-Labs/Lancer Board: pcb.kicad_pcb Folder pcb / mainboard Complexity 385 / 1000 (size 270, features 115) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20210824) Parts, tracks, vias 252, 3,168, 656 Triangles, simulation 3,434,270 in 443 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 119 MB 1.3 GB STEP 679 MB 1.7 GB STL 172 MB 1.3 GB OBJ 368 MB 2.3 GB Visual GLB 90 MB 1.7 GB OBJ 282 MB 1.9 GB

1682. pcb

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	81 ms	77 ms	0.4	0.1 ms	0.5	19 ms	72 ms	0.2	1.4
Simulation, STEP	93 ms	86 ms	0.4	0.1 ms	0.5	0.8	73 ms	0.2	2.2
Simulation, STL	85 ms	86 ms	0.4	0.1 ms	0.6	28 ms	73 ms	0.2	1.4
Simulation, OBJ	84 ms	79 ms	0.4	0.2 ms	0.5	0.5	69 ms	0.2	1.9
Visual, GLB	98 ms	82 ms	0.4	0.1 ms	1.1	16 ms	88 ms	0.2	2.0
Visual, OBJ	0.1	81 ms	0.5	0.1 ms	1.1	0.3	65 ms	0.2	2.3

Board Repo: Modos-Labs/Lancer Board: pcb.kicad_pcb Folder pcb / usb_adapter_board Complexity 148 / 1000 (size 93, features 55) KESE features filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20210824) Parts, tracks, vias 3, 40, 0 Triangles, simulation 109,756 in 17 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.6 MB 186 MB STEP 16 MB 191 MB STL 5.5 MB 188 MB OBJ 10 MB 180 MB Visual GLB 2.1 MB 153 MB OBJ 5.7 MB 152 MB

1683. Project NuXT

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.7	17.5	73.2	2 ms	66.5	3.3	12.6	0.6	177.4
Simulation, STEP	3.5	15.6	71.9	1 ms	71.8	43.7	11.9	0.6	219.0
Simulation, STL	3.3	16.2	70.0	4 ms	66.4	6.8	11.9	0.6	175.1
Simulation, OBJ	3.0	15.5	71.4	4 ms	64.2	106.1	11.9	0.6	272.6
Visual, GLB	3.1	15.9	69.7	3 ms	176.1	1.8	16.1	0.5	283.3
Visual, OBJ	3.3	19.0	73.5	3 ms	174.4	61.4	16.1	0.4	348.1

Board Repo: monotech/NuXT Board: Project NuXT.kicad_pcb Complexity 302 / 1000 (size 237, features 65) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 221, 6,262, 262 Triangles, simulation 15,376,478 in 341 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 521 MB 3.5 GB STEP 2.1 GB 4.7 GB STL 769 MB 3.5 GB OBJ 1.7 GB 9.6 GB Visual GLB 292 MB 4.5 GB OBJ 941 MB 5.9 GB

1684. 96boards-robomezzi

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.4	4.9	1.0 ms	4.2	0.2	0.7	0.3	11.9
Simulation, STEP	0.3	1.4	4.9	0.6 ms	4.3	3.3	0.6	0.2	15.0
Simulation, STL	0.3	1.4	4.8	1 ms	4.3	0.4	0.7	0.2	12.1
Simulation, OBJ	0.3	1.4	4.9	0.6 ms	4.3	7.4	0.6	0.2	19.1
Visual, GLB	0.3	1.4	4.9	0.7 ms	10.3	0.1	1.1	0.3	18.5
Visual, OBJ	0.4	1.6	5.1	0.8 ms	9.8	4.4	1.1	0.2	22.6

Board Repo: mwelling/96boards-robomezzi Board: 96boards-robomezzi.kicad_pcb Complexity 247 / 1000 (size 202, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 112, 968, 113 Triangles, simulation 1,414,434 in 142 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 48 MB 532 MB STEP 195 MB 598 MB STL 71 MB 490 MB OBJ 147 MB 982 MB Visual GLB 28 MB 712 MB OBJ 86 MB 693 MB

1685. beagle-wire

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	2.2	6.4	0.9 ms	7.5	0.3	1.1	0.3	18.2
Simulation, STEP	0.5	2.3	6.3	0.8 ms	7.1	5.4	1.1	0.2	22.8
Simulation, STL	0.4	2.3	6.3	0.8 ms	7.3	0.5	1.2	0.3	18.3
Simulation, OBJ	0.4	2.4	6.7	0.9 ms	7.4	10.6	1.0	0.3	28.9
Visual, GLB	0.5	2.2	6.2	0.9 ms	14.8	0.2	1.5	0.2	25.7
Visual, OBJ	0.4	2.3	6.3	0.9 ms	15.3	7.1	1.7	0.2	33.3

Board Repo: mwelling/beagle-wire Board: beagle-wire.kicad_pcb Complexity 316 / 1000 (size 261, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 104, 2,019, 289 Triangles, simulation 2,045,158 in 200 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 70 MB 691 MB STEP 302 MB 893 MB STL 102 MB 668 MB OBJ 216 MB 1.4 GB Visual GLB 46 MB 875 MB OBJ 145 MB 1.0 GB

1686. icebreaker++

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	2.5	9.1	1 ms	11.2	0.5	1.3	0.3	25.6
Simulation, STEP	0.7	2.7	9.2	1 ms	10.9	7.1	1.3	0.3	32.1
Simulation, STL	0.7	2.5	9.0	1 ms	11.2	1.1	1.3	0.3	26.1
Simulation, OBJ	0.7	2.6	9.2	1 ms	10.7	13.1	1.3	0.3	37.9
Visual, GLB	0.7	2.7	9.3	1 ms	22.2	0.3	3.1	0.3	38.5
Visual, OBJ	0.6	2.8	9.2	1 ms	21.8	8.6	3.2	0.3	46.4

Board Repo: mwelling/icecrusher Board: icebreaker++.kicad_pcb Folder kicad-src Complexity 369 / 1000 (size 269, features 100) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20201116) Parts, tracks, vias 99, 2,201, 284 Triangles, simulation 2,479,698 in 300 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 83 MB 864 MB STEP 381 MB 1.1 GB STL 124 MB 854 MB OBJ 260 MB 1.7 GB Visual GLB 55 MB 1.1 GB OBJ 172 MB 1.2 GB

1687. lofive

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	1.0	3.1	0.3 ms	2.5	0.1	0.4	0.2	7.5
Simulation, STEP	0.2	1.0	3.0	0.3 ms	2.4	1.9	0.3	0.2	8.9
Simulation, STL	0.2	0.9	3.0	0.3 ms	2.4	0.3	0.3	0.2	7.3
Simulation, OBJ	0.2	0.9	3.1	0.3 ms	2.4	3.7	0.3	0.2	10.9
Visual, GLB	0.2	1.0	3.1	0.5 ms	5.6	69 ms	0.5	0.2	10.7
Visual, OBJ	0.2	1.0	3.1	0.3 ms	5.9	2.1	0.7	0.2	13.2

Board Repo: mwelling/lofive Board: lofive.kicad_pcb Complexity 264 / 1000 (size 219, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 33, 445, 83 Triangles, simulation 899,502 in 64 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 31 MB 419 MB STEP 149 MB 452 MB STL 45 MB 407 MB OBJ 93 MB 646 MB Visual GLB 19 MB 464 MB OBJ 56 MB 464 MB

1688. pocketbone-kicad

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.2	6.5	0.4 ms	4.5	0.2	0.5	0.2	13.4
Simulation, STEP	0.3	1.1	6.3	0.4 ms	4.5	3.6	0.5	0.2	16.5
Simulation, STL	0.3	1.2	6.5	0.8 ms	4.7	0.4	0.6	0.2	13.9
Simulation, OBJ	0.3	1.2	6.6	0.6 ms	4.7	6.2	0.5	0.2	19.6
Visual, GLB	0.3	1.2	6.4	0.4 ms	9.3	0.1	1.3	0.2	18.8
Visual, OBJ	0.3	1.2	6.3	0.4 ms	9.1	3.9	1.1	0.2	22.2

Board Repo: mwelling/pocketbone-kicad Board: pocketbone-kicad.kicad_pcb Complexity 292 / 1000 (size 247, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 56, 891, 151 Triangles, simulation 1,477,718 in 88 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 52 MB 655 MB STEP 247 MB 754 MB STL 74 MB 652 MB OBJ 155 MB 1.0 GB Visual GLB 34 MB 687 MB OBJ 102 MB 791 MB

1689. OpenCAPI-to-PCIe_for_MNV303212A_RevA2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.2	4.3	0.5 ms	5.6	0.2	0.7	0.3	12.7
Simulation, STEP	0.4	1.2	4.3	0.4 ms	5.8	4.5	0.8	0.3	17.3
Simulation, STL	0.4	1.3	4.4	0.4 ms	5.8	0.4	0.8	0.3	13.3
Simulation, OBJ	0.4	1.2	4.6	0.4 ms	5.6	7.6	0.8	0.2	20.4
Visual, GLB	0.4	1.2	4.3	0.4 ms	12.9	0.2	1.4	0.3	20.7
Visual, OBJ	0.4	1.2	4.2	0.5 ms	12.5	6.9	1.6	0.3	27.1

Board Repo: mwrnd/opencapi-to-pcie_for_mnv303212a_reva2 Board: OpenCAPI-to-PCIe_for_MNV303212A_RevA2.kicad_pcb Complexity 284 / 1000 (size 184, features 100) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 5, 2,398, 175 Triangles, simulation 1,358,418 in 85 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 46 MB 650 MB STEP 212 MB 780 MB STL 68 MB 645 MB OBJ 139 MB 897 MB Visual GLB 37 MB 720 MB OBJ 112 MB 828 MB

1690. AnalogComputer

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	5.2	20.7	0.9 ms	21.3	0.9	3.4	0.4	53.0
Simulation, STEP	1.1	4.7	19.1	1 ms	20.5	12.8	3.0	0.3	61.5
Simulation, STL	1.1	5.0	18.5	0.8 ms	21.5	2.2	3.1	0.3	51.9
Simulation, OBJ	1.1	4.9	18.5	0.9 ms	19.8	29.1	3.1	0.4	76.8
Visual, GLB	1.0	4.5	17.8	0.8 ms	39.2	0.3	4.0	0.3	67.2
Visual, OBJ	1.0	4.7	17.5	0.9 ms	39.0	13.2	4.8	0.3	80.5

Board Repo: mwwhited/embeddedbakery Board: AnalogComputer.kicad_pcb Folder circuits / AnalogCalculator / AnalogComputer Complexity 285 / 1000 (size 210, features 75) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 113, 2,006, 31 Triangles, simulation 4,617,684 in 226 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 159 MB 1.2 GB STEP 681 MB 1.6 GB STL 231 MB 1.2 GB OBJ 495 MB 3.0 GB Visual GLB 73 MB 1.7 GB OBJ 228 MB 1.5 GB

1691. Diode Function

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	3.7	1.0 ms	2.7	0.1	0.4	0.2	8.0
Simulation, STEP	0.2	0.7	3.9	0.4 ms	3.0	2.2	0.4	0.2	10.5
Simulation, STL	0.2	0.7	3.9	0.5 ms	2.8	0.2	0.4	0.2	8.4
Simulation, OBJ	0.2	0.6	3.9	0.4 ms	2.8	4.1	0.3	0.2	12.3
Visual, GLB	0.3	0.6	3.9	0.5 ms	4.5	69 ms	0.5	0.2	10.0
Visual, OBJ	0.2	0.7	3.8	0.8 ms	4.7	2.4	0.5	0.2	12.5

Board Repo: mwwhited/embeddedbakery Board: Diode Function.kicad_pcb Folder circuits / AnalogCalculator / Diode Function / Diode Function Complexity 173 / 1000 (size 158, features 15) KESE features through vias Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 69, 320, 7 Triangles, simulation 845,732 in 56 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 28 MB 392 MB STEP 109 MB 462 MB STL 42 MB 375 MB OBJ 84 MB 592 MB Visual GLB 16 MB 464 MB OBJ 48 MB 497 MB

1692. OperationalAmplifierExamples

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	3.2	0.6 ms	2.6	0.1	0.4	0.2	7.2
Simulation, STEP	0.2	0.5	3.1	0.5 ms	2.9	2.1	0.4	0.3	9.5
Simulation, STL	0.2	0.5	3.2	0.5 ms	2.6	0.2	0.4	0.2	7.3
Simulation, OBJ	0.2	0.4	3.2	0.5 ms	2.8	4.1	0.4	0.3	11.3
Visual, GLB	0.2	0.5	3.4	1 ms	5.4	72 ms	0.5	0.3	10.5
Visual, OBJ	0.2	0.7	3.2	0.4 ms	5.6	2.2	0.8	0.2	13.0

Board Repo: mwwhited/embeddedbakery Board: OperationalAmplifierExamples.kicad_pcb Folder circuits / AnalogCalculator / OperationalAmplifierExamples / OperationalAmplifierExamples Complexity 175 / 1000 (size 145, features 30) KESE features rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 48, 195, 0 Triangles, simulation 846,610 in 53 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 28 MB 409 MB STEP 117 MB 469 MB STL 42 MB 392 MB OBJ 84 MB 589 MB Visual GLB 17 MB 498 MB OBJ 50 MB 466 MB

1693. Connectors

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.8	0.2 ms	0.7	32 ms	0.1	0.2	2.2
Simulation, STEP	0.1	0.2	0.8	0.2 ms	0.7	1.0	0.1	0.2	3.1
Simulation, STL	0.1	0.2	0.7	0.1 ms	0.8	46 ms	0.1	0.3	2.2
Simulation, OBJ	0.1	0.2	0.8	0.2 ms	0.7	1.0	0.1	0.2	3.1
Visual, GLB	0.1	0.2	0.8	0.3 ms	1.6	21 ms	0.2	0.3	3.1
Visual, OBJ	89 ms	0.2	0.8	0.2 ms	1.5	0.5	0.1	0.2	3.3

Board Repo: mwwhited/embeddedbakery Board: Connectors.kicad_pcb Folder circuits / AnalogCalculator / SimpleOpAmp / Connectors / Connectors Complexity 120 / 1000 (size 105, features 15) KESE features through vias Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 1, 122, 4 Triangles, simulation 231,562 in 30 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.7 MB 216 MB STEP 28 MB 229 MB STL 12 MB 221 MB OBJ 22 MB 213 MB Visual GLB 4.3 MB 203 MB OBJ 12 MB 200 MB

1694. Simple OpAmp

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	3.2	15.7	1 ms	14.2	0.5	1.3	0.3	35.8
Simulation, STEP	0.6	3.2	15.7	1 ms	14.7	9.0	1.4	0.3	44.9
Simulation, STL	0.7	3.2	15.7	1 ms	14.9	1.1	1.5	0.3	37.3
Simulation, OBJ	0.6	3.2	16.1	1 ms	14.6	18.1	1.5	0.3	54.3
Visual, GLB	0.7	3.2	15.6	1 ms	22.3	0.3	2.6	0.3	45.0
Visual, OBJ	0.7	3.2	16.2	1 ms	22.2	9.6	2.8	0.3	54.9

Board Repo: mwwhited/embeddedbakery Board: Simple OpAmp.kicad_pcb Folder circuits / AnalogCalculator / SimpleOpAmp / Simple OpAmp Complexity 83 / 1000 (size 73, features 10) KESE features rounded, trapezoid or chamfered pads Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 174, 0, 0 Triangles, simulation 3,102,728 in 334 parts Note mostly unrouted Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 98 MB 895 MB STEP 366 MB 1.2 GB STL 155 MB 904 MB OBJ 330 MB 2.0 GB Visual GLB 57 MB 1.1 GB OBJ 178 MB 1.3 GB

1695. Regulator7913-1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.9	0.4 ms	1.8	76 ms	0.3	0.2	4.9
Simulation, STEP	0.2	0.4	2.1	0.3 ms	1.8	1.6	0.3	0.3	6.6
Simulation, STL	0.2	0.4	2.0	0.3 ms	1.8	0.1	0.2	0.2	4.9
Simulation, OBJ	0.2	0.4	2.0	0.3 ms	1.8	2.3	0.3	0.3	7.2
Visual, GLB	0.1	0.4	1.9	0.4 ms	3.0	45 ms	0.4	0.2	6.1
Visual, OBJ	0.2	0.3	2.0	0.4 ms	3.0	1.2	0.4	0.2	7.5

Board Repo: mwwhited/embeddedbakery Board: Regulator7913-1.kicad_pcb Folder circuits / ComdynaGP6 / Regulator7913-1 Complexity 160 / 1000 (size 145, features 15) KESE features through vias Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 34, 242, 1 Triangles, simulation 497,452 in 48 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 16 MB 275 MB STEP 64 MB 337 MB STL 25 MB 282 MB OBJ 49 MB 376 MB Visual GLB 9.0 MB 311 MB OBJ 27 MB 316 MB

1696. Digital Logic Board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.7	2.0	0.4 ms	1.5	65 ms	0.3	0.2	4.9
Simulation, STEP	0.1	0.7	1.8	0.5 ms	1.5	1.6	0.3	0.2	6.3
Simulation, STL	0.1	0.8	1.9	0.4 ms	1.7	0.2	0.3	0.3	5.2
Simulation, OBJ	0.1	0.7	2.0	0.3 ms	1.5	2.4	0.3	0.3	7.4
Visual, GLB	0.2	0.7	2.0	0.4 ms	3.2	44 ms	0.4	0.2	6.8
Visual, OBJ	0.1	0.7	1.9	0.3 ms	3.2	1.3	0.4	0.2	8.0

Board Repo: mwwhited/embeddedbakery Board: Digital Logic Board.kicad_pcb Folder circuits / Digital Tools / Digital Logic Board Complexity 176 / 1000 (size 131, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 10, 194, 8 Triangles, simulation 509,302 in 44 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 284 MB STEP 82 MB 349 MB STL 25 MB 296 MB OBJ 51 MB 384 MB Visual GLB 9.7 MB 328 MB OBJ 29 MB 332 MB

1697. Examples

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	2.1	0.5 ms	1.8	69 ms	0.2	0.2	5.1
Simulation, STEP	0.2	0.4	2.3	0.3 ms	1.9	1.6	0.2	0.2	6.8
Simulation, STL	0.2	0.4	2.2	0.4 ms	1.8	0.1	0.2	0.3	5.2
Simulation, OBJ	0.2	0.5	2.4	0.2 ms	1.9	2.4	0.2	0.2	7.8
Visual, GLB	0.2	0.4	2.1	0.3 ms	2.8	41 ms	0.3	0.2	6.2
Visual, OBJ	0.2	0.4	2.2	0.3 ms	2.8	1.7	0.3	0.2	7.9

Board Repo: mwwhited/embeddedbakery Board: Examples.kicad_pcb Folder circuits / DiodeLogicBoards / Examples Complexity 57 / 1000 (size 57, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 41, 0, 0 Triangles, simulation 446,392 in 31 parts Note mostly unrouted Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 264 MB STEP 48 MB 314 MB STL 22 MB 262 MB OBJ 45 MB 340 MB Visual GLB 8.6 MB 303 MB OBJ 25 MB 301 MB

1698. PROM

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.8	8.4	1 ms	8.7	0.3	0.7	0.2	20.5
Simulation, STEP	0.4	1.9	8.7	0.9 ms	8.4	4.7	0.7	0.2	25.1
Simulation, STL	0.4	1.8	8.5	0.8 ms	8.5	0.7	0.7	0.2	20.7
Simulation, OBJ	0.4	1.7	8.3	1 ms	8.9	8.7	0.7	0.2	29.0
Visual, GLB	0.4	1.7	8.5	1 ms	11.2	0.2	1.0	0.2	23.2
Visual, OBJ	0.5	1.7	8.4	1.0 ms	11.2	5.0	1.6	0.2	28.7

Board Repo: mwwhited/embeddedbakery Board: PROM.kicad_pcb Folder circuits / DiodeLogicBoards / PROM Complexity 71 / 1000 (size 71, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 145, 0, 0 Triangles, simulation 2,224,624 in 179 parts Note mostly unrouted Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 65 MB 720 MB STEP 243 MB 920 MB STL 111 MB 713 MB OBJ 232 MB 1.5 GB Visual GLB 41 MB 1.1 GB OBJ 123 MB 1.1 GB

1699. h4n2rs485

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	98 ms	0.3	1.2	0.3 ms	0.9	41 ms	0.1	0.2	2.9
Simulation, STEP	0.1	0.3	1.3	0.2 ms	0.9	1.1	0.2	0.2	4.1
Simulation, STL	97 ms	0.3	1.2	0.3 ms	1.0	61 ms	0.1	0.2	3.0
Simulation, OBJ	0.1	0.3	1.2	0.2 ms	1.0	1.4	0.2	0.2	4.4
Visual, GLB	97 ms	0.3	1.3	0.2 ms	1.5	19 ms	0.2	0.2	3.5
Visual, OBJ	0.1	0.3	1.2	0.2 ms	1.6	0.7	0.2	0.2	4.3

Board Repo: mwwhited/embeddedbakery Board: h4n2rs485.kicad_pcb Folder circuits / h4n2rs485 Complexity 58 / 1000 (size 48, features 10) KESE features rounded, trapezoid or chamfered pads Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 17, 0, 0 Triangles, simulation 277,192 in 40 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.4 MB 226 MB STEP 41 MB 250 MB STL 14 MB 228 MB OBJ 28 MB 245 MB Visual GLB 4.4 MB 206 MB OBJ 13 MB 199 MB

1700. Analog Controller

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.9	0.4 ms	2.2	0.1	0.3	0.2	6.5
Simulation, STEP	0.2	0.6	3.1	0.4 ms	2.3	1.8	0.3	0.2	8.5
Simulation, STL	0.2	0.6	3.0	0.8 ms	2.3	0.2	0.4	0.2	6.8
Simulation, OBJ	0.2	0.6	3.0	0.2 ms	2.3	3.1	0.3	0.2	9.6
Visual, GLB	0.2	0.6	3.2	0.3 ms	4.4	51 ms	0.5	0.2	9.2
Visual, OBJ	0.2	0.6	3.0	0.4 ms	4.3	1.7	0.7	0.2	10.7

Board Repo: mwwhited/embeddedbakery Board: Analog Controller.kicad_pcb Folder circuits / HelperBoards / Controller / Analog Controller Complexity 179 / 1000 (size 154, features 25) KESE features through vias, rounded, trapezoid or chamfered pads Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 42, 313, 13 Triangles, simulation 784,554 in 68 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 26 MB 374 MB STEP 108 MB 452 MB STL 39 MB 369 MB OBJ 78 MB 560 MB Visual GLB 15 MB 452 MB OBJ 46 MB 452 MB

1701. Analog Converter Backplane

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	85 ms	0.2	1.2	0.4 ms	1.1	55 ms	0.2	0.2	3.0
Simulation, STEP	95 ms	0.2	1.2	0.4 ms	1.2	1.2	0.2	0.2	4.2
Simulation, STL	0.1	0.2	1.3	0.3 ms	1.2	91 ms	0.1	0.2	3.2
Simulation, OBJ	94 ms	0.2	1.2	0.3 ms	1.0	1.3	0.2	0.2	4.1
Visual, GLB	0.1	0.2	1.2	0.6 ms	1.7	25 ms	0.2	0.2	3.7
Visual, OBJ	0.1	0.2	1.1	0.3 ms	1.7	0.7	0.2	0.3	4.2

Board Repo: mwwhited/embeddedbakery Board: Analog Converter Backplane.kicad_pcb Folder circuits / HelperBoards / Controller / Analog Converter Backplane / Analog Converter Backplane Complexity 138 / 1000 (size 123, features 15) KESE features through vias Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 8, 144, 3 Triangles, simulation 276,700 in 35 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.9 MB 220 MB STEP 34 MB 253 MB STL 14 MB 221 MB OBJ 27 MB 235 MB Visual GLB 5.0 MB 226 MB OBJ 15 MB 226 MB

1702. Analog Converter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.7	0.2 ms	1.5	64 ms	0.2	0.2	4.0
Simulation, STEP	0.1	0.3	1.6	0.2 ms	1.4	1.4	0.2	0.2	5.2
Simulation, STL	0.1	0.3	1.6	0.2 ms	1.4	88 ms	0.2	0.2	3.9
Simulation, OBJ	0.1	0.3	1.6	0.3 ms	1.3	2.2	0.3	0.2	6.0
Visual, GLB	0.1	0.3	1.6	0.2 ms	2.9	35 ms	0.2	0.2	5.4
Visual, OBJ	0.1	0.3	1.6	0.2 ms	3.0	1.2	0.2	0.2	6.6

Board Repo: mwwhited/embeddedbakery Board: Analog Converter.kicad_pcb Folder circuits / HelperBoards / Controller / Analog Converter / Analog Converter Complexity 161 / 1000 (size 131, features 30) KESE features rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 17, 161, 0 Triangles, simulation 402,410 in 34 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 13 MB 257 MB STEP 59 MB 304 MB STL 20 MB 264 MB OBJ 40 MB 310 MB Visual GLB 7.9 MB 278 MB OBJ 23 MB 280 MB

1703. Wave Form Generator Amplifier

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.4	0.5 ms	1.9	91 ms	0.3	0.3	5.8
Simulation, STEP	0.2	0.5	2.3	0.4 ms	1.8	1.8	0.3	0.2	7.2
Simulation, STL	0.2	0.4	2.5	0.2 ms	1.8	0.1	0.4	0.2	5.6
Simulation, OBJ	0.3	0.4	2.3	0.2 ms	1.8	3.4	0.3	0.3	8.9
Visual, GLB	0.2	0.4	2.4	0.3 ms	4.7	52 ms	0.4	0.2	8.5
Visual, OBJ	0.2	0.4	2.3	0.4 ms	4.6	1.9	0.4	0.2	10.0

Board Repo: mwwhited/embeddedbakery Board: Wave Form Generator Amplifier.kicad_pcb Folder circuits / HelperBoards / Wave Form Generator Amplifier Complexity 169 / 1000 (size 139, features 30) KESE features rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 22, 223, 0 Triangles, simulation 532,854 in 33 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 18 MB 330 MB STEP 86 MB 354 MB STL 27 MB 344 MB OBJ 53 MB 393 MB Visual GLB 11 MB 355 MB OBJ 32 MB 354 MB

1704. MyIOShield

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	2.1	0.5 ms	1.3	81 ms	0.2	0.2	4.4
Simulation, STEP	0.1	0.4	2.0	0.4 ms	1.3	1.5	0.3	0.2	5.8
Simulation, STL	0.1	0.4	2.0	0.6 ms	1.3	0.1	0.3	0.2	4.5
Simulation, OBJ	0.1	0.4	2.1	0.4 ms	1.3	2.2	0.2	0.2	6.6
Visual, GLB	0.1	0.3	2.0	0.4 ms	2.7	33 ms	0.4	0.2	5.8
Visual, OBJ	0.1	0.3	2.1	0.4 ms	2.5	1.2	0.4	0.2	6.9

Board Repo: mwwhited/embeddedbakery Board: MyIOShield.kicad_pcb Folder circuits / MyIOShield Complexity 52 / 1000 (size 52, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 24, 0, 0 Triangles, simulation 442,126 in 47 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 260 MB STEP 58 MB 306 MB STL 22 MB 260 MB OBJ 45 MB 352 MB Visual GLB 7.8 MB 292 MB OBJ 23 MB 315 MB

1705. 16bit Banked Switches

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	2.6	0.3 ms	1.7	76 ms	0.2	0.2	5.2
Simulation, STEP	0.1	0.4	2.3	0.3 ms	1.5	1.4	0.2	0.2	6.2
Simulation, STL	0.1	0.4	2.4	0.5 ms	1.5	95 ms	0.2	0.2	5.0
Simulation, OBJ	0.1	0.4	2.4	0.3 ms	1.6	2.3	0.2	0.2	7.3
Visual, GLB	0.2	0.4	2.4	0.3 ms	2.6	32 ms	0.3	0.2	6.1
Visual, OBJ	0.2	0.4	2.3	0.5 ms	2.5	1.1	0.3	0.2	7.1

Board Repo: mwwhited/embeddedbakery Board: 16bit Banked Switches.kicad_pcb Folder circuits / Pmod16bitBanked Complexity 147 / 1000 (size 137, features 10) KESE features rounded, trapezoid or chamfered pads Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 24, 182, 0 Triangles, simulation 448,056 in 40 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 16 MB 266 MB STEP 70 MB 310 MB STL 22 MB 287 MB OBJ 46 MB 362 MB Visual GLB 7.7 MB 267 MB OBJ 23 MB 278 MB

1706. SimpleClock

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.8	0.3 ms	1.6	63 ms	0.2	0.2	4.3
Simulation, STEP	0.1	0.3	1.8	0.6 ms	1.6	1.4	0.2	0.2	5.7
Simulation, STL	0.1	0.4	1.7	0.4 ms	1.6	0.1	0.2	0.2	4.3
Simulation, OBJ	0.1	0.3	1.7	0.5 ms	1.6	1.9	0.2	0.3	6.2
Visual, GLB	0.2	0.4	1.8	0.4 ms	2.2	31 ms	0.3	0.2	5.0
Visual, OBJ	0.1	0.3	1.7	0.3 ms	2.2	1.0	0.3	0.2	5.8

Board Repo: mwwhited/embeddedbakery Board: SimpleClock.kicad_pcb Folder circuits / SimpleClock / SimpleClock Complexity 54 / 1000 (size 54, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 31, 0, 0 Triangles, simulation 454,624 in 46 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 264 MB STEP 46 MB 309 MB STL 23 MB 264 MB OBJ 45 MB 351 MB Visual GLB 8.4 MB 305 MB OBJ 25 MB 304 MB

1707. LimeSDR_Sony

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	5.3	14.9	2 ms	18.5	0.8	1.9	0.3	42.5
Simulation, STEP	0.8	5.5	14.8	2 ms	18.5	9.5	1.9	0.3	51.4
Simulation, STL	1.0	5.4	14.4	1 ms	18.2	1.9	1.9	0.3	43.1
Simulation, OBJ	0.8	5.2	14.0	1 ms	18.2	24.0	2.0	0.3	64.5
Visual, GLB	0.8	5.3	14.0	0.6 ms	38.0	0.5	5.4	0.3	64.2
Visual, OBJ	0.8	5.4	14.5	2 ms	38.9	14.0	5.6	0.3	79.5

Board Repo: myriadrf/front-end-modules Board: LimeSDR_Sony.kicad_pcb Folder LimeSDR_PA_LNA / hardware / v1r3 / KiCAD Complexity 319 / 1000 (size 274, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 6 File format KiCad 4 (4) Parts, tracks, vias 244, 2,265, 237 Triangles, simulation 4,502,856 in 159 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 155 MB 1.2 GB STEP 559 MB 1.7 GB STL 225 MB 1.2 GB OBJ 487 MB 2.9 GB Visual GLB 89 MB 1.5 GB OBJ 282 MB 1.9 GB

1708. lc-b3-mpa

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	95 ms	0.2	0.9	0.1 ms	1.1	34 ms	0.1	0.2	2.5
Simulation, STEP	97 ms	0.2	0.8	0.2 ms	1.0	1.1	0.1	0.2	3.5
Simulation, STL	0.1	0.2	0.9	0.1 ms	1.1	57 ms	0.1	0.3	2.7
Simulation, OBJ	96 ms	0.1	0.8	0.1 ms	1.0	1.0	0.1	0.2	3.4
Visual, GLB	0.1	0.2	0.9	0.1 ms	1.7	17 ms	97 ms	0.2	3.1
Visual, OBJ	97 ms	0.2	0.9	0.1 ms	1.6	0.4	81 ms	0.2	3.3

Board Repo: myriadrf/lc-b3-mpa Board: lc-b3-mpa.kicad_pcb Folder hardware / 0v1 Complexity 219 / 1000 (size 149, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20201220) Parts, tracks, vias 15, 8, 57 Triangles, simulation 213,914 in 19 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.0 MB 210 MB STEP 22 MB 236 MB STL 11 MB 214 MB OBJ 21 MB 232 MB Visual GLB 2.8 MB 168 MB OBJ 7.9 MB 168 MB

1709. lc-b3-mpa

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	88 ms	0.1	0.8	0.1 ms	1.0	32 ms	0.1	0.2	2.4
Simulation, STEP	96 ms	0.2	0.8	0.1 ms	1.0	0.9	92 ms	0.2	3.3
Simulation, STL	96 ms	0.1	0.8	0.1 ms	0.9	57 ms	0.1	0.2	2.4
Simulation, OBJ	95 ms	0.1	0.8	0.1 ms	1.0	0.8	97 ms	0.3	3.1
Visual, GLB	97 ms	0.2	0.8	0.2 ms	1.5	13 ms	84 ms	0.2	2.8
Visual, OBJ	90 ms	0.1	0.8	0.1 ms	1.6	0.3	88 ms	0.2	3.2

Board Repo: myriadrf/lc-b3-mpa Board: lc-b3-mpa.kicad_pcb Folder hardware / 1v0 Complexity 209 / 1000 (size 149, features 60) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 15, 10, 57 Triangles, simulation 217,420 in 19 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.1 MB 219 MB STEP 23 MB 239 MB STL 11 MB 217 MB OBJ 21 MB 233 MB Visual GLB 2.9 MB 170 MB OBJ 8.2 MB 168 MB

1710. CSAD10

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.6	2.0	0.5 ms	2.6	88 ms	0.3	0.2	6.1
Simulation, STEP	0.3	0.6	2.1	0.3 ms	2.9	2.5	0.3	0.2	8.9
Simulation, STL	0.3	0.6	2.1	0.2 ms	3.0	0.2	0.3	0.2	6.6
Simulation, OBJ	0.3	0.6	2.1	0.3 ms	2.7	3.1	0.3	0.2	9.2
Visual, GLB	0.3	0.6	2.3	0.3 ms	4.9	80 ms	0.5	0.2	9.0
Visual, OBJ	0.3	0.6	2.0	0.2 ms	4.5	2.5	0.7	0.2	10.8

Board Repo: myriadrf/lc-clock Board: CSAD10.kicad_pcb Folder csad10 Complexity 340 / 1000 (size 225, features 115) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 60, 440, 81 Triangles, simulation 595,804 in 67 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 20 MB 355 MB STEP 91 MB 415 MB STL 30 MB 357 MB OBJ 60 MB 415 MB Visual GLB 16 MB 424 MB OBJ 48 MB 480 MB

1711. CSAD2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	0.9	0.2 ms	1.2	42 ms	0.1	0.3	3.0
Simulation, STEP	0.2	0.3	0.8	0.2 ms	1.2	1.2	0.1	0.2	4.1
Simulation, STL	0.2	0.3	0.8	0.2 ms	1.2	74 ms	0.1	0.2	2.9
Simulation, OBJ	0.2	0.3	1.0	0.2 ms	1.2	1.6	0.2	0.2	4.6
Visual, GLB	0.2	0.3	0.9	0.2 ms	2.1	32 ms	0.3	0.2	3.9
Visual, OBJ	0.2	0.3	0.9	0.3 ms	2.2	1.1	0.2	0.2	5.0

Board Repo: myriadrf/lc-clock Board: CSAD2.kicad_pcb Folder csad2 Complexity 278 / 1000 (size 163, features 115) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 37, 121, 43 Triangles, simulation 293,046 in 44 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 10 MB 245 MB STEP 44 MB 284 MB STL 15 MB 242 MB OBJ 29 MB 261 MB Visual GLB 7.4 MB 258 MB OBJ 22 MB 252 MB

1712. B3LPD

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	0.6	0.1 ms	1.1	34 ms	86 ms	0.2	2.4
Simulation, STEP	0.1	0.3	0.6	0.2 ms	1.1	0.8	82 ms	0.2	3.2
Simulation, STL	0.1	0.3	0.6	0.2 ms	1.1	58 ms	89 ms	0.2	2.5
Simulation, OBJ	0.1	0.3	0.6	0.2 ms	1.0	1.2	89 ms	0.2	3.5
Visual, GLB	0.1	0.3	0.6	0.1 ms	1.5	21 ms	0.1	0.2	2.8
Visual, OBJ	0.1	0.3	0.6	0.2 ms	1.5	0.7	0.1	0.2	3.6

Board Repo: myriadrf/lc-filters Board: B3LPD.kicad_pcb Folder b3lpd Complexity 240 / 1000 (size 150, features 90) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 7, 22, 96 Triangles, simulation 214,242 in 20 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.2 MB 233 MB STEP 13 MB 246 MB STL 11 MB 233 MB OBJ 21 MB 233 MB Visual GLB 4.3 MB 192 MB OBJ 12 MB 191 MB

1713. LC_RFE-RevA1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	5.2	16.9	2 ms	16.4	0.7	1.6	0.3	42.2
Simulation, STEP	0.9	5.0	17.3	2 ms	17.1	8.5	1.8	0.4	51.0
Simulation, STL	1.1	5.4	17.4	2 ms	16.9	2.1	1.8	0.3	44.9
Simulation, OBJ	0.9	5.6	17.4	2 ms	17.5	22.7	1.7	0.4	66.2
Visual, GLB	0.9	5.6	17.1	2 ms	33.6	0.4	3.9	0.3	61.9
Visual, OBJ	0.9	5.2	16.5	1 ms	32.4	12.5	4.0	0.3	71.8

Board Repo: myriadrf/lc-rfe Board: LC_RFE-RevA1.kicad_pcb Folder revisions / LC_RFE-RevA1 Complexity 399 / 1000 (size 284, features 115) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 228, 1,247, 1,393 Triangles, simulation 4,623,948 in 206 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 154 MB 1.6 GB STEP 422 MB 1.9 GB STL 231 MB 1.7 GB OBJ 482 MB 3.0 GB Visual GLB 89 MB 1.6 GB OBJ 283 MB 1.9 GB

1714. LC_RFE-RevA2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.4	8.1	27.0	2 ms	31.8	1.2	2.5	0.4	72.6
Simulation, STEP	1.4	8.4	26.6	2 ms	29.6	10.7	2.2	0.3	79.2
Simulation, STL	1.2	8.0	25.8	3 ms	29.5	2.4	2.5	0.4	69.8
Simulation, OBJ	1.1	8.0	25.3	3 ms	30.3	32.2	2.6	0.4	99.9
Visual, GLB	1.3	8.1	26.0	3 ms	52.7	0.6	7.2	0.4	96.4
Visual, OBJ	1.3	7.9	26.1	2 ms	54.4	17.7	7.4	0.3	115.1

Board Repo: myriadrf/lc-rfe Board: LC_RFE-RevA2.kicad_pcb Folder revisions / LC_RFE-RevA2 Complexity 406 / 1000 (size 291, features 115) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 256, 1,307, 2,201 Triangles, simulation 6,245,326 in 210 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 208 MB 2.0 GB STEP 521 MB 2.7 GB STL 312 MB 2.0 GB OBJ 653 MB 3.9 GB Visual GLB 122 MB 2.1 GB OBJ 391 MB 2.5 GB

1715. LC-RFE-Mini-RevA1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	4.2	15.0	0.5 ms	14.4	0.5	1.7	0.3	37.0
Simulation, STEP	1.1	5.3	17.4	1.0 ms	15.0	6.7	1.6	0.4	47.5
Simulation, STL	0.8	4.6	14.8	1 ms	14.9	1.0	1.6	0.3	38.1
Simulation, OBJ	0.7	3.9	14.0	0.7 ms	13.8	17.4	1.3	0.3	51.3
Visual, GLB	0.7	3.7	14.0	1.0 ms	28.9	0.4	4.0	0.2	52.0
Visual, OBJ	0.8	4.0	14.1	0.9 ms	24.3	11.7	2.9	0.3	58.1

Board Repo: myriadrf/lc-rfe-mini Board: LC-RFE-Mini-RevA1.kicad_pcb Folder revisions / LC-RFE-Mini-RevA1 Complexity 370 / 1000 (size 255, features 115) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 98, 458, 910 Triangles, simulation 3,268,520 in 110 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 110 MB 1.3 GB STEP 319 MB 1.4 GB STL 163 MB 1.3 GB OBJ 339 MB 2.1 GB Visual GLB 64 MB 1.3 GB OBJ 199 MB 1.4 GB

1716. LC-RFE-Mini-RevA2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.5	6.1	0.3 ms	6.1	0.3	0.7	0.2	15.3
Simulation, STEP	0.4	1.4	6.3	0.2 ms	5.9	4.0	0.7	0.2	19.1
Simulation, STL	0.4	1.4	6.0	0.3 ms	5.8	0.5	0.7	0.2	15.0
Simulation, OBJ	0.4	1.5	5.9	0.3 ms	5.7	7.6	0.8	0.2	22.2
Visual, GLB	0.4	1.5	6.0	0.3 ms	11.7	0.2	1.2	0.2	21.3
Visual, OBJ	0.4	1.5	6.2	0.3 ms	11.5	4.6	1.6	0.2	26.1

Board Repo: myriadrf/lc-rfe-mini Board: LC-RFE-Mini-RevA2.kicad_pcb Folder revisions / LC-RFE-Mini-RevA2 Complexity 355 / 1000 (size 240, features 115) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 95, 396, 289 Triangles, simulation 1,923,076 in 108 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 65 MB 717 MB STEP 244 MB 821 MB STL 96 MB 835 MB OBJ 199 MB 1.3 GB Visual GLB 38 MB 764 MB OBJ 116 MB 866 MB

1717. Lime_RFE

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.4	20.3	84.9	4 ms	70.3	4.4	8.9	0.5	192.7
Simulation, STEP	3.4	19.9	83.0	2 ms	71.9	43.5	9.6	0.5	231.8
Simulation, STL	3.5	22.1	91.1	3 ms	74.9	7.9	10.0	0.6	210.0
Simulation, OBJ	4.0	20.9	84.9	3 ms	73.4	142.3	9.9	0.6	336.0
Visual, GLB	3.4	21.2	90.4	3 ms	215.7	1.5	14.3	0.5	346.9
Visual, OBJ	3.5	21.2	87.9	3 ms	221.3	58.0	14.8	0.5	407.3

Board Repo: myriadrf/LimeRFE Board: Lime_RFE.kicad_pcb Folder archived / 0v3 / hardware / KiCad Complexity 325 / 1000 (size 270, features 55) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 to 10th November 2026 Copper layers 6 File format KiCad 4 (4) Parts, tracks, vias 986, 8,840, 623 Triangles, simulation 18,078,138 in 810 parts Verifier PASS in all six runs Run again Simulation, OBJ: failed in the corpus run, run again with the memory cap raised from 11 GB to 14.5 GB, and passed

File type File size Peak memory used Simulation GLB 668 MB 4.5 GB STEP 2.6 GB 6.1 GB STL 904 MB 4.6 GB OBJ 2.1 GB 12 GB Visual GLB 320 MB 4.9 GB OBJ 1.0 GB 6.7 GB

1718. Lime_RFE_fab

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.7	18.2	73.3	3 ms	63.0	3.8	8.2	0.5	169.8
Simulation, STEP	2.6	17.6	73.0	3 ms	62.9	37.6	8.2	0.5	202.5
Simulation, STL	2.9	18.4	74.3	3 ms	64.9	7.8	8.4	0.5	177.3
Simulation, OBJ	4.4	24.9	93.2	3 ms	79.3	143.3	10.8	1.1	357.0
Visual, GLB	2.9	18.7	74.9	3 ms	188.2	1.5	16.8	0.4	303.4
Visual, OBJ	2.7	17.9	72.9	4 ms	201.1	48.2	16.9	0.5	360.2

Board Repo: myriadrf/LimeRFE Board: Lime_RFE_fab.kicad_pcb Folder archived / 0v3 / hardware / KiCad Complexity 325 / 1000 (size 270, features 55) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 to 10th November 2026 Copper layers 6 File format KiCad 4 (4) Parts, tracks, vias 986, 8,840, 623 Triangles, simulation 18,079,684 in 810 parts Verifier PASS in all six runs Run again Simulation, OBJ: failed in the corpus run, run again with the memory cap raised from 11 GB to 14.5 GB, and passed

File type File size Peak memory used Simulation GLB 668 MB 4.9 GB STEP 2.6 GB 5.8 GB STL 904 MB 4.8 GB OBJ 2.1 GB 12 GB Visual GLB 320 MB 4.9 GB OBJ 1.0 GB 6.4 GB

1719. Lime_RFE

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	4.4	9.2	1.4	1 ms	37 ms	2 ms	6 ms	0.3	15.3
Simulation, STEP	4.4	9.1	1.5	1 ms	36 ms	41 ms	7 ms	0.3	15.3
Simulation, STL	4.4	9.2	1.4	1 ms	37 ms	2 ms	6 ms	0.3	15.4
Simulation, OBJ	4.3	9.1	1.4	0.7 ms	38 ms	14 ms	6 ms	0.3	15.2
Visual, GLB	4.3	9.2	1.5	1 ms	93 ms	4 ms	12 ms	0.3	15.3
Visual, OBJ	4.6	9.3	1.5	1 ms	0.1	13 ms	15 ms	0.2	15.8

Board Repo: myriadrf/LimeRFE Board: Lime_RFE.kicad_pcb Folder archived / 1v0 / hardware / KiCAD Complexity 339 / 1000 (size 274, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 6 File format KiCad 4 (4) Parts, tracks, vias 1,278, 9,448, 585 Triangles, simulation 2,136 in 8 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 63 kB 478 MB STEP 381 kB 478 MB STL 107 kB 479 MB OBJ 216 kB 476 MB Visual GLB 75 kB 479 MB OBJ 194 kB 478 MB

1720. Lime_RFE

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	4.3	8.9	1.6	1 ms	31 ms	2 ms	5 ms	0.2	15.1
Simulation, STEP	4.1	9.2	1.7	1 ms	31 ms	34 ms	7 ms	0.3	15.3
Simulation, STL	4.6	9.5	1.7	2 ms	31 ms	2 ms	5 ms	0.3	16.1
Simulation, OBJ	4.2	8.8	1.6	2 ms	33 ms	14 ms	5 ms	0.3	15.0
Visual, GLB	4.2	9.4	1.6	2 ms	96 ms	2 ms	14 ms	0.3	15.5
Visual, OBJ	4.0	8.8	1.7	1 ms	95 ms	12 ms	12 ms	0.3	14.9

Board Repo: myriadrf/LimeRFE Board: Lime_RFE.kicad_pcb Folder archived / 1v2 / hardware / KiCAD Complexity 340 / 1000 (size 275, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 6 File format KiCad 4 (4) Parts, tracks, vias 1,295, 10,180, 591 Triangles, simulation 2,136 in 8 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 63 kB 542 MB STEP 381 kB 542 MB STL 107 kB 542 MB OBJ 216 kB 542 MB Visual GLB 75 kB 542 MB OBJ 194 kB 542 MB

1721. Lime_RFE

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.4	8.0	1.4	2 ms	27 ms	1 ms	6 ms	0.2	13.1
Simulation, STEP	3.5	7.7	1.3	2 ms	27 ms	49 ms	6 ms	0.3	12.9
Simulation, STL	3.4	7.4	1.3	1 ms	24 ms	1 ms	5 ms	0.3	12.3
Simulation, OBJ	3.3	7.5	1.4	2 ms	25 ms	8 ms	6 ms	0.3	12.5
Visual, GLB	3.4	7.6	1.2	1 ms	74 ms	2 ms	9 ms	0.3	12.7
Visual, OBJ	3.4	7.7	1.5	1 ms	83 ms	7 ms	9 ms	0.3	12.9

Board Repo: myriadrf/LimeRFE Board: Lime_RFE.kicad_pcb Folder hardware / 1v31 / KiCAD Complexity 341 / 1000 (size 276, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 6 File format KiCad 4 (4) Parts, tracks, vias 1,317, 10,728, 612 Triangles, simulation 1,736 in 8 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 51 kB 545 MB STEP 240 kB 546 MB STL 87 kB 544 MB OBJ 169 kB 548 MB Visual GLB 52 kB 545 MB OBJ 133 kB 545 MB

1722. FrontEnd_5G

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	23.3	57.8	171.2	5 ms	157.3	6.5	25.0	1.2	442.2
Simulation, STEP	25.1	60.0	185.7	4 ms	176.8	67.2	25.0	1.2	541.0
Simulation, STL	26.0	62.1	185.2	5 ms	177.1	17.1	24.2	1.1	492.8
Simulation, OBJ									exceeded 11 GB on a 16 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Visual, GLB	26.7	64.2	182.8	4 ms	397.2	3.0	28.0	0.9	702.8
Visual, OBJ	24.3	59.7	177.6	5 ms	404.0	88.9	29.9	1.0	785.3

Board Repo: myriadrf/LimeRFE-8001P Board: FrontEnd_5G.kicad_pcb Folder hardware / 1v0 / KiCAD Complexity 376 / 1000 (size 291, features 85) KESE features through vias, blind and buried vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 to 10th November 2026 Copper layers 6 File format KiCad 4 (4) Parts, tracks, vias 1,605, 23,739, 1,538 Triangles, simulation 30,808,402 in 1307 parts Verifier Simulation, OBJ: exceeded 11 GB on a 16 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Run again Visual, OBJ: failed in the corpus run, run again with the memory cap raised from 11 GB to 14.5 GB, and passed

File type File size Peak memory used Simulation GLB 1.0 GB 8.7 GB STEP 2.9 GB 10 GB STL 1.5 GB 8.6 GB OBJ – 11 GB Visual GLB 535 MB 8.9 GB OBJ 1.8 GB 11 GB

1723. FrontEnd_5G

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	5.7	54.4	150.5	4 ms	131.1	6.3	19.7	0.8	368.5
Simulation, STEP	5.9	54.3	149.9	4 ms	124.6	51.7	19.8	0.7	406.8
Simulation, STL	5.9	53.3	150.3	4 ms	128.2	13.6	18.8	0.7	370.8
Simulation, OBJ									exceeded 11 GB on a 16 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Visual, GLB	5.8	52.2	147.2	4 ms	351.3	2.4	26.8	0.5	586.1
Visual, OBJ	5.6	52.1	143.3	4 ms	352.7	74.3	25.1	0.6	653.5

Board Repo: myriadrf/LimeRFE-8001P Board: FrontEnd_5G.kicad_pcb Folder hardware / 1v1 / KiCAD Complexity 383 / 1000 (size 288, features 95) KESE features through vias, blind and buried vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 6 File format KiCad 4 (4) Parts, tracks, vias 1,461, 20,552, 1,349 Triangles, simulation 27,133,154 in 1073 parts Verifier Simulation, OBJ: exceeded 11 GB on a 16 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory

File type File size Peak memory used Simulation GLB 916 MB 7.3 GB STEP 2.5 GB 8.7 GB STL 1.4 GB 7.5 GB OBJ – 11 GB Visual GLB 462 MB 7.4 GB OBJ 1.5 GB 9.7 GB

1724. LimeSDR_Breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	0.6	0.1	0.1 ms	23 ms	2 ms	3 ms	0.2	1.4
Simulation, STEP	0.4	0.6	0.1	0.1 ms	25 ms	34 ms	3 ms	0.2	1.4
Simulation, STL	0.4	0.6	0.1	0.1 ms	23 ms	2 ms	4 ms	0.2	1.4
Simulation, OBJ	0.4	0.6	0.2	0.1 ms	25 ms	26 ms	4 ms	0.2	1.4
Visual, GLB	0.4	0.6	0.1	0.1 ms	57 ms	3 ms	21 ms	0.2	1.4
Visual, OBJ	0.4	0.6	0.1	0.1 ms	57 ms	24 ms	13 ms	0.2	1.4

Board Repo: myriadrf/LimeSDR_GPIO_Board Board: LimeSDR_Breakout.kicad_pcb Folder hardware / 0402_Variant / CAD2 Complexity 244 / 1000 (size 199, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 90, 2,265, 397 Triangles, simulation 5,712 in 3 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 165 kB 90 MB STEP 74 kB 92 MB STL 286 kB 90 MB OBJ 542 kB 90 MB Visual GLB 212 kB 90 MB OBJ 545 kB 90 MB

1725. LMS6002-Pmod

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	3.8	0.5 ms	3.4	99 ms	0.4	0.2	8.7
Simulation, STEP	0.2	0.7	3.8	0.4 ms	3.6	2.2	0.4	0.2	11.1
Simulation, STL	0.3	0.7	4.1	0.3 ms	3.3	0.2	0.4	0.2	9.2
Simulation, OBJ	0.2	0.7	3.8	0.5 ms	3.6	3.6	0.4	0.2	12.5
Visual, GLB	0.2	0.6	4.3	0.4 ms	7.1	90 ms	0.7	0.2	13.2
Visual, OBJ	0.2	0.6	3.8	0.3 ms	7.1	2.8	0.7	0.2	15.4

Board Repo: myriadrf/LMS6002-Pmod Board: LMS6002-Pmod.kicad_pcb Folder board / KiCad Complexity 270 / 1000 (size 215, features 55) KESE features through vias, slotted holes, drill offsets, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 55, 891, 65 Triangles, simulation 724,500 in 95 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 26 MB 370 MB STEP 139 MB 450 MB STL 36 MB 391 MB OBJ 77 MB 545 MB Visual GLB 20 MB 512 MB OBJ 60 MB 487 MB

1726. LMS8001_Companion

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	1.3	0.4	0.1 ms	11 ms	1 ms	3 ms	0.3	2.8
Simulation, STEP	0.9	1.1	0.3	0.0 ms	10 ms	6 ms	3 ms	0.2	2.6
Simulation, STL	0.9	1.2	0.4	0.1 ms	18 ms	2 ms	3 ms	0.2	2.7
Simulation, OBJ	0.8	1.1	0.3	0.1 ms	11 ms	1 ms	3 ms	0.3	2.6
Visual, GLB	0.9	1.2	0.3	0.1 ms	30 ms	2 ms	13 ms	0.2	2.7
Visual, OBJ	1.0	1.2	0.3	0.0 ms	31 ms	1 ms	12 ms	0.3	2.8

Board Repo: myriadrf/LMS8001-Companion Board: LMS8001_Companion.kicad_pcb Folder hardware / 2v1 / KiCAD Complexity 320 / 1000 (size 265, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 3 (3) Parts, tracks, vias 351, 2,038, 174 Triangles, simulation 52 in 3 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.6 kB 136 MB STEP 23 kB 136 MB STL 2.9 kB 136 MB OBJ 6.2 kB 136 MB Visual GLB 5.0 kB 136 MB OBJ 5.2 kB 136 MB

1727. LMS8001_Companion

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	1.5	0.4	0.0 ms	12 ms	1 ms	3 ms	0.3	3.1
Simulation, STEP	1.1	1.5	0.4	0.1 ms	13 ms	9 ms	3 ms	0.2	3.3
Simulation, STL	1.0	1.6	0.4	0.1 ms	11 ms	1 ms	2 ms	0.3	3.2
Simulation, OBJ	1.1	1.4	0.4	0.1 ms	13 ms	2 ms	3 ms	0.2	3.1
Visual, GLB	1.0	1.4	0.4	0.0 ms	24 ms	1 ms	12 ms	0.2	3.0
Visual, OBJ	1.0	1.4	0.4	0.1 ms	31 ms	2 ms	14 ms	0.2	3.0

Board Repo: myriadrf/LMS8001-Companion Board: LMS8001_Companion.kicad_pcb Folder hardware / 3v1 / KiCAD Complexity 332 / 1000 (size 267, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 351, 2,332, 176 Triangles, simulation 52 in 3 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.6 kB 139 MB STEP 23 kB 139 MB STL 2.9 kB 139 MB OBJ 6.2 kB 139 MB Visual GLB 5.0 kB 139 MB OBJ 5.2 kB 139 MB

1728. LMS8001_Companion

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.2	1.5	0.4	0.0 ms	12 ms	1 ms	3 ms	0.2	3.2
Simulation, STEP	1.2	1.5	0.4	0.0 ms	11 ms	8 ms	5 ms	0.3	3.4
Simulation, STL	1.0	1.5	0.5	0.0 ms	12 ms	0.9 ms	3 ms	0.3	3.4
Simulation, OBJ	1.1	1.6	0.4	0.0 ms	11 ms	1 ms	3 ms	0.2	3.3
Visual, GLB	1.1	1.5	0.4	0.0 ms	31 ms	2 ms	13 ms	0.3	3.3
Visual, OBJ	1.1	1.6	0.4	0.0 ms	26 ms	1 ms	11 ms	0.3	3.5

Board Repo: myriadrf/LMS8001-Companion Board: LMS8001_Companion.kicad_pcb Folder hardware / 3v2 / KiCAD Complexity 333 / 1000 (size 268, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 352, 2,467, 192 Triangles, simulation 52 in 3 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.6 kB 141 MB STEP 23 kB 141 MB STL 2.9 kB 141 MB OBJ 6.2 kB 141 MB Visual GLB 5.0 kB 142 MB OBJ 5.2 kB 142 MB

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