Corpus Testing 15

Corpus Page 15

Part 15 of 29 of Corpus Testing: boards 1,513 to 1,620, six runs each, one file format a run, as Corpus Testing describes.

1513. attenuator

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.4	0.2 ms	1.1	54 ms	0.2	0.2	3.5
Simulation, STEP	0.1	0.4	1.5	0.2 ms	1.1	1.2	0.2	0.2	4.7
Simulation, STL	0.2	0.4	1.5	0.2 ms	1.1	81 ms	0.2	0.2	3.7
Simulation, OBJ	0.1	0.4	1.5	0.2 ms	1.1	1.9	0.2	0.2	5.5
Visual, GLB	0.1	0.4	1.4	0.3 ms	2.8	34 ms	0.3	0.2	5.3
Visual, OBJ	0.2	0.4	1.4	0.3 ms	2.7	1.2	0.2	0.2	6.4

Board Repo: loxodes/vna Board: attenuator.kicad_pcb Folder breakouts / attenuator Complexity 204 / 1000 (size 169, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 36, 232, 41 Triangles, simulation 357,776 in 47 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 13 MB 247 MB STEP 47 MB 264 MB STL 18 MB 236 MB OBJ 37 MB 290 MB Visual GLB 7.9 MB 248 MB OBJ 23 MB 240 MB

1514. balun

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	94 ms	0.1	0.6	0.1 ms	0.6	24 ms	77 ms	0.3	1.8
Simulation, STEP	98 ms	0.1	0.6	0.1 ms	0.7	0.9	84 ms	0.2	2.8
Simulation, STL	87 ms	0.1	0.6	0.1 ms	0.7	35 ms	80 ms	0.2	1.8
Simulation, OBJ	0.1	0.1	0.7	0.1 ms	0.6	0.8	78 ms	0.2	2.6
Visual, GLB	83 ms	90 ms	0.6	0.2 ms	1.3	14 ms	0.1	0.2	2.4
Visual, OBJ	88 ms	93 ms	0.6	0.1 ms	1.3	0.4	0.1	0.2	2.8

Board Repo: loxodes/vna Board: balun.kicad_pcb Folder breakouts / balun Complexity 121 / 1000 (size 81, features 40) KESE features rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 7, 12, 0 Triangles, simulation 133,858 in 18 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.7 MB 196 MB STEP 24 MB 201 MB STL 6.7 MB 199 MB OBJ 13 MB 188 MB Visual GLB 2.8 MB 157 MB OBJ 7.7 MB 158 MB

1515. bias_controller

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.2	4.2	0.5 ms	4.8	0.2	0.4	0.3	11.4
Simulation, STEP	0.4	1.2	4.4	0.4 ms	4.6	4.0	0.4	0.2	15.3
Simulation, STL	0.5	1.2	4.5	0.4 ms	4.9	0.5	0.4	0.3	12.2
Simulation, OBJ	0.5	1.2	4.3	0.4 ms	5.1	4.4	0.3	0.3	16.1
Visual, GLB	0.5	1.1	4.3	0.5 ms	9.7	0.1	1.0	0.2	17.1
Visual, OBJ	0.5	1.1	4.1	0.4 ms	9.6	3.8	1.4	0.2	20.8

Board Repo: loxodes/vna Board: bias_controller.kicad_pcb Folder breakouts / bias_controller / bias_controller Complexity 134 / 1000 (size 114, features 20) KESE features slotted holes, rounded, trapezoid or chamfered pads Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20231212) Parts, tracks, vias 201, 0, 0 Triangles, simulation 939,990 in 182 parts Note mostly unrouted Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 32 MB 544 MB STEP 180 MB 637 MB STL 47 MB 519 MB OBJ 96 MB 642 MB Visual GLB 27 MB 603 MB OBJ 81 MB 636 MB

1516. boosterpack

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	3.8	0.3 ms	2.5	0.1	0.4	0.2	7.8
Simulation, STEP	0.2	0.6	3.7	0.3 ms	2.5	2.2	0.4	0.2	9.7
Simulation, STL	0.2	0.6	3.8	0.3 ms	2.4	0.2	0.4	0.3	7.8
Simulation, OBJ	0.2	0.6	3.8	0.2 ms	2.5	4.1	0.4	0.2	11.7
Visual, GLB	0.2	0.6	3.8	0.5 ms	5.1	66 ms	0.5	0.2	10.4
Visual, OBJ	0.2	0.6	3.8	0.3 ms	5.0	2.2	0.6	0.2	12.6

Board Repo: loxodes/vna Board: boosterpack.kicad_pcb Folder breakouts / boosterpack Complexity 177 / 1000 (size 142, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 24, 227, 7 Triangles, simulation 696,784 in 52 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 24 MB 365 MB STEP 117 MB 387 MB STL 35 MB 336 MB OBJ 71 MB 503 MB Visual GLB 14 MB 386 MB OBJ 41 MB 384 MB

1517. clk_lo_buffer

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.1	0.2 ms	1.0	30 ms	0.1	0.2	2.9
Simulation, STEP	0.1	0.4	1.1	0.2 ms	0.9	1.1	0.1	0.2	4.0
Simulation, STL	0.1	0.3	1.1	0.2 ms	0.9	58 ms	88 ms	0.2	2.8
Simulation, OBJ	0.1	0.3	1.0	0.2 ms	1.0	1.1	84 ms	0.2	3.9
Visual, GLB	0.1	0.3	1.1	0.3 ms	2.3	36 ms	0.3	0.2	4.4
Visual, OBJ	0.1	0.3	1.1	0.1 ms	2.0	0.9	0.2	0.2	4.8

Board Repo: loxodes/vna Board: clk_lo_buffer.kicad_pcb Folder breakouts / clk_lo_buffer Complexity 214 / 1000 (size 159, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 44, 318, 48 Triangles, simulation 214,972 in 36 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.9 MB 239 MB STEP 31 MB 258 MB STL 11 MB 233 MB OBJ 22 MB 237 MB Visual GLB 6.6 MB 224 MB OBJ 19 MB 225 MB

1518. coupler_test

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.5	2.8	0.2 ms	2.2	84 ms	0.3	0.2	6.2
Simulation, STEP	0.1	0.4	2.6	0.3 ms	2.3	1.6	0.3	0.2	7.6
Simulation, STL	0.1	0.5	2.8	0.4 ms	2.2	0.1	0.3	0.2	6.2
Simulation, OBJ	0.1	0.5	2.6	0.4 ms	2.2	3.0	0.3	0.2	8.9
Visual, GLB	0.1	0.5	2.7	0.3 ms	3.1	30 ms	0.2	0.2	6.8
Visual, OBJ	0.1	0.4	2.8	0.6 ms	3.2	1.1	0.2	0.2	8.1

Board Repo: loxodes/vna Board: coupler_test.kicad_pcb Folder breakouts / coupler_test Complexity 120 / 1000 (size 90, features 30) KESE features rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 4, 10, 0 Triangles, simulation 592,560 in 19 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 20 MB 354 MB STEP 60 MB 389 MB STL 30 MB 345 MB OBJ 58 MB 409 MB Visual GLB 7.2 MB 296 MB OBJ 21 MB 290 MB

1519. cpw_test

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	62 ms	46 ms	0.2	0.1 ms	0.3	8 ms	29 ms	0.2	0.8
Simulation, STEP	67 ms	55 ms	0.2	0.1 ms	0.3	0.2	32 ms	0.2	1.0
Simulation, STL	71 ms	54 ms	0.2	0.1 ms	0.3	13 ms	29 ms	0.2	0.8
Simulation, OBJ	71 ms	54 ms	0.2	0.1 ms	0.3	0.2	32 ms	0.2	1.0
Visual, GLB	71 ms	60 ms	0.2	0.1 ms	0.5	5 ms	43 ms	0.2	1.0
Visual, OBJ	74 ms	50 ms	0.2	0.2 ms	0.5	97 ms	41 ms	0.2	1.1

Board Repo: loxodes/vna Board: cpw_test.kicad_pcb Folder breakouts / cpw_test Complexity 78 / 1000 (size 68, features 10) KESE features rounded, trapezoid or chamfered pads Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 2, 3, 0 Triangles, simulation 40,844 in 14 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 1.3 MB 65 MB STEP 4.1 MB 69 MB STL 2.0 MB 66 MB OBJ 3.7 MB 74 MB Visual GLB 731 kB 95 MB OBJ 2.0 MB 94 MB

1520. crystal_filter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	91 ms	96 ms	0.4	0.1 ms	0.5	17 ms	51 ms	0.2	1.4
Simulation, STEP	81 ms	0.1	0.5	0.2 ms	0.5	0.7	53 ms	0.2	2.1
Simulation, STL	0.1	96 ms	0.4	0.1 ms	0.5	23 ms	57 ms	0.2	1.5
Simulation, OBJ	80 ms	0.1	0.4	0.1 ms	0.5	0.6	63 ms	0.2	2.0
Visual, GLB	84 ms	0.1	0.4	0.1 ms	1.1	11 ms	77 ms	0.2	2.0
Visual, OBJ	86 ms	0.1	0.5	0.1 ms	1.0	0.3	67 ms	0.2	2.3

Board Repo: loxodes/vna Board: crystal_filter.kicad_pcb Folder breakouts / crystal_filter Complexity 146 / 1000 (size 111, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 9, 31, 12 Triangles, simulation 99,888 in 15 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.6 MB 178 MB STEP 15 MB 185 MB STL 5.0 MB 179 MB OBJ 9.8 MB 181 MB Visual GLB 2.2 MB 157 MB OBJ 6.1 MB 158 MB

1521. demod_breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.6	0.4 ms	1.8	97 ms	0.3	0.2	5.8
Simulation, STEP	0.2	0.7	2.6	0.3 ms	1.9	1.7	0.3	0.2	7.6
Simulation, STL	0.2	0.6	2.7	0.3 ms	1.9	0.2	0.3	0.2	6.0
Simulation, OBJ	0.2	0.6	2.5	0.3 ms	1.9	3.3	0.3	0.2	9.1
Visual, GLB	0.2	0.7	2.6	0.3 ms	4.5	60 ms	0.5	0.2	8.8
Visual, OBJ	0.2	0.6	2.7	0.3 ms	4.4	2.1	0.5	0.2	10.8

Board Repo: loxodes/vna Board: demod_breakout.kicad_pcb Folder breakouts / demod_breakout Complexity 220 / 1000 (size 185, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 67, 417, 72 Triangles, simulation 649,436 in 62 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 23 MB 330 MB STEP 85 MB 374 MB STL 32 MB 340 MB OBJ 67 MB 482 MB Visual GLB 14 MB 371 MB OBJ 41 MB 371 MB

1522. filter_bank

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	1.5	0.2 ms	1.2	69 ms	0.2	0.2	3.7
Simulation, STEP	0.2	0.4	1.7	0.3 ms	1.2	1.2	0.2	0.2	5.1
Simulation, STL	0.1	0.4	1.5	0.3 ms	1.3	0.1	0.2	0.2	4.0
Simulation, OBJ	0.2	0.4	1.5	0.2 ms	1.2	1.9	0.2	0.2	5.5
Visual, GLB	0.2	0.4	1.5	0.3 ms	3.0	36 ms	0.4	0.3	5.7
Visual, OBJ	0.1	0.4	1.5	0.2 ms	3.2	1.3	0.3	0.2	7.0

Board Repo: loxodes/vna Board: filter_bank.kicad_pcb Folder breakouts / filter_breakout Complexity 210 / 1000 (size 175, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 36, 361, 53 Triangles, simulation 321,342 in 56 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 237 MB STEP 40 MB 260 MB STL 16 MB 253 MB OBJ 33 MB 269 MB Visual GLB 7.3 MB 235 MB OBJ 21 MB 237 MB

1523. trl_thru

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	91 ms	0.3	0.8	0.2 ms	0.9	39 ms	0.1	0.2	2.4
Simulation, STEP	96 ms	0.3	0.7	0.1 ms	0.8	0.9	0.1	0.2	3.2
Simulation, STL	92 ms	0.3	0.8	0.1 ms	0.9	70 ms	0.1	0.3	2.5
Simulation, OBJ	98 ms	0.3	0.8	0.1 ms	0.9	1.1	0.1	0.2	3.4
Visual, GLB	0.1	0.3	0.9	0.1 ms	1.5	19 ms	0.1	0.2	3.1
Visual, OBJ	93 ms	0.3	0.8	0.1 ms	1.6	0.6	0.1	0.2	3.6

Board Repo: loxodes/vna Board: trl_thru.kicad_pcb Folder breakouts / hmc576_breakout Complexity 185 / 1000 (size 140, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 10, 55, 27 Triangles, simulation 254,354 in 18 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.6 MB 236 MB STEP 27 MB 244 MB STL 13 MB 254 MB OBJ 25 MB 229 MB Visual GLB 4.1 MB 184 MB OBJ 12 MB 184 MB

1524. hyperram_3p3v

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	84 ms	0.3	1.3	0.2 ms	1.1	51 ms	0.2	0.2	3.2
Simulation, STEP	92 ms	0.3	1.3	0.2 ms	1.0	1.0	0.2	0.2	4.1
Simulation, STL	0.1	0.3	1.3	0.2 ms	1.1	81 ms	0.2	0.2	3.2
Simulation, OBJ	0.1	0.3	1.2	0.2 ms	1.0	1.5	0.2	0.2	4.6
Visual, GLB	91 ms	0.3	1.3	0.2 ms	1.9	24 ms	0.2	0.2	4.0
Visual, OBJ	96 ms	0.3	1.2	0.5 ms	1.8	0.6	0.1	0.2	4.3

Board Repo: loxodes/vna Board: hyperram_3p3v.kicad_pcb Folder breakouts / hyperram / hyperram_3p3v Complexity 184 / 1000 (size 139, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 6, 129, 16 Triangles, simulation 371,994 in 27 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 13 MB 245 MB STEP 48 MB 263 MB STL 19 MB 246 MB OBJ 37 MB 289 MB Visual GLB 5.4 MB 225 MB OBJ 16 MB 224 MB

1525. launchpad_synthcontrol

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	2.5	0.4 ms	1.8	77 ms	0.2	0.2	5.4
Simulation, STEP	0.1	0.5	2.4	0.6 ms	1.8	1.7	0.2	0.3	6.9
Simulation, STL	0.1	0.4	2.5	0.4 ms	1.8	0.2	0.3	0.3	5.6
Simulation, OBJ	0.1	0.5	2.6	0.4 ms	1.9	2.7	0.3	0.2	8.2
Visual, GLB	0.1	0.4	2.5	0.4 ms	3.7	60 ms	0.5	0.2	7.5
Visual, OBJ	0.1	0.4	2.6	0.4 ms	3.7	1.5	0.4	0.2	8.9

Board Repo: loxodes/vna Board: launchpad_synthcontrol.kicad_pcb Folder breakouts / launchpad_synthcontrol Complexity 147 / 1000 (size 132, features 15) KESE features through vias Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 2, 308, 84 Triangles, simulation 603,278 in 50 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 21 MB 306 MB STEP 92 MB 354 MB STL 30 MB 309 MB OBJ 61 MB 435 MB Visual GLB 12 MB 342 MB OBJ 35 MB 345 MB

1526. maam_011109

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.0	0.1 ms	1.0	45 ms	0.2	0.2	2.9
Simulation, STEP	0.1	0.3	1.1	0.1 ms	1.0	1.1	0.1	0.2	3.9
Simulation, STL	0.1	0.3	1.2	0.1 ms	1.0	68 ms	0.2	0.2	3.0
Simulation, OBJ	0.1	0.3	1.1	0.1 ms	1.0	1.6	0.2	0.2	4.4
Visual, GLB	0.1	0.3	1.1	0.1 ms	1.9	26 ms	0.2	0.3	3.8
Visual, OBJ	97 ms	0.3	1.0	0.2 ms	1.7	0.6	0.1	0.2	4.0

Board Repo: loxodes/vna Board: maam_011109.kicad_pcb Folder breakouts / maam_011109 / maam_011109 Complexity 188 / 1000 (size 143, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 8, 51, 47 Triangles, simulation 316,726 in 23 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 247 MB STEP 31 MB 265 MB STL 16 MB 268 MB OBJ 31 MB 271 MB Visual GLB 4.4 MB 210 MB OBJ 12 MB 214 MB

1527. maam_011109_bias

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	1.7	0.3 ms	1.4	61 ms	0.2	0.3	4.6
Simulation, STEP	0.2	0.7	1.8	0.2 ms	1.3	1.3	0.2	0.2	5.7
Simulation, STL	0.2	0.7	1.7	0.3 ms	1.3	0.1	0.2	0.2	4.4
Simulation, OBJ	0.2	0.7	1.8	0.4 ms	1.3	1.9	0.2	0.3	6.3
Visual, GLB	0.2	0.7	1.8	0.2 ms	3.5	47 ms	0.4	0.2	6.8
Visual, OBJ	0.2	0.7	1.8	0.3 ms	3.3	1.2	0.3	0.3	7.8

Board Repo: loxodes/vna Board: maam_011109_bias.kicad_pcb Folder breakouts / maam_011109_bias Complexity 202 / 1000 (size 157, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 48, 287, 36 Triangles, simulation 368,514 in 38 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 13 MB 279 MB STEP 63 MB 305 MB STL 18 MB 288 MB OBJ 38 MB 315 MB Visual GLB 9.6 MB 274 MB OBJ 28 MB 281 MB

1528. mixer_breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.2	0.2 ms	1.0	52 ms	0.2	0.2	3.1
Simulation, STEP	0.1	0.3	1.2	0.1 ms	1.0	1.1	0.1	0.2	4.1
Simulation, STL	0.1	0.3	1.2	0.1 ms	1.0	68 ms	0.1	0.2	3.0
Simulation, OBJ	0.1	0.3	1.3	0.2 ms	1.0	1.5	0.1	0.2	4.5
Visual, GLB	0.1	0.3	1.2	0.2 ms	2.0	23 ms	0.1	0.3	4.0
Visual, OBJ	0.1	0.3	1.2	0.2 ms	2.0	0.8	0.2	0.2	4.7

Board Repo: loxodes/vna Board: mixer_breakout.kicad_pcb Folder breakouts / mixer_breakout Complexity 170 / 1000 (size 135, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 11, 88, 2 Triangles, simulation 306,878 in 24 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 10 MB 244 MB STEP 35 MB 267 MB STL 15 MB 242 MB OBJ 31 MB 253 MB Visual GLB 5.3 MB 211 MB OBJ 15 MB 214 MB

1529. pe42520_breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.5	2.1	0.2 ms	2.2	0.1	0.3	0.2	5.6
Simulation, STEP	0.1	0.5	2.1	0.2 ms	2.3	1.4	0.3	0.2	6.8
Simulation, STL	0.1	0.5	2.1	0.2 ms	2.2	0.1	0.3	0.2	5.6
Simulation, OBJ	0.1	0.6	2.2	0.2 ms	2.3	3.0	0.3	0.2	8.8
Visual, GLB	0.1	0.5	1.9	0.2 ms	4.8	43 ms	0.3	0.2	7.9
Visual, OBJ	0.1	0.6	2.3	0.2 ms	4.6	1.3	0.4	0.2	9.4

Board Repo: loxodes/vna Board: pe42520_breakout.kicad_pcb Folder breakouts / pe42540_breakout Complexity 210 / 1000 (size 190, features 20) KESE features filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 19, 83, 0 Triangles, simulation 614,274 in 30 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 21 MB 344 MB STEP 46 MB 413 MB STL 31 MB 348 MB OBJ 61 MB 450 MB Visual GLB 9.2 MB 314 MB OBJ 27 MB 315 MB

1530. pe42543_breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.5	1.6	0.2 ms	1.7	59 ms	0.2	0.2	4.3
Simulation, STEP	0.2	0.6	1.6	0.2 ms	1.6	1.2	0.2	0.2	5.6
Simulation, STL	0.2	0.5	1.6	0.2 ms	1.6	0.1	0.2	0.2	4.3
Simulation, OBJ	0.1	0.5	1.7	0.2 ms	1.5	2.0	0.2	0.2	6.2
Visual, GLB	0.1	0.4	1.6	0.3 ms	2.4	29 ms	0.2	0.2	4.9
Visual, OBJ	0.1	0.5	1.7	0.2 ms	2.4	0.8	0.2	0.2	5.8

Board Repo: loxodes/vna Board: pe42543_breakout.kicad_pcb Folder breakouts / pe42543_breakout Complexity 197 / 1000 (size 152, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 21, 106, 23 Triangles, simulation 427,902 in 35 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 279 MB STEP 45 MB 315 MB STL 21 MB 276 MB OBJ 43 MB 345 MB Visual GLB 6.0 MB 240 MB OBJ 18 MB 238 MB

1531. powerdet_breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.8	0.2 ms	0.7	29 ms	91 ms	0.2	2.1
Simulation, STEP	0.1	0.2	0.7	0.2 ms	0.7	0.9	93 ms	0.2	2.9
Simulation, STL	0.1	0.2	0.8	0.3 ms	0.7	49 ms	0.1	0.2	2.2
Simulation, OBJ	0.1	0.2	0.7	0.2 ms	0.7	0.9	83 ms	0.2	2.9
Visual, GLB	0.1	0.2	0.7	0.2 ms	1.6	20 ms	0.1	0.2	2.9
Visual, OBJ	0.1	0.2	0.8	0.2 ms	1.7	0.5	0.2	0.2	3.7

Board Repo: loxodes/vna Board: powerdet_breakout.kicad_pcb Folder breakouts / powerdet_breakout Complexity 193 / 1000 (size 158, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 26, 157, 25 Triangles, simulation 202,000 in 30 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.2 MB 210 MB STEP 26 MB 223 MB STL 10 MB 208 MB OBJ 20 MB 209 MB Visual GLB 4.7 MB 186 MB OBJ 13 MB 187 MB

1532. refclk_breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	94 ms	0.2	0.6	0.2 ms	0.7	28 ms	99 ms	0.2	2.0
Simulation, STEP	87 ms	0.2	0.7	0.1 ms	0.7	0.8	0.1	0.2	2.8
Simulation, STL	90 ms	0.2	0.7	0.5 ms	0.7	37 ms	0.1	0.2	2.1
Simulation, OBJ	92 ms	0.2	0.6	0.1 ms	0.8	0.9	0.1	0.2	2.9
Visual, GLB	87 ms	0.2	0.7	0.2 ms	1.4	16 ms	0.2	0.2	2.7
Visual, OBJ	89 ms	0.2	0.6	0.2 ms	1.3	0.5	0.1	0.2	3.0

Board Repo: loxodes/vna Board: refclk_breakout.kicad_pcb Folder breakouts / refclk_breakout Complexity 176 / 1000 (size 141, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 13, 92, 10 Triangles, simulation 184,948 in 22 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 6.3 MB 194 MB STEP 26 MB 208 MB STL 9.2 MB 196 MB OBJ 18 MB 195 MB Visual GLB 3.5 MB 163 MB OBJ 9.9 MB 162 MB

1533. trl_thru

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.8	0.1 ms	1.2	47 ms	0.1	0.3	2.7
Simulation, STEP	95 ms	0.2	0.7	0.1 ms	1.1	1.0	0.1	0.3	3.5
Simulation, STL	0.1	0.2	0.9	0.1 ms	1.1	59 ms	0.1	0.2	2.7
Simulation, OBJ	97 ms	0.2	0.8	0.1 ms	1.1	1.0	0.1	0.2	3.6
Visual, GLB	99 ms	0.2	0.7	0.1 ms	1.4	15 ms	97 ms	0.2	2.8
Visual, OBJ	0.1	0.2	0.7	0.1 ms	1.4	0.3	64 ms	0.3	3.1

Board Repo: loxodes/vna Board: trl_thru.kicad_pcb Folder breakouts / res_splitter Complexity 147 / 1000 (size 102, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 4, 13, 3 Triangles, simulation 174,854 in 17 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 5.9 MB 209 MB STEP 15 MB 227 MB STL 8.7 MB 206 MB OBJ 17 MB 208 MB Visual GLB 1.8 MB 166 MB OBJ 5.1 MB 169 MB

1534. sequencing_ltc2937

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	2.5	7.3	0.4 ms	6.2	0.3	0.8	0.3	17.8
Simulation, STEP	0.4	2.4	7.4	0.4 ms	6.0	4.0	0.6	0.3	21.2
Simulation, STL	0.4	2.5	7.0	0.9 ms	5.9	0.6	0.7	0.3	17.3
Simulation, OBJ	0.4	2.4	7.3	0.3 ms	5.9	10.1	0.8	0.3	27.2
Visual, GLB	0.4	2.2	7.2	0.6 ms	14.1	0.2	1.4	0.3	25.9
Visual, OBJ	0.5	2.4	7.4	0.5 ms	14.8	6.7	1.7	0.3	33.8

Board Repo: loxodes/vna Board: sequencing_ltc2937.kicad_pcb Folder breakouts / sequencing_ltc2937 Complexity 308 / 1000 (size 263, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 127, 1,208, 292 Triangles, simulation 1,853,264 in 101 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 65 MB 678 MB STEP 232 MB 793 MB STL 93 MB 692 MB OBJ 195 MB 1.3 GB Visual GLB 40 MB 792 MB OBJ 122 MB 909 MB

1535. sot89_amp_test

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	1.4	0.2 ms	2.2	78 ms	0.2	0.2	5.0
Simulation, STEP	0.2	0.7	1.6	0.1 ms	2.3	1.2	0.2	0.2	6.3
Simulation, STL	0.2	0.7	1.4	0.2 ms	2.3	0.2	0.2	0.2	5.1
Simulation, OBJ	0.1	0.6	1.5	0.1 ms	2.3	2.7	0.2	0.2	7.6
Visual, GLB	0.1	0.6	1.5	0.1 ms	3.5	42 ms	0.3	0.2	6.3
Visual, OBJ	0.2	0.8	1.5	0.2 ms	3.5	1.5	0.3	0.2	8.0

Board Repo: loxodes/vna Board: sot89_amp_test.kicad_pcb Folder breakouts / sot89_amp_test Complexity 180 / 1000 (size 135, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 20, 38, 9 Triangles, simulation 549,398 in 25 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 19 MB 353 MB STEP 27 MB 399 MB STL 27 MB 352 MB OBJ 54 MB 404 MB Visual GLB 9.9 MB 350 MB OBJ 29 MB 354 MB

1536. splitter_breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	80 ms	0.2	0.6	0.2 ms	1.0	35 ms	0.1	0.2	2.2
Simulation, STEP	92 ms	0.2	0.6	0.1 ms	0.9	0.9	0.1	0.2	3.0
Simulation, STL	91 ms	0.1	0.7	0.1 ms	0.8	58 ms	99 ms	0.2	2.1
Simulation, OBJ	86 ms	0.2	0.7	0.1 ms	0.8	1.0	0.1	0.2	3.1
Visual, GLB	79 ms	0.2	0.7	0.1 ms	1.8	16 ms	0.1	0.2	3.0
Visual, OBJ	78 ms	0.2	0.8	0.1 ms	1.7	0.4	0.1	0.2	3.4

Board Repo: loxodes/vna Board: splitter_breakout.kicad_pcb Folder breakouts / splitter_breakout Complexity 115 / 1000 (size 95, features 20) KESE features filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 4, 14, 0 Triangles, simulation 257,954 in 16 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.6 MB 230 MB STEP 23 MB 256 MB STL 13 MB 244 MB OBJ 25 MB 246 MB Visual GLB 3.6 MB 189 MB OBJ 10 MB 185 MB

1537. siw

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	78 ms	84 ms	0.4	0.1 ms	0.6	18 ms	75 ms	0.2	1.5
Simulation, STEP	73 ms	85 ms	0.5	0.1 ms	0.6	0.7	52 ms	0.2	2.2
Simulation, STL	80 ms	0.1	0.4	0.1 ms	0.6	25 ms	58 ms	0.2	1.5
Simulation, OBJ	75 ms	0.1	0.4	0.1 ms	0.6	0.5	56 ms	0.2	1.9
Visual, GLB	78 ms	89 ms	0.4	0.2 ms	0.8	6 ms	44 ms	0.2	1.6
Visual, OBJ	81 ms	97 ms	0.4	0.1 ms	0.8	0.2	38 ms	0.2	1.7

Board Repo: loxodes/vna Board: siw.kicad_pcb Folder breakouts / sw_edge_fr408_oshpark / lpf_20ghz Complexity 108 / 1000 (size 78, features 30) KESE features rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 3, 5, 0 Triangles, simulation 105,776 in 16 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.5 MB 192 MB STEP 8.5 MB 196 MB STL 5.3 MB 192 MB OBJ 9.9 MB 188 MB Visual GLB 969 kB 156 MB OBJ 2.7 MB 153 MB

1538. siw

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	92 ms	0.1	0.4	0.2 ms	0.6	19 ms	56 ms	0.2	1.6
Simulation, STEP	95 ms	95 ms	0.4	0.2 ms	0.6	0.8	71 ms	0.2	2.3
Simulation, STL	85 ms	98 ms	0.4	0.1 ms	0.6	29 ms	66 ms	0.2	1.5
Simulation, OBJ	79 ms	96 ms	0.4	0.2 ms	0.6	0.5	66 ms	0.2	2.0
Visual, GLB	83 ms	0.1	0.4	0.2 ms	1.0	7 ms	61 ms	0.2	1.9
Visual, OBJ	81 ms	98 ms	0.5	0.2 ms	0.9	0.1	60 ms	0.2	2.0

Board Repo: loxodes/vna Board: siw.kicad_pcb Folder breakouts / sw_edge_fr408_oshpark / lpf_8ghz Complexity 108 / 1000 (size 78, features 30) KESE features rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 3, 5, 0 Triangles, simulation 104,500 in 18 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.5 MB 183 MB STEP 8.4 MB 197 MB STL 5.2 MB 191 MB OBJ 9.7 MB 191 MB Visual GLB 969 kB 156 MB OBJ 2.7 MB 154 MB

1539. siw

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	91 ms	0.3	1.2	0.2 ms	1.0	60 ms	0.2	0.2	3.0
Simulation, STEP	96 ms	0.3	1.2	0.2 ms	1.0	1.1	0.2	0.2	4.1
Simulation, STL	94 ms	0.3	1.3	0.2 ms	0.9	73 ms	0.1	0.2	3.0
Simulation, OBJ	99 ms	0.3	1.2	0.2 ms	1.1	1.5	0.1	0.2	4.4
Visual, GLB	96 ms	0.3	1.3	0.2 ms	1.5	16 ms	90 ms	0.2	3.5
Visual, OBJ	88 ms	0.3	1.2	0.2 ms	1.4	0.5	86 ms	0.2	3.7

Board Repo: loxodes/vna Board: siw.kicad_pcb Folder breakouts / sw_edge_fr408_oshpark / siw Complexity 105 / 1000 (size 75, features 30) KESE features rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 3, 4, 0 Triangles, simulation 305,108 in 16 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 10 MB 253 MB STEP 32 MB 270 MB STL 15 MB 255 MB OBJ 30 MB 257 MB Visual GLB 3.1 MB 186 MB OBJ 8.9 MB 186 MB

1540. siw

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	85 ms	0.1	0.5	0.2 ms	0.8	21 ms	75 ms	0.2	1.8
Simulation, STEP	86 ms	0.1	0.4	0.1 ms	0.7	0.7	63 ms	0.3	2.4
Simulation, STL	85 ms	0.1	0.4	0.1 ms	0.9	29 ms	66 ms	0.3	1.8
Simulation, OBJ	90 ms	0.1	0.5	0.1 ms	0.7	0.6	72 ms	0.3	2.4
Visual, GLB	91 ms	0.1	0.5	0.1 ms	1.0	7 ms	44 ms	0.2	2.0
Visual, OBJ	0.1	0.1	0.5	0.2 ms	0.9	0.2	41 ms	0.2	2.0

Board Repo: loxodes/vna Board: siw.kicad_pcb Folder breakouts / sw_edge_fr408_oshpark / trl_0402_series Complexity 110 / 1000 (size 80, features 30) KESE features rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 3, 6, 0 Triangles, simulation 106,076 in 15 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.6 MB 186 MB STEP 8.5 MB 197 MB STL 5.3 MB 181 MB OBJ 9.9 MB 186 MB Visual GLB 985 kB 156 MB OBJ 2.8 MB 156 MB

1541. siw

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	80 ms	76 ms	0.2	0.1 ms	0.5	12 ms	44 ms	0.3	1.3
Simulation, STEP	74 ms	77 ms	0.3	0.2 ms	0.5	0.7	40 ms	0.2	1.9
Simulation, STL	78 ms	70 ms	0.2	0.1 ms	0.5	18 ms	44 ms	0.2	1.2
Simulation, OBJ	91 ms	81 ms	0.2	0.1 ms	0.5	0.3	43 ms	0.3	1.5
Visual, GLB	80 ms	83 ms	0.2	0.2 ms	0.6	6 ms	47 ms	0.2	1.3
Visual, OBJ	85 ms	82 ms	0.3	0.1 ms	0.6	0.1	42 ms	0.3	1.5

Board Repo: loxodes/vna Board: siw.kicad_pcb Folder breakouts / sw_edge_fr408_oshpark / trl_0402_shunt Complexity 109 / 1000 (size 79, features 30) KESE features rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 2, 7, 0 Triangles, simulation 63,998 in 14 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 2.2 MB 73 MB STEP 5.3 MB 176 MB STL 3.2 MB 74 MB OBJ 6.0 MB 99 MB Visual GLB 760 kB 100 MB OBJ 2.1 MB 101 MB

1542. siw

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.9	0.3 ms	0.9	53 ms	0.2	0.2	2.7
Simulation, STEP	98 ms	0.2	0.9	0.2 ms	1.0	1.1	0.1	0.2	3.7
Simulation, STL	0.1	0.3	0.9	0.2 ms	1.0	70 ms	0.1	0.2	2.7
Simulation, OBJ	0.1	0.2	0.9	0.1 ms	0.9	1.2	0.1	0.2	3.8
Visual, GLB	0.1	0.3	1.0	0.1 ms	1.7	17 ms	0.1	0.2	3.4
Visual, OBJ	0.1	0.2	0.9	0.1 ms	1.7	0.5	0.1	0.3	3.8

Board Repo: loxodes/vna Board: siw.kicad_pcb Folder breakouts / sw_edge_fr408_oshpark / trl_admv Complexity 214 / 1000 (size 169, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 5, 98, 2 Triangles, simulation 276,854 in 19 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.5 MB 247 MB STEP 29 MB 254 MB STL 14 MB 244 MB OBJ 27 MB 241 MB Visual GLB 4.0 MB 193 MB OBJ 11 MB 190 MB

1543. siw

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	84 ms	0.1	0.5	0.1 ms	0.8	22 ms	76 ms	0.2	1.8
Simulation, STEP	84 ms	0.1	0.4	0.1 ms	0.6	0.7	65 ms	0.2	2.3
Simulation, STL	75 ms	0.1	0.4	0.1 ms	0.8	35 ms	68 ms	0.2	1.7
Simulation, OBJ	86 ms	0.1	0.4	0.1 ms	0.8	0.6	68 ms	0.2	2.3
Visual, GLB	81 ms	0.1	0.4	0.1 ms	1.0	10 ms	62 ms	0.2	2.0
Visual, OBJ	80 ms	0.1	0.4	0.1 ms	1.0	0.2	54 ms	0.2	2.1

Board Repo: loxodes/vna Board: siw.kicad_pcb Folder breakouts / sw_edge_fr408_oshpark / trl_att_hmc Complexity 114 / 1000 (size 84, features 30) KESE features rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 3, 8, 0 Triangles, simulation 139,976 in 15 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.7 MB 194 MB STEP 11 MB 203 MB STL 7.0 MB 194 MB OBJ 13 MB 194 MB Visual GLB 1.6 MB 157 MB OBJ 4.5 MB 157 MB

1544. siw

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	87 ms	0.1	0.4	0.1 ms	0.6	18 ms	59 ms	0.2	1.5
Simulation, STEP	78 ms	97 ms	0.4	0.2 ms	0.6	0.7	55 ms	0.2	2.1
Simulation, STL	80 ms	95 ms	0.4	0.1 ms	0.6	27 ms	57 ms	0.2	1.4
Simulation, OBJ	74 ms	86 ms	0.4	0.1 ms	0.6	0.4	60 ms	0.2	1.8
Visual, GLB	79 ms	94 ms	0.4	0.1 ms	0.9	6 ms	46 ms	0.2	1.8
Visual, OBJ	78 ms	92 ms	0.4	0.1 ms	0.8	0.2	57 ms	0.2	1.8

Board Repo: loxodes/vna Board: siw.kicad_pcb Folder breakouts / sw_edge_fr408_oshpark / trl_line_10p5mm Complexity 107 / 1000 (size 77, features 30) KESE features rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 2, 6, 0 Triangles, simulation 104,984 in 14 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.5 MB 193 MB STEP 8.3 MB 195 MB STL 5.3 MB 194 MB OBJ 9.8 MB 193 MB Visual GLB 956 kB 155 MB OBJ 2.7 MB 154 MB

1545. siw

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	82 ms	93 ms	0.4	0.1 ms	0.6	17 ms	56 ms	0.2	1.4
Simulation, STEP	75 ms	82 ms	0.4	0.1 ms	0.6	0.8	55 ms	0.2	2.2
Simulation, STL	76 ms	93 ms	0.5	0.2 ms	0.6	24 ms	57 ms	0.2	1.5
Simulation, OBJ	71 ms	88 ms	0.4	0.2 ms	0.6	0.5	67 ms	0.2	1.8
Visual, GLB	78 ms	88 ms	0.4	0.2 ms	0.8	7 ms	54 ms	0.2	1.7
Visual, OBJ	75 ms	86 ms	0.4	0.1 ms	0.8	0.1	42 ms	0.2	1.8

Board Repo: loxodes/vna Board: siw.kicad_pcb Folder breakouts / sw_edge_fr408_oshpark / trl_line_20mm Complexity 105 / 1000 (size 75, features 30) KESE features rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 2, 5, 0 Triangles, simulation 104,820 in 16 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.5 MB 183 MB STEP 8.3 MB 194 MB STL 5.2 MB 185 MB OBJ 9.8 MB 184 MB Visual GLB 943 kB 157 MB OBJ 2.6 MB 157 MB

1546. siw

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	82 ms	97 ms	0.4	0.1 ms	0.6	19 ms	68 ms	0.2	1.5
Simulation, STEP	0.1	98 ms	0.4	0.1 ms	0.6	0.8	63 ms	0.3	2.4
Simulation, STL	98 ms	0.1	0.5	0.2 ms	0.7	40 ms	76 ms	0.3	1.8
Simulation, OBJ	0.1	0.1	0.4	0.2 ms	0.7	0.6	72 ms	0.3	2.2
Visual, GLB	0.1	0.1	0.5	0.2 ms	1.0	9 ms	58 ms	0.2	2.0
Visual, OBJ	85 ms	0.1	0.5	0.1 ms	1.0	0.2	41 ms	0.2	2.1

Board Repo: loxodes/vna Board: siw.kicad_pcb Folder breakouts / sw_edge_fr408_oshpark / trl_line_2mm Complexity 105 / 1000 (size 75, features 30) KESE features rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 2, 5, 0 Triangles, simulation 104,412 in 16 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.5 MB 183 MB STEP 8.2 MB 195 MB STL 5.2 MB 184 MB OBJ 9.7 MB 188 MB Visual GLB 932 kB 155 MB OBJ 2.6 MB 157 MB

1547. siw

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	63 ms	46 ms	0.2	0.1 ms	0.4	9 ms	37 ms	0.2	1.0
Simulation, STEP	74 ms	61 ms	0.2	0.1 ms	0.4	0.3	37 ms	0.2	1.3
Simulation, STL	70 ms	57 ms	0.2	0.1 ms	0.4	14 ms	36 ms	0.2	1.1
Simulation, OBJ	66 ms	54 ms	0.2	0.1 ms	0.4	0.2	33 ms	0.2	1.2
Visual, GLB	65 ms	52 ms	0.2	0.1 ms	0.4	4 ms	29 ms	0.2	1.0
Visual, OBJ	77 ms	49 ms	0.2	0.1 ms	0.5	84 ms	37 ms	0.2	1.1

Board Repo: loxodes/vna Board: siw.kicad_pcb Folder breakouts / sw_edge_fr408_oshpark / trl_reflect Complexity 97 / 1000 (size 67, features 30) KESE features rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 1, 4, 0 Triangles, simulation 53,820 in 14 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 1.8 MB 70 MB STEP 4.3 MB 74 MB STL 2.7 MB 71 MB OBJ 5.0 MB 82 MB Visual GLB 514 kB 89 MB OBJ 1.4 MB 90 MB

1548. siw

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	80 ms	88 ms	0.4	0.2 ms	0.5	15 ms	55 ms	0.2	1.3
Simulation, STEP	80 ms	97 ms	0.4	0.1 ms	0.6	0.8	60 ms	0.2	2.2
Simulation, STL	76 ms	88 ms	0.4	0.1 ms	0.5	28 ms	60 ms	0.2	1.4
Simulation, OBJ	81 ms	92 ms	0.4	0.2 ms	0.6	0.5	60 ms	0.2	1.9
Visual, GLB	92 ms	0.1	0.4	0.1 ms	0.9	6 ms	37 ms	0.2	1.7
Visual, OBJ	77 ms	93 ms	0.4	0.1 ms	0.8	98 ms	45 ms	0.2	1.8

Board Repo: loxodes/vna Board: siw.kicad_pcb Folder breakouts / sw_edge_fr408_oshpark / trl_thru Complexity 102 / 1000 (size 72, features 30) KESE features rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 2, 4, 0 Triangles, simulation 103,060 in 16 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.4 MB 188 MB STEP 8.0 MB 191 MB STL 5.2 MB 190 MB OBJ 9.6 MB 192 MB Visual GLB 927 kB 154 MB OBJ 2.6 MB 155 MB

1549. siw

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.3	0.2 ms	1.2	61 ms	0.2	0.3	3.5
Simulation, STEP	0.1	0.3	1.2	0.1 ms	1.2	1.2	0.2	0.2	4.4
Simulation, STL	0.1	0.4	1.2	0.2 ms	1.3	62 ms	0.2	0.3	3.5
Simulation, OBJ	0.2	0.3	1.1	0.1 ms	1.4	1.5	0.2	0.2	5.0
Visual, GLB	0.1	0.3	1.1	0.2 ms	2.1	21 ms	0.1	0.3	4.0
Visual, OBJ	0.1	0.3	1.1	0.5 ms	2.0	0.6	0.1	0.3	4.5

Board Repo: loxodes/vna Board: siw.kicad_pcb Folder breakouts / sw_edge_fr408_oshpark / trl_vatt Complexity 177 / 1000 (size 132, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 7, 95, 3 Triangles, simulation 234,680 in 23 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.0 MB 214 MB STEP 25 MB 235 MB STL 12 MB 215 MB OBJ 23 MB 214 MB Visual GLB 3.3 MB 172 MB OBJ 9.3 MB 171 MB

1550. switch_breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	95 ms	0.2	1.0	0.1 ms	1.1	42 ms	0.1	0.2	2.8
Simulation, STEP	89 ms	0.2	1.1	0.2 ms	1.2	0.9	0.2	0.2	3.8
Simulation, STL	90 ms	0.2	1.0	0.1 ms	1.0	70 ms	0.1	0.2	2.7
Simulation, OBJ	86 ms	0.2	1.0	0.1 ms	1.1	1.4	0.2	0.2	4.2
Visual, GLB	0.1	0.2	1.0	0.1 ms	2.5	29 ms	0.2	0.2	4.3
Visual, OBJ	0.1	0.2	1.0	0.1 ms	2.4	0.7	0.2	0.2	4.8

Board Repo: loxodes/vna Board: switch_breakout.kicad_pcb Folder breakouts / switch_breakout Complexity 163 / 1000 (size 128, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 10, 54, 4 Triangles, simulation 371,498 in 22 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 12 MB 279 MB STEP 35 MB 311 MB STL 19 MB 279 MB OBJ 36 MB 280 MB Visual GLB 6.2 MB 262 MB OBJ 18 MB 256 MB

1551. synth

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.3	0.3 ms	1.8	98 ms	0.2	0.2	5.3
Simulation, STEP	0.2	0.6	2.3	0.3 ms	1.8	1.6	0.2	0.2	6.7
Simulation, STL	0.2	0.6	2.2	0.3 ms	1.7	0.1	0.2	0.2	5.3
Simulation, OBJ	0.2	0.6	2.4	0.3 ms	1.8	2.8	0.2	0.2	8.2
Visual, GLB	0.2	0.6	2.3	0.3 ms	4.2	57 ms	0.5	0.2	8.1
Visual, OBJ	0.2	0.6	2.4	0.2 ms	4.5	1.8	0.6	0.2	10.3

Board Repo: loxodes/vna Board: synth.kicad_pcb Folder breakouts / synth Complexity 261 / 1000 (size 226, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 79, 391, 73 Triangles, simulation 656,202 in 59 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 23 MB 339 MB STEP 88 MB 377 MB STL 33 MB 352 MB OBJ 68 MB 467 MB Visual GLB 14 MB 389 MB OBJ 42 MB 389 MB

1552. cpw_test

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	90 ms	0.3	1.6	0.2 ms	1.4	58 ms	0.2	0.2	3.7
Simulation, STEP	90 ms	0.3	1.5	0.5 ms	1.3	1.2	0.2	0.2	4.8
Simulation, STL	92 ms	0.3	1.5	0.2 ms	1.4	0.1	0.2	0.2	3.8
Simulation, OBJ	90 ms	0.3	1.5	0.3 ms	1.3	1.9	0.2	0.2	5.5
Visual, GLB	89 ms	0.3	1.6	0.2 ms	2.7	24 ms	0.2	0.2	5.1
Visual, OBJ	89 ms	0.3	1.5	0.3 ms	2.7	0.7	0.2	0.2	5.7

Board Repo: loxodes/vna Board: cpw_test.kicad_pcb Folder breakouts / ufl_test Complexity 133 / 1000 (size 98, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 2, 6, 6 Triangles, simulation 453,202 in 13 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 322 MB STEP 41 MB 362 MB STL 23 MB 318 MB OBJ 45 MB 356 MB Visual GLB 6.0 MB 257 MB OBJ 17 MB 256 MB

1553. usb_pd

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	0.9	0.2 ms	0.8	37 ms	0.1	0.2	2.5
Simulation, STEP	0.2	0.3	0.8	0.2 ms	1.0	1.1	0.1	0.2	3.7
Simulation, STL	0.2	0.3	0.9	0.3 ms	0.9	70 ms	0.1	0.2	2.7
Simulation, OBJ	0.2	0.3	0.9	0.4 ms	0.9	1.4	0.1	0.2	3.9
Visual, GLB	0.2	0.3	1.0	0.2 ms	2.2	31 ms	0.2	0.2	4.1
Visual, OBJ	0.1	0.3	0.9	0.2 ms	2.3	0.9	0.3	0.2	5.0

Board Repo: loxodes/vna Board: usb_pd.kicad_pcb Folder breakouts / usb_pd / usb_pd Complexity 263 / 1000 (size 163, features 100) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20210606) Parts, tracks, vias 29, 149, 43 Triangles, simulation 294,948 in 34 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.9 MB 232 MB STEP 39 MB 270 MB STL 15 MB 245 MB OBJ 29 MB 258 MB Visual GLB 7.0 MB 240 MB OBJ 20 MB 237 MB

1554. demod_module

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.9	3.6	0.6 ms	3.1	0.1	0.3	0.2	8.5
Simulation, STEP	0.2	0.9	3.7	0.8 ms	2.8	2.0	0.3	0.2	10.1
Simulation, STL	0.2	0.9	3.4	0.3 ms	3.0	0.3	0.3	0.2	8.2
Simulation, OBJ	0.2	0.9	3.7	1 ms	3.0	4.2	0.3	0.2	12.6
Visual, GLB	0.2	0.9	3.5	0.6 ms	8.1	0.1	0.8	0.2	13.9
Visual, OBJ	0.2	1.0	3.5	0.5 ms	7.9	3.0	1.1	0.2	16.9

Board Repo: loxodes/vna Board: demod_module.kicad_pcb Folder hardware / archive / demod_module Complexity 279 / 1000 (size 234, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 99, 554, 95 Triangles, simulation 1,061,928 in 84 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 37 MB 478 MB STEP 131 MB 540 MB STL 53 MB 464 MB OBJ 109 MB 756 MB Visual GLB 24 MB 548 MB OBJ 71 MB 550 MB

1555. doubler_switch

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.6	8.1	0.4 ms	7.0	0.3	0.7	0.3	18.3
Simulation, STEP	0.4	1.5	8.2	0.5 ms	7.1	3.8	0.7	0.3	21.9
Simulation, STL	0.3	1.5	8.7	0.5 ms	7.5	0.5	0.7	0.3	19.5
Simulation, OBJ	0.3	1.6	8.4	0.5 ms	6.6	9.2	0.6	0.3	27.0
Visual, GLB	0.3	1.4	7.8	0.5 ms	14.1	0.1	1.6	0.3	25.7
Visual, OBJ	0.3	1.5	8.4	1 ms	13.9	5.9	1.7	0.3	32.0

Board Repo: loxodes/vna Board: doubler_switch.kicad_pcb Folder hardware / archive / doubler_switch Complexity 215 / 1000 (size 180, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 50, 457, 42 Triangles, simulation 1,500,280 in 54 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 51 MB 641 MB STEP 171 MB 725 MB STL 75 MB 653 MB OBJ 154 MB 994 MB Visual GLB 31 MB 747 MB OBJ 93 MB 695 MB

1556. frequency_synth

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	2.1	8.5	0.7 ms	6.4	0.3	0.8	0.2	18.7
Simulation, STEP	0.4	2.0	8.0	0.7 ms	6.3	4.1	0.7	0.3	21.8
Simulation, STL	0.4	1.9	8.3	0.7 ms	6.6	0.7	0.7	0.3	18.9
Simulation, OBJ	0.4	1.9	8.3	0.9 ms	6.4	8.9	0.8	0.3	26.9
Visual, GLB	0.4	2.3	8.2	0.8 ms	18.5	0.2	1.5	0.3	31.4
Visual, OBJ	0.4	2.2	8.8	0.7 ms	17.6	6.3	2.0	0.2	37.5

Board Repo: loxodes/vna Board: frequency_synth.kicad_pcb Folder hardware / archive / frequency_synth Complexity 297 / 1000 (size 252, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 159, 1,274, 215 Triangles, simulation 1,978,440 in 151 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 69 MB 670 MB STEP 252 MB 878 MB STL 99 MB 712 MB OBJ 209 MB 1.4 GB Visual GLB 42 MB 827 MB OBJ 128 MB 936 MB

1557. trl_line

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	1.1	0.2 ms	1.0	48 ms	0.1	0.2	2.9
Simulation, STEP	91 ms	0.2	1.0	0.2 ms	0.9	1.0	0.1	0.2	3.6
Simulation, STL	95 ms	0.2	1.0	0.2 ms	0.9	54 ms	0.1	0.2	2.7
Simulation, OBJ	0.1	0.2	1.1	0.2 ms	0.9	1.2	0.1	0.3	3.9
Visual, GLB	94 ms	0.2	1.1	0.2 ms	1.7	17 ms	0.1	0.3	3.5
Visual, OBJ	0.1	0.2	1.1	0.2 ms	1.7	0.5	0.1	0.2	3.9

Board Repo: loxodes/vna Board: trl_line.kicad_pcb Folder hardware / archive / oshpark_4layer_trl_cal / cap_0201 Complexity 86 / 1000 (size 66, features 20) KESE features filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 3, 2, 0 Triangles, simulation 227,180 in 15 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.5 MB 223 MB STEP 22 MB 226 MB STL 11 MB 231 MB OBJ 22 MB 234 MB Visual GLB 3.2 MB 167 MB OBJ 9.0 MB 167 MB

1558. trl_line

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	86 ms	0.2	0.8	0.1 ms	0.7	30 ms	87 ms	0.2	2.1
Simulation, STEP	77 ms	0.2	0.8	0.2 ms	0.7	0.9	84 ms	0.2	2.9
Simulation, STL	83 ms	0.2	0.8	0.1 ms	0.7	65 ms	95 ms	0.2	2.2
Simulation, OBJ	75 ms	0.2	0.8	0.1 ms	0.8	0.9	0.1	0.2	3.1
Visual, GLB	84 ms	0.2	0.8	0.2 ms	1.4	14 ms	0.1	0.2	2.8
Visual, OBJ	81 ms	0.2	0.8	0.2 ms	1.4	0.4	94 ms	0.2	3.1

Board Repo: loxodes/vna Board: trl_line.kicad_pcb Folder hardware / archive / oshpark_4layer_trl_cal / cap_0402 Complexity 86 / 1000 (size 66, features 20) KESE features filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 3, 2, 0 Triangles, simulation 226,556 in 15 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.5 MB 234 MB STEP 22 MB 238 MB STL 11 MB 233 MB OBJ 22 MB 220 MB Visual GLB 3.2 MB 168 MB OBJ 9.0 MB 167 MB

1559. trl_line

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	90 ms	0.2	1.0	0.1 ms	0.8	34 ms	0.1	0.3	2.5
Simulation, STEP	81 ms	0.2	0.9	0.1 ms	0.9	0.9	0.1	0.2	3.3
Simulation, STL	83 ms	0.2	0.9	0.1 ms	0.8	49 ms	0.1	0.2	2.3
Simulation, OBJ	88 ms	0.2	0.9	0.1 ms	0.8	1.2	0.1	0.2	3.5
Visual, GLB	83 ms	0.2	1.0	0.1 ms	1.4	16 ms	0.1	0.2	3.0
Visual, OBJ	82 ms	0.2	1.0	0.2 ms	1.5	0.6	96 ms	0.2	3.7

Board Repo: loxodes/vna Board: trl_line.kicad_pcb Folder hardware / archive / oshpark_4layer_trl_cal / shunt_0402 Complexity 136 / 1000 (size 101, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 5, 12, 2 Triangles, simulation 236,544 in 15 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.8 MB 232 MB STEP 23 MB 239 MB STL 12 MB 230 MB OBJ 23 MB 232 MB Visual GLB 3.4 MB 171 MB OBJ 9.6 MB 172 MB

1560. trl_line

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	81 ms	0.2	1.0	0.1 ms	0.8	31 ms	0.1	0.2	2.4
Simulation, STEP	81 ms	0.2	1.0	0.1 ms	0.8	0.9	0.1	0.2	3.2
Simulation, STL	80 ms	0.2	0.9	0.1 ms	0.8	51 ms	0.1	0.2	2.3
Simulation, OBJ	79 ms	0.2	0.9	0.2 ms	0.8	1.1	0.1	0.2	3.4
Visual, GLB	79 ms	0.2	0.9	0.1 ms	1.4	15 ms	0.1	0.3	3.0
Visual, OBJ	82 ms	0.2	1.0	0.2 ms	1.4	0.4	93 ms	0.2	3.4

Board Repo: loxodes/vna Board: trl_line.kicad_pcb Folder hardware / archive / oshpark_4layer_trl_cal / trl_line Complexity 77 / 1000 (size 57, features 20) KESE features filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 2, 1, 0 Triangles, simulation 227,780 in 14 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.5 MB 233 MB STEP 22 MB 229 MB STL 11 MB 224 MB OBJ 22 MB 225 MB Visual GLB 3.2 MB 169 MB OBJ 9.1 MB 168 MB

1561. trl_reflect

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	75 ms	0.1	0.5	0.1 ms	0.5	18 ms	56 ms	0.2	1.4
Simulation, STEP	76 ms	0.1	0.5	0.1 ms	0.6	0.7	56 ms	0.2	2.2
Simulation, STL	88 ms	0.1	0.5	0.2 ms	0.6	26 ms	60 ms	0.2	1.6
Simulation, OBJ	75 ms	0.1	0.5	0.1 ms	0.7	0.6	68 ms	0.2	2.3
Visual, GLB	81 ms	0.1	0.5	0.1 ms	1.1	10 ms	68 ms	0.2	2.1
Visual, OBJ	75 ms	0.1	0.5	0.2 ms	1.0	0.2	65 ms	0.2	2.2

Board Repo: loxodes/vna Board: trl_reflect.kicad_pcb Folder hardware / archive / oshpark_4layer_trl_cal / trl_reflect Complexity 84 / 1000 (size 64, features 20) KESE features filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 1, 3, 0 Triangles, simulation 116,706 in 16 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.9 MB 186 MB STEP 12 MB 190 MB STL 5.8 MB 194 MB OBJ 11 MB 184 MB Visual GLB 1.7 MB 159 MB OBJ 4.8 MB 159 MB

1562. trl_line

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	81 ms	0.2	0.9	0.2 ms	0.8	32 ms	98 ms	0.2	2.4
Simulation, STEP	77 ms	0.2	0.9	0.2 ms	0.8	0.9	0.1	0.2	3.1
Simulation, STL	78 ms	0.2	0.9	0.1 ms	0.8	47 ms	98 ms	0.2	2.3
Simulation, OBJ	79 ms	0.2	0.9	0.1 ms	0.8	1.1	0.1	0.2	3.4
Visual, GLB	83 ms	0.2	0.9	0.1 ms	1.4	14 ms	0.1	0.2	2.9
Visual, OBJ	77 ms	0.2	0.9	0.2 ms	1.4	0.5	0.1	0.2	3.3

Board Repo: loxodes/vna Board: trl_line.kicad_pcb Folder hardware / archive / oshpark_4layer_trl_cal / trl_thru Complexity 77 / 1000 (size 57, features 20) KESE features filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 2, 1, 0 Triangles, simulation 226,164 in 14 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.4 MB 228 MB STEP 22 MB 243 MB STL 11 MB 233 MB OBJ 22 MB 233 MB Visual GLB 3.2 MB 167 MB OBJ 9.0 MB 168 MB

1563. trl_line

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.2	0.2 ms	1.1	48 ms	0.2	0.3	3.2
Simulation, STEP	0.1	0.3	1.3	0.1 ms	1.2	1.2	0.2	0.2	4.3
Simulation, STL	0.1	0.3	1.3	0.2 ms	1.1	68 ms	0.1	0.3	3.2
Simulation, OBJ	94 ms	0.2	1.2	0.1 ms	1.1	1.4	0.1	0.3	4.4
Visual, GLB	0.1	0.2	1.2	0.2 ms	1.9	22 ms	0.2	0.2	3.9
Visual, OBJ	0.1	0.3	1.3	0.2 ms	2.0	0.6	0.1	0.3	4.6

Board Repo: loxodes/vna Board: trl_line.kicad_pcb Folder hardware / archive / oshpark_4layer_trl_cal / trl_ustrip_test Complexity 83 / 1000 (size 63, features 20) KESE features filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 2, 2, 0 Triangles, simulation 228,296 in 14 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.5 MB 233 MB STEP 22 MB 238 MB STL 11 MB 233 MB OBJ 22 MB 232 MB Visual GLB 3.2 MB 167 MB OBJ 9.2 MB 167 MB

1564. switch_demod

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.7	3.0	0.4 ms	1.5	60 ms	0.2	0.2	6.0
Simulation, STEP	0.2	0.8	3.0	0.3 ms	1.5	1.8	0.2	0.2	7.8
Simulation, STL	0.2	0.8	2.9	0.3 ms	1.5	0.1	0.2	0.2	6.0
Simulation, OBJ	0.3	0.8	3.0	0.3 ms	1.5	2.1	0.2	0.2	8.1
Visual, GLB	0.2	0.8	2.9	0.3 ms	4.0	51 ms	0.5	0.2	8.7
Visual, OBJ	0.3	0.8	3.2	0.4 ms	4.1	1.5	0.5	0.2	10.7

Board Repo: loxodes/vna Board: switch_demod.kicad_pcb Folder hardware / archive / switch_demod Complexity 172 / 1000 (size 172, features 0) Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 140, 15, 0 Triangles, simulation 355,876 in 111 parts Note mostly unrouted Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 13 MB 328 MB STEP 54 MB 366 MB STL 18 MB 340 MB OBJ 39 MB 349 MB Visual GLB 11 MB 331 MB OBJ 31 MB 330 MB

1565. vna_control

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.5	11.3	0.7 ms	8.8	0.4	1.2	0.3	24.9
Simulation, STEP	0.4	2.4	11.9	0.7 ms	9.0	5.4	1.1	0.3	30.5
Simulation, STL	0.5	2.4	11.0	0.7 ms	9.0	0.9	1.3	0.3	25.5
Simulation, OBJ	0.4	2.4	10.8	1 ms	9.0	13.1	1.2	0.3	37.3
Visual, GLB	0.4	2.3	11.1	0.9 ms	18.4	0.2	2.0	0.3	34.7
Visual, OBJ	0.4	2.5	11.4	0.9 ms	21.0	7.6	2.4	0.3	45.6

Board Repo: loxodes/vna Board: vna_control.kicad_pcb Folder hardware / archive / vna_r0 / vna_control Complexity 300 / 1000 (size 245, features 55) KESE features through vias, slotted holes, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 110, 1,091, 157 Triangles, simulation 2,132,360 in 102 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 74 MB 654 MB STEP 276 MB 778 MB STL 107 MB 662 MB OBJ 225 MB 1.4 GB Visual GLB 41 MB 922 MB OBJ 124 MB 944 MB

1566. vna_demod

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	5.6	19.7	2 ms	15.6	0.7	1.9	0.3	44.6
Simulation, STEP	0.9	5.7	19.5	0.8 ms	15.1	8.6	1.6	0.3	51.7
Simulation, STL	0.8	5.8	19.5	2 ms	15.4	1.7	1.7	0.3	45.2
Simulation, OBJ	0.8	5.7	19.7	2 ms	15.2	22.0	1.8	0.3	65.5
Visual, GLB	0.9	6.0	19.6	0.8 ms	49.1	0.5	4.6	0.3	80.9
Visual, OBJ	0.9	5.5	19.3	2 ms	48.8	14.0	4.3	0.3	93.2

Board Repo: loxodes/vna Board: vna_demod.kicad_pcb Folder hardware / archive / vna_r0 / vna_demod Complexity 330 / 1000 (size 285, features 45) KESE features through vias, filled zones, curved board outline Tested 10th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 303, 2,447, 408 Triangles, simulation 4,214,150 in 243 parts Verifier PASS in all six runs Run again Simulation, GLB; Simulation, STEP; Simulation, STL; Simulation, OBJ; Visual, GLB; Visual, OBJ: failed in the corpus run, run again with fixes to KESE made after the corpus run, and passed

File type File size Peak memory used Simulation GLB 146 MB 1.4 GB STEP 498 MB 1.6 GB STL 211 MB 1.3 GB OBJ 451 MB 2.8 GB Visual GLB 93 MB 1.5 GB OBJ 294 MB 2.0 GB

1567. vna_rf

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	3.1	10.1	1.0 ms	9.7	0.4	1.0	0.3	25.1
Simulation, STEP	0.5	3.1	10.1	0.9 ms	9.6	5.3	0.9	0.3	29.7
Simulation, STL	0.5	2.9	10.2	0.8 ms	9.4	0.7	0.9	0.3	24.8
Simulation, OBJ	0.4	3.1	9.8	0.8 ms	9.7	12.3	0.9	0.3	36.6
Visual, GLB	0.4	3.0	10.1	0.8 ms	24.8	0.2	2.2	0.3	41.1
Visual, OBJ	0.5	3.1	10.1	1.0 ms	25.2	8.1	2.3	0.3	49.6

Board Repo: loxodes/vna Board: vna_rf.kicad_pcb Folder hardware / archive / vna_r0 / vna_rf Complexity 292 / 1000 (size 247, features 45) KESE features through vias, filled zones, curved board outline Tested 10th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 130, 1,060, 171 Triangles, simulation 2,515,716 in 103 parts Verifier PASS in all six runs Run again Simulation, GLB; Simulation, STEP; Simulation, STL; Simulation, OBJ; Visual, GLB; Visual, OBJ: failed in the corpus run, run again with fixes to KESE made after the corpus run, and passed

File type File size Peak memory used Simulation GLB 86 MB 968 MB STEP 276 MB 1.1 GB STL 126 MB 978 MB OBJ 264 MB 1.7 GB Visual GLB 54 MB 1.0 GB OBJ 167 MB 1.2 GB

1568. ecp5

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	4.4	12.7	0.5 ms	14.8	0.6	1.7	0.3	35.6
Simulation, STEP	1.1	4.2	13.6	0.6 ms	15.6	9.4	1.9	0.3	46.1
Simulation, STL	1.1	4.3	13.4	0.6 ms	15.1	1.3	1.9	0.3	37.4
Simulation, OBJ	1.1	4.3	13.6	0.6 ms	14.5	20.2	1.9	0.3	55.9
Visual, GLB	1.2	4.2	13.7	1 ms	31.4	0.4	3.8	0.2	54.8
Visual, OBJ	0.8	4.5	13.7	0.7 ms	31.7	11.7	3.9	0.2	66.5

Board Repo: loxodes/vna Board: ecp5.kicad_pcb Folder hardware / mm_reflectometer / evalboards / ecp5 Complexity 405 / 1000 (size 290, features 115) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 6 (20201220) Parts, tracks, vias 195, 2,373, 498 Triangles, simulation 4,130,736 in 192 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 138 MB 1.1 GB STEP 545 MB 1.6 GB STL 207 MB 1.2 GB OBJ 439 MB 2.7 GB Visual GLB 79 MB 1.3 GB OBJ 252 MB 1.7 GB

1569. ep2k1P

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	98 ms	0.2	0.9	0.1 ms	1.1	38 ms	0.1	0.2	2.6
Simulation, STEP	85 ms	0.2	0.8	0.1 ms	1.1	1.0	0.1	0.2	3.5
Simulation, STL	91 ms	0.2	0.9	0.2 ms	1.1	69 ms	0.1	0.2	2.7
Simulation, OBJ	94 ms	0.2	0.9	0.2 ms	1.0	1.1	0.1	0.3	3.8
Visual, GLB	89 ms	0.2	0.9	0.2 ms	1.7	17 ms	91 ms	0.2	3.3
Visual, OBJ	93 ms	0.2	0.9	0.2 ms	1.7	0.4	86 ms	0.2	3.6

Board Repo: loxodes/vna Board: ep2k1P.kicad_pcb Folder hardware / mm_reflectometer / evalboards / ep2k1P Complexity 243 / 1000 (size 133, features 110) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20201220) Parts, tracks, vias 4, 50, 33 Triangles, simulation 254,758 in 16 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.3 MB 238 MB STEP 20 MB 257 MB STL 13 MB 238 MB OBJ 25 MB 238 MB Visual GLB 3.0 MB 173 MB OBJ 8.6 MB 173 MB

1570. fpc07181

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	92 ms	0.2	0.8	0.2 ms	1.0	31 ms	0.1	0.2	2.3
Simulation, STEP	91 ms	0.2	0.7	0.1 ms	1.0	0.9	0.1	0.2	3.2
Simulation, STL	90 ms	0.2	0.8	0.1 ms	1.0	45 ms	0.1	0.2	2.3
Simulation, OBJ	90 ms	0.2	0.8	0.1 ms	1.0	1.2	0.1	0.2	3.5
Visual, GLB	91 ms	0.2	0.8	0.2 ms	1.4	13 ms	66 ms	0.2	2.7
Visual, OBJ	92 ms	0.2	0.8	0.1 ms	1.3	0.4	62 ms	0.3	3.0

Board Repo: loxodes/vna Board: fpc07181.kicad_pcb Folder hardware / mm_reflectometer / evalboards / fpc07181 Complexity 215 / 1000 (size 120, features 95) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20201220) Parts, tracks, vias 5, 20, 13 Triangles, simulation 192,820 in 17 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 6.3 MB 213 MB STEP 16 MB 232 MB STL 9.6 MB 214 MB OBJ 19 MB 216 MB Visual GLB 2.1 MB 166 MB OBJ 6.1 MB 165 MB

1571. maam-011132

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	1.8	0.2 ms	1.8	84 ms	0.2	0.2	4.9
Simulation, STEP	0.2	0.5	1.8	0.2 ms	1.9	1.6	0.3	0.2	6.4
Simulation, STL	0.2	0.5	1.7	0.3 ms	1.8	0.1	0.3	0.3	4.8
Simulation, OBJ	0.2	0.5	1.7	0.2 ms	1.9	2.8	0.3	0.2	7.6
Visual, GLB	0.2	0.5	1.7	0.3 ms	3.4	49 ms	0.5	0.2	6.6
Visual, OBJ	0.2	0.5	1.8	0.2 ms	3.5	1.7	0.5	0.2	8.3

Board Repo: loxodes/vna Board: maam-011132.kicad_pcb Folder hardware / mm_reflectometer / evalboards / maam-011132 Complexity 290 / 1000 (size 185, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20210228) Parts, tracks, vias 66, 379, 89 Triangles, simulation 574,998 in 46 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 19 MB 332 MB STEP 66 MB 385 MB STL 29 MB 327 MB OBJ 60 MB 438 MB Visual GLB 11 MB 332 MB OBJ 35 MB 337 MB

1572. maam_011101

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.6	0.1 ms	0.9	34 ms	0.1	0.2	2.1
Simulation, STEP	0.1	0.1	0.6	0.2 ms	0.9	0.9	85 ms	0.2	2.9
Simulation, STL	94 ms	0.1	0.6	0.1 ms	0.8	52 ms	90 ms	0.2	2.0
Simulation, OBJ	97 ms	0.2	0.7	0.1 ms	0.9	0.9	0.1	0.2	3.0
Visual, GLB	0.1	0.2	0.6	0.1 ms	1.8	14 ms	83 ms	0.2	2.9
Visual, OBJ	98 ms	0.2	0.6	0.1 ms	1.7	0.3	92 ms	0.2	3.1

Board Repo: loxodes/vna Board: maam_011101.kicad_pcb Folder hardware / mm_reflectometer / evalboards / maam_011101 Complexity 222 / 1000 (size 127, features 95) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20210108) Parts, tracks, vias 8, 24, 16 Triangles, simulation 159,606 in 18 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 5.2 MB 199 MB STEP 14 MB 214 MB STL 8.0 MB 201 MB OBJ 16 MB 198 MB Visual GLB 2.1 MB 166 MB OBJ 5.8 MB 167 MB

1573. mamx_011036

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	1.9	0.2 ms	1.8	77 ms	0.3	0.2	4.9
Simulation, STEP	0.2	0.5	1.9	0.2 ms	1.8	1.5	0.3	0.2	6.4
Simulation, STL	0.2	0.5	1.8	0.2 ms	1.8	0.1	0.3	0.2	4.9
Simulation, OBJ	0.2	0.5	1.9	0.2 ms	1.7	3.2	0.3	0.2	7.9
Visual, GLB	0.2	0.5	1.8	0.2 ms	3.0	38 ms	0.3	0.2	6.0
Visual, OBJ	0.2	0.5	1.8	0.3 ms	2.9	1.3	0.2	0.2	7.2

Board Repo: loxodes/vna Board: mamx_011036.kicad_pcb Folder hardware / mm_reflectometer / evalboards / mamx_011036 Complexity 266 / 1000 (size 171, features 95) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20201220) Parts, tracks, vias 31, 178, 90 Triangles, simulation 507,438 in 37 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 305 MB STEP 50 MB 345 MB STL 25 MB 322 MB OBJ 53 MB 343 MB Visual GLB 7.9 MB 284 MB OBJ 24 MB 286 MB

1574. sumusu_ats2012

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	75 ms	0.1	0.5	0.1 ms	0.7	41 ms	71 ms	0.2	1.7
Simulation, STEP	76 ms	0.1	0.5	0.1 ms	0.7	0.7	64 ms	0.2	2.4
Simulation, STL	81 ms	0.1	0.5	0.1 ms	0.8	28 ms	66 ms	0.2	1.8
Simulation, OBJ	75 ms	0.1	0.4	0.1 ms	0.7	0.6	70 ms	0.2	2.2
Visual, GLB	87 ms	0.1	0.5	0.1 ms	1.4	10 ms	56 ms	0.2	2.3
Visual, OBJ	77 ms	0.1	0.5	0.1 ms	1.3	0.2	57 ms	0.2	2.4

Board Repo: loxodes/vna Board: sumusu_ats2012.kicad_pcb Folder hardware / mm_reflectometer / evalboards / sumusu_ats2012 Complexity 206 / 1000 (size 111, features 95) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20201220) Parts, tracks, vias 3, 7, 13 Triangles, simulation 140,684 in 15 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.6 MB 198 MB STEP 12 MB 210 MB STL 7.0 MB 197 MB OBJ 14 MB 197 MB Visual GLB 1.6 MB 166 MB OBJ 4.6 MB 167 MB

1575. xx1000-qt

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	1.7	0.3 ms	1.6	65 ms	0.2	0.2	4.5
Simulation, STEP	0.2	0.5	1.7	0.3 ms	1.7	1.5	0.2	0.2	6.0
Simulation, STL	0.2	0.5	1.8	0.2 ms	1.6	0.2	0.2	0.2	4.7
Simulation, OBJ	0.2	0.4	1.6	0.2 ms	1.6	2.4	0.2	0.2	6.7
Visual, GLB	0.2	0.5	1.8	0.3 ms	3.4	50 ms	0.4	0.2	6.6
Visual, OBJ	0.2	0.5	1.6	0.2 ms	3.2	1.2	0.3	0.2	7.2

Board Repo: loxodes/vna Board: xx1000-qt.kicad_pcb Folder hardware / mm_reflectometer / evalboards / xx1000-qt Complexity 287 / 1000 (size 182, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20210228) Parts, tracks, vias 58, 346, 84 Triangles, simulation 529,594 in 42 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 18 MB 324 MB STEP 59 MB 356 MB STL 26 MB 324 MB OBJ 55 MB 405 MB Visual GLB 11 MB 322 MB OBJ 32 MB 326 MB

1576. mm_synth

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.7	4.1	13.1	1 ms	11.6	0.6	1.2	0.3	32.6
Simulation, STEP	1.5	4.4	13.2	1 ms	11.6	8.3	1.1	0.3	40.4
Simulation, STL	1.3	4.2	13.2	1 ms	11.5	1.2	1.1	0.3	32.9
Simulation, OBJ	1.3	4.2	13.0	1 ms	11.4	16.3	1.1	0.3	47.7
Visual, GLB	1.4	4.4	13.4	1 ms	31.3	0.3	3.4	0.3	54.4
Visual, OBJ	1.1	4.3	13.2	1 ms	30.4	9.6	3.8	0.3	62.7

Board Repo: loxodes/vna Board: mm_synth.kicad_pcb Folder hardware / mm_reflectometer / synth / mm_synth Complexity 297 / 1000 (size 192, features 105) KESE features slotted holes, custom pads, rounded, trapezoid or chamfered pads, drill offsets, copper drawings, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 8 File format KiCad 6 (20211014) Parts, tracks, vias 679, 0, 0 Triangles, simulation 3,436,034 in 332 parts Note mostly unrouted Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 111 MB 1.3 GB STEP 488 MB 1.4 GB STL 172 MB 1.2 GB OBJ 358 MB 2.2 GB Visual GLB 68 MB 1.3 GB OBJ 211 MB 1.4 GB

1577. synth_pod

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	4.2	16.6	1 ms	15.9	0.6	1.5	0.3	40.2
Simulation, STEP	1.1	4.3	16.8	1 ms	15.7	10.7	1.4	0.3	50.4
Simulation, STL	1.3	4.4	17.6	1 ms	15.9	1.4	1.5	0.3	42.3
Simulation, OBJ	1.1	4.3	16.8	0.9 ms	15.9	22.3	1.4	0.3	62.1
Visual, GLB	1.0	4.3	16.4	0.9 ms	35.0	0.4	3.0	0.3	60.4
Visual, OBJ	1.0	3.9	15.9	1.0 ms	35.1	12.5	3.2	0.3	72.0

Board Repo: loxodes/vna Board: synth_pod.kicad_pcb Folder hardware / mm_reflectometer / synth / synth_pod Complexity 281 / 1000 (size 186, features 95) KESE features custom pads, rounded, trapezoid or chamfered pads, drill offsets, copper drawings, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 8 File format KiCad 6 (20211014) Parts, tracks, vias 497, 0, 0 Triangles, simulation 4,161,276 in 367 parts Note mostly unrouted Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 135 MB 1.2 GB STEP 590 MB 1.8 GB STL 208 MB 1.3 GB OBJ 434 MB 2.6 GB Visual GLB 82 MB 1.4 GB OBJ 254 MB 1.7 GB

1578. vna_mm_ref

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	2.7	11.7	0.5 ms	9.0	0.4	0.9	0.3	25.4
Simulation, STEP	0.5	2.8	12.5	0.4 ms	8.9	5.4	0.9	0.2	31.3
Simulation, STL	0.4	3.0	12.6	0.7 ms	8.9	0.8	0.9	0.2	26.8
Simulation, OBJ	0.4	3.0	12.3	0.4 ms	8.7	11.7	0.9	0.3	37.2
Visual, GLB	0.4	3.0	12.6	0.8 ms	16.1	0.2	1.6	0.2	34.2
Visual, OBJ	0.4	2.8	12.7	0.5 ms	15.7	6.1	2.2	0.2	40.1

Board Repo: loxodes/vna Board: vna_mm_ref.kicad_pcb Folder hardware / vna_mm_ref Complexity 274 / 1000 (size 219, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 221, 1,166, 395 Triangles, simulation 2,863,846 in 134 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 98 MB 912 MB STEP 372 MB 1.2 GB STL 143 MB 894 MB OBJ 303 MB 1.9 GB Visual GLB 50 MB 975 MB OBJ 155 MB 1.1 GB

1579. vna_mm_synth

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	5.5	22.6	1.0 ms	15.7	0.5	1.1	0.3	46.7
Simulation, STEP	1.0	5.6	23.7	1 ms	17.3	11.9	1.0	0.3	60.9
Simulation, STL	1.0	6.0	25.6	1 ms	18.5	1.4	1.1	0.4	54.0
Simulation, OBJ	1.1	6.1	25.7	1 ms	18.0	17.8	1.4	0.3	70.3
Visual, GLB	1.0	6.3	25.8	3 ms	26.0	0.3	3.2	0.3	62.9
Visual, OBJ	1.0	6.1	26.0	2 ms	27.3	9.7	3.4	0.3	73.9

Board Repo: loxodes/vna Board: vna_mm_synth.kicad_pcb Folder hardware / vna_mm_synth Complexity 180 / 1000 (size 170, features 10) KESE features rounded, trapezoid or chamfered pads Tested 9th November 2026 Copper layers 6 File format KiCad 5 (20171130) Parts, tracks, vias 430, 0, 0 Triangles, simulation 2,684,964 in 356 parts Note mostly unrouted Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 92 MB 1.0 GB STEP 478 MB 1.3 GB STL 134 MB 1.1 GB OBJ 290 MB 1.9 GB Visual GLB 54 MB 1.0 GB OBJ 164 MB 1.2 GB

1580. vna_r1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	10.6	33.6	1 ms	23.8	1.1	3.0	0.4	73.5
Simulation, STEP	1.0	10.1	31.7	2 ms	23.1	13.7	3.1	0.4	83.1
Simulation, STL	1.1	10.4	32.0	2 ms	22.4	2.3	2.8	0.4	71.5
Simulation, OBJ	1.1	10.2	31.9	2 ms	22.4	34.1	2.9	0.4	102.8
Visual, GLB	1.1	10.1	31.4	2 ms	57.7	0.6	8.4	0.3	109.7
Visual, OBJ	1.1	10.1	31.7	1 ms	58.9	20.1	8.6	0.3	131.0

Board Repo: loxodes/vna Board: vna_r1.kicad_pcb Folder hardware / vna_rev1 / vna_r1_controller Complexity 361 / 1000 (size 306, features 55) KESE features through vias, slotted holes, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 428, 4,487, 806 Triangles, simulation 5,750,876 in 391 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 202 MB 1.7 GB STEP 797 MB 2.1 GB STL 288 MB 1.8 GB OBJ 624 MB 3.7 GB Visual GLB 131 MB 2.1 GB OBJ 418 MB 2.7 GB

1581. vna_r1_demod

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	3.3	14.5	0.9 ms	18.3	0.6	1.4	0.3	38.9
Simulation, STEP	0.5	3.2	14.2	1.0 ms	17.7	7.3	1.3	0.3	44.5
Simulation, STL	0.5	3.2	14.4	0.9 ms	18.3	1.0	1.3	0.3	39.0
Simulation, OBJ	0.5	3.3	14.3	0.9 ms	19.1	19.4	1.4	0.3	58.3
Visual, GLB	0.6	3.3	14.1	0.9 ms	31.0	0.2	2.1	0.3	51.7
Visual, OBJ	0.5	3.4	16.0	1 ms	31.8	9.0	2.2	0.3	63.2

Board Repo: loxodes/vna Board: vna_r1_demod.kicad_pcb Folder hardware / vna_rev1 / vna_r1_demod Complexity 255 / 1000 (size 200, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 111, 678, 158 Triangles, simulation 3,341,808 in 93 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 113 MB 1.1 GB STEP 344 MB 1.4 GB STL 167 MB 1.0 GB OBJ 349 MB 2.1 GB Visual GLB 52 MB 1.1 GB OBJ 161 MB 1.2 GB

1582. vna_r1_synth

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	2.7	10.4	0.8 ms	11.3	0.5	1.1	0.3	26.6
Simulation, STEP	0.5	2.6	10.0	0.7 ms	11.1	5.6	1.1	0.3	31.1
Simulation, STL	0.5	2.6	10.3	0.6 ms	11.0	1.0	1.1	0.3	26.9
Simulation, OBJ	0.4	2.8	10.3	0.8 ms	11.5	13.4	1.1	0.3	39.8
Visual, GLB	0.4	2.6	10.4	0.5 ms	24.7	0.3	2.7	0.3	41.4
Visual, OBJ	0.5	2.9	10.2	0.7 ms	25.3	7.6	2.6	0.3	49.3

Board Repo: loxodes/vna Board: vna_r1_synth.kicad_pcb Folder hardware / vna_rev1 / vna_r1_synth Complexity 292 / 1000 (size 247, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 135, 1,070, 169 Triangles, simulation 2,886,442 in 106 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 98 MB 995 MB STEP 312 MB 1.2 GB STL 144 MB 1.0 GB OBJ 302 MB 1.9 GB Visual GLB 55 MB 1.1 GB OBJ 172 MB 1.3 GB

1583. [DFR1142]Lite Carrier for LattePanda Mu

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	6.2	21.8	2 ms	20.8	0.9	2.2	0.3	53.7
Simulation, STEP	1.6	5.8	22.6	2 ms	21.3	13.7	2.3	0.4	67.7
Simulation, STL	1.6	5.7	21.4	2 ms	21.4	2.1	2.2	0.4	54.8
Simulation, OBJ	1.5	6.1	21.9	2 ms	22.0	26.1	2.4	0.4	80.5
Visual, GLB	1.6	6.1	23.0	2 ms	49.0	0.6	6.5	0.3	87.2
Visual, OBJ	1.7	6.5	23.1	2 ms	48.6	17.6	6.7	0.3	104.5

Board Repo: ltbrain/mubook Board: [DFR1142]Lite Carrier for LattePanda Mu.kicad_pcb Folder hardware / v.1 Complexity 406 / 1000 (size 286, features 120) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 273, 4,113, 1,035 Triangles, simulation 5,358,896 in 432 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 183 MB 1.5 GB STEP 764 MB 2.2 GB STL 268 MB 1.5 GB OBJ 577 MB 3.5 GB Visual GLB 118 MB 2.0 GB OBJ 384 MB 2.5 GB

1584. Aleste520v4

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.0	24.7	156.7	2 ms	94.6	3.8	16.9	0.7	300.4
Simulation, STEP	3.2	23.4	156.4	3 ms	93.3	55.9	18.5	0.7	351.3
Simulation, STL	3.3	24.9	158.0	5 ms	111.4	14.0	21.9	0.7	334.3
Simulation, OBJ	2.9	24.5	152.4	6 ms	97.5	137.6	20.2	0.9	436.1
Visual, GLB	3.3	25.7	170.1	4 ms	308.2	2.6	26.6	0.6	536.9
Visual, OBJ	3.7	27.6	164.6	3 ms	311.9	96.7	25.1	0.6	630.2

Board Repo: lucedoriente/Aleste520ex Board: Aleste520v4.kicad_pcb Folder board Complexity 318 / 1000 (size 243, features 75) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 to 10th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 326, 9,389, 4,195 Triangles, simulation 19,250,030 in 466 parts Verifier PASS in all six runs Run again Simulation, OBJ: failed in the corpus run, run again with the memory cap raised from 11 GB to 14.5 GB, and passed

File type File size Peak memory used Simulation GLB 660 MB 5.3 GB STEP 3.1 GB 6.9 GB STL 963 MB 5.7 GB OBJ 2.1 GB 12 GB Visual GLB 430 MB 6.7 GB OBJ 1.4 GB 8.4 GB

1585. Aleste520_Keyboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.4	3.2	13.4	0.6 ms	10.7	0.5	1.3	0.3	30.8
Simulation, STEP	1.4	3.1	13.2	0.7 ms	10.9	8.0	1.2	0.2	38.0
Simulation, STL	1.5	3.2	14.0	0.4 ms	12.2	1.0	1.2	0.3	33.4
Simulation, OBJ	1.4	3.1	13.4	0.5 ms	10.6	18.1	1.2	0.3	48.1
Visual, GLB	1.4	3.0	13.2	0.7 ms	25.9	0.3	3.5	0.3	47.6
Visual, OBJ	1.4	3.1	13.5	0.4 ms	25.9	12.6	4.0	0.3	60.8

Board Repo: lucedoriente/Aleste520ex Board: Aleste520_Keyboard.kicad_pcb Folder keyboard Complexity 268 / 1000 (size 233, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 167, 17,707, 141 Triangles, simulation 3,352,674 in 114 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 112 MB 1.4 GB STEP 438 MB 1.5 GB STL 168 MB 1.3 GB OBJ 351 MB 2.2 GB Visual GLB 79 MB 1.6 GB OBJ 246 MB 1.7 GB

1586. DepthABC

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	2.7	7.5	0.9 ms	10.3	0.4	1.1	0.3	23.0
Simulation, STEP	0.7	2.6	7.5	1 ms	9.9	7.0	1.1	0.3	29.2
Simulation, STL	0.7	2.5	7.7	1.0 ms	10.3	0.9	1.1	0.3	23.4
Simulation, OBJ	0.7	2.5	7.5	1 ms	10.0	12.9	1.2	0.3	35.1
Visual, GLB	0.6	2.7	7.2	1 ms	21.4	0.3	3.2	0.3	35.7
Visual, OBJ	0.7	2.4	7.4	1 ms	20.8	9.5	4.0	0.3	45.0

Board Repo: luxonis/depthai-hardware Board: DepthABC.kicad_pcb Folder OSHW_KiCad_Community / Reference Designs (In Progress) / DepthABC Complexity 315 / 1000 (size 225, features 90) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 83, 5,199, 450 Triangles, simulation 2,455,628 in 177 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 84 MB 856 MB STEP 332 MB 1.1 GB STL 123 MB 859 MB OBJ 257 MB 1.6 GB Visual GLB 60 MB 1.1 GB OBJ 190 MB 1.3 GB

1587. payload_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	3.5	0.6 ms	3.3	0.1	0.4	0.2	8.3
Simulation, STEP	0.2	0.6	3.6	0.7 ms	3.1	2.9	0.4	0.2	11.1
Simulation, STL	0.2	0.5	3.5	0.8 ms	3.1	0.3	0.4	0.3	8.3
Simulation, OBJ	0.2	0.6	3.5	1 ms	3.3	3.3	0.4	0.2	11.6
Visual, GLB	0.2	0.6	3.5	0.9 ms	8.7	95 ms	0.8	0.3	14.1
Visual, OBJ	0.2	0.6	3.5	0.9 ms	8.6	2.6	0.8	0.2	16.6

Board Repo: M2I-CySat/SDR-Carrier-Board Board: payload_board.kicad_pcb Folder schematics / breakoutBoard Complexity 164 / 1000 (size 129, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 7, 172, 21 Triangles, simulation 714,524 in 392 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 24 MB 396 MB STEP 126 MB 477 MB STL 36 MB 405 MB OBJ 72 MB 521 MB Visual GLB 20 MB 551 MB OBJ 59 MB 585 MB

1588. Mupi

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.9	5.5	0.4 ms	3.5	0.2	0.4	0.2	11.0
Simulation, STEP	0.3	1.0	5.5	0.4 ms	3.5	2.9	0.4	0.2	13.8
Simulation, STL	0.3	1.0	5.5	0.4 ms	3.5	0.3	0.4	0.2	11.1
Simulation, OBJ	0.3	0.9	5.7	0.3 ms	3.4	4.9	0.4	0.2	15.7
Visual, GLB	0.2	1.0	5.2	0.6 ms	8.4	0.1	1.1	0.2	16.3
Visual, OBJ	0.3	1.0	5.4	0.4 ms	8.5	3.5	1.1	0.2	19.9

Board Repo: m47812/custom-3d-printer-controller Board: Mupi.kicad_pcb Folder 3D_Printer_Handheld Complexity 227 / 1000 (size 172, features 55) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 84, 497, 68 Triangles, simulation 1,166,542 in 73 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 41 MB 562 MB STEP 213 MB 621 MB STL 58 MB 563 MB OBJ 121 MB 801 MB Visual GLB 29 MB 608 MB OBJ 87 MB 665 MB

1589. 3D_Printer_Mainboard_STM32

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	3.7	20.5	0.9 ms	12.2	0.5	1.6	0.3	39.6
Simulation, STEP	0.8	3.7	20.1	0.9 ms	12.4	9.6	1.6	0.3	48.5
Simulation, STL	0.8	3.6	19.9	0.5 ms	12.3	1.1	1.7	0.3	39.7
Simulation, OBJ	0.6	3.8	20.0	2 ms	12.8	16.7	1.6	0.3	55.8
Visual, GLB	0.8	3.8	20.0	0.8 ms	29.9	0.4	4.5	0.3	59.6
Visual, OBJ	0.8	3.7	20.5	0.6 ms	31.1	12.4	4.4	0.3	73.2

Board Repo: m47812/custom-3d-printer-controller Board: 3D_Printer_Mainboard_STM32.kicad_pcb Folder 3D_Printer_Mainboard_STM32 Complexity 284 / 1000 (size 239, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 191, 1,355, 233 Triangles, simulation 3,389,266 in 196 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 118 MB 1.2 GB STEP 621 MB 1.4 GB STL 169 MB 1.2 GB OBJ 363 MB 2.3 GB Visual GLB 86 MB 1.4 GB OBJ 267 MB 1.8 GB

1590. 3D_Printer_Stepper_TMC2209

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	1.5	0.2 ms	1.5	66 ms	0.2	0.3	4.1
Simulation, STEP	0.1	0.4	1.6	0.5 ms	1.7	1.5	0.2	0.2	5.7
Simulation, STL	0.2	0.4	1.3	0.2 ms	1.5	0.1	0.2	0.2	3.9
Simulation, OBJ	0.2	0.4	1.5	0.2 ms	1.7	2.2	0.2	0.2	6.3
Visual, GLB	0.1	0.5	1.5	0.2 ms	3.4	50 ms	0.5	0.3	6.3
Visual, OBJ	0.2	0.4	1.5	0.4 ms	3.0	1.5	0.4	0.2	7.2

Board Repo: m47812/custom-3d-printer-controller Board: 3D_Printer_Stepper_TMC2209.kicad_pcb Folder 3D_Printer_Motor_Driver Complexity 257 / 1000 (size 187, features 70) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 21, 227, 44 Triangles, simulation 417,724 in 38 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 276 MB STEP 77 MB 311 MB STL 21 MB 291 MB OBJ 42 MB 337 MB Visual GLB 11 MB 289 MB OBJ 31 MB 303 MB

1591. blaustahl

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	2.5	0.4 ms	1.9	76 ms	0.2	0.3	5.5
Simulation, STEP	0.2	0.4	2.3	0.4 ms	1.8	1.7	0.2	0.2	6.8
Simulation, STL	0.2	0.4	2.6	2 ms	2.2	0.2	0.2	0.2	6.0
Simulation, OBJ	0.3	0.4	2.5	0.3 ms	1.9	2.4	0.3	0.3	8.1
Visual, GLB	0.2	0.4	2.5	0.3 ms	4.2	54 ms	0.5	0.3	8.2
Visual, OBJ	0.2	0.4	2.4	0.4 ms	4.2	1.7	0.4	0.3	9.5

Board Repo: machdyne/blaustahl Board: blaustahl.kicad_pcb Folder pcb / blaustahl_v0 Complexity 296 / 1000 (size 201, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 38, 388, 63 Triangles, simulation 388,128 in 64 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 299 MB STEP 75 MB 335 MB STL 19 MB 285 MB OBJ 40 MB 322 MB Visual GLB 9.8 MB 299 MB OBJ 29 MB 306 MB

1592. eis

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	2.1	8.7	0.5 ms	7.3	0.3	0.8	0.2	19.8
Simulation, STEP	0.5	2.1	8.1	0.4 ms	7.2	5.3	0.8	0.3	24.1
Simulation, STL	0.5	2.1	8.2	0.5 ms	7.1	0.5	0.8	0.3	19.5
Simulation, OBJ	0.4	2.1	8.3	0.5 ms	7.3	10.0	0.8	0.2	29.3
Visual, GLB	0.5	2.1	8.2	0.4 ms	13.7	0.2	1.2	0.2	26.1
Visual, OBJ	0.5	2.1	8.4	0.5 ms	14.2	5.7	1.7	0.2	32.8

Board Repo: machdyne/eis Board: eis.kicad_pcb Folder pcb / eis_v0 Complexity 364 / 1000 (size 269, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 103, 1,474, 220 Triangles, simulation 1,893,902 in 185 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 65 MB 753 MB STEP 306 MB 895 MB STL 95 MB 762 MB OBJ 200 MB 1.3 GB Visual GLB 37 MB 759 MB OBJ 116 MB 927 MB

1593. ssx

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.1	0.6 ms	2.7	0.1	0.4	0.2	6.4
Simulation, STEP	0.3	0.6	2.0	0.4 ms	2.6	2.2	0.4	0.2	8.3
Simulation, STL	0.3	0.6	1.9	0.3 ms	2.5	0.2	0.4	0.2	6.1
Simulation, OBJ	0.3	0.5	2.1	0.4 ms	2.6	3.5	0.4	0.2	9.6
Visual, GLB	0.3	0.5	2.0	0.4 ms	5.4	73 ms	0.6	0.3	9.2
Visual, OBJ	0.2	0.6	1.9	0.4 ms	5.4	2.2	0.6	0.2	11.0

Board Repo: machdyne/ferrit Board: ssx.kicad_pcb Folder hw / ferrit-1 Complexity 347 / 1000 (size 222, features 125) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 43, 546, 60 Triangles, simulation 719,896 in 85 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 24 MB 349 MB STEP 97 MB 435 MB STL 36 MB 350 MB OBJ 72 MB 533 MB Visual GLB 15 MB 378 MB OBJ 44 MB 405 MB

1594. ssu

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.2	9.8	0.5 ms	9.7	0.6	1.2	0.3	24.4
Simulation, STEP	0.6	1.9	9.4	0.6 ms	9.6	7.0	1.2	0.3	29.9
Simulation, STL	0.6	1.9	9.1	0.5 ms	9.5	1.1	1.4	0.3	23.9
Simulation, OBJ	0.5	1.9	9.2	0.4 ms	9.6	15.6	1.3	0.3	38.3
Visual, GLB	0.5	1.8	9.0	0.8 ms	20.4	0.3	2.2	0.3	34.5
Visual, OBJ	0.5	1.9	9.4	0.6 ms	20.2	7.9	2.5	0.3	42.7

Board Repo: machdyne/ferrit Board: ssu.kicad_pcb Folder hw / ferrit-16 Complexity 306 / 1000 (size 191, features 115) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 37, 1,219, 50 Triangles, simulation 2,954,306 in 46 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 100 MB 1.1 GB STEP 396 MB 1.2 GB STL 148 MB 1.0 GB OBJ 310 MB 1.9 GB Visual GLB 52 MB 989 MB OBJ 161 MB 1.2 GB

1595. sxy

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.2	0.4 ms	2.0	72 ms	0.3	0.2	4.3
Simulation, STEP	0.2	0.4	1.2	0.3 ms	2.0	1.7	0.3	0.2	5.9
Simulation, STL	0.2	0.4	1.3	0.3 ms	2.0	0.1	0.3	0.2	4.4
Simulation, OBJ	0.2	0.4	1.3	0.2 ms	1.9	2.3	0.3	0.2	6.5
Visual, GLB	0.2	0.4	1.3	0.2 ms	3.9	53 ms	0.4	0.2	6.5
Visual, OBJ	0.2	0.4	1.2	0.2 ms	3.9	1.5	0.6	0.2	8.0

Board Repo: machdyne/ferrit Board: sxy.kicad_pcb Folder hw / ferrit-cy Complexity 349 / 1000 (size 224, features 125) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 45, 591, 64 Triangles, simulation 564,848 in 87 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 19 MB 329 MB STEP 84 MB 385 MB STL 28 MB 321 MB OBJ 56 MB 415 MB Visual GLB 13 MB 415 MB OBJ 38 MB 352 MB

1596. sxa

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	1.7	0.2 ms	3.7	0.1	0.4	0.2	7.0
Simulation, STEP	0.3	0.6	1.9	0.2 ms	4.0	3.0	0.5	0.3	10.6
Simulation, STL	0.3	0.8	1.9	0.3 ms	3.7	0.3	0.4	0.3	7.6
Simulation, OBJ	0.2	0.6	1.9	0.2 ms	3.7	3.8	0.4	0.3	11.0
Visual, GLB	0.3	0.6	1.7	0.3 ms	5.7	96 ms	0.6	0.2	9.2
Visual, OBJ	0.2	0.6	1.7	0.3 ms	5.2	2.9	0.7	0.2	11.7

Board Repo: machdyne/ferrit Board: sxa.kicad_pcb Folder hw / ferrit-m8 Complexity 281 / 1000 (size 181, features 100) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 30, 525, 103 Triangles, simulation 658,288 in 32 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 22 MB 357 MB STEP 92 MB 429 MB STL 33 MB 357 MB OBJ 66 MB 466 MB Visual GLB 16 MB 483 MB OBJ 48 MB 484 MB

1597. kaltstahl

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	2.3	0.4 ms	1.9	71 ms	0.2	0.3	5.3
Simulation, STEP	0.2	0.4	2.6	0.3 ms	1.8	1.8	0.3	0.2	7.3
Simulation, STL	0.2	0.4	2.4	0.3 ms	1.8	0.1	0.3	0.3	5.4
Simulation, OBJ	0.3	0.4	2.5	0.4 ms	1.8	2.5	0.2	0.3	7.9
Visual, GLB	0.2	0.4	2.5	0.3 ms	3.9	67 ms	0.4	0.3	7.8
Visual, OBJ	0.2	0.4	2.4	0.3 ms	4.1	1.8	0.4	0.2	9.5

Board Repo: machdyne/kaltstahl Board: kaltstahl.kicad_pcb Folder pcb / kaltstahl_v0 Complexity 296 / 1000 (size 201, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 39, 409, 61 Triangles, simulation 393,460 in 66 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 293 MB STEP 76 MB 341 MB STL 20 MB 287 MB OBJ 40 MB 331 MB Visual GLB 9.9 MB 313 MB OBJ 29 MB 318 MB

1598. pmod_ethernet

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.0	0.2 ms	1.2	60 ms	0.2	0.3	3.3
Simulation, STEP	0.1	0.3	1.1	0.2 ms	1.2	1.3	0.2	0.2	4.5
Simulation, STL	0.2	0.4	1.1	0.2 ms	1.3	88 ms	0.3	0.2	3.4
Simulation, OBJ	0.2	0.3	1.1	0.2 ms	1.3	2.1	0.2	0.2	5.4
Visual, GLB	0.2	0.3	1.0	0.2 ms	2.6	35 ms	0.2	0.2	4.6
Visual, OBJ	0.2	0.3	1.0	0.3 ms	2.6	1.3	0.2	0.2	5.8

Board Repo: machdyne/katze Board: pmod_ethernet.kicad_pcb Folder pcb / katze_v1 Complexity 248 / 1000 (size 163, features 85) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 21, 257, 30 Triangles, simulation 385,774 in 40 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 13 MB 261 MB STEP 48 MB 273 MB STL 19 MB 255 MB OBJ 38 MB 278 MB Visual GLB 7.7 MB 261 MB OBJ 23 MB 259 MB

1599. kuchen

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.6	5.8	0.7 ms	8.6	0.3	0.9	0.3	17.9
Simulation, STEP	0.5	1.6	5.7	0.7 ms	8.9	5.8	1.0	0.2	23.8
Simulation, STL	0.5	1.6	5.8	1.0 ms	8.7	0.6	0.9	0.4	18.5
Simulation, OBJ	0.4	1.6	5.6	0.9 ms	8.8	9.2	1.0	0.3	26.9
Visual, GLB	0.5	1.7	5.8	0.6 ms	16.4	0.2	1.7	0.2	26.4
Visual, OBJ	0.5	1.7	5.7	0.7 ms	15.5	6.0	2.3	0.3	32.0

Board Repo: machdyne/kuchen Board: kuchen.kicad_pcb Folder pcb / kuchen_v0 Complexity 367 / 1000 (size 257, features 110) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 94, 1,189, 193 Triangles, simulation 1,833,026 in 266 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 61 MB 703 MB STEP 267 MB 832 MB STL 92 MB 698 MB OBJ 194 MB 1.2 GB Visual GLB 41 MB 981 MB OBJ 130 MB 910 MB

1600. lakritz

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.6	7.2	0.8 ms	9.0	0.3	0.8	0.3	19.6
Simulation, STEP	0.5	1.6	7.3	0.9 ms	9.9	6.0	0.9	0.2	26.4
Simulation, STL	0.5	1.6	7.6	1 ms	10.1	0.6	0.9	0.3	21.5
Simulation, OBJ	0.5	1.6	7.3	0.9 ms	9.3	10.8	0.8	0.2	30.6
Visual, GLB	0.5	1.7	7.6	1 ms	15.7	0.3	1.6	0.2	27.5
Visual, OBJ	0.5	1.7	7.4	0.8 ms	16.7	6.8	1.9	0.3	35.3

Board Repo: machdyne/lakritz Board: lakritz.kicad_pcb Folder pcb / v0 Complexity 390 / 1000 (size 260, features 130) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 103, 1,372, 209 Triangles, simulation 1,936,052 in 266 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 65 MB 711 MB STEP 293 MB 891 MB STL 97 MB 733 MB OBJ 201 MB 1.3 GB Visual GLB 42 MB 904 MB OBJ 130 MB 944 MB

1601. obst

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.4	10.0	1 ms	12.9	0.3	1.4	0.3	27.9
Simulation, STEP	0.5	2.1	9.4	0.8 ms	12.8	7.2	1.2	0.3	33.6
Simulation, STL	0.6	2.3	9.4	0.7 ms	13.2	0.8	1.3	0.3	27.9
Simulation, OBJ	0.5	2.2	9.6	0.7 ms	12.6	13.2	1.3	0.2	39.6
Visual, GLB	0.6	2.3	9.7	0.8 ms	20.8	0.3	2.6	0.3	36.6
Visual, OBJ	0.6	2.2	9.6	1 ms	21.3	8.4	2.9	0.3	45.3

Board Repo: machdyne/obst Board: obst.kicad_pcb Folder pcb / mdr_v0b Complexity 363 / 1000 (size 268, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 142, 1,666, 308 Triangles, simulation 2,753,452 in 280 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 94 MB 922 MB STEP 393 MB 1.1 GB STL 138 MB 923 MB OBJ 288 MB 1.8 GB Visual GLB 58 MB 1.3 GB OBJ 182 MB 1.2 GB

1602. riegel

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.7	9.0	0.9 ms	7.8	0.3	0.7	0.2	20.0
Simulation, STEP	0.4	1.8	8.5	0.9 ms	7.8	4.2	0.8	0.3	23.8
Simulation, STL	0.3	2.0	9.2	0.9 ms	7.6	0.6	0.8	0.3	20.7
Simulation, OBJ	0.3	2.0	9.0	1.0 ms	7.5	8.8	0.8	0.2	28.7
Visual, GLB	0.4	1.9	8.9	0.8 ms	11.9	0.1	1.3	0.2	24.7
Visual, OBJ	0.5	1.9	9.1	0.8 ms	11.5	4.5	1.1	0.2	28.9

Board Repo: machdyne/riegel Board: riegel.kicad_pcb Folder pcb / riegel_v4 Complexity 358 / 1000 (size 263, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 89, 1,297, 157 Triangles, simulation 1,733,082 in 152 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 59 MB 622 MB STEP 278 MB 791 MB STL 87 MB 617 MB OBJ 182 MB 1.2 GB Visual GLB 33 MB 682 MB OBJ 100 MB 790 MB

1603. schoko

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	2.2	10.3	0.6 ms	7.2	0.3	0.8	0.2	21.5
Simulation, STEP	0.4	2.2	9.8	0.6 ms	6.9	5.3	0.9	0.3	25.8
Simulation, STL	0.5	2.3	11.1	0.6 ms	7.6	0.7	0.9	0.3	23.5
Simulation, OBJ	0.4	2.0	10.5	0.6 ms	7.6	8.8	0.8	0.2	30.3
Visual, GLB	0.4	2.0	10.2	1 ms	13.4	0.2	1.3	0.2	27.9
Visual, OBJ	0.4	2.1	10.3	0.6 ms	14.3	5.0	1.5	0.2	33.8

Board Repo: machdyne/schoko Board: schoko.kicad_pcb Folder pcb / schoko_v2 Complexity 357 / 1000 (size 262, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 108, 1,544, 207 Triangles, simulation 2,133,590 in 269 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 73 MB 774 MB STEP 349 MB 972 MB STL 107 MB 728 MB OBJ 227 MB 1.4 GB Visual GLB 41 MB 978 MB OBJ 127 MB 1.0 GB

1604. Main

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.6	2.8	8.0	1 ms	7.1	0.3	0.6	0.3	20.8
Simulation, STEP	1.6	2.8	8.4	1 ms	7.4	5.3	0.6	0.3	26.3
Simulation, STL	1.6	2.6	8.0	0.9 ms	7.0	0.5	0.6	0.3	20.6
Simulation, OBJ	1.6	2.7	8.2	1 ms	7.2	7.2	0.7	0.3	27.8
Visual, GLB	1.7	2.8	8.1	1.0 ms	20.2	0.2	1.9	0.3	35.1
Visual, OBJ	1.7	2.8	8.3	1 ms	20.6	6.9	2.2	0.3	42.9

Board Repo: makerspet/oomwoo-pcb Board: Main.kicad_pcb Folder kicad / main Complexity 228 / 1000 (size 138, features 90) KESE features slotted holes, custom pads, rounded, trapezoid or chamfered pads, copper drawings, copper text, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 385, 0, 0 Triangles, simulation 1,448,360 in 433 parts Note mostly unrouted Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 52 MB 861 MB STEP 259 MB 904 MB STL 72 MB 837 MB OBJ 157 MB 1.1 GB Visual GLB 47 MB 1.1 GB OBJ 140 MB 1.1 GB

1605. Main_PDB

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	5.1	16.1	2 ms	18.3	0.9	2.2	0.4	44.1
Simulation, STEP	1.2	5.3	16.2	2 ms	18.1	9.8	2.2	0.3	53.2
Simulation, STL	1.2	4.9	15.6	1 ms	18.5	1.9	2.3	0.3	44.7
Simulation, OBJ	1.2	5.3	17.0	1 ms	18.3	25.4	2.3	0.3	69.8
Visual, GLB	1.0	5.1	15.7	1 ms	29.0	0.2	3.0	0.3	54.4
Visual, OBJ	1.1	5.1	16.0	1 ms	28.0	9.6	3.0	0.3	63.1

Board Repo: malcollm/pdb Board: Main_PDB.kicad_pcb Complexity 325 / 1000 (size 215, features 110) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 6 File format KiCad 10 (20260206) Parts, tracks, vias 186, 454, 216 Triangles, simulation 5,174,936 in 122 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 171 MB 1.3 GB STEP 574 MB 1.5 GB STL 259 MB 1.3 GB OBJ 543 MB 3.3 GB Visual GLB 67 MB 1.3 GB OBJ 211 MB 1.6 GB

1606. homebrew_486

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.2	9.2	35.2	2 ms	38.1	1.8	6.3	0.4	93.2
Simulation, STEP	2.2	9.0	35.0	1 ms	37.8	26.4	6.3	0.4	117.2
Simulation, STL	2.3	9.0	36.1	1 ms	40.0	3.6	6.4	0.4	97.8
Simulation, OBJ	2.3	9.3	36.0	1 ms	39.6	62.9	6.7	0.5	157.3
Visual, GLB	2.3	9.6	36.1	1 ms	90.1	1.0	9.1	0.3	148.5
Visual, OBJ	2.2	9.1	35.3	1 ms	87.3	38.3	9.1	0.3	181.6

Board Repo: maniekx86/m8sbc-486 Board: homebrew_486.kicad_pcb Folder pcb Complexity 393 / 1000 (size 288, features 105) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, TrueType text, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 122, 10,279, 1,150 Triangles, simulation 10,969,982 in 348 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 372 MB 2.9 GB STEP 1.5 GB 3.6 GB STL 549 MB 2.8 GB OBJ 1.2 GB 6.8 GB Visual GLB 238 MB 3.7 GB OBJ 768 MB 4.8 GB

1607. pcb

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.4	5.8	8.4	1 ms	12.6	0.5	2.0	0.4	31.1
Simulation, STEP	0.9	5.0	7.8	1 ms	12.8	8.2	2.0	0.3	37.0
Simulation, STL	0.9	5.2	8.2	1 ms	12.3	1.1	2.0	0.3	30.0
Simulation, OBJ	0.9	5.3	8.0	1 ms	13.4	22.1	2.3	0.4	52.4
Visual, GLB	1.2	6.0	9.0	1 ms	26.1	0.3	3.1	0.3	46.1
Visual, OBJ	0.9	5.3	8.3	1 ms	26.7	10.1	3.6	0.3	55.2

Board Repo: manyetox/huma-rocket-flight-computer Board: pcb.kicad_pcb Folder hardware Complexity 405 / 1000 (size 270, features 135) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 6 File format KiCad 9 (20241229) Parts, tracks, vias 151, 2,313, 327 Triangles, simulation 3,307,666 in 184 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 111 MB 949 MB STEP 417 MB 1.3 GB STL 165 MB 985 MB OBJ 347 MB 2.1 GB Visual GLB 61 MB 1.2 GB OBJ 194 MB 1.3 GB

1608. dexx_video_adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.4	0.4 ms	1.8	84 ms	0.4	0.2	5.5
Simulation, STEP	0.2	0.5	2.5	0.4 ms	1.7	1.6	0.4	0.3	7.1
Simulation, STL	0.2	0.6	2.4	0.5 ms	1.7	0.2	0.3	0.2	5.5
Simulation, OBJ	0.2	0.5	2.6	0.3 ms	1.8	2.9	0.3	0.3	8.6
Visual, GLB	0.2	0.5	2.4	0.4 ms	4.5	65 ms	0.6	0.3	8.6
Visual, OBJ	0.2	0.6	2.4	0.3 ms	4.9	1.8	0.6	0.2	10.7

Board Repo: marqs85/ossc_pro_hw Board: dexx_video_adapter.kicad_pcb Folder adapters / av_adapter Complexity 228 / 1000 (size 143, features 85) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 11, 107, 109 Triangles, simulation 538,966 in 36 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 18 MB 317 MB STEP 64 MB 351 MB STL 27 MB 331 MB OBJ 54 MB 397 MB Visual GLB 13 MB 366 MB OBJ 38 MB 358 MB

1609. pcb1p5_hv_syncfix

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	80 ms	57 ms	0.2	0.1 ms	0.2	7 ms	23 ms	0.2	0.8
Simulation, STEP	74 ms	53 ms	0.2	0.1 ms	0.3	0.2	22 ms	0.2	1.0
Simulation, STL	81 ms	51 ms	0.2	0.1 ms	0.2	8 ms	18 ms	0.2	0.8
Simulation, OBJ	69 ms	42 ms	0.2	0.1 ms	0.2	0.1	20 ms	0.2	0.8
Visual, GLB	91 ms	52 ms	0.2	0.1 ms	0.4	5 ms	39 ms	0.2	1.0
Visual, OBJ	83 ms	54 ms	0.2	0.1 ms	0.4	0.2	37 ms	0.2	1.1

Board Repo: marqs85/ossc_pro_hw Board: pcb1p5_hv_syncfix.kicad_pcb Folder adapters / pcb1p5_hv_syncfix Complexity 170 / 1000 (size 95, features 75) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 2, 34, 8 Triangles, simulation 30,502 in 14 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 1.1 MB 66 MB STEP 5.1 MB 70 MB STL 1.5 MB 66 MB OBJ 2.9 MB 71 MB Visual GLB 954 kB 96 MB OBJ 2.5 MB 98 MB

1610. panel

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	82 ms	85 ms	0.5	0.2 ms	0.6	16 ms	59 ms	0.2	1.5
Simulation, STEP	80 ms	91 ms	0.5	0.1 ms	0.5	0.8	58 ms	0.2	2.2
Simulation, STL	74 ms	79 ms	0.4	0.1 ms	0.6	23 ms	67 ms	0.2	1.5
Simulation, OBJ	81 ms	93 ms	0.4	0.1 ms	0.5	0.6	57 ms	0.2	2.0
Visual, GLB	79 ms	80 ms	0.5	0.1 ms	0.9	9 ms	62 ms	0.2	1.8
Visual, OBJ	78 ms	81 ms	0.4	0.1 ms	0.9	0.4	65 ms	0.2	2.1

Board Repo: marqs85/ossc_pro_hw Board: panel.kicad_pcb Folder buttonpanel Complexity 87 / 1000 (size 87, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 5, 21, 0 Triangles, simulation 100,836 in 19 parts Note panel Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.5 MB 176 MB STEP 15 MB 182 MB STL 5.0 MB 181 MB OBJ 9.7 MB 178 MB Visual GLB 1.7 MB 154 MB OBJ 4.7 MB 153 MB

1611. extra_av_out

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.1	7.3	2 ms	7.0	0.3	0.9	0.3	18.3
Simulation, STEP	0.5	1.9	7.1	0.8 ms	6.6	4.9	0.8	0.3	22.0
Simulation, STL	0.5	2.0	7.1	0.7 ms	6.8	0.6	0.9	0.3	18.2
Simulation, OBJ	0.5	2.0	6.9	2 ms	6.6	10.9	0.9	0.3	28.1
Visual, GLB	0.5	2.0	7.1	0.7 ms	13.7	0.2	1.5	0.3	25.2
Visual, OBJ	0.5	2.0	7.3	0.8 ms	13.8	6.6	1.5	0.3	32.0

Board Repo: marqs85/ossc_pro_hw Board: extra_av_out.kicad_pcb Folder expansions / extra_av_out Complexity 297 / 1000 (size 242, features 55) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 73, 800, 316 Triangles, simulation 1,899,088 in 111 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 64 MB 723 MB STEP 215 MB 860 MB STL 95 MB 712 MB OBJ 196 MB 1.3 GB Visual GLB 38 MB 744 MB OBJ 114 MB 861 MB

1612. legacy_av_in

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.6	5.8	0.6 ms	5.5	0.3	0.7	0.2	14.4
Simulation, STEP	0.3	1.6	6.0	0.8 ms	5.5	3.5	0.7	0.3	17.9
Simulation, STL	0.4	1.7	5.7	0.7 ms	5.6	0.5	0.7	0.2	14.8
Simulation, OBJ	0.5	1.8	5.9	0.7 ms	5.4	7.5	0.7	0.3	22.1
Visual, GLB	0.4	1.6	5.8	0.4 ms	11.7	0.2	1.2	0.2	21.1
Visual, OBJ	0.4	1.6	6.0	3 ms	11.5	4.4	1.4	0.2	25.4

Board Repo: marqs85/ossc_pro_hw Board: legacy_av_in.kicad_pcb Folder expansions / legacy_av_in Complexity 341 / 1000 (size 261, features 80) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 87, 786, 394 Triangles, simulation 1,904,396 in 119 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 64 MB 838 MB STEP 192 MB 862 MB STL 95 MB 820 MB OBJ 197 MB 1.3 GB Visual GLB 38 MB 744 MB OBJ 114 MB 844 MB

1613. ram_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.8	2.6	0.3 ms	2.9	0.1	0.6	0.2	7.5
Simulation, STEP	0.2	0.8	2.6	0.3 ms	3.0	2.3	0.6	0.2	9.7
Simulation, STL	0.2	0.8	2.6	0.3 ms	3.0	0.2	0.5	0.2	7.5
Simulation, OBJ	0.2	0.9	2.6	0.3 ms	2.9	4.9	0.5	0.2	12.2
Visual, GLB	0.3	0.8	2.6	0.3 ms	5.9	71 ms	0.5	0.2	10.4
Visual, OBJ	0.2	0.8	2.6	0.3 ms	5.8	2.5	0.8	0.2	12.9

Board Repo: marqs85/ossc_pro_hw Board: ram_board.kicad_pcb Folder expansions / ram_board Complexity 254 / 1000 (size 169, features 85) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 11, 288, 153 Triangles, simulation 938,910 in 64 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 31 MB 439 MB STEP 104 MB 509 MB STL 47 MB 465 MB OBJ 94 MB 644 MB Visual GLB 17 MB 494 MB OBJ 52 MB 448 MB

1614. ossc_pro

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	7.1	15.2	1 ms	11.4	0.4	0.9	0.3	36.8
Simulation, STEP	1.5	6.8	15.1	1 ms	11.9	8.4	1.0	0.3	45.0
Simulation, STL	1.5	7.0	15.0	1 ms	12.1	0.9	1.0	0.3	37.8
Simulation, OBJ	1.4	6.9	14.9	1 ms	11.7	12.4	0.9	0.3	48.7
Visual, GLB	1.4	6.5	14.7	1 ms	15.7	0.2	1.2	0.3	39.9
Visual, OBJ	1.5	6.8	14.9	1 ms	15.1	6.6	1.7	0.3	47.0

Board Repo: marqs85/ossc_pro_hw Board: ossc_pro.kicad_pcb Complexity 154 / 1000 (size 134, features 20) KESE features slotted holes, rounded, trapezoid or chamfered pads Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 492, 0, 0 Triangles, simulation 2,163,518 in 533 parts Note mostly unrouted Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 74 MB 818 MB STEP 389 MB 1.1 GB STL 108 MB 828 MB OBJ 229 MB 1.5 GB Visual GLB 38 MB 1.1 GB OBJ 114 MB 913 MB

1615. aux_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.7	7.4	1 ms	6.5	0.3	0.8	0.2	17.5
Simulation, STEP	0.5	1.8	7.4	0.8 ms	6.7	4.5	0.8	0.2	21.9
Simulation, STL	0.4	1.8	7.2	0.7 ms	6.6	0.6	0.8	0.2	17.7
Simulation, OBJ	0.4	1.8	7.4	1.0 ms	6.7	8.5	0.8	0.2	25.8
Visual, GLB	0.5	1.7	7.2	0.7 ms	12.9	0.2	1.5	0.2	24.2
Visual, OBJ	0.5	1.8	7.6	0.8 ms	12.5	5.4	1.5	0.2	29.4

Board Repo: matthiasgeorgimhof/hardware_csat Board: aux_board.kicad_pcb Folder aux_board Complexity 350 / 1000 (size 245, features 105) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, drill offsets, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 125, 825, 201 Triangles, simulation 2,157,750 in 180 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 72 MB 693 MB STEP 266 MB 890 MB STL 108 MB 709 MB OBJ 224 MB 1.4 GB Visual GLB 43 MB 955 MB OBJ 130 MB 958 MB

1616. auxio_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.2	9.5	0.9 ms	8.5	0.3	1.1	0.2	22.4
Simulation, STEP	0.6	2.3	9.1	0.8 ms	8.7	5.6	1.0	0.2	27.6
Simulation, STL	0.5	2.2	9.6	0.9 ms	8.1	0.9	1.0	0.2	22.5
Simulation, OBJ	0.6	2.3	9.2	0.8 ms	8.1	10.7	1.2	0.3	32.2
Visual, GLB	0.6	2.4	9.9	1.0 ms	17.2	0.2	1.8	0.3	32.3
Visual, OBJ	0.5	2.4	9.6	1 ms	16.4	6.5	2.1	0.3	37.8

Board Repo: matthiasgeorgimhof/hardware_csat Board: auxio_board.kicad_pcb Folder auxio_board Complexity 351 / 1000 (size 246, features 105) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, drill offsets, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 128, 942, 204 Triangles, simulation 2,361,290 in 180 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 79 MB 766 MB STEP 292 MB 986 MB STL 118 MB 758 MB OBJ 246 MB 1.6 GB Visual GLB 47 MB 995 MB OBJ 143 MB 1.0 GB

1617. AVIONICS_BOARD

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	3.4	12.4	2 ms	13.4	0.5	1.6	0.3	32.5
Simulation, STEP	0.7	3.3	12.9	2 ms	12.7	8.6	1.6	0.3	40.0
Simulation, STL	0.8	3.0	12.4	2 ms	13.4	1.2	1.7	0.3	32.8
Simulation, OBJ	0.8	3.4	12.4	2 ms	13.1	15.9	1.7	0.3	47.6
Visual, GLB	0.9	3.3	12.0	2 ms	26.4	0.3	3.3	0.3	46.6
Visual, OBJ	0.9	3.1	12.8	2 ms	26.9	10.1	3.3	0.3	57.4

Board Repo: matthiasgeorgimhof/hardware_csat Board: AVIONICS_BOARD.kicad_pcb Folder avionics_board Complexity 367 / 1000 (size 262, features 105) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, drill offsets, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 182, 2,001, 367 Triangles, simulation 3,369,990 in 275 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 113 MB 1.1 GB STEP 435 MB 1.4 GB STL 169 MB 1.1 GB OBJ 355 MB 2.2 GB Visual GLB 69 MB 1.3 GB OBJ 217 MB 1.4 GB

1618. comm_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	2.6	9.9	1 ms	11.1	0.5	1.1	0.3	26.3
Simulation, STEP	0.8	2.4	9.6	0.9 ms	11.8	7.2	1.2	0.3	33.3
Simulation, STL	0.9	2.4	9.7	1 ms	11.5	0.8	1.5	0.4	27.2
Simulation, OBJ	1.0	2.6	10.1	1 ms	11.8	14.0	1.2	0.4	41.0
Visual, GLB	0.8	2.7	9.9	1 ms	21.0	0.2	2.1	0.3	37.1
Visual, OBJ	0.8	2.4	9.6	1 ms	20.1	8.8	2.2	0.3	44.1

Board Repo: matthiasgeorgimhof/hardware_csat Board: comm_board.kicad_pcb Folder comm_board Complexity 365 / 1000 (size 260, features 105) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, drill offsets, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 178, 1,254, 204 Triangles, simulation 2,325,158 in 222 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 78 MB 811 MB STEP 326 MB 973 MB STL 116 MB 822 MB OBJ 243 MB 1.5 GB Visual GLB 51 MB 1.1 GB OBJ 158 MB 1.1 GB

1619. EPS

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	4.0	20.0	1 ms	18.4	0.7	2.6	0.3	47.1
Simulation, STEP	1.1	3.9	19.9	1 ms	18.7	12.2	2.6	0.4	58.7
Simulation, STL	1.0	3.8	19.9	0.9 ms	18.6	1.7	2.6	0.3	47.9
Simulation, OBJ	1.1	3.9	20.2	1.0 ms	18.7	26.9	2.7	0.3	73.7
Visual, GLB	1.0	3.9	20.5	2 ms	36.2	0.5	4.2	0.3	66.6
Visual, OBJ	1.2	4.0	20.2	1.0 ms	35.8	14.3	3.9	0.4	79.7

Board Repo: matthiasgeorgimhof/hardware_csat Board: EPS.kicad_pcb Folder eps_board Complexity 372 / 1000 (size 267, features 105) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, drill offsets, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 242, 2,354, 416 Triangles, simulation 4,561,054 in 261 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 153 MB 1.4 GB STEP 630 MB 1.6 GB STL 228 MB 1.3 GB OBJ 484 MB 2.9 GB Visual GLB 82 MB 1.5 GB OBJ 259 MB 1.7 GB

1620. sci_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	4.2	14.0	2 ms	15.5	0.5	1.7	0.3	37.3
Simulation, STEP	1.0	4.2	13.8	0.7 ms	15.2	9.3	1.8	0.3	45.6
Simulation, STL	1.1	4.2	13.8	0.9 ms	15.2	1.1	1.6	0.3	37.2
Simulation, OBJ	1.1	4.1	14.4	1 ms	14.9	22.8	2.8	0.3	60.4
Visual, GLB	1.4	5.8	18.9	2 ms	36.3	0.4	3.5	0.4	66.8
Visual, OBJ	1.1	4.6	14.9	0.8 ms	37.7	13.5	5.3	0.3	77.4

Board Repo: matthiasgeorgimhof/hardware_csat Board: sci_board.kicad_pcb Folder sci_board.inactive Complexity 397 / 1000 (size 267, features 130) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, drill offsets, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 210, 2,498, 466 Triangles, simulation 3,299,186 in 282 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 111 MB 1.1 GB STEP 450 MB 1.4 GB STL 165 MB 1.1 GB OBJ 348 MB 2.2 GB Visual GLB 75 MB 1.5 GB OBJ 237 MB 1.6 GB

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