Corpus Testing 13

Corpus Page 13

Part 13 of 29 of Corpus Testing: every board of these projects, six runs each, one file format a run, as Corpus Testing describes.

13.1 Amiga600

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.8	10.8	45.3	2 ms	46.4	1.7	7.3	0.5	113.8
Simulation, STEP	2.0	10.4	43.0	2 ms	46.3	28.5	6.9	0.4	137.6
Simulation, STL	1.9	10.1	45.8	3 ms	46.5	3.6	7.3	0.5	115.6
Simulation, OBJ	2.0	10.7	45.1	2 ms	52.8	63.5	8.4	0.5	182.9
Visual, GLB	2.1	11.3	48.5	4 ms	140.4	1.6	12.9	0.4	217.1
Visual, OBJ	2.1	10.3	44.3	2 ms	147.3	64.4	14.9	0.4	283.7

Board Repo: istedman/A600Reborn Board: Amiga600.kicad_pcb Folder A600_Svideo_Working / KiCAD Complexity 386 / 1000 (size 306, features 80) KESE features through vias, slotted holes, custom pads, filled zones, copper drawings, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 565, 13,837, 1,423 Triangles, simulation 8,472,872 in 626 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 293 MB 2.3 GB STEP 1.6 GB 3.4 GB STL 424 MB 2.3 GB OBJ 911 MB 5.4 GB Visual GLB 261 MB 3.8 GB OBJ 837 MB 5.4 GB

13.2 M68000

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.6	12.8	0.8 ms	11.0	0.5	1.7	0.4	29.5
Simulation, STEP	0.6	2.5	12.7	0.9 ms	10.9	8.9	1.7	0.3	37.7
Simulation, STL	0.6	2.7	13.0	2 ms	11.0	1.2	1.7	0.3	30.5
Simulation, OBJ	0.6	2.6	12.8	1.0 ms	10.7	16.9	1.7	0.3	45.7
Visual, GLB	0.5	2.5	12.6	0.9 ms	27.4	0.3	3.6	0.3	47.3
Visual, OBJ	0.6	2.6	12.7	0.8 ms	27.0	12.5	4.3	0.3	59.9

Board Repo: jack-mil/mcd-pcb Board: M68000.kicad_pcb Complexity 332 / 1000 (size 247, features 85) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 70, 1,709, 272 Triangles, simulation 2,985,686 in 191 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 100 MB 1.2 GB STEP 460 MB 1.3 GB STL 149 MB 1.2 GB OBJ 311 MB 1.9 GB Visual GLB 70 MB 1.2 GB OBJ 221 MB 1.4 GB

13.3 mntcomp-keyboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.6	15.2	0.9 ms	12.1	0.5	1.5	0.3	32.8
Simulation, STEP	0.6	2.9	15.6	0.9 ms	11.9	8.5	1.5	0.3	41.4
Simulation, STL	0.6	2.9	16.0	0.9 ms	11.9	1.0	1.3	0.3	34.0
Simulation, OBJ	0.7	2.8	16.1	1.0 ms	12.1	14.6	1.6	0.3	48.2
Visual, GLB	0.7	2.9	15.8	0.9 ms	29.1	0.4	4.0	0.3	53.2
Visual, OBJ	0.5	2.8	15.6	0.9 ms	29.9	11.0	4.2	0.2	64.3

Board Repo: jackhumbert/reform Board: mntcomp-keyboard.kicad_pcb Folder historic-reform1 / reform-keyboard-pcb Complexity 265 / 1000 (size 230, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 173, 1,136, 55 Triangles, simulation 3,187,550 in 287 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 109 MB 1.0 GB STEP 578 MB 1.2 GB STL 159 MB 1.0 GB OBJ 340 MB 2.1 GB Visual GLB 76 MB 1.3 GB OBJ 237 MB 1.6 GB

13.4 reform-motherboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.7	7.0	49.4	2 ms	35.0	1.2	4.8	0.3	99.4
Simulation, STEP	1.7	7.1	50.2	2 ms	35.1	16.5	4.9	0.3	115.8
Simulation, STL	1.8	7.4	50.7	2 ms	35.1	2.3	5.0	0.4	102.8
Simulation, OBJ	1.7	7.2	48.5	2 ms	33.1	37.6	4.8	0.4	133.2
Visual, GLB	1.7	7.0	49.1	2 ms	65.2	0.5	4.3	0.3	128.0
Visual, OBJ	1.7	6.8	49.6	2 ms	66.5	21.6	4.8	0.3	151.4

Board Repo: jackhumbert/reform Board: reform-motherboard.kicad_pcb Folder historic-reform1 / reform-motherboard Complexity 328 / 1000 (size 283, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 221, 3,746, 531 Triangles, simulation 6,884,110 in 445 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 241 MB 1.9 GB STEP 1.0 GB 2.4 GB STL 344 MB 1.8 GB OBJ 747 MB 4.5 GB Visual GLB 134 MB 2.2 GB OBJ 426 MB 2.8 GB

13.5 reform-trackball

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.1	0.2 ms	1.2	50 ms	0.2	0.3	3.1
Simulation, STEP	0.1	0.3	1.1	0.3 ms	1.2	1.2	0.2	0.2	4.2
Simulation, STL	0.1	0.3	1.2	0.2 ms	1.1	98 ms	0.2	0.2	3.2
Simulation, OBJ	0.1	0.2	1.2	0.2 ms	1.1	1.5	0.2	0.2	4.6
Visual, GLB	0.1	0.3	1.1	0.2 ms	2.3	36 ms	0.2	0.2	4.3
Visual, OBJ	0.1	0.2	1.1	0.2 ms	2.3	1.2	0.2	0.2	5.5

Board Repo: jackhumbert/reform Board: reform-trackball.kicad_pcb Folder historic-reform1 / reform-trackball-pcb Complexity 229 / 1000 (size 184, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 15, 275, 35 Triangles, simulation 302,556 in 43 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 10 MB 238 MB STEP 47 MB 274 MB STL 15 MB 240 MB OBJ 30 MB 259 MB Visual GLB 8.0 MB 262 MB OBJ 23 MB 259 MB

13.6 reform2-batterypack-upstream

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.6	2.2	0.3 ms	1.5	63 ms	0.2	0.2	5.0
Simulation, STEP	0.2	0.6	2.0	0.2 ms	1.4	1.6	0.2	0.3	6.2
Simulation, STL	0.2	0.5	2.0	0.3 ms	1.3	0.1	0.2	0.2	4.5
Simulation, OBJ	0.2	0.5	2.0	0.4 ms	1.3	2.1	0.2	0.2	6.6
Visual, GLB	0.2	0.6	1.9	0.3 ms	3.4	53 ms	0.3	0.3	6.8
Visual, OBJ	0.3	0.6	2.0	0.3 ms	3.5	1.5	0.3	0.3	8.4

Board Repo: jackhumbert/reform Board: reform2-batterypack-upstream.kicad_pcb Folder reform2-batterypack-pcb Complexity 197 / 1000 (size 152, features 45) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 32, 288, 28 Triangles, simulation 344,852 in 41 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 12 MB 275 MB STEP 70 MB 297 MB STL 17 MB 269 MB OBJ 36 MB 290 MB Visual GLB 8.7 MB 260 MB OBJ 25 MB 265 MB

13.7 reform2-batterypack

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	0.8	0.2 ms	0.7	30 ms	92 ms	0.2	2.4
Simulation, STEP	0.2	0.2	0.8	0.2 ms	0.9	1.2	93 ms	0.2	3.6
Simulation, STL	0.2	0.2	0.9	0.2 ms	0.9	42 ms	98 ms	0.2	2.6
Simulation, OBJ	0.2	0.3	1.0	0.2 ms	0.8	1.0	0.1	0.3	3.6
Visual, GLB	0.2	0.3	0.9	0.2 ms	1.7	22 ms	0.1	0.2	3.4
Visual, OBJ	0.2	0.3	0.9	0.2 ms	1.7	0.8	0.1	0.2	4.2

Board Repo: jackhumbert/reform Board: reform2-batterypack.kicad_pcb Folder reform2-batterypack-pcb Complexity 135 / 1000 (size 105, features 30) KESE features slotted holes, rounded, trapezoid or chamfered pads, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 5, 64, 0 Triangles, simulation 172,212 in 16 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 6.1 MB 201 MB STEP 37 MB 220 MB STL 8.6 MB 202 MB OBJ 17 MB 203 MB Visual GLB 4.0 MB 173 MB OBJ 11 MB 177 MB

13.8 reform2-imx8mplus

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.6	6.1	1 ms	7.6	0.3	1.3	0.3	18.8
Simulation, STEP	0.6	2.6	5.7	2 ms	7.6	5.2	1.3	0.3	23.3
Simulation, STL	0.6	2.7	5.7	1 ms	7.4	0.6	1.3	0.3	18.6
Simulation, OBJ	0.6	2.7	5.8	1 ms	7.7	10.9	1.5	0.3	29.3
Visual, GLB	0.7	2.6	5.8	1 ms	15.6	0.2	1.9	0.3	27.1
Visual, OBJ	0.6	2.7	5.7	1 ms	14.7	6.1	1.8	0.3	31.8

Board Repo: jackhumbert/reform Board: reform2-imx8mplus.kicad_pcb Folder reform2-imx8mplus Complexity 346 / 1000 (size 246, features 100) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 6 File format KiCad 6 (20211014) Parts, tracks, vias 16, 2,171, 338 Triangles, simulation 2,120,290 in 326 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 70 MB 721 MB STEP 257 MB 931 MB STL 106 MB 726 MB OBJ 221 MB 1.4 GB Visual GLB 39 MB 772 MB OBJ 124 MB 928 MB

13.9 reform2-keyboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	3.2	13.0	0.8 ms	14.2	0.6	1.4	0.3	33.6
Simulation, STEP	0.9	3.2	12.8	0.9 ms	14.5	10.0	1.5	0.3	43.3
Simulation, STL	1.0	3.1	13.3	1 ms	14.6	1.3	1.5	0.3	34.9
Simulation, OBJ	1.0	3.2	13.0	1 ms	13.9	16.9	1.4	0.2	49.6
Visual, GLB	0.9	3.0	12.6	2 ms	34.7	0.5	5.7	0.2	57.6
Visual, OBJ	0.9	3.2	12.8	0.9 ms	35.3	15.1	5.5	0.3	73.1

Board Repo: jackhumbert/reform Board: reform2-keyboard.kicad_pcb Folder reform2-keyboard-pcb Complexity 313 / 1000 (size 258, features 55) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 293, 2,054, 411 Triangles, simulation 4,193,572 in 234 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 141 MB 1.6 GB STEP 672 MB 1.8 GB STL 210 MB 1.6 GB OBJ 442 MB 2.7 GB Visual GLB 122 MB 1.9 GB OBJ 385 MB 2.4 GB

13.10 reform2-keyboard3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.3	3.1	12.7	0.7 ms	13.2	0.5	1.4	0.3	32.7
Simulation, STEP	1.2	3.4	12.9	1 ms	13.4	9.5	1.4	0.3	42.2
Simulation, STL	1.3	3.4	12.8	0.8 ms	12.9	1.1	1.4	0.3	33.2
Simulation, OBJ	1.3	3.4	12.9	0.9 ms	12.7	16.4	1.5	0.2	48.4
Visual, GLB	1.3	3.1	12.6	0.7 ms	31.5	0.4	3.7	0.3	52.9
Visual, OBJ	1.2	3.3	12.9	0.8 ms	32.3	13.6	4.2	0.2	67.9

Board Repo: jackhumbert/reform Board: reform2-keyboard3.kicad_pcb Folder reform2-keyboard3-pcb Complexity 347 / 1000 (size 257, features 90) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 289, 2,085, 383 Triangles, simulation 3,916,436 in 232 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 133 MB 1.5 GB STEP 671 MB 1.7 GB STL 196 MB 1.6 GB OBJ 415 MB 2.6 GB Visual GLB 112 MB 2.2 GB OBJ 354 MB 2.3 GB

13.11 reform2-motherboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.4	11.6	53.1	1 ms	42.3	2.0	5.9	0.4	117.7
Simulation, STEP	2.5	12.0	53.6	3 ms	42.8	22.9	6.2	0.4	140.3
Simulation, STL	2.5	12.1	53.8	3 ms	42.4	4.6	6.2	0.4	121.9
Simulation, OBJ	2.5	11.8	54.6	2 ms	42.3	53.1	6.3	0.4	171.1
Visual, GLB	2.5	12.0	53.5	2 ms	101.8	1.0	8.6	0.4	179.8
Visual, OBJ	2.5	11.7	54.6	2 ms	98.7	26.4	9.4	0.3	203.5

Board Repo: jackhumbert/reform Board: reform2-motherboard.kicad_pcb Folder reform2-motherboard-pcb Complexity 396 / 1000 (size 326, features 70) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 6 File format KiCad 5 (20171130) Parts, tracks, vias 489, 11,666, 1,086 Triangles, simulation 11,131,628 in 664 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 385 MB 2.7 GB STEP 1.6 GB 3.9 GB STL 557 MB 2.5 GB OBJ 1.2 GB 7.1 GB Visual GLB 204 MB 3.2 GB OBJ 661 MB 4.3 GB

13.12 reform2-motherboard25

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	4.4	11.3	44.0	3 ms	42.6	1.8	7.8	0.5	112.4
Simulation, STEP	4.4	11.1	43.4	2 ms	41.3	26.5	7.1	0.5	134.4
Simulation, STL	3.9	11.0	41.5	3 ms	41.0	3.8	7.4	0.5	109.0
Simulation, OBJ	3.8	10.6	40.2	4 ms	39.9	58.5	7.1	0.5	160.6
Visual, GLB	3.8	10.9	40.2	2 ms	92.0	1.0	8.6	0.4	156.9
Visual, OBJ	3.7	10.7	42.4	2 ms	93.4	36.9	11.2	0.4	198.7

Board Repo: jackhumbert/reform Board: reform2-motherboard25.kicad_pcb Folder reform2-motherboard25-pcb Complexity 451 / 1000 (size 326, features 125) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 6 File format KiCad 6 (20211014) Parts, tracks, vias 486, 11,115, 1,079 Triangles, simulation 9,815,150 in 665 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 328 MB 2.5 GB STEP 1.4 GB 3.6 GB STL 491 MB 2.5 GB OBJ 1.1 GB 6.2 GB Visual GLB 187 MB 3.1 GB OBJ 608 MB 4.0 GB

13.13 reform2-oled

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	0.8	0.1 ms	0.8	33 ms	94 ms	0.2	2.4
Simulation, STEP	0.2	0.3	0.9	0.2 ms	0.8	1.1	0.1	0.2	3.5
Simulation, STL	0.2	0.2	0.8	0.2 ms	0.8	45 ms	88 ms	0.3	2.4
Simulation, OBJ	0.2	0.2	0.8	0.1 ms	0.7	1.0	81 ms	0.2	3.2
Visual, GLB	0.2	0.2	0.8	0.1 ms	2.0	26 ms	0.2	0.2	3.6
Visual, OBJ	0.2	0.2	0.9	0.2 ms	1.9	0.8	0.2	0.3	4.4

Board Repo: jackhumbert/reform Board: reform2-oled.kicad_pcb Folder reform2-oled-pcb Complexity 172 / 1000 (size 127, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 11, 77, 27 Triangles, simulation 163,598 in 25 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 5.8 MB 201 MB STEP 30 MB 225 MB STL 8.2 MB 204 MB OBJ 16 MB 215 MB Visual GLB 4.7 MB 191 MB OBJ 14 MB 185 MB

13.14 reform2-protected-batterypack-pcb

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.9	0.3 ms	0.9	45 ms	0.1	0.2	2.5
Simulation, STEP	0.1	0.2	0.9	0.2 ms	0.9	1.1	0.1	0.2	3.5
Simulation, STL	0.1	0.2	0.9	0.2 ms	0.8	51 ms	0.1	0.2	2.5
Simulation, OBJ	0.1	0.2	0.9	0.3 ms	0.9	1.0	0.1	0.2	3.4
Visual, GLB	0.1	0.3	0.9	0.3 ms	2.0	31 ms	0.2	0.2	3.7
Visual, OBJ	0.1	0.2	0.9	0.2 ms	2.0	0.9	0.3	0.2	4.6

Board Repo: jackhumbert/reform Board: reform2-protected-batterypack-pcb.kicad_pcb Folder reform2-protected-batterypack-pcb Complexity 196 / 1000 (size 151, features 45) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 33, 297, 19 Triangles, simulation 258,834 in 48 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.0 MB 233 MB STEP 47 MB 268 MB STL 13 MB 234 MB OBJ 26 MB 235 MB Visual GLB 7.2 MB 248 MB OBJ 21 MB 245 MB

13.15 reform2-trackball

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.5	1.9	0.8 ms	2.4	91 ms	0.3	0.2	5.7
Simulation, STEP	0.2	0.5	2.0	0.5 ms	2.7	2.2	0.3	0.2	8.2
Simulation, STL	0.3	0.4	1.8	0.3 ms	2.4	0.2	0.3	0.2	5.7
Simulation, OBJ	0.3	0.5	2.0	0.3 ms	2.5	2.7	0.3	0.2	8.6
Visual, GLB	0.3	0.5	1.8	0.4 ms	4.9	76 ms	0.6	0.2	8.3
Visual, OBJ	0.3	0.5	1.9	0.5 ms	4.9	1.9	0.8	0.3	10.5

Board Repo: jackhumbert/reform Board: reform2-trackball.kicad_pcb Folder reform2-trackball-pcb Complexity 246 / 1000 (size 201, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 37, 376, 74 Triangles, simulation 545,428 in 55 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 19 MB 328 MB STEP 89 MB 410 MB STL 27 MB 323 MB OBJ 55 MB 414 MB Visual GLB 16 MB 445 MB OBJ 48 MB 444 MB

13.16 reform2-trackball-sensor

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.2	0.5	0.1 ms	0.6	21 ms	60 ms	0.3	1.8
Simulation, STEP	0.2	0.2	0.5	0.1 ms	0.6	1.1	57 ms	0.2	2.8
Simulation, STL	0.2	0.2	0.5	0.1 ms	0.6	37 ms	64 ms	0.2	1.8
Simulation, OBJ	0.2	0.2	0.5	0.2 ms	0.6	0.5	51 ms	0.3	2.2
Visual, GLB	0.2	0.2	0.5	0.1 ms	1.3	21 ms	0.1	0.2	2.6
Visual, OBJ	0.2	0.2	0.5	0.1 ms	1.3	0.5	0.1	0.2	3.0

Board Repo: jackhumbert/reform Board: reform2-trackball-sensor.kicad_pcb Folder reform2-trackball-sensor-pcb Complexity 151 / 1000 (size 106, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 6, 41, 8 Triangles, simulation 88,568 in 17 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.2 MB 194 MB STEP 18 MB 198 MB STL 4.4 MB 190 MB OBJ 8.9 MB 192 MB Visual GLB 2.8 MB 159 MB OBJ 7.8 MB 158 MB

13.17 reform2-trackball2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	0.8	3.0	0.3 ms	3.1	0.1	0.5	0.3	8.1
Simulation, STEP	0.4	0.8	3.3	0.7 ms	3.8	3.6	0.5	0.3	12.7
Simulation, STL	0.4	0.7	2.9	0.3 ms	3.2	0.2	0.4	0.3	8.1
Simulation, OBJ	0.4	0.7	2.9	0.4 ms	3.3	4.1	0.5	0.3	12.1
Visual, GLB	0.5	0.7	3.0	0.5 ms	7.3	0.1	1.4	0.3	13.3
Visual, OBJ	0.4	0.8	3.6	0.4 ms	7.3	4.1	1.1	0.3	17.5

Board Repo: jackhumbert/reform Board: reform2-trackball2.kicad_pcb Folder reform2-trackball2-pcb Complexity 302 / 1000 (size 207, features 95) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 55, 473, 70 Triangles, simulation 665,254 in 76 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 23 MB 374 MB STEP 121 MB 458 MB STL 33 MB 373 MB OBJ 67 MB 473 MB Visual GLB 19 MB 524 MB OBJ 57 MB 459 MB

13.18 reform2-trackpad

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.2	0.2 ms	0.9	41 ms	0.1	0.2	3.0
Simulation, STEP	0.2	0.3	1.3	0.2 ms	1.0	1.1	0.1	0.2	4.2
Simulation, STL	0.2	0.3	1.3	0.2 ms	0.9	57 ms	0.1	0.2	3.1
Simulation, OBJ	0.2	0.3	1.2	0.2 ms	0.9	1.3	0.1	0.2	4.2
Visual, GLB	0.2	0.4	1.3	0.2 ms	2.4	40 ms	0.2	0.2	4.7
Visual, OBJ	0.2	0.3	1.3	0.2 ms	2.3	1.0	0.2	0.2	5.7

Board Repo: jackhumbert/reform Board: reform2-trackpad.kicad_pcb Folder reform2-trackpad-pcb Complexity 225 / 1000 (size 180, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 22, 148, 30 Triangles, simulation 252,768 in 50 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.1 MB 231 MB STEP 48 MB 261 MB STL 13 MB 231 MB OBJ 26 MB 239 MB Visual GLB 7.5 MB 237 MB OBJ 22 MB 228 MB

13.19 bpm_dfe

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	10.9	86.8	113.5	5 ms	588.0	12.2	32.4	1.3	845.3
Simulation, STEP									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Simulation, STL									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Simulation, OBJ									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Visual, GLB									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Visual, OBJ									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory

Board Repo: jamead/rfsocdfe-hw Board: bpm_dfe.kicad_pcb Complexity 548 / 1000 (size 398, features 150) KESE features through vias, padstacks, custom pads, rounded, trapezoid or chamfered pads, arc tracks, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 to 10th November 2026 Copper layers 20 File format KiCad 10 (20260206) Parts, tracks, vias 894, 28,449, 5,356 Triangles, simulation 63,452,914 in 1371 parts Verifier Simulation, STEP: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Simulation, STL: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Simulation, OBJ: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Visual, GLB: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Visual, OBJ: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory Run again Simulation, GLB: failed in the corpus run, run again with the memory cap raised from 11 GB to 14.5 GB, and passed

File type File size Peak memory used Simulation GLB 1.9 GB 14 GB STEP – 11 GB STL – 11 GB OBJ – 11 GB Visual GLB – 11 GB OBJ – 11 GB

13.20 bench_stm32_esc

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.7	7.4	0.8 ms	7.1	0.4	0.9	0.3	19.2
Simulation, STEP	0.5	2.5	7.4	2 ms	6.9	4.1	0.9	0.3	22.6
Simulation, STL	0.5	2.6	7.6	0.9 ms	7.2	0.8	0.9	0.2	19.9
Simulation, OBJ	0.5	2.4	7.1	0.9 ms	7.5	10.4	0.9	0.2	29.0
Visual, GLB	0.5	2.5	6.9	1.0 ms	16.7	0.2	1.6	0.3	28.6
Visual, OBJ	0.5	2.3	7.1	1 ms	17.2	5.5	2.1	0.3	34.9

Board Repo: jamesgossy/stm32-brushless-motor-controller Board: bench_stm32_esc.kicad_pcb Folder controller_hardware Complexity 366 / 1000 (size 266, features 100) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 171, 752, 666 Triangles, simulation 2,472,356 in 153 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 84 MB 847 MB STEP 276 MB 1.0 GB STL 124 MB 905 MB OBJ 259 MB 1.6 GB Visual GLB 46 MB 904 MB OBJ 144 MB 985 MB

13.21 LibreCAL

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	3.9	17.7	1 ms	17.4	0.7	1.8	0.4	42.4
Simulation, STEP	0.5	3.9	17.0	0.6 ms	16.9	8.5	1.8	0.3	49.0
Simulation, STL	0.6	3.8	16.5	0.7 ms	16.7	1.6	1.6	0.3	41.1
Simulation, OBJ	0.4	3.7	16.7	0.9 ms	16.2	20.3	1.6	0.3	59.1
Visual, GLB	0.5	4.0	16.7	0.7 ms	29.5	0.3	3.3	0.3	54.7
Visual, OBJ	0.5	3.9	16.9	0.9 ms	29.6	9.1	3.2	0.3	63.4

Board Repo: jankae/LibreCAL Board: LibreCAL.kicad_pcb Folder Hardware / LibreCAL Complexity 350 / 1000 (size 225, features 125) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 130, 1,232, 1,196 Triangles, simulation 4,302,336 in 137 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 143 MB 1.6 GB STEP 426 MB 1.7 GB STL 215 MB 1.5 GB OBJ 445 MB 2.7 GB Visual GLB 65 MB 1.2 GB OBJ 207 MB 1.5 GB

13.22 VNA

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.4	14.3	60.7	3 ms	69.4	3.1	6.8	0.5	157.1
Simulation, STEP	2.2	14.4	60.3	2 ms	67.1	27.6	6.0	0.4	178.0
Simulation, STL	2.1	14.7	59.1	3 ms	65.0	6.6	6.1	0.4	153.9
Simulation, OBJ	2.4	13.4	56.9	2 ms	67.4	101.5	6.8	0.5	248.8
Visual, GLB	2.2	14.5	61.3	2 ms	191.4	1.5	13.9	0.4	285.3
Visual, OBJ	2.5	15.8	61.3	2 ms	198.5	40.6	11.9	0.4	330.9

Board Repo: jankae/LibreVNA Board: VNA.kicad_pcb Folder Hardware / Kicad Complexity 435 / 1000 (size 320, features 115) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 9 (20241229) Parts, tracks, vias 571, 3,708, 2,932 Triangles, simulation 14,321,852 in 455 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 464 MB 3.8 GB STEP 1.3 GB 5.1 GB STL 716 MB 3.8 GB OBJ 1.5 GB 8.8 GB Visual GLB 202 MB 3.6 GB OBJ 677 MB 4.3 GB

13.23 2000ATX

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	5.1	27.0	182.6	3 ms	121.1	5.4	20.1	0.8	362.0
Simulation, STEP	5.8	26.0	165.1	3 ms	117.2	66.3	18.1	0.9	399.4
Simulation, STL	5.1	24.9	161.9	5 ms	115.2	10.2	17.8	0.8	336.0
Simulation, OBJ									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Visual, GLB	5.3	26.1	174.7	4 ms	297.7	2.2	21.2	0.7	527.8
Visual, OBJ	5.4	26.4	178.8	4 ms	294.4	90.6	22.8	0.7	619.2

Board Repo: jasonsbeer/Amiga-2000-EATX Board: 2000ATX.kicad_pcb Folder 2000EATX-KiCAD-R31 Complexity 403 / 1000 (size 303, features 100) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 601, 13,740, 1,212 Triangles, simulation 24,447,248 in 872 parts Verifier Simulation, OBJ: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory

File type File size Peak memory used Simulation GLB 834 MB 4.8 GB STEP 3.9 GB 7.0 GB STL 1.2 GB 5.2 GB OBJ – 11 GB Visual GLB 437 MB 6.9 GB OBJ 1.4 GB 9.3 GB

13.24 TICK

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.0	0.3 ms	1.1	40 ms	0.1	0.3	2.9
Simulation, STEP	0.1	0.3	1.0	0.2 ms	1.1	1.2	0.1	0.2	4.0
Simulation, STL	0.2	0.3	1.0	0.2 ms	1.1	64 ms	0.1	0.3	2.9
Simulation, OBJ	0.1	0.3	1.0	0.2 ms	1.0	1.3	0.1	0.2	4.1
Visual, GLB	0.1	0.3	0.9	0.2 ms	2.2	35 ms	0.3	0.2	4.1
Visual, OBJ	0.2	0.3	1.1	0.2 ms	2.2	1.2	0.2	0.2	5.4

Board Repo: jasonsbeer/Amiga-2000-EATX Board: TICK.kicad_pcb Folder TICK / TICK-Dual-0805 Complexity 207 / 1000 (size 122, features 85) KESE features through vias, blind and buried vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 12, 74, 12 Triangles, simulation 226,536 in 36 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.8 MB 219 MB STEP 39 MB 248 MB STL 11 MB 219 MB OBJ 23 MB 218 MB Visual GLB 6.5 MB 216 MB OBJ 19 MB 217 MB

13.25 TICK_AC

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.1	0.5	0.1 ms	0.6	22 ms	60 ms	0.2	1.7
Simulation, STEP	0.1	0.1	0.6	0.1 ms	0.6	0.9	70 ms	0.3	2.7
Simulation, STL	0.1	0.1	0.5	0.1 ms	0.7	28 ms	63 ms	0.2	1.7
Simulation, OBJ	0.1	0.1	0.5	0.1 ms	0.6	0.6	58 ms	0.2	2.3
Visual, GLB	0.1	0.1	0.5	0.2 ms	1.3	17 ms	0.1	0.2	2.3
Visual, OBJ	0.1	0.1	0.5	0.1 ms	1.4	0.5	0.1	0.2	3.0

Board Repo: jasonsbeer/Amiga-2000-EATX Board: TICK_AC.kicad_pcb Folder TICK / TICK_AC_KiCAD Complexity 155 / 1000 (size 100, features 55) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 7, 12, 9 Triangles, simulation 101,752 in 19 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.5 MB 182 MB STEP 16 MB 190 MB STL 5.1 MB 180 MB OBJ 9.9 MB 182 MB Visual GLB 2.9 MB 154 MB OBJ 8.1 MB 152 MB

13.26 TICK

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.7	0.2 ms	1.0	41 ms	0.1	0.2	2.3
Simulation, STEP	0.1	0.2	0.7	0.2 ms	0.9	1.0	0.1	0.2	3.2
Simulation, STL	0.1	0.2	0.7	0.2 ms	0.9	58 ms	0.1	0.2	2.3
Simulation, OBJ	0.1	0.2	0.8	0.2 ms	1.0	1.0	78 ms	0.2	3.4
Visual, GLB	0.1	0.2	0.7	0.2 ms	1.9	34 ms	0.2	0.3	3.5
Visual, OBJ	0.1	0.2	0.8	0.2 ms	1.9	0.8	0.2	0.2	4.2

Board Repo: jasonsbeer/Amiga-2000-EATX Board: TICK.kicad_pcb Folder TICK / TICK_OSC_KiCAD Complexity 162 / 1000 (size 117, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 10, 66, 9 Triangles, simulation 189,498 in 34 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 6.5 MB 212 MB STEP 31 MB 232 MB STL 9.5 MB 213 MB OBJ 19 MB 212 MB Visual GLB 5.6 MB 217 MB OBJ 16 MB 212 MB

13.27 N2360

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.6	9.3	35.1	2 ms	36.7	1.6	6.6	0.4	92.2
Simulation, STEP	2.9	10.0	36.4	2 ms	35.8	24.9	5.6	0.5	115.9
Simulation, STL	2.6	9.4	35.1	1 ms	37.5	3.7	6.6	0.5	95.2
Simulation, OBJ	2.8	10.0	34.4	1 ms	35.1	58.9	5.9	0.4	147.5
Visual, GLB	2.7	8.9	32.3	1 ms	91.8	1.0	9.2	0.4	146.2
Visual, OBJ	2.6	8.5	31.8	2 ms	87.5	32.9	9.9	0.3	173.4

Board Repo: jasonsbeer/Amiga-N2630 Board: N2360.kicad_pcb Folder KiCAD / A2630-New-KiCAD-Rev410-PGA Complexity 389 / 1000 (size 294, features 95) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 233, 7,443, 844 Triangles, simulation 9,166,598 in 471 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 312 MB 2.2 GB STEP 1.4 GB 3.2 GB STL 458 MB 2.2 GB OBJ 992 MB 5.8 GB Visual GLB 200 MB 3.2 GB OBJ 646 MB 4.1 GB

13.28 N2360

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.6	9.0	35.4	3 ms	33.2	1.7	6.0	0.4	88.3
Simulation, STEP	2.7	8.6	34.6	1 ms	34.7	24.1	5.6	0.4	110.8
Simulation, STL	2.7	8.9	35.0	2 ms	36.9	3.5	6.3	0.5	93.7
Simulation, OBJ	2.6	8.9	34.9	1 ms	36.9	58.4	5.6	0.5	147.8
Visual, GLB	2.7	9.1	35.3	1 ms	90.9	1.0	10.0	0.4	149.5
Visual, OBJ	2.8	9.1	35.5	2 ms	94.3	34.8	9.6	0.4	186.6

Board Repo: jasonsbeer/Amiga-N2630 Board: N2360.kicad_pcb Folder KiCAD / A2630-New-KiCAD-Rev410-PLCC Complexity 391 / 1000 (size 296, features 95) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 233, 7,314, 845 Triangles, simulation 9,182,036 in 471 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 313 MB 2.3 GB STEP 1.4 GB 3.2 GB STL 459 MB 2.3 GB OBJ 993 MB 5.8 GB Visual GLB 200 MB 3.2 GB OBJ 647 MB 4.2 GB

13.29 N2360

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.7	8.9	33.3	1 ms	35.2	1.6	5.6	0.4	87.5
Simulation, STEP	2.6	8.5	33.2	2 ms	36.9	24.5	5.6	0.4	111.9
Simulation, STL	2.9	8.9	34.0	1 ms	36.4	3.1	5.5	0.4	91.3
Simulation, OBJ	2.7	8.6	33.4	1 ms	36.3	58.6	5.2	0.4	145.2
Visual, GLB	2.7	8.8	32.8	1 ms	91.5	1.0	9.4	0.3	146.3
Visual, OBJ	2.7	8.6	32.7	2 ms	91.6	34.3	9.3	0.4	179.4

Board Repo: jasonsbeer/Amiga-N2630 Board: N2360.kicad_pcb Folder KiCAD / Archive / A2630-New-KiCAD-Rev401-PGA Complexity 389 / 1000 (size 294, features 95) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 230, 7,442, 838 Triangles, simulation 9,445,514 in 468 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 321 MB 2.4 GB STEP 1.5 GB 3.3 GB STL 472 MB 2.4 GB OBJ 1.0 GB 6.0 GB Visual GLB 206 MB 3.3 GB OBJ 668 MB 4.3 GB

13.30 N2360

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.7	9.1	34.9	2 ms	38.1	1.8	6.1	0.5	93.2
Simulation, STEP	2.8	8.8	35.6	2 ms	37.6	24.6	5.9	0.5	115.8
Simulation, STL	2.9	9.1	35.4	2 ms	38.7	3.8	6.4	0.5	96.7
Simulation, OBJ	2.9	9.4	36.3	2 ms	38.7	54.8	6.4	0.5	149.0
Visual, GLB	3.0	9.5	35.9	2 ms	105.1	1.1	11.6	0.4	166.6
Visual, OBJ	2.9	9.0	34.7	2 ms	99.8	32.5	10.7	0.5	190.1

Board Repo: jasonsbeer/Amiga-N2630 Board: N2360.kicad_pcb Folder KiCAD / Archive / A2630-New-KiCAD-Rev401-PLCC Complexity 391 / 1000 (size 296, features 95) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 230, 7,313, 839 Triangles, simulation 9,464,140 in 468 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 322 MB 2.4 GB STEP 1.5 GB 3.3 GB STL 473 MB 2.4 GB OBJ 1.0 GB 6.1 GB Visual GLB 207 MB 3.3 GB OBJ 670 MB 4.3 GB

13.31 BeamBender

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	1.8	7.2	0.4 ms	9.8	0.4	1.0	0.3	21.1
Simulation, STEP	0.6	1.7	6.8	0.7 ms	9.5	6.4	1.0	0.3	26.3
Simulation, STL	0.7	1.8	7.0	0.5 ms	9.7	0.6	1.0	0.3	21.2
Simulation, OBJ	0.6	1.7	7.0	0.7 ms	9.6	10.7	1.0	0.3	30.9
Visual, GLB	0.6	1.7	7.0	0.7 ms	15.9	0.2	1.6	0.3	27.2
Visual, OBJ	0.6	1.8	7.0	0.4 ms	16.0	8.1	1.7	0.3	35.5

Board Repo: jbilander/BeamBender Board: BeamBender.kicad_pcb Folder KiCad / A1200-A500 Complexity 310 / 1000 (size 255, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 100, 1,402, 218 Triangles, simulation 1,833,394 in 186 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 63 MB 716 MB STEP 268 MB 878 MB STL 92 MB 706 MB OBJ 190 MB 1.2 GB Visual GLB 46 MB 826 MB OBJ 138 MB 1.0 GB

13.32 SF2000

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.3	6.0	19.5	1 ms	28.1	1.0	4.1	0.5	60.4
Simulation, STEP	1.4	5.7	21.4	3 ms	27.6	16.9	3.9	0.5	77.3
Simulation, STL	1.3	5.5	20.6	2 ms	27.0	1.9	3.8	0.5	60.6
Simulation, OBJ	1.2	5.9	20.4	2 ms	26.8	28.8	3.8	0.4	87.2
Visual, GLB	1.3	5.5	20.1	3 ms	56.5	0.6	7.1	0.4	91.4
Visual, OBJ	1.4	6.1	19.8	2 ms	53.6	21.7	6.5	0.3	109.3

Board Repo: jbilander/SF2000 Board: SF2000.kicad_pcb Folder KiCad Complexity 346 / 1000 (size 291, features 55) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 134, 3,880, 579 Triangles, simulation 4,420,582 in 459 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 152 MB 1.4 GB STEP 633 MB 1.8 GB STL 221 MB 1.3 GB OBJ 472 MB 2.9 GB Visual GLB 113 MB 1.8 GB OBJ 361 MB 2.3 GB

13.33 baseboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	72 ms	0.2	0.7	0.2 ms	0.8	34 ms	0.1	0.2	2.1
Simulation, STEP	72 ms	0.2	0.7	0.2 ms	0.8	0.9	0.1	0.2	3.1
Simulation, STL	71 ms	0.2	0.8	0.3 ms	0.8	56 ms	0.1	0.2	2.3
Simulation, OBJ	83 ms	0.2	0.8	0.2 ms	0.8	1.0	0.1	0.2	3.3
Visual, GLB	70 ms	0.2	0.8	0.2 ms	1.6	17 ms	0.1	0.2	3.0
Visual, OBJ	73 ms	0.2	0.7	0.2 ms	1.6	0.5	0.1	0.2	3.4

Board Repo: jescarri/baseboard Board: baseboard.kicad_pcb Complexity 93 / 1000 (size 53, features 40) KESE features curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 5, 0, 0 Triangles, simulation 249,774 in 50 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.2 MB 209 MB STEP 20 MB 225 MB STL 12 MB 208 MB OBJ 25 MB 221 MB Visual GLB 3.8 MB 187 MB OBJ 11 MB 193 MB

13.34 Open128

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.8	13.4	97.8	2 ms	75.6	3.2	10.9	0.6	203.5
Simulation, STEP	2.0	13.8	98.4	3 ms	81.2	46.5	11.4	0.6	253.7
Simulation, STL	2.0	14.4	100.7	3 ms	79.6	7.4	10.6	0.6	215.3
Simulation, OBJ									exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory
Visual, GLB	2.1	13.8	99.6	3 ms	194.9	1.9	19.4	0.5	332.2
Visual, OBJ	2.1	14.2	98.5	2 ms	188.5	55.2	17.6	0.4	376.5

Board Repo: jgrip/open128 Board: Open128.kicad_pcb Complexity 333 / 1000 (size 243, features 90) KESE features through vias, slotted holes, custom pads, filled zones, copper drawings, copper text, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 366, 16,410, 1,119 Triangles, simulation 16,912,120 in 459 parts Verifier Simulation, OBJ: exceeded 11 GB on a 15 GB machine (stopped there, not a KESE failure); it will be run again on a machine with more memory

File type File size Peak memory used Simulation GLB 584 MB 3.6 GB STEP 3.2 GB 5.5 GB STL 846 MB 3.5 GB OBJ – 11 GB Visual GLB 363 MB 5.5 GB OBJ 1.2 GB 9.8 GB

13.35 d1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	4.2	13.9	55.9	1 ms	46.7	2.2	6.4	0.5	129.9
Simulation, STEP	4.1	14.2	54.5	1 ms	45.9	31.0	6.4	0.5	156.5
Simulation, STL	4.3	14.4	57.2	1 ms	48.6	5.0	7.5	0.5	137.6
Simulation, OBJ	4.3	14.6	59.1	2 ms	50.7	79.7	7.0	0.5	215.8
Visual, GLB	4.4	14.9	56.6	2 ms	109.7	1.2	10.8	0.4	198.0
Visual, OBJ	4.2	14.0	57.0	1 ms	111.7	37.4	11.3	0.4	236.0

Board Repo: jgw4/doppel-1 Board: d1.kicad_pcb Complexity 437 / 1000 (size 237, features 200) KESE features through vias, padstacks, arc tracks, filled zones, copper drawings, copper text, curved board outline, TrueType text, hatched fills, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 165, 22,935, 299 Triangles, simulation 10,495,926 in 298 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 354 MB 2.8 GB STEP 1.9 GB 3.9 GB STL 525 MB 2.7 GB OBJ 1.1 GB 8.8 GB Visual GLB 205 MB 3.3 GB OBJ 654 MB 4.2 GB

13.36 PCB-11

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.3	9.5	74.2	0.7 ms	56.0	2.3	8.2	0.5	154.0
Simulation, STEP	3.1	9.4	73.7	0.7 ms	55.8	31.8	8.1	0.6	182.5
Simulation, STL	3.7	9.7	71.8	0.5 ms	55.5	5.2	7.6	0.5	154.0
Simulation, OBJ	3.2	9.0	71.5	0.6 ms	53.9	64.5	7.6	0.6	210.3
Visual, GLB	3.2	9.4	71.3	0.3 ms	92.9	0.9	10.0	0.5	188.1
Visual, OBJ	3.2	8.9	71.4	0.6 ms	96.7	27.3	10.6	0.5	218.6

Board Repo: jgw4/doppel-1 Board: PCB-11.kicad_pcb Folder gerbers Complexity 214 / 1000 (size 189, features 25) KESE features through vias, copper drawings Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20240928) Parts, tracks, vias 0, 31,410, 1,720 Triangles, simulation 10,815,304 in 11 parts Note no components Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 369 MB 3.2 GB STEP 2.0 GB 4.0 GB STL 541 MB 3.3 GB OBJ 1.2 GB 6.9 GB Visual GLB 180 MB 3.2 GB OBJ 576 MB 3.8 GB

13.37 pong

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	3.5	20.1	1 ms	19.5	0.7	2.2	0.3	47.1
Simulation, STEP	0.7	3.6	21.0	1 ms	20.1	12.9	2.1	0.3	60.7
Simulation, STL	0.7	3.6	20.8	1 ms	20.1	1.3	2.0	0.3	48.9
Simulation, OBJ	0.7	4.2	21.6	1 ms	21.6	23.9	2.0	0.3	74.5
Visual, GLB	0.8	3.8	21.7	2 ms	34.8	0.3	3.0	0.3	64.6
Visual, OBJ	0.7	3.7	21.5	1 ms	35.1	11.6	3.5	0.3	76.3

Board Repo: jgw4/pong Board: pong.kicad_pcb Complexity 251 / 1000 (size 186, features 65) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 131, 1,133, 20 Triangles, simulation 4,215,822 in 374 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 140 MB 1.2 GB STEP 663 MB 1.7 GB STL 211 MB 1.2 GB OBJ 443 MB 2.7 GB Visual GLB 68 MB 1.2 GB OBJ 216 MB 1.5 GB

13.38 Atari65XEC070067RevB

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.9	9.0	37.6	2 ms	35.8	2.0	6.0	0.5	93.7
Simulation, STEP	2.9	8.4	38.5	2 ms	36.5	21.0	5.8	0.5	113.7
Simulation, STL	2.9	8.7	39.3	2 ms	37.8	4.3	5.9	0.5	99.3
Simulation, OBJ	3.0	8.7	37.4	2 ms	36.2	59.4	5.8	0.4	150.8
Visual, GLB	2.9	8.7	38.3	2 ms	73.8	0.7	9.0	0.4	133.8
Visual, OBJ	3.1	9.2	38.9	2 ms	74.7	23.2	9.0	0.4	158.5

Board Repo: jimbro1000/Atari65_130XE_C070067 Board: Atari65XEC070067RevB.kicad_pcb Complexity 338 / 1000 (size 243, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 340, 6,477, 429 Triangles, simulation 11,867,082 in 328 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 401 MB 2.6 GB STEP 1.4 GB 3.5 GB STL 593 MB 2.7 GB OBJ 1.3 GB 7.4 GB Visual GLB 179 MB 3.0 GB OBJ 577 MB 3.6 GB

13.39 Commodore-Vic-20

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	4.4	23.6	2 ms	19.8	0.9	2.8	0.4	52.9
Simulation, STEP	1.0	4.2	23.7	2 ms	19.4	13.7	2.8	0.4	65.2
Simulation, STL	1.0	4.3	23.2	2 ms	19.1	2.1	2.6	0.3	52.6
Simulation, OBJ	1.0	4.2	23.9	1 ms	19.4	28.8	2.8	0.4	80.4
Visual, GLB	1.0	4.4	23.2	2 ms	42.8	0.6	5.5	0.3	77.7
Visual, OBJ	0.9	4.4	23.4	2 ms	42.4	15.7	5.6	0.3	92.8

Board Repo: jimbro1000/Commodore-Vic-20 Board: Commodore-Vic-20.kicad_pcb Complexity 265 / 1000 (size 210, features 55) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 142, 4,040, 354 Triangles, simulation 5,241,754 in 218 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 175 MB 1.6 GB STEP 731 MB 2.1 GB STL 262 MB 1.5 GB OBJ 552 MB 4.4 GB Visual GLB 106 MB 1.8 GB OBJ 339 MB 2.2 GB

13.40 Dragon32

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	8.5	46.1	2 ms	37.7	1.9	6.4	0.5	102.6
Simulation, STEP	1.5	8.9	47.2	2 ms	38.5	22.2	6.2	0.5	125.0
Simulation, STL	1.6	9.1	46.8	2 ms	36.4	3.1	6.0	0.4	103.4
Simulation, OBJ	1.4	8.2	43.7	1 ms	37.7	44.9	5.8	0.4	142.1
Visual, GLB	1.4	8.5	46.6	2 ms	98.8	1.0	11.2	0.3	167.8
Visual, OBJ	1.4	8.5	46.2	2 ms	105.6	29.4	10.9	0.3	202.4

Board Repo: jimbro1000/Dragon32Issue2 Board: Dragon32.kicad_pcb Complexity 295 / 1000 (size 220, features 75) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 208, 4,774, 755 Triangles, simulation 9,542,056 in 311 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 330 MB 2.8 GB STEP 1.7 GB 3.4 GB STL 477 MB 2.7 GB OBJ 1.0 GB 6.1 GB Visual GLB 229 MB 3.6 GB OBJ 733 MB 4.7 GB

13.41 Dragon32

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.7	9.0	50.0	1 ms	40.0	1.7	6.7	0.5	109.8
Simulation, STEP	1.6	8.4	51.2	1 ms	38.5	25.4	6.3	0.4	131.7
Simulation, STL	1.4	9.1	50.2	1 ms	40.2	4.3	6.6	0.4	112.2
Simulation, OBJ	1.7	9.1	50.5	1 ms	40.5	53.3	6.4	0.4	161.8
Visual, GLB	1.7	9.0	48.8	1 ms	119.2	1.1	12.1	0.3	192.2
Visual, OBJ	1.7	9.5	50.6	2 ms	114.1	35.6	12.0	0.4	223.8

Board Repo: jimbro1000/Dragon32Rev3 Board: Dragon32.kicad_pcb Complexity 324 / 1000 (size 219, features 105) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 169, 4,819, 960 Triangles, simulation 9,734,010 in 275 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 335 MB 2.9 GB STEP 1.7 GB 3.5 GB STL 487 MB 3.1 GB OBJ 1.1 GB 6.2 GB Visual GLB 240 MB 3.7 GB OBJ 773 MB 4.9 GB

13.42 cm4-carrier-net

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	3.1	0.7 ms	3.4	0.2	0.5	0.3	8.4
Simulation, STEP	0.3	0.8	3.0	0.4 ms	3.6	2.8	0.5	0.2	11.3
Simulation, STL	0.2	0.9	3.3	0.6 ms	3.4	0.4	0.5	0.2	8.8
Simulation, OBJ	0.2	0.8	3.1	0.3 ms	3.8	4.3	0.5	0.2	12.9
Visual, GLB	0.2	0.8	3.1	0.5 ms	7.5	98 ms	1.0	0.2	12.8
Visual, OBJ	0.2	0.8	3.2	0.4 ms	7.7	3.1	0.9	0.2	16.2

Board Repo: jkiv/cm4-carriers Board: cm4-carrier-net.kicad_pcb Folder hardware / cm4-carrier-net Complexity 272 / 1000 (size 197, features 75) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 38, 1,560, 107 Triangles, simulation 930,710 in 109 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 31 MB 416 MB STEP 133 MB 512 MB STL 47 MB 446 MB OBJ 94 MB 653 MB Visual GLB 21 MB 563 MB OBJ 63 MB 569 MB

13.43 cm4-carrier-template

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.9	3.0	0.6 ms	4.1	0.2	0.4	0.3	9.2
Simulation, STEP	0.2	0.8	3.2	0.6 ms	4.0	3.6	0.5	0.2	12.5
Simulation, STL	0.3	0.9	3.1	0.5 ms	4.0	0.3	0.5	0.2	9.4
Simulation, OBJ	0.3	0.8	3.1	0.5 ms	4.2	4.8	0.5	0.2	13.9
Visual, GLB	0.3	0.8	3.2	1.0 ms	8.8	0.1	0.9	0.2	14.5
Visual, OBJ	0.3	0.9	3.2	0.5 ms	8.8	3.4	1.1	0.2	17.9

Board Repo: jkiv/cm4-carriers Board: cm4-carrier-template.kicad_pcb Folder hardware / cm4-carrier-template Complexity 273 / 1000 (size 208, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 35, 3,631, 107 Triangles, simulation 1,017,770 in 108 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 34 MB 474 MB STEP 160 MB 547 MB STL 51 MB 460 MB OBJ 103 MB 704 MB Visual GLB 23 MB 671 MB OBJ 71 MB 684 MB

13.44 astra_piNas

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	4.9	10.6	2 ms	15.0	0.7	1.7	0.3	34.1
Simulation, STEP	0.8	4.7	10.5	1 ms	14.9	9.8	1.9	0.3	42.8
Simulation, STL	0.8	5.0	10.8	2 ms	14.6	1.5	1.7	0.4	34.9
Simulation, OBJ	0.8	5.0	10.6	2 ms	15.4	27.7	2.2	0.3	62.1
Visual, GLB	0.9	5.1	10.5	2 ms	33.7	0.4	4.0	0.3	55.0
Visual, OBJ	0.9	5.4	11.0	2 ms	33.9	15.2	4.0	0.3	70.6

Board Repo: jlcjak/astra_pinas Board: astra_piNas.kicad_pcb Complexity 402 / 1000 (size 277, features 125) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 6 File format KiCad 10 (20260206) Parts, tracks, vias 170, 2,408, 692 Triangles, simulation 4,388,718 in 390 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 145 MB 1.3 GB STEP 425 MB 1.7 GB STL 219 MB 1.4 GB OBJ 466 MB 2.8 GB Visual GLB 78 MB 1.5 GB OBJ 255 MB 1.8 GB

13.45 RK3576 SBCv2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.5	5.0	16.4	3 ms	20.7	0.6	1.9	0.3	47.4
Simulation, STEP	2.8	5.0	15.9	2 ms	19.0	11.7	2.0	0.4	56.8
Simulation, STL	2.5	4.6	16.3	3 ms	19.9	1.4	1.7	0.3	46.9
Simulation, OBJ	2.7	5.2	15.6	3 ms	18.6	20.6	1.7	0.4	64.8
Visual, GLB	2.4	4.7	14.1	3 ms	31.9	0.3	3.0	0.3	56.9
Visual, OBJ	2.3	4.5	15.3	2 ms	33.4	11.5	3.6	0.3	70.9

Board Repo: joengineer656/open-source-sbc-board Board: RK3576 SBCv2.kicad_pcb Complexity 302 / 1000 (size 232, features 70) KESE features slotted holes, rounded, trapezoid or chamfered pads, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 8 File format KiCad 10 (20260206) Parts, tracks, vias 830, 18, 0 Triangles, simulation 3,262,282 in 739 parts Note mostly unrouted Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 102 MB 1.1 GB STEP 384 MB 1.3 GB STL 163 MB 1.1 GB OBJ 344 MB 2.1 GB Visual GLB 65 MB 1.4 GB OBJ 207 MB 1.4 GB

13.46 OSO-SWAT-B1-jig

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	1.1	0.2 ms	0.8	49 ms	0.1	0.2	2.6
Simulation, STEP	0.1	0.3	0.9	0.2 ms	0.7	1.0	91 ms	0.2	3.4
Simulation, STL	0.1	0.2	0.9	0.2 ms	0.8	54 ms	0.1	0.2	2.4
Simulation, OBJ	0.1	0.2	0.9	0.2 ms	0.8	0.9	0.1	0.3	3.2
Visual, GLB	0.1	0.2	0.8	0.3 ms	1.8	20 ms	0.2	0.2	3.4
Visual, OBJ	0.1	0.3	1.0	0.2 ms	1.8	0.7	0.2	0.2	4.3

Board Repo: joeycastillo/Sensor-Watch Board: OSO-SWAT-B1-jig.kicad_pcb Folder PCB / Main Boards / OSO-SWAT-B1 / OSO-SWAT-B1-jig Complexity 45 / 1000 (size 45, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 12, 0, 0 Triangles, simulation 162,116 in 52 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 5.4 MB 199 MB STEP 19 MB 209 MB STL 8.1 MB 192 MB OBJ 16 MB 197 MB Visual GLB 3.7 MB 172 MB OBJ 10 MB 172 MB

13.47 OSO-SWAT-B1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	0.6	3.4	0.4 ms	2.7	0.1	0.4	0.3	7.9
Simulation, STEP	0.3	0.7	3.0	0.4 ms	2.8	2.2	0.4	0.3	9.7
Simulation, STL	0.3	0.7	3.0	0.4 ms	2.7	0.2	0.4	0.2	7.6
Simulation, OBJ	0.4	0.7	3.2	0.4 ms	2.6	3.0	0.4	0.2	10.5
Visual, GLB	0.4	0.7	3.2	0.3 ms	6.0	77 ms	0.5	0.4	11.4
Visual, OBJ	0.3	0.7	2.9	0.5 ms	5.8	2.5	0.5	0.3	13.0

Board Repo: joeycastillo/Sensor-Watch Board: OSO-SWAT-B1.kicad_pcb Folder PCB / Main Boards / OSO-SWAT-B1 Complexity 280 / 1000 (size 200, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 23, 530, 79 Triangles, simulation 477,106 in 77 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 308 MB STEP 90 MB 367 MB STL 24 MB 305 MB OBJ 50 MB 394 MB Visual GLB 15 MB 383 MB OBJ 45 MB 388 MB

13.48 OSO-SWAT-C1-jig

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.5	0.4 ms	1.2	64 ms	0.2	0.2	3.5
Simulation, STEP	0.1	0.3	1.5	0.3 ms	1.3	1.2	0.2	0.2	4.8
Simulation, STL	0.1	0.3	1.4	0.6 ms	1.2	0.1	0.2	0.2	3.5
Simulation, OBJ	0.1	0.3	1.5	0.5 ms	1.4	1.6	0.2	0.2	5.3
Visual, GLB	0.1	0.3	1.5	0.6 ms	2.6	28 ms	0.2	0.2	5.0
Visual, OBJ	0.1	0.3	1.5	0.5 ms	2.5	0.9	0.3	0.2	5.8

Board Repo: joeycastillo/Sensor-Watch Board: OSO-SWAT-C1-jig.kicad_pcb Folder PCB / Main Boards / OSO-SWAT-C1 / OSO-SWAT-C1-jig Complexity 44 / 1000 (size 44, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 11, 0, 0 Triangles, simulation 406,776 in 112 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 13 MB 249 MB STEP 42 MB 292 MB STL 20 MB 250 MB OBJ 41 MB 326 MB Visual GLB 7.9 MB 293 MB OBJ 23 MB 288 MB

13.49 OSO-SWAT-C1-rounded

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	1.0	3.6	0.3 ms	3.4	0.1	0.5	0.3	9.9
Simulation, STEP	0.9	0.9	3.4	0.3 ms	3.9	2.6	0.5	0.3	12.5
Simulation, STL	0.9	1.0	3.6	0.3 ms	3.8	0.3	0.7	0.2	10.6
Simulation, OBJ	0.9	1.0	3.5	0.3 ms	3.5	4.6	0.5	0.2	14.1
Visual, GLB	1.0	1.1	4.0	0.4 ms	8.3	0.1	0.9	0.3	15.6
Visual, OBJ	1.0	1.1	3.7	0.3 ms	8.2	3.5	0.7	0.3	18.6

Board Repo: joeycastillo/Sensor-Watch Board: OSO-SWAT-C1-rounded.kicad_pcb Folder PCB / Main Boards / OSO-SWAT-C1 Complexity 347 / 1000 (size 227, features 120) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours, castellated pads Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 31, 939, 81 Triangles, simulation 768,128 in 80 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 27 MB 370 MB STEP 114 MB 459 MB STL 38 MB 373 MB OBJ 79 MB 596 MB Visual GLB 20 MB 481 MB OBJ 59 MB 509 MB

13.50 OSO-SWAT-C1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	0.8	2.9	0.3 ms	2.4	0.1	0.4	0.3	7.6
Simulation, STEP	0.8	0.8	2.9	0.4 ms	2.3	1.8	0.4	0.2	9.3
Simulation, STL	0.7	0.8	2.8	0.3 ms	2.3	0.2	0.5	0.2	7.5
Simulation, OBJ	0.8	0.8	2.9	0.3 ms	2.3	3.3	0.4	0.2	10.7
Visual, GLB	0.8	0.9	2.7	0.3 ms	6.2	81 ms	0.6	0.3	11.5
Visual, OBJ	0.8	0.8	2.9	0.3 ms	6.5	2.4	0.7	0.3	14.3

Board Repo: joeycastillo/Sensor-Watch Board: OSO-SWAT-C1.kicad_pcb Folder PCB / Main Boards / OSO-SWAT-C1 Complexity 301 / 1000 (size 221, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 30, 587, 81 Triangles, simulation 658,516 in 80 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 23 MB 352 MB STEP 99 MB 406 MB STL 33 MB 341 MB OBJ 68 MB 499 MB Visual GLB 16 MB 432 MB OBJ 50 MB 431 MB

13.51 OSO-SWAB-B1-00 Sensor Watch Accelerometer

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	65 ms	0.1	0.4	0.2 ms	0.5	13 ms	41 ms	0.2	1.3
Simulation, STEP	89 ms	0.1	0.3	0.1 ms	0.5	0.7	48 ms	0.2	2.0
Simulation, STL	80 ms	98 ms	0.3	0.2 ms	0.5	18 ms	42 ms	0.2	1.2
Simulation, OBJ	77 ms	0.1	0.3	0.2 ms	0.5	0.4	42 ms	0.2	1.6
Visual, GLB	88 ms	0.1	0.3	0.1 ms	1.1	13 ms	80 ms	0.2	1.9
Visual, OBJ	85 ms	0.1	0.3	0.2 ms	1.0	0.3	75 ms	0.2	2.2

Board Repo: joeycastillo/Sensor-Watch Board: OSO-SWAB-B1-00 Sensor Watch Accelerometer.kicad_pcb Folder PCB / Sensor Boards / Kicad / OSO-SWAB-B1-00 Sensor Watch Accelerometer Complexity 182 / 1000 (size 112, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 4, 81, 12 Triangles, simulation 70,958 in 17 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 2.6 MB 177 MB STEP 12 MB 177 MB STL 3.5 MB 173 MB OBJ 7.0 MB 182 MB Visual GLB 2.2 MB 153 MB OBJ 6.1 MB 153 MB

13.52 Q3Q-SWAB-A1-00 Temperature + Test Points + OPT3001

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.1	0.5	0.1 ms	0.5	20 ms	62 ms	0.2	1.6
Simulation, STEP	95 ms	0.1	0.5	0.1 ms	0.5	0.8	56 ms	0.2	2.3
Simulation, STL	0.1	0.2	0.5	0.1 ms	0.5	23 ms	70 ms	0.2	1.6
Simulation, OBJ	0.1	0.1	0.5	0.1 ms	0.6	0.6	61 ms	0.2	2.2
Visual, GLB	93 ms	0.1	0.4	0.2 ms	1.3	18 ms	0.1	0.2	2.3
Visual, OBJ	87 ms	0.1	0.5	0.1 ms	1.5	0.5	0.1	0.2	3.0

Board Repo: joeycastillo/Sensor-Watch Board: Q3Q-SWAB-A1-00 Temperature + Test Points + OPT3001.kicad_pcb Folder PCB / Sensor Boards / Q3Q-SWAB-A1-00 Temperature + Test Points + OPT3001 Complexity 147 / 1000 (size 112, features 35) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 4, 79, 11 Triangles, simulation 91,820 in 23 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.4 MB 182 MB STEP 17 MB 193 MB STL 4.6 MB 186 MB OBJ 9.3 MB 177 MB Visual GLB 3.2 MB 155 MB OBJ 8.8 MB 155 MB

13.53 2057-ICE40HX4K-TQ144-breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	4.3	23.6	0.9 ms	14.2	0.6	1.8	0.4	45.5
Simulation, STEP	0.6	3.6	23.4	0.6 ms	14.9	9.7	1.9	0.3	54.5
Simulation, STL	0.7	4.0	22.4	0.7 ms	14.4	1.3	1.9	0.4	45.1
Simulation, OBJ	0.7	4.0	23.3	0.7 ms	14.4	22.0	2.3	0.3	67.0
Visual, GLB	0.7	4.0	22.6	0.7 ms	37.6	0.4	3.6	0.3	69.2
Visual, OBJ	0.7	4.0	23.3	0.5 ms	34.7	12.3	3.6	0.2	78.9

Board Repo: johnwinans/2057-ICE40HX4K-TQ144-breakout Board: 2057-ICE40HX4K-TQ144-breakout.kicad_pcb Complexity 310 / 1000 (size 245, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 72, 1,453, 211 Triangles, simulation 3,669,038 in 195 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 126 MB 1.1 GB STEP 556 MB 1.3 GB STL 183 MB 1.1 GB OBJ 394 MB 2.4 GB Visual GLB 76 MB 1.2 GB OBJ 236 MB 1.7 GB

13.54 gw

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	3.8	16.0	1 ms	16.1	0.6	1.8	0.3	39.1
Simulation, STEP	0.7	3.8	15.6	1 ms	15.5	8.2	1.5	0.3	45.6
Simulation, STL	0.7	3.7	16.3	1 ms	15.9	1.3	1.7	0.3	39.9
Simulation, OBJ	0.7	3.9	16.2	1.0 ms	16.0	20.2	1.8	0.3	59.0
Visual, GLB	0.7	3.8	16.0	1 ms	29.9	0.4	3.7	0.2	54.8
Visual, OBJ	0.6	3.7	16.5	0.9 ms	30.0	13.3	4.4	0.2	68.6

Board Repo: jonpe960/blixten Board: gw.kicad_pcb Folder Blixten Gateway Complexity 341 / 1000 (size 296, features 45) KESE features through vias, filled zones, copper text Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 165, 3,785, 748 Triangles, simulation 3,831,544 in 277 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 131 MB 1.1 GB STEP 509 MB 1.4 GB STL 192 MB 1.1 GB OBJ 405 MB 2.5 GB Visual GLB 83 MB 1.4 GB OBJ 262 MB 1.8 GB

13.55 Blixten

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.9	3.2	0.5 ms	3.3	0.2	0.5	0.2	8.4
Simulation, STEP	0.2	0.8	2.8	0.4 ms	3.1	2.2	0.4	0.2	9.8
Simulation, STL	0.2	0.9	2.9	0.4 ms	3.3	0.3	0.5	0.2	8.3
Simulation, OBJ	0.2	0.9	2.9	0.4 ms	3.0	4.3	0.4	0.2	12.0
Visual, GLB	0.2	0.8	3.2	0.5 ms	6.2	83 ms	0.7	0.2	11.4
Visual, OBJ	0.2	0.8	3.0	0.3 ms	6.1	3.0	0.7	0.2	14.0

Board Repo: jonpe960/blixten Board: Blixten.kicad_pcb Folder Blixten LED Device Complexity 282 / 1000 (size 247, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 60, 1,140, 201 Triangles, simulation 1,020,116 in 80 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 35 MB 419 MB STEP 131 MB 546 MB STL 51 MB 429 MB OBJ 104 MB 709 MB Visual GLB 22 MB 525 MB OBJ 65 MB 540 MB

13.56 clock-test

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.9	6.8	0.5 ms	8.3	0.2	0.6	0.2	17.4
Simulation, STEP	0.3	1.0	6.5	0.5 ms	9.1	4.1	0.6	0.2	21.8
Simulation, STL	0.3	0.9	6.1	0.7 ms	7.6	0.4	0.5	0.2	16.1
Simulation, OBJ	0.3	0.9	7.1	0.5 ms	8.6	7.7	0.7	0.2	25.5
Visual, GLB	0.3	1.2	7.0	0.5 ms	11.7	0.2	1.4	0.3	22.0
Visual, OBJ	0.4	1.2	7.4	2 ms	12.2	5.7	1.4	0.2	28.5

Board Repo: joshajohnson/ecp5-mini Board: clock-test.kicad_pcb Folder breakouts / clock-test-0.1 Complexity 290 / 1000 (size 185, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20200916) Parts, tracks, vias 83, 1,218, 99 Triangles, simulation 1,195,948 in 141 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 43 MB 530 MB STEP 233 MB 638 MB STL 60 MB 524 MB OBJ 127 MB 844 MB Visual GLB 30 MB 598 MB OBJ 89 MB 678 MB

13.57 octa-pmod

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.9	5.2	0.6 ms	3.8	0.2	0.6	0.3	11.2
Simulation, STEP	0.3	0.9	5.1	0.5 ms	3.7	3.2	0.5	0.2	13.9
Simulation, STL	0.3	1.0	5.1	0.5 ms	3.8	0.3	0.5	0.3	11.3
Simulation, OBJ	0.3	0.9	5.4	0.8 ms	3.9	6.0	0.6	0.3	17.3
Visual, GLB	0.3	0.9	5.0	0.4 ms	6.4	0.1	0.8	0.2	13.7
Visual, OBJ	0.2	0.9	5.1	0.7 ms	6.7	3.5	0.8	0.3	17.6

Board Repo: joshajohnson/ecp5-mini Board: octa-pmod.kicad_pcb Folder breakouts / octa-pmod-0.1 Complexity 232 / 1000 (size 142, features 90) KESE features rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20201002) Parts, tracks, vias 14, 343, 0 Triangles, simulation 1,044,278 in 78 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 34 MB 444 MB STEP 140 MB 522 MB STL 52 MB 447 MB OBJ 104 MB 717 MB Visual GLB 20 MB 523 MB OBJ 60 MB 527 MB

13.58 octa-pmod

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	4.5	2 ms	3.2	0.2	0.4	0.2	9.5
Simulation, STEP	0.2	0.7	4.3	0.8 ms	3.3	2.3	0.4	0.2	11.4
Simulation, STL	0.2	0.7	4.2	0.8 ms	3.3	0.3	0.4	0.2	9.4
Simulation, OBJ	0.2	0.7	3.9	0.8 ms	3.2	4.2	0.4	0.2	12.9
Visual, GLB	0.2	0.7	4.2	0.9 ms	6.1	90 ms	0.7	0.2	12.1
Visual, OBJ	0.2	0.7	4.1	0.6 ms	5.9	2.5	0.7	0.2	14.2

Board Repo: joshajohnson/ecp5-mini Board: octa-pmod.kicad_pcb Folder breakouts / octa-pmod-0.2 Complexity 241 / 1000 (size 151, features 90) KESE features rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20201220) Parts, tracks, vias 14, 618, 0 Triangles, simulation 1,101,224 in 78 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 37 MB 484 MB STEP 155 MB 547 MB STL 55 MB 450 MB OBJ 110 MB 775 MB Visual GLB 22 MB 568 MB OBJ 65 MB 558 MB

13.59 octa-pmod

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.0	5.4	1 ms	3.9	0.2	0.6	0.3	11.6
Simulation, STEP	0.3	1.1	5.3	1 ms	3.8	2.9	0.6	0.3	14.2
Simulation, STL	0.3	1.0	5.5	0.8 ms	4.1	0.3	0.5	0.3	12.1
Simulation, OBJ	0.3	1.0	5.3	0.9 ms	3.7	5.3	0.5	0.3	16.3
Visual, GLB	0.3	1.1	5.6	0.9 ms	9.2	0.1	1.1	0.2	17.6
Visual, OBJ	0.2	1.0	5.2	0.6 ms	8.9	3.1	1.1	0.2	19.8

Board Repo: joshajohnson/ecp5-mini Board: octa-pmod.kicad_pcb Folder breakouts / octa-pmod-horizontal-0.1 Complexity 249 / 1000 (size 144, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20201002) Parts, tracks, vias 16, 338, 6 Triangles, simulation 1,159,322 in 78 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 38 MB 497 MB STEP 164 MB 583 MB STL 58 MB 496 MB OBJ 117 MB 810 MB Visual GLB 26 MB 705 MB OBJ 77 MB 641 MB

13.60 octa-pmod

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.1	6.0	0.8 ms	4.2	0.2	0.6	0.2	12.7
Simulation, STEP	0.3	1.2	6.2	0.5 ms	4.2	3.6	0.6	0.2	16.4
Simulation, STL	0.3	1.1	6.1	0.5 ms	4.2	0.3	0.6	0.2	12.9
Simulation, OBJ	0.3	1.2	5.9	0.6 ms	4.1	7.0	0.6	0.2	19.3
Visual, GLB	0.3	1.2	6.1	0.9 ms	9.8	0.1	0.9	0.3	18.7
Visual, OBJ	0.3	1.1	6.0	0.5 ms	10.0	4.7	1.2	0.3	23.5

Board Repo: joshajohnson/ecp5-mini Board: octa-pmod.kicad_pcb Folder breakouts / octa-pmod-horizontal-0.2 Complexity 256 / 1000 (size 151, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20201220) Parts, tracks, vias 16, 528, 6 Triangles, simulation 1,211,224 in 78 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 41 MB 491 MB STEP 181 MB 594 MB STL 61 MB 501 MB OBJ 123 MB 853 MB Visual GLB 27 MB 648 MB OBJ 81 MB 664 MB

13.61 quad-pmod

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	3.2	0.7 ms	2.4	0.1	0.3	0.3	7.2
Simulation, STEP	0.2	0.6	3.1	0.9 ms	2.3	2.1	0.4	0.2	8.8
Simulation, STL	0.2	0.6	3.0	0.5 ms	2.3	0.2	0.3	0.3	6.9
Simulation, OBJ	0.2	0.6	2.9	0.5 ms	2.4	3.2	0.4	0.3	9.9
Visual, GLB	0.2	0.5	3.0	0.4 ms	4.2	63 ms	0.6	0.2	8.8
Visual, OBJ	0.2	0.5	2.9	0.5 ms	4.5	2.0	0.6	0.2	10.9

Board Repo: joshajohnson/ecp5-mini Board: quad-pmod.kicad_pcb Folder breakouts / quad-pmod-0.1 Complexity 219 / 1000 (size 129, features 90) KESE features rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20201002) Parts, tracks, vias 8, 218, 0 Triangles, simulation 730,390 in 78 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 23 MB 336 MB STEP 96 MB 414 MB STL 37 MB 352 MB OBJ 73 MB 517 MB Visual GLB 14 MB 423 MB OBJ 42 MB 421 MB

13.62 quad-pmod

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.6	3.0	0.6 ms	2.4	0.1	0.3	0.2	6.9
Simulation, STEP	0.2	0.5	3.1	0.8 ms	2.4	1.9	0.3	0.3	8.8
Simulation, STL	0.2	0.5	3.0	0.6 ms	2.5	0.2	0.3	0.2	7.0
Simulation, OBJ	0.2	0.5	3.2	0.7 ms	2.4	3.4	0.4	0.2	10.3
Visual, GLB	0.2	0.6	2.9	0.9 ms	4.5	81 ms	0.6	0.3	9.1
Visual, OBJ	0.2	0.6	3.0	0.5 ms	4.4	2.1	0.7	0.2	11.2

Board Repo: joshajohnson/ecp5-mini Board: quad-pmod.kicad_pcb Folder breakouts / quad-pmod-0.2 Complexity 224 / 1000 (size 134, features 90) KESE features rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20201220) Parts, tracks, vias 8, 303, 0 Triangles, simulation 758,724 in 47 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 25 MB 352 MB STEP 104 MB 422 MB STL 38 MB 345 MB OBJ 76 MB 539 MB Visual GLB 15 MB 433 MB OBJ 44 MB 434 MB

13.63 ecp5-mini

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	2.1	10.8	0.6 ms	9.5	0.4	1.2	0.3	25.1
Simulation, STEP	0.7	2.0	11.2	0.6 ms	9.6	6.9	1.2	0.3	31.8
Simulation, STL	0.7	2.0	11.1	0.7 ms	9.7	0.9	1.2	0.3	25.9
Simulation, OBJ	0.7	2.1	11.2	0.7 ms	9.6	14.0	1.2	0.3	39.1
Visual, GLB	0.7	2.1	11.3	0.7 ms	22.8	0.3	2.0	0.3	39.5
Visual, OBJ	0.7	2.3	11.2	0.9 ms	22.6	9.1	2.4	0.3	48.6

Board Repo: joshajohnson/ecp5-mini Board: ecp5-mini.kicad_pcb Folder hardware / 0.1 Complexity 400 / 1000 (size 275, features 125) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20200909) Parts, tracks, vias 103, 4,312, 222 Triangles, simulation 2,419,314 in 263 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 81 MB 811 MB STEP 377 MB 1.0 GB STL 121 MB 828 MB OBJ 252 MB 1.6 GB Visual GLB 52 MB 1.2 GB OBJ 163 MB 1.2 GB

13.64 ecp5-mini

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	1.9	9.8	0.5 ms	9.4	0.4	1.3	0.3	23.8
Simulation, STEP	0.7	1.8	9.6	0.4 ms	9.6	6.4	1.2	0.3	29.6
Simulation, STL	0.6	1.7	9.6	0.8 ms	9.8	0.6	1.2	0.2	23.8
Simulation, OBJ	0.7	2.0	10.2	0.7 ms	9.5	12.8	1.1	0.3	36.6
Visual, GLB	0.7	2.0	9.6	0.5 ms	19.9	0.3	2.3	0.2	35.1
Visual, OBJ	0.7	2.0	10.0	0.5 ms	20.4	8.9	2.5	0.3	44.8

Board Repo: joshajohnson/ecp5-mini Board: ecp5-mini.kicad_pcb Folder hardware / 0.2 Complexity 423 / 1000 (size 273, features 150) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20210228) Parts, tracks, vias 102, 3,883, 210 Triangles, simulation 2,372,054 in 162 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 80 MB 999 MB STEP 394 MB 984 MB STL 119 MB 968 MB OBJ 248 MB 1.6 GB Visual GLB 53 MB 1.1 GB OBJ 166 MB 1.2 GB

13.65 adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	1.5	0.4 ms	1.3	72 ms	0.2	0.2	4.0
Simulation, STEP	0.2	0.6	1.5	0.2 ms	1.3	1.6	0.2	0.3	5.6
Simulation, STL	0.1	0.5	1.5	0.2 ms	1.4	0.1	0.2	0.2	4.1
Simulation, OBJ	0.2	0.6	1.7	0.3 ms	1.4	1.8	0.2	0.3	6.1
Visual, GLB	0.2	0.6	1.5	0.3 ms	3.7	63 ms	0.5	0.3	6.8
Visual, OBJ	0.2	0.6	1.6	0.2 ms	3.6	1.9	0.6	0.2	8.6

Board Repo: jotego/jtcores Board: adapter.kicad_pcb Folder cores / argus / sch / adapter Complexity 199 / 1000 (size 134, features 65) KESE features through vias, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 2, 334, 97 Triangles, simulation 365,054 in 51 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 13 MB 277 MB STEP 66 MB 331 MB STL 18 MB 287 MB OBJ 38 MB 314 MB Visual GLB 13 MB 340 MB OBJ 38 MB 339 MB

13.66 odyssey

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.6	0.3 ms	1.6	71 ms	0.2	0.2	4.2
Simulation, STEP	0.2	0.4	1.6	0.3 ms	1.4	1.4	0.2	0.2	5.4
Simulation, STL	0.2	0.3	1.6	0.3 ms	1.5	0.1	0.2	0.2	4.0
Simulation, OBJ	0.2	0.4	1.6	0.4 ms	1.5	2.1	0.2	0.2	6.0
Visual, GLB	0.2	0.3	1.5	0.3 ms	3.8	47 ms	0.3	0.2	6.4
Visual, OBJ	0.2	0.3	1.5	0.3 ms	3.6	1.5	0.6	0.2	7.9

Board Repo: jotego/jtcores Board: odyssey.kicad_pcb Folder cores / odyssey / sch Complexity 250 / 1000 (size 175, features 75) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 22, 1,140, 257 Triangles, simulation 486,536 in 107 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 16 MB 299 MB STEP 66 MB 354 MB STL 24 MB 298 MB OBJ 50 MB 378 MB Visual GLB 13 MB 450 MB OBJ 40 MB 396 MB

13.67 adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.4	0.4 ms	1.0	52 ms	0.2	0.2	3.3
Simulation, STEP	0.1	0.3	1.3	0.4 ms	1.1	1.3	0.2	0.2	4.6
Simulation, STL	0.1	0.3	1.3	0.3 ms	1.1	83 ms	0.2	0.2	3.3
Simulation, OBJ	0.1	0.4	1.4	0.3 ms	1.0	1.5	0.2	0.2	4.8
Visual, GLB	0.1	0.4	1.4	0.4 ms	2.6	26 ms	0.3	0.2	5.0
Visual, OBJ	0.1	0.3	1.4	0.6 ms	2.5	0.9	0.3	0.2	5.7

Board Repo: jotego/jtcores Board: adapter.kicad_pcb Folder cores / wc / sch / adapter Complexity 38 / 1000 (size 38, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 6, 0, 0 Triangles, simulation 308,694 in 123 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.9 MB 228 MB STEP 32 MB 262 MB STL 15 MB 228 MB OBJ 31 MB 250 MB Visual GLB 6.5 MB 275 MB OBJ 19 MB 277 MB

13.68 QBusH723Z

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	4.6	16.7	2 ms	24.8	0.8	2.8	0.3	51.1
Simulation, STEP	1.0	4.3	16.5	2 ms	24.6	13.1	2.8	0.3	62.6
Simulation, STL	1.1	4.4	16.9	3 ms	24.2	1.8	2.7	0.3	51.4
Simulation, OBJ	1.0	4.6	17.2	2 ms	25.0	23.0	2.6	0.3	73.7
Visual, GLB	1.0	4.6	16.6	2 ms	39.9	0.5	4.7	0.3	67.5
Visual, OBJ	1.1	4.5	16.8	2 ms	42.9	14.9	4.7	0.3	85.1

Board Repo: jrengdahl/MSCP Board: QBusH723Z.kicad_pcb Folder QBusH723Z-JLCPCB-0.1 Complexity 402 / 1000 (size 277, features 125) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 213, 2,741, 719 Triangles, simulation 5,270,402 in 348 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 179 MB 1.7 GB STEP 751 MB 2.0 GB STL 264 MB 1.6 GB OBJ 559 MB 3.3 GB Visual GLB 119 MB 2.0 GB OBJ 385 MB 2.4 GB

13.69 x65-sbc-revA1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.3	6.6	19.8	2 ms	23.8	1.0	2.3	0.3	55.0
Simulation, STEP	1.2	6.9	20.4	2 ms	24.3	15.2	2.5	0.4	70.9
Simulation, STL	1.4	7.1	18.9	3 ms	24.5	2.0	2.5	0.4	56.7
Simulation, OBJ	1.4	7.1	20.1	2 ms	25.0	29.3	2.6	0.4	86.0
Visual, GLB	1.3	6.9	20.2	2 ms	58.3	0.8	7.9	0.3	95.6
Visual, OBJ	1.5	7.4	20.0	2 ms	60.1	21.5	8.0	0.3	118.8

Board Repo: jsyk/x65 Board: x65-sbc-revA1.kicad_pcb Folder pcb / x65-sbc-revA1 Complexity 442 / 1000 (size 297, features 145) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 332, 4,603, 625 Triangles, simulation 5,576,678 in 376 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 191 MB 1.6 GB STEP 831 MB 2.1 GB STL 279 MB 1.6 GB OBJ 595 MB 3.6 GB Visual GLB 137 MB 2.3 GB OBJ 433 MB 2.8 GB

13.70 x65-sbc-revB1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.4	6.6	20.0	1 ms	22.3	0.9	2.2	0.3	53.7
Simulation, STEP	1.4	6.5	19.6	1 ms	22.4	14.8	2.2	0.3	67.3
Simulation, STL	1.4	6.8	19.4	1 ms	21.7	1.7	2.3	0.3	53.5
Simulation, OBJ	1.3	6.6	19.7	2 ms	21.4	29.2	2.3	0.3	80.7
Visual, GLB	1.4	6.7	19.5	2 ms	50.6	0.6	5.1	0.3	84.2
Visual, OBJ	1.4	6.7	19.7	2 ms	51.2	21.7	5.6	0.3	106.6

Board Repo: jsyk/x65 Board: x65-sbc-revB1.kicad_pcb Folder pcb / x65-sbc-revB1 Complexity 442 / 1000 (size 297, features 145) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 331, 4,600, 622 Triangles, simulation 5,550,440 in 375 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 190 MB 1.5 GB STEP 826 MB 2.1 GB STL 278 MB 1.6 GB OBJ 592 MB 3.6 GB Visual GLB 136 MB 2.1 GB OBJ 430 MB 2.8 GB

13.71 DFTBoard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.6	12.8	34.2	2 ms	41.6	2.3	6.6	0.5	100.6
Simulation, STEP	2.5	12.4	33.1	1 ms	40.6	25.3	6.5	0.4	121.0
Simulation, STL	2.5	12.7	33.7	3 ms	41.4	4.9	6.5	0.4	102.2
Simulation, OBJ	2.7	12.4	33.8	2 ms	41.4	73.2	6.9	0.5	170.8
Visual, GLB	2.6	12.4	34.2	2 ms	87.2	1.0	8.5	0.3	146.4
Visual, OBJ	2.6	12.7	34.1	1 ms	87.7	32.7	8.1	0.4	178.2

Board Repo: julianfl0w/zynqpcb Board: DFTBoard.kicad_pcb Complexity 395 / 1000 (size 335, features 60) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 8 File format KiCad 5 (20171130) Parts, tracks, vias 295, 12,613, 964 Triangles, simulation 11,448,918 in 320 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 391 MB 2.4 GB STEP 1.3 GB 3.3 GB STL 572 MB 2.4 GB OBJ 1.3 GB 7.2 GB Visual GLB 179 MB 3.0 GB OBJ 591 MB 3.8 GB

13.72 PCB

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.2	6.2	21.9	1 ms	28.0	1.3	3.2	0.4	63.3
Simulation, STEP	2.3	6.3	23.1	2 ms	27.1	17.1	3.5	0.4	79.8
Simulation, STL	2.1	6.2	20.6	2 ms	27.4	2.9	3.6	0.4	63.1
Simulation, OBJ	2.0	6.1	19.4	1.0 ms	25.8	39.5	3.6	0.4	96.8
Visual, GLB	2.1	6.2	20.3	2 ms	52.1	0.6	5.7	0.3	87.3
Visual, OBJ	1.9	5.8	19.8	1 ms	50.5	20.9	5.5	0.3	104.7

Board Repo: kaipereira/m.2-fpga-accelerator Board: PCB.kicad_pcb Folder PCB Complexity 414 / 1000 (size 314, features 100) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 6 File format KiCad 10 (20260206) Parts, tracks, vias 277, 6,345, 829 Triangles, simulation 6,455,524 in 441 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 217 MB 1.9 GB STEP 936 MB 2.5 GB STL 323 MB 1.9 GB OBJ 685 MB 4.1 GB Visual GLB 122 MB 2.1 GB OBJ 396 MB 2.6 GB

13.73 ZYNQ7020_AD9364_V2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	8.2	27.4	1 ms	29.2	1.3	3.0	0.4	70.4
Simulation, STEP	0.8	7.9	26.3	2 ms	29.4	15.5	3.0	0.3	83.3
Simulation, STL	1.0	8.0	26.3	1 ms	31.2	3.1	3.2	0.4	73.2
Simulation, OBJ	1.0	7.9	27.1	2 ms	30.1	40.5	3.2	0.4	110.2
Visual, GLB	0.9	7.8	27.4	2 ms	77.6	0.8	10.0	0.4	124.9
Visual, OBJ	1.3	8.1	26.2	1 ms	72.0	25.5	8.5	0.4	142.1

Board Repo: kangyuzhe666/zynq7010-7020_ad9363 Board: ZYNQ7020_AD9364_V2.kicad_pcb Folder kicad Complexity 318 / 1000 (size 248, features 70) KESE features through vias, slotted holes, drill offsets, arc tracks, copper drawings, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20201116) Parts, tracks, vias 287, 6,546, 1,628 Triangles, simulation 7,777,178 in 292 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 264 MB 1.9 GB STEP 929 MB 2.8 GB STL 389 MB 2.0 GB OBJ 829 MB 4.8 GB Visual GLB 176 MB 2.8 GB OBJ 574 MB 3.6 GB

13.74 Lily58_Lite_Rev3_TOP_Case

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	59 ms	0.2	0.8	0.5 ms	1.3	58 ms	0.2	0.2	2.8
Simulation, STEP	55 ms	0.2	0.7	0.3 ms	1.2	1.4	0.2	0.2	4.0
Simulation, STL	57 ms	0.2	0.8	0.2 ms	1.2	0.1	0.2	0.2	2.7
Simulation, OBJ	58 ms	0.2	0.8	0.2 ms	1.1	1.8	0.2	0.2	4.3
Visual, GLB	49 ms	0.2	0.8	0.2 ms	2.2	36 ms	0.2	0.2	3.7
Visual, OBJ	52 ms	0.2	0.7	0.2 ms	2.2	0.9	0.2	0.2	4.5

Board Repo: kata0510/Lily58 Board: Lily58_Lite_Rev3_TOP_Case.kicad_pcb Folder case / top-plate Complexity 94 / 1000 (size 54, features 40) KESE features rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 29, 0, 0 Triangles, simulation 405,304 in 68 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 13 MB 277 MB STEP 63 MB 283 MB STL 20 MB 277 MB OBJ 40 MB 295 MB Visual GLB 7.6 MB 233 MB OBJ 22 MB 235 MB

13.75 Lily58_Lite_Rev3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.0	9.0	0.5 ms	8.4	0.4	1.2	0.2	21.8
Simulation, STEP	0.6	1.8	8.8	0.8 ms	7.9	6.4	1.0	0.2	26.8
Simulation, STL	0.6	1.8	9.3	0.5 ms	8.0	0.6	1.0	0.2	21.7
Simulation, OBJ	0.6	1.8	8.7	0.4 ms	7.9	12.6	1.0	0.2	32.8
Visual, GLB	0.6	1.8	8.7	0.6 ms	18.5	0.3	2.1	0.2	32.2
Visual, OBJ	0.7	1.8	8.8	0.7 ms	18.8	9.3	2.9	0.2	42.5

Board Repo: kata0510/Lily58 Board: Lily58_Lite_Rev3.kicad_pcb Folder Lite_Rev3 Complexity 240 / 1000 (size 175, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 102, 637, 29 Triangles, simulation 2,400,690 in 116 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 81 MB 951 MB STEP 336 MB 1.0 GB STL 120 MB 987 MB OBJ 250 MB 1.5 GB Visual GLB 60 MB 1.4 GB OBJ 184 MB 1.3 GB

13.76 Lily58

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.4	16.3	0.3 ms	12.4	0.5	1.6	0.3	34.0
Simulation, STEP	0.5	2.5	17.5	0.3 ms	12.9	10.1	1.7	0.3	45.4
Simulation, STL	0.6	2.4	17.0	0.3 ms	12.7	1.4	1.6	0.3	36.1
Simulation, OBJ	0.6	2.4	17.4	0.3 ms	13.2	17.9	1.8	0.3	53.8
Visual, GLB	0.6	2.6	17.6	0.3 ms	29.9	0.4	3.9	0.3	55.3
Visual, OBJ	0.5	2.6	18.3	0.3 ms	31.7	13.3	5.2	0.3	71.9

Board Repo: kata0510/Lily58 Board: Lily58.kicad_pcb Folder pcb Complexity 223 / 1000 (size 178, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 75, 991, 28 Triangles, simulation 2,925,400 in 69 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 100 MB 1.0 GB STEP 533 MB 1.2 GB STL 146 MB 1.0 GB OBJ 311 MB 1.9 GB Visual GLB 63 MB 1.4 GB OBJ 195 MB 1.4 GB

13.77 Lily58_Pro_BOTTOM

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	5 ms	29 ms	0.1	0.1 ms	0.2	6 ms	19 ms	0.2	0.6
Simulation, STEP	5 ms	31 ms	99 ms	0.1 ms	0.3	0.2	23 ms	0.2	0.9
Simulation, STL	5 ms	30 ms	0.1	0.1 ms	0.2	11 ms	32 ms	0.3	0.7
Simulation, OBJ	5 ms	35 ms	0.1	0.1 ms	0.2	0.1	19 ms	0.2	0.7
Visual, GLB	4 ms	30 ms	0.2	0.1 ms	0.2	3 ms	47 ms	0.2	0.7
Visual, OBJ	5 ms	47 ms	0.1	0.1 ms	0.2	57 ms	38 ms	0.2	0.7

Board Repo: kata0510/Lily58 Board: Lily58_Pro_BOTTOM.kicad_pcb Folder Pro / Case Complexity 17 / 1000 (size 17, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 0, 0, 0 Triangles, simulation 32,200 in 10 parts Note no components Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 1.0 MB 43 MB STEP 4.5 MB 46 MB STL 1.6 MB 45 MB OBJ 2.9 MB 51 MB Visual GLB 447 kB 61 MB OBJ 1.2 MB 70 MB

13.78 Lily58_Pro_TOP

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	23 ms	42 ms	9 ms	0.0 ms	14 ms	1 ms	3 ms	0.2	0.3
Simulation, STEP	24 ms	41 ms	8 ms	0.0 ms	13 ms	12 ms	2 ms	0.2	0.3
Simulation, STL	22 ms	43 ms	8 ms	0.0 ms	14 ms	1.0 ms	3 ms	0.2	0.3
Simulation, OBJ	22 ms	44 ms	8 ms	0.0 ms	14 ms	7 ms	4 ms	0.2	0.3
Visual, GLB	25 ms	42 ms	9 ms	0.0 ms	37 ms	1 ms	10 ms	0.2	0.3
Visual, OBJ	22 ms	41 ms	8 ms	0.0 ms	44 ms	7 ms	10 ms	0.2	0.3

Board Repo: kata0510/Lily58 Board: Lily58_Pro_TOP.kicad_pcb Folder Pro / Case Complexity 37 / 1000 (size 17, features 20) KESE features filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 0, 0, 0 Triangles, simulation 1,048 in 3 parts Note no components Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 53 kB 40 MB STEP 353 kB 40 MB STL 53 kB 40 MB OBJ 158 kB 40 MB Visual GLB 69 kB 44 MB OBJ 165 kB 44 MB

13.79 Lily58_Pro

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.1	8.6	0.7 ms	7.1	0.3	0.8	0.3	19.8
Simulation, STEP	0.7	2.4	8.6	0.7 ms	7.2	5.8	0.8	0.3	25.7
Simulation, STL	0.5	2.1	8.5	0.6 ms	7.4	0.7	0.8	0.2	20.3
Simulation, OBJ	0.5	2.0	9.0	0.6 ms	7.5	11.1	0.7	0.2	31.2
Visual, GLB	0.5	2.1	8.8	0.7 ms	16.5	0.3	2.6	0.2	31.0
Visual, OBJ	0.6	2.1	8.4	0.8 ms	17.3	8.8	2.8	0.3	40.3

Board Repo: kata0510/Lily58 Board: Lily58_Pro.kicad_pcb Folder Pro / PCB Complexity 234 / 1000 (size 189, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 74, 1,658, 149 Triangles, simulation 2,025,324 in 69 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 71 MB 888 MB STEP 389 MB 912 MB STL 101 MB 891 MB OBJ 217 MB 1.4 GB Visual GLB 57 MB 1.0 GB OBJ 177 MB 1.3 GB

13.80 Pro_V2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.6	5.4	14.8	1 ms	15.6	0.5	1.6	0.3	39.8
Simulation, STEP	1.7	5.3	14.9	1 ms	14.9	9.6	1.6	0.3	48.3
Simulation, STL	1.6	5.3	14.7	1 ms	16.0	1.4	1.5	0.3	41.1
Simulation, OBJ	1.7	5.6	15.2	1 ms	14.8	17.7	1.5	0.3	56.8
Visual, GLB	1.6	5.6	14.5	1 ms	35.0	0.5	4.7	0.3	62.1
Visual, OBJ	1.8	5.5	14.5	1 ms	35.2	14.9	5.0	0.3	77.1

Board Repo: kata0510/Lily58 Board: Pro_V2.kicad_pcb Folder Pro_V2 Complexity 394 / 1000 (size 259, features 135) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 260, 2,389, 497 Triangles, simulation 3,913,124 in 252 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 138 MB 1.7 GB STEP 746 MB 1.7 GB STL 196 MB 1.7 GB OBJ 425 MB 2.6 GB Visual GLB 121 MB 2.1 GB OBJ 380 MB 2.5 GB

13.81 Kilsyth

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	6.1	24.4	1 ms	16.4	0.7	2.4	0.4	51.4
Simulation, STEP	0.9	5.0	22.0	0.8 ms	14.6	11.3	2.3	0.3	56.3
Simulation, STL	0.8	4.8	21.3	0.8 ms	14.0	1.1	2.0	0.3	44.4
Simulation, OBJ	0.8	4.7	21.1	1 ms	13.9	20.1	2.0	0.3	62.9
Visual, GLB	0.9	4.6	20.7	0.8 ms	32.6	0.4	3.5	0.3	63.0
Visual, OBJ	0.8	4.8	20.8	0.8 ms	33.3	13.6	3.5	0.3	77.1

Board Repo: kbeckmann/Kilsyth Board: Kilsyth.kicad_pcb Folder hardware / RevA Complexity 344 / 1000 (size 279, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 160, 2,415, 431 Triangles, simulation 3,456,240 in 342 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 120 MB 1.2 GB STEP 570 MB 1.4 GB STL 173 MB 1.2 GB OBJ 369 MB 2.3 GB Visual GLB 76 MB 1.3 GB OBJ 240 MB 1.6 GB

13.82 Kilsyth

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	3.5	13.1	0.3 ms	12.0	0.6	1.2	0.3	31.4
Simulation, STEP	0.7	3.5	13.2	0.6 ms	12.0	7.9	1.1	0.3	38.6
Simulation, STL	0.7	3.5	13.1	0.3 ms	12.2	0.9	1.2	0.3	31.9
Simulation, OBJ	0.7	3.5	13.3	0.4 ms	12.3	16.2	1.1	0.2	47.2
Visual, GLB	0.7	3.5	13.3	0.8 ms	23.1	0.3	2.5	0.3	43.6
Visual, OBJ	0.7	3.6	13.2	0.4 ms	22.9	10.7	2.9	0.3	54.2

Board Repo: kbeckmann/Kilsyth Board: Kilsyth.kicad_pcb Folder hardware / RevB Complexity 335 / 1000 (size 270, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 145, 1,393, 378 Triangles, simulation 2,713,328 in 113 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 93 MB 871 MB STEP 406 MB 1.2 GB STL 136 MB 831 MB OBJ 286 MB 1.8 GB Visual GLB 60 MB 1.3 GB OBJ 187 MB 1.3 GB

13.83 usb-c-breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.9	2.8	0.3 ms	2.3	0.1	0.4	0.2	6.9
Simulation, STEP	0.2	0.8	2.9	0.3 ms	2.2	1.9	0.4	0.2	8.6
Simulation, STL	0.2	1.0	3.0	0.2 ms	2.2	0.2	0.3	0.2	7.0
Simulation, OBJ	0.1	0.8	2.7	0.2 ms	2.1	3.6	0.3	0.2	10.0
Visual, GLB	0.2	0.9	2.8	0.3 ms	5.1	70 ms	0.5	0.2	9.8
Visual, OBJ	0.2	0.8	3.0	0.3 ms	5.1	2.0	0.5	0.2	11.8

Board Repo: kbeckmann/Kilsyth Board: usb-c-breakout.kicad_pcb Folder hardware / usb-c-breakout Complexity 245 / 1000 (size 180, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 33, 602, 41 Triangles, simulation 823,370 in 66 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 29 MB 340 MB STEP 124 MB 398 MB STL 41 MB 336 MB OBJ 84 MB 583 MB Visual GLB 15 MB 401 MB OBJ 45 MB 406 MB

13.84 doj

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.6	11.1	1 ms	7.1	0.3	0.9	0.3	21.7
Simulation, STEP	0.2	1.6	10.9	0.8 ms	6.8	5.4	0.9	0.2	26.0
Simulation, STL	0.2	1.7	11.0	0.9 ms	7.2	0.6	0.9	0.2	21.8
Simulation, OBJ	0.2	1.7	10.7	0.7 ms	7.0	9.7	0.9	0.3	30.5
Visual, GLB	0.2	1.6	10.6	0.8 ms	13.7	0.2	1.7	0.2	28.2
Visual, OBJ	0.3	1.6	10.9	0.7 ms	13.7	5.5	1.8	0.2	33.9

Board Repo: kelu124/echomods Board: doj.kicad_pcb Folder doj / source / v1.1-kicad Complexity 197 / 1000 (size 152, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 17, 530, 8 Triangles, simulation 2,267,576 in 123 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 77 MB 871 MB STEP 395 MB 901 MB STL 113 MB 828 MB OBJ 240 MB 1.5 GB Visual GLB 45 MB 885 MB OBJ 137 MB 978 MB

13.85 doj

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	2.1	11.9	0.8 ms	7.9	0.4	0.9	0.2	23.7
Simulation, STEP	0.3	1.9	12.0	1.0 ms	7.8	6.2	1.0	0.3	29.5
Simulation, STL	0.3	2.0	11.8	1 ms	7.7	0.8	1.0	0.3	23.9
Simulation, OBJ	0.3	2.0	11.6	1 ms	7.9	10.7	1.1	0.3	33.9
Visual, GLB	0.3	2.2	11.4	0.9 ms	16.2	0.2	2.1	0.3	32.7
Visual, OBJ	0.3	2.1	12.2	1.0 ms	15.8	6.7	2.0	0.3	39.5

Board Repo: kelu124/echomods Board: doj.kicad_pcb Folder doj / source / v1.2-kicad Complexity 197 / 1000 (size 152, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 17, 557, 8 Triangles, simulation 2,371,252 in 118 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 81 MB 883 MB STEP 416 MB 946 MB STL 119 MB 828 MB OBJ 252 MB 1.6 GB Visual GLB 51 MB 923 MB OBJ 156 MB 1.1 GB

13.86 doj_v2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.7	11.0	0.5 ms	7.4	0.3	1.0	0.2	22.1
Simulation, STEP	0.4	1.7	11.1	0.5 ms	7.5	5.9	0.9	0.2	27.9
Simulation, STL	0.4	1.7	11.0	0.6 ms	7.3	0.7	1.0	0.3	22.3
Simulation, OBJ	0.4	1.7	11.3	0.5 ms	7.7	11.4	1.0	0.3	33.9
Visual, GLB	0.4	1.8	11.0	0.5 ms	15.5	0.2	1.8	0.3	30.8
Visual, OBJ	0.5	1.7	10.8	0.5 ms	14.7	7.1	1.8	0.2	36.7

Board Repo: kelu124/echomods Board: doj_v2.kicad_pcb Folder doj / source / v2.0-kicad Complexity 208 / 1000 (size 153, features 55) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20170123) Parts, tracks, vias 22, 497, 9 Triangles, simulation 1,926,826 in 53 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 67 MB 670 MB STEP 331 MB 782 MB STL 96 MB 706 MB OBJ 204 MB 1.3 GB Visual GLB 41 MB 811 MB OBJ 124 MB 885 MB

13.87 goblin

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.5	4.3	0.7 ms	3.9	0.1	0.6	0.3	11.1
Simulation, STEP	0.4	1.5	4.2	0.4 ms	3.8	2.5	0.5	0.2	13.1
Simulation, STL	0.3	1.6	4.2	0.3 ms	3.9	0.3	0.5	0.3	11.0
Simulation, OBJ	0.3	1.4	4.3	0.4 ms	3.6	4.1	0.5	0.3	14.6
Visual, GLB	0.3	1.5	4.4	0.3 ms	6.3	0.1	0.9	0.3	13.7
Visual, OBJ	0.4	1.5	4.5	0.5 ms	6.1	3.4	1.0	0.3	17.1

Board Repo: kelu124/echomods Board: goblin.kicad_pcb Folder goblin / source / Kicad Complexity 198 / 1000 (size 163, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 60, 459, 12 Triangles, simulation 718,532 in 94 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 25 MB 376 MB STEP 123 MB 462 MB STL 36 MB 370 MB OBJ 74 MB 553 MB Visual GLB 20 MB 471 MB OBJ 58 MB 504 MB

13.88 tobo

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	1.0	2.5	0.3 ms	2.4	72 ms	0.3	0.2	6.6
Simulation, STEP	0.2	0.9	2.5	0.3 ms	2.6	1.7	0.3	0.2	8.4
Simulation, STL	0.2	0.9	2.5	0.3 ms	2.5	0.1	0.3	0.2	6.7
Simulation, OBJ	0.2	0.9	2.5	0.3 ms	2.5	1.8	0.3	0.2	8.4
Visual, GLB	0.2	0.9	2.5	0.3 ms	2.9	40 ms	0.3	0.2	7.1
Visual, OBJ	0.2	0.9	2.5	0.3 ms	3.0	1.2	0.3	0.2	8.3

Board Repo: kelu124/echomods Board: tobo.kicad_pcb Folder retired / tobo / source / Kicad Complexity 156 / 1000 (size 141, features 15) KESE features through vias Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 23, 227, 6 Triangles, simulation 443,022 in 60 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 16 MB 290 MB STEP 67 MB 344 MB STL 22 MB 286 MB OBJ 46 MB 375 MB Visual GLB 11 MB 324 MB OBJ 31 MB 334 MB

13.89 CM5_MINIMA_3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	3.5	14.3	1 ms	15.6	0.8	2.2	0.3	37.6
Simulation, STEP	0.9	3.4	14.2	1 ms	15.7	8.8	2.2	0.3	45.4
Simulation, STL	0.9	3.5	14.2	1.0 ms	15.9	1.3	2.2	0.3	38.4
Simulation, OBJ	1.0	3.7	14.5	1 ms	15.7	23.5	2.2	0.3	60.9
Visual, GLB	1.0	3.8	14.7	1 ms	27.4	0.3	2.2	0.3	49.6
Visual, OBJ	0.9	3.7	14.9	1 ms	29.9	10.3	2.5	0.3	62.4

Board Repo: KiCad/kicad-source-mirror Board: CM5_MINIMA_3.kicad_pcb Folder demos / cm5_minima Complexity 348 / 1000 (size 223, features 125) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 6 File format KiCad 10 (20250513) Parts, tracks, vias 72, 2,084, 444 Triangles, simulation 4,184,934 in 236 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 143 MB 1.3 GB STEP 541 MB 1.5 GB STL 209 MB 1.1 GB OBJ 451 MB 2.7 GB Visual GLB 67 MB 1.3 GB OBJ 211 MB 1.4 GB

13.90 complex_hierarchy

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	0.8	4.1	0.6 ms	3.4	0.2	0.6	0.3	9.8
Simulation, STEP	0.3	0.9	4.1	0.6 ms	3.9	3.3	0.5	0.3	13.2
Simulation, STL	0.4	0.8	4.2	0.9 ms	3.9	0.3	0.6	0.3	10.5
Simulation, OBJ	0.4	0.8	4.3	0.7 ms	4.1	5.5	0.6	0.3	15.9
Visual, GLB	0.3	0.8	4.2	1.0 ms	7.0	80 ms	0.8	0.2	13.5
Visual, OBJ	0.3	0.8	4.0	0.5 ms	6.9	3.2	0.8	0.2	16.3

Board Repo: KiCad/kicad-source-mirror Board: complex_hierarchy.kicad_pcb Folder demos / complex_hierarchy Complexity 244 / 1000 (size 159, features 85) KESE features rounded, trapezoid or chamfered pads, drill offsets, filled zones, copper text, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 68, 364, 0 Triangles, simulation 932,774 in 63 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 32 MB 450 MB STEP 148 MB 515 MB STL 47 MB 418 MB OBJ 94 MB 677 MB Visual GLB 19 MB 523 MB OBJ 55 MB 538 MB

13.91 ecc83-pp

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.7	0.1 ms	0.8	30 ms	0.1	0.2	2.2
Simulation, STEP	0.1	0.2	0.9	0.2 ms	0.9	1.1	0.1	0.2	3.4
Simulation, STL	0.1	0.2	0.8	0.3 ms	0.8	41 ms	96 ms	0.2	2.2
Simulation, OBJ	0.1	0.1	0.7	0.1 ms	0.8	1.0	0.1	0.2	3.1
Visual, GLB	0.1	0.1	0.7	0.1 ms	1.5	17 ms	0.1	0.2	2.8
Visual, OBJ	0.1	0.2	0.7	0.2 ms	1.5	0.6	0.1	0.2	3.4

Board Repo: KiCad/kicad-source-mirror Board: ecc83-pp.kicad_pcb Folder demos / ecc83 Complexity 166 / 1000 (size 111, features 55) KESE features filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 11, 59, 0 Triangles, simulation 177,454 in 23 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 5.9 MB 201 MB STEP 23 MB 214 MB STL 8.9 MB 201 MB OBJ 17 MB 200 MB Visual GLB 3.5 MB 175 MB OBJ 9.8 MB 172 MB

13.92 ecc83-pp_v2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.8	0.3 ms	0.9	30 ms	0.1	0.2	2.3
Simulation, STEP	0.1	0.2	0.7	0.2 ms	1.0	1.0	0.1	0.2	3.4
Simulation, STL	0.1	0.2	0.7	0.2 ms	0.9	45 ms	0.1	0.2	2.3
Simulation, OBJ	0.1	0.2	0.8	0.2 ms	1.0	0.9	0.1	0.2	3.2
Visual, GLB	0.1	0.1	0.7	0.3 ms	1.5	18 ms	0.1	0.2	2.8
Visual, OBJ	0.1	0.2	0.7	0.2 ms	1.5	0.6	0.1	0.2	3.4

Board Repo: KiCad/kicad-source-mirror Board: ecc83-pp_v2.kicad_pcb Folder demos / ecc83 Complexity 174 / 1000 (size 109, features 65) KESE features slotted holes, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 11, 53, 0 Triangles, simulation 167,764 in 24 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 5.6 MB 195 MB STEP 25 MB 212 MB STL 8.4 MB 199 MB OBJ 16 MB 196 MB Visual GLB 3.4 MB 169 MB OBJ 9.5 MB 167 MB

13.93 interf_u

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.4	7.9	0.8 ms	7.4	0.3	0.9	0.3	18.5
Simulation, STEP	0.3	1.3	7.8	0.7 ms	7.1	5.0	0.9	0.3	22.6
Simulation, STL	0.3	1.4	8.0	1 ms	6.9	0.8	0.9	0.3	18.5
Simulation, OBJ	0.3	1.4	7.8	0.7 ms	6.8	8.7	0.9	0.3	26.1
Visual, GLB	0.3	1.3	7.5	0.7 ms	13.1	0.2	1.6	0.2	24.2
Visual, OBJ	0.3	1.4	7.6	0.7 ms	13.0	5.3	2.0	0.3	29.7

Board Repo: KiCad/kicad-source-mirror Board: interf_u.kicad_pcb Folder demos / interf_u Complexity 245 / 1000 (size 165, features 80) KESE features through vias, filled zones, copper text, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 24, 731, 84 Triangles, simulation 1,806,582 in 184 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 60 MB 680 MB STEP 248 MB 817 MB STL 90 MB 714 MB OBJ 185 MB 1.2 GB Visual GLB 35 MB 812 MB OBJ 107 MB 790 MB

13.94 kit-dev-coldfire-xilinx_5213

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	3.7	12.9	0.7 ms	14.9	0.7	1.9	0.3	35.4
Simulation, STEP	0.9	3.9	12.9	1 ms	15.6	10.3	1.9	0.3	45.8
Simulation, STL	0.9	3.8	12.9	1 ms	15.4	1.5	1.9	0.3	36.7
Simulation, OBJ	0.9	3.9	13.0	1 ms	15.4	23.2	2.0	0.3	58.9
Visual, GLB	1.0	4.1	13.3	1.0 ms	30.1	0.3	3.6	0.3	52.6
Visual, OBJ	1.0	4.0	13.1	0.9 ms	29.9	14.1	3.8	0.3	66.3

Board Repo: KiCad/kicad-source-mirror Board: kit-dev-coldfire-xilinx_5213.kicad_pcb Folder demos / kit-dev-coldfire-xilinx_5213 Complexity 384 / 1000 (size 269, features 115) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 154, 2,935, 253 Triangles, simulation 3,721,378 in 292 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 126 MB 1.0 GB STEP 487 MB 1.4 GB STL 186 MB 1.1 GB OBJ 392 MB 2.4 GB Visual GLB 76 MB 1.5 GB OBJ 240 MB 1.6 GB

13.95 microwave

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	94 ms	43 ms	0.1	0.1 ms	0.4	8 ms	27 ms	0.2	0.9
Simulation, STEP	0.1	44 ms	0.1	0.1 ms	0.4	0.9	25 ms	0.2	1.9
Simulation, STL	0.1	45 ms	0.1	0.1 ms	0.5	21 ms	29 ms	0.2	1.1
Simulation, OBJ	91 ms	42 ms	0.1	0.1 ms	0.4	0.3	26 ms	0.2	1.3
Visual, GLB	94 ms	44 ms	0.1	0.1 ms	0.5	13 ms	82 ms	0.2	1.1
Visual, OBJ	0.1	46 ms	0.2	0.1 ms	0.5	0.2	58 ms	0.2	1.3

Board Repo: KiCad/kicad-source-mirror Board: microwave.kicad_pcb Folder demos / microwave Complexity 34 / 1000 (size 34, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 4, 0, 0 Triangles, simulation 54,124 in 5 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 1.8 MB 81 MB STEP 14 MB 205 MB STL 2.7 MB 80 MB OBJ 5.0 MB 92 MB Visual GLB 1.1 MB 98 MB OBJ 3.0 MB 106 MB

13.96 multichannel_mixer-unrouted

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.0	4.2	0.6 ms	3.2	0.2	0.5	0.2	9.8
Simulation, STEP	0.5	0.9	4.0	1 ms	3.1	3.0	0.5	0.3	12.3
Simulation, STL	0.5	0.9	4.0	0.6 ms	3.1	0.3	0.5	0.3	9.7
Simulation, OBJ	0.5	0.9	4.1	0.6 ms	3.2	5.6	0.5	0.2	15.1
Visual, GLB	0.5	0.9	4.0	0.6 ms	7.9	0.1	0.9	0.2	14.4
Visual, OBJ	0.5	0.9	4.2	0.5 ms	7.8	4.1	1.0	0.2	18.8

Board Repo: KiCad/kicad-source-mirror Board: multichannel_mixer-unrouted.kicad_pcb Folder demos / multichannel Complexity 251 / 1000 (size 196, features 55) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 11 File format KiCad 9 (20241030) Parts, tracks, vias 114, 140, 19 Triangles, simulation 941,284 in 88 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 32 MB 466 MB STEP 148 MB 526 MB STL 47 MB 477 MB OBJ 95 MB 673 MB Visual GLB 23 MB 637 MB OBJ 69 MB 623 MB

13.97 multichannel_mixer

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	0.9	4.1	1 ms	3.4	0.2	0.5	0.2	9.7
Simulation, STEP	0.5	0.8	3.9	0.8 ms	3.1	2.8	0.4	0.2	11.8
Simulation, STL	0.5	0.9	4.0	0.6 ms	3.3	0.2	0.4	0.2	9.4
Simulation, OBJ	0.4	0.8	4.0	0.5 ms	3.3	5.3	0.4	0.2	14.4
Visual, GLB	0.4	0.8	3.9	0.5 ms	7.4	0.1	1.0	0.2	14.0
Visual, OBJ	0.4	0.9	3.9	0.6 ms	7.5	4.0	1.1	0.2	18.0

Board Repo: KiCad/kicad-source-mirror Board: multichannel_mixer.kicad_pcb Folder demos / multichannel Complexity 230 / 1000 (size 175, features 55) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 114, 576, 29 Triangles, simulation 1,027,228 in 92 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 34 MB 449 MB STEP 171 MB 548 MB STL 51 MB 456 MB OBJ 104 MB 741 MB Visual GLB 26 MB 621 MB OBJ 78 MB 649 MB

13.98 One-Air-Max

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	3.0	8.4	1.0 ms	7.2	0.4	1.0	0.3	21.0
Simulation, STEP	0.8	3.0	8.5	0.8 ms	7.1	6.0	1.0	0.3	26.6
Simulation, STL	0.9	3.0	8.5	0.9 ms	7.3	0.7	1.0	0.3	21.6
Simulation, OBJ	0.8	3.0	8.6	1 ms	7.2	13.1	1.0	0.3	34.0
Visual, GLB	0.8	2.9	8.5	1 ms	18.7	0.2	2.2	0.2	33.6
Visual, OBJ	0.8	3.0	8.5	1 ms	19.1	9.3	2.6	0.3	43.6

Board Repo: KiCad/kicad-source-mirror Board: One-Air-Max.kicad_pcb Folder demos / openair-max Complexity 361 / 1000 (size 221, features 140) KESE features through vias, slotted holes, custom pads, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 199, 1,654, 410 Triangles, simulation 2,177,588 in 169 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 76 MB 790 MB STEP 294 MB 1.0 GB STL 109 MB 775 MB OBJ 230 MB 1.4 GB Visual GLB 55 MB 963 MB OBJ 170 MB 1.2 GB

13.99 pic_programmer

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.0	5.2	0.4 ms	4.7	0.2	0.6	0.2	12.2
Simulation, STEP	0.3	0.9	5.2	0.5 ms	4.6	3.7	0.6	0.3	15.4
Simulation, STL	0.3	0.9	5.1	0.4 ms	4.8	0.4	0.6	0.2	12.4
Simulation, OBJ	0.3	0.9	5.2	0.4 ms	4.7	6.5	0.5	0.2	18.4
Visual, GLB	0.3	0.9	5.1	0.7 ms	9.9	0.1	1.0	0.2	17.4
Visual, OBJ	0.3	0.9	5.7	0.4 ms	9.9	4.4	1.1	0.2	22.5

Board Repo: KiCad/kicad-source-mirror Board: pic_programmer.kicad_pcb Folder demos / pic_programmer Complexity 273 / 1000 (size 158, features 115) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 57, 370, 6 Triangles, simulation 1,330,386 in 123 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 44 MB 573 MB STEP 211 MB 662 MB STL 67 MB 546 MB OBJ 134 MB 884 MB Visual GLB 28 MB 792 MB OBJ 84 MB 687 MB

13.100 RoyalBlue54L-NFC-Antenna

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	28 ms	56 ms	0.1	0.1 ms	0.5	11 ms	25 ms	0.2	0.9
Simulation, STEP	30 ms	59 ms	0.1	0.1 ms	0.5	0.7	25 ms	0.2	1.6
Simulation, STL	31 ms	56 ms	0.1	0.1 ms	0.5	19 ms	26 ms	0.2	1.0
Simulation, OBJ	29 ms	56 ms	0.1	0.1 ms	0.5	0.3	32 ms	0.2	1.3
Visual, GLB	33 ms	62 ms	0.1	0.1 ms	0.9	11 ms	72 ms	0.2	1.4
Visual, OBJ	29 ms	61 ms	0.1	0.1 ms	0.8	0.3	64 ms	0.2	1.6

Board Repo: KiCad/kicad-source-mirror Board: RoyalBlue54L-NFC-Antenna.kicad_pcb Folder demos / royalblue54L_feather / nfc_antenna / RoyalBlue54L-NFC-Antenna Complexity 168 / 1000 (size 108, features 60) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, copper drawings, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 1, 160, 2 Triangles, simulation 67,926 in 7 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 2.3 MB 159 MB STEP 7.9 MB 160 MB STL 3.4 MB 154 MB OBJ 6.4 MB 158 MB Visual GLB 2.2 MB 132 MB OBJ 6.2 MB 131 MB

13.101 RoyalBlue54L-Feather

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	2.1	4.9	2 ms	6.5	0.3	1.1	0.3	16.0
Simulation, STEP	0.8	1.9	4.8	0.5 ms	6.2	4.4	1.1	0.3	19.4
Simulation, STL	0.9	1.9	4.8	0.6 ms	6.4	0.5	1.1	0.2	15.8
Simulation, OBJ	0.8	2.0	4.6	0.5 ms	6.0	9.6	1.1	0.3	24.3
Visual, GLB	0.7	1.8	4.6	0.6 ms	12.0	0.1	0.9	0.3	20.5
Visual, OBJ	0.8	1.9	4.6	0.5 ms	12.4	5.0	1.2	0.3	26.2

Board Repo: KiCad/kicad-source-mirror Board: RoyalBlue54L-Feather.kicad_pcb Folder demos / royalblue54L_feather Complexity 500 / 1000 (size 270, features 230) KESE features blind and buried vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones, copper drawings, curved board outline, TrueType text, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours, castellated pads Tested 9th November 2026 Copper layers 8 File format KiCad 9 (20241229) Parts, tracks, vias 54, 943, 183 Triangles, simulation 1,623,990 in 115 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 56 MB 547 MB STEP 233 MB 667 MB STL 81 MB 550 MB OBJ 171 MB 1.1 GB Visual GLB 27 MB 708 MB OBJ 82 MB 652 MB

13.102 sonde xilinx

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.3	0.2 ms	1.3	63 ms	0.2	0.2	3.5
Simulation, STEP	0.1	0.2	1.3	0.3 ms	1.2	1.3	0.2	0.2	4.5
Simulation, STL	0.1	0.2	1.3	0.3 ms	1.3	89 ms	0.2	0.2	3.4
Simulation, OBJ	0.1	0.2	1.3	0.2 ms	1.2	1.8	0.2	0.2	5.1
Visual, GLB	0.2	0.3	1.3	0.2 ms	3.3	36 ms	0.3	0.2	5.6
Visual, OBJ	0.1	0.3	1.3	0.3 ms	3.3	1.2	0.3	0.2	6.6

Board Repo: KiCad/kicad-source-mirror Board: sonde xilinx.kicad_pcb Folder demos / sonde xilinx Complexity 235 / 1000 (size 140, features 95) KESE features through vias, filled zones, copper text, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 25, 208, 3 Triangles, simulation 454,014 in 54 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 311 MB STEP 72 MB 333 MB STL 23 MB 320 MB OBJ 45 MB 347 MB Visual GLB 10.0 MB 345 MB OBJ 30 MB 343 MB

13.103 StickHub

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	0.7	3.8	0.4 ms	4.7	0.2	0.5	0.2	10.5
Simulation, STEP	0.4	0.7	3.7	0.4 ms	4.9	2.8	0.4	0.3	13.2
Simulation, STL	0.4	0.7	3.9	0.7 ms	4.9	0.3	0.4	0.3	10.9
Simulation, OBJ	0.4	0.7	3.9	0.4 ms	4.8	6.0	0.5	0.2	16.6
Visual, GLB	0.5	0.7	4.0	0.4 ms	7.9	0.1	0.7	0.3	14.4
Visual, OBJ	0.4	0.7	3.9	0.5 ms	8.3	3.7	0.8	0.2	18.1

Board Repo: KiCad/kicad-source-mirror Board: StickHub.kicad_pcb Folder demos / stickhub Complexity 366 / 1000 (size 226, features 140) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20250907) Parts, tracks, vias 88, 1,293, 87 Triangles, simulation 930,590 in 58 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 32 MB 384 MB STEP 166 MB 505 MB STL 47 MB 396 MB OBJ 95 MB 663 MB Visual GLB 21 MB 547 MB OBJ 62 MB 516 MB

13.104 tinytapeout-demo

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.3	5.0	16.5	0.5 ms	16.1	0.8	2.2	0.4	42.2
Simulation, STEP	1.4	5.0	16.1	2 ms	16.1	11.3	2.2	0.3	52.5
Simulation, STL	1.3	4.9	15.8	0.6 ms	15.6	1.6	2.0	0.3	41.6
Simulation, OBJ	1.3	4.7	16.1	0.5 ms	15.7	22.7	2.2	0.3	62.9
Visual, GLB	1.3	4.8	16.0	1 ms	42.0	0.5	6.8	0.3	71.6
Visual, OBJ	1.5	5.0	16.3	0.8 ms	41.9	16.3	7.1	0.3	88.3

Board Repo: KiCad/kicad-source-mirror Board: tinytapeout-demo.kicad_pcb Folder demos / tiny_tapeout Complexity 415 / 1000 (size 260, features 155) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, knockout text, TrueType text, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 140, 2,143, 405 Triangles, simulation 4,352,312 in 127 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 150 MB 1.3 GB STEP 672 MB 1.7 GB STL 218 MB 1.4 GB OBJ 472 MB 2.8 GB Visual GLB 107 MB 1.7 GB OBJ 340 MB 2.2 GB

13.105 video

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.6	8.0	36.2	2 ms	36.9	1.8	5.1	0.4	90.1
Simulation, STEP	1.6	8.2	34.1	2 ms	35.9	23.5	4.7	0.4	108.3
Simulation, STL	1.6	7.7	36.3	2 ms	36.6	3.9	4.9	0.4	91.5
Simulation, OBJ	1.6	7.7	35.0	2 ms	36.4	62.0	4.9	0.4	148.0
Visual, GLB	1.6	7.9	34.5	2 ms	114.3	0.9	9.3	0.3	168.6
Visual, OBJ	1.8	8.0	35.5	2 ms	115.3	33.2	9.3	0.3	203.5

Board Repo: KiCad/kicad-source-mirror Board: video.kicad_pcb Folder demos / video Complexity 405 / 1000 (size 300, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper text, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 185, 7,932, 808 Triangles, simulation 10,648,432 in 602 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 352 MB 2.8 GB STEP 1.3 GB 3.5 GB STL 532 MB 2.8 GB OBJ 1.2 GB 6.6 GB Visual GLB 197 MB 3.3 GB OBJ 660 MB 4.3 GB

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