Corpus Testing 08

Corpus Page 8

Part 8 of 29 of Corpus Testing: boards 757 to 864, six runs each, one file format a run, as Corpus Testing describes.

757. picociaa

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.8	3.6	0.7 ms	3.5	0.1	0.5	0.3	9.1
Simulation, STEP	0.3	0.8	3.2	0.4 ms	3.1	2.8	0.5	0.3	10.9
Simulation, STL	0.3	0.8	3.1	0.3 ms	3.3	0.2	0.5	0.2	8.4
Simulation, OBJ	0.3	0.8	3.3	0.4 ms	3.3	4.8	0.5	0.2	13.2
Visual, GLB	0.3	0.8	3.2	0.4 ms	8.0	0.1	0.9	0.2	13.5
Visual, OBJ	0.3	0.8	3.2	0.5 ms	8.5	4.3	1.0	0.2	18.4

Board Repo: ciaa/Hardware Board: picociaa.kicad_pcb Folder PCB / pico Complexity 269 / 1000 (size 224, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 64, 868, 90 Triangles, simulation 823,776 in 101 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 29 MB 431 MB STEP 148 MB 483 MB STL 41 MB 430 MB OBJ 84 MB 537 MB Visual GLB 24 MB 607 MB OBJ 72 MB 591 MB

758. .kicad_pcb

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.7	6.5	1 ms	4.8	0.2	0.7	0.3	15.9
Simulation, STEP	0.8	2.9	6.7	1 ms	4.8	3.2	0.7	0.3	19.3
Simulation, STL	0.7	2.7	6.0	2 ms	4.6	0.5	0.7	0.3	15.5
Simulation, OBJ	0.7	2.7	6.5	1 ms	4.7	6.6	0.7	0.2	22.1
Visual, GLB	0.8	2.9	6.6	2 ms	13.3	0.1	1.1	0.3	25.1
Visual, OBJ	0.8	2.7	6.1	1 ms	13.9	3.6	1.3	0.2	28.6

Board Repo: ciaa/Hardware Board: .kicad_pcb.kicad_pcb Folder PCB / RX / hw Complexity 145 / 1000 (size 145, features 0) Tested 9th November 2026 Copper layers 4 File format KiCad 3 (3) Parts, tracks, vias 418, 0, 0 Triangles, simulation 1,351,032 in 323 parts Note mostly unrouted Verifier Simulation, GLB: Verifier FAIL Simulation, STEP: Verifier FAIL Simulation, STL: Verifier FAIL Simulation, OBJ: Verifier FAIL Bad design Bad design according to KESE: copper of two nets on top of each other in the file, a short KiCad's DRC reports; terminal blocks J10 and J11 placed overlapping at (67.15, 16.50) mm: J10 pad 1 (net N-00000409) and J11 pad 3 (no net), plated holes 0.06 mm apart. KESE models what the file says, so the Verifier rightly finds the two nets' solids overlapping

File type File size Peak memory used Simulation GLB 44 MB 478 MB STEP 153 MB 582 MB STL 68 MB 501 MB OBJ 140 MB 936 MB Visual GLB 28 MB 764 MB OBJ 83 MB 728 MB

759. ciaa-rx

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	9.0	24.2	1 ms	22.9	1.3	2.9	0.4	62.2
Simulation, STEP	1.4	9.1	23.5	1 ms	22.4	13.7	2.8	0.3	73.2
Simulation, STL	1.5	9.1	23.6	2 ms	22.3	2.2	3.0	0.3	62.0
Simulation, OBJ	1.5	9.1	24.3	1 ms	23.9	36.0	3.4	0.4	98.5
Visual, GLB	1.6	10.0	24.3	1 ms	55.8	0.6	6.8	0.3	99.3
Visual, OBJ	1.7	11.3	24.5	1 ms	54.9	22.8	7.1	0.3	122.5

Board Repo: ciaa/Hardware Board: ciaa-rx.kicad_pcb Folder PCB / RX / hw Complexity 331 / 1000 (size 296, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 3 (3) Parts, tracks, vias 437, 7,689, 615 Triangles, simulation 5,637,478 in 419 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 199 MB 1.7 GB STEP 887 MB 2.0 GB STL 282 MB 1.7 GB OBJ 618 MB 3.7 GB Visual GLB 135 MB 2.0 GB OBJ 431 MB 2.9 GB

760. CIAA_Safety_VTI_1.0

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.4	3.3	14.9	0.6 ms	14.3	0.5	1.9	0.3	36.5
Simulation, STEP	1.3	3.3	15.0	0.6 ms	15.1	9.8	2.1	0.2	46.9
Simulation, STL	1.3	3.2	15.7	0.8 ms	14.4	1.1	2.0	0.2	38.1
Simulation, OBJ	1.3	3.3	15.1	1 ms	14.9	14.8	2.1	0.3	51.8
Visual, GLB	1.3	3.1	14.7	0.9 ms	36.0	0.5	5.3	0.2	61.1
Visual, OBJ	1.3	3.1	15.2	0.9 ms	37.1	14.5	3.9	0.3	75.3

Board Repo: ciaa/Hardware Board: CIAA_Safety_VTI_1.0.kicad_pcb Folder PCB / Safety Complexity 309 / 1000 (size 264, features 45) KESE features through vias, drill offsets, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 275, 6,269, 370 Triangles, simulation 3,642,146 in 252 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 127 MB 1.2 GB STEP 732 MB 1.7 GB STL 182 MB 1.2 GB OBJ 391 MB 2.4 GB Visual GLB 117 MB 1.8 GB OBJ 366 MB 2.4 GB

761. ciaa-z3r0

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.6	0.6 ms	1.9	94 ms	0.3	0.3	5.9
Simulation, STEP	0.2	0.5	2.5	0.6 ms	1.8	1.7	0.3	0.2	7.3
Simulation, STL	0.2	0.5	2.4	0.4 ms	1.8	0.1	0.3	0.2	5.5
Simulation, OBJ	0.2	0.5	2.5	0.2 ms	1.8	2.8	0.3	0.2	8.3
Visual, GLB	0.2	0.5	2.6	0.3 ms	4.5	62 ms	0.6	0.2	8.7
Visual, OBJ	0.2	0.5	2.6	0.5 ms	4.4	2.1	0.5	0.2	10.5

Board Repo: ciaa/Hardware Board: ciaa-z3r0.kicad_pcb Folder PCB / Z3R0 Complexity 238 / 1000 (size 203, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20170123) Parts, tracks, vias 33, 652, 30 Triangles, simulation 500,440 in 65 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 18 MB 291 MB STEP 88 MB 322 MB STL 25 MB 292 MB OBJ 51 MB 383 MB Visual GLB 13 MB 361 MB OBJ 37 MB 357 MB

762. vme-wren

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	16.4	41.0	90.4	5 ms	149.7	7.3	22.3	1.4	328.5
Simulation, STEP	16.1	42.1	96.0	6 ms	161.6	91.8	28.1	1.5	437.2
Simulation, STL	16.5	41.8	93.4	8 ms	163.0	20.9	24.3	1.4	361.2
Simulation, OBJ	15.1	41.5	93.1	5 ms	183.0	444.1	35.7	3.5	816.0
Visual, GLB	16.5	40.6	87.9	5 ms	434.5	3.9	30.5	0.9	614.7
Visual, OBJ	18.4	42.4	94.2	6 ms	488.9	121.5	38.4	1.4	805.3

Board Repo: circuitly/kicad-demo-vme-wren Board: vme-wren.kicad_pcb Complexity 523 / 1000 (size 378, features 145) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 to 11th November 2026 Copper layers 12 File format KiCad 9 (20241229) Parts, tracks, vias 1,479, 26,650, 4,374 Triangles, simulation 38,156,760 in 1822 parts Verifier PASS in all six runs Run again Visual, OBJ: failed in the corpus run, run again with the memory cap raised from 11 GB to 14.5 GB, and passed Run again Simulation, OBJ: failed in the corpus run, run again with no memory cap and no time limit (swap added to a 16 GB machine), and passed

File type File size Peak memory used Simulation GLB 1.2 GB 7.0 GB STEP 3.3 GB 11 GB STL 1.9 GB 7.6 GB OBJ 4.1 GB 23 GB Visual GLB 599 MB 11 GB OBJ 2.1 GB 13 GB

763. fmcw3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.4	7.5	26.4	2 ms	26.7	1.1	2.9	0.3	66.2
Simulation, STEP	1.3	7.3	26.4	1 ms	27.1	13.3	3.1	0.3	78.9
Simulation, STL	1.5	7.6	26.5	1 ms	26.7	2.9	3.2	0.4	68.8
Simulation, OBJ	1.4	7.8	26.7	1.0 ms	26.9	38.0	3.1	0.3	104.2
Visual, GLB	1.4	7.6	26.2	1.0 ms	59.3	0.6	8.5	0.3	103.9
Visual, OBJ	1.4	7.9	25.7	1.0 ms	57.1	19.0	7.6	0.3	118.9

Board Repo: ckflight/fmcw3-kicad Board: fmcw3.kicad_pcb Complexity 419 / 1000 (size 309, features 110) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 6 File format KiCad 9 (20241229) Parts, tracks, vias 366, 3,445, 1,412 Triangles, simulation 7,718,966 in 413 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 258 MB 2.3 GB STEP 842 MB 2.8 GB STL 386 MB 2.3 GB OBJ 832 MB 4.8 GB Visual GLB 140 MB 2.4 GB OBJ 461 MB 3.0 GB

764. 2021 Accumulator Base

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.2	6.9	30.6	0.9 ms	22.9	1.1	2.8	0.4	67.9
Simulation, STEP	3.2	6.9	32.6	1 ms	23.0	16.8	2.6	0.4	85.5
Simulation, STL	3.4	6.9	32.3	1.0 ms	23.4	2.2	2.7	0.4	71.2
Simulation, OBJ	3.3	7.1	31.6	2 ms	23.7	39.2	2.9	0.4	108.1
Visual, GLB	3.5	6.9	32.0	1 ms	53.2	0.6	6.6	0.3	103.1
Visual, OBJ	3.4	6.9	31.5	0.9 ms	53.1	21.2	6.2	0.3	122.7

Board Repo: columbia-fsae/2021_accumulator_electronics Board: 2021 Accumulator Base.kicad_pcb Folder Accumulator Base Complexity 269 / 1000 (size 214, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 136, 1,402, 330 Triangles, simulation 5,674,802 in 209 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 193 MB 1.8 GB STEP 832 MB 2.0 GB STL 284 MB 1.7 GB OBJ 611 MB 3.7 GB Visual GLB 112 MB 1.9 GB OBJ 352 MB 2.5 GB

765. AIL_TSAL

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.6	0.2 ms	1.4	63 ms	0.2	0.3	4.1
Simulation, STEP	0.2	0.4	1.7	0.2 ms	1.4	1.5	0.2	0.2	5.5
Simulation, STL	0.2	0.4	1.7	0.3 ms	1.4	89 ms	0.2	0.3	4.2
Simulation, OBJ	0.1	0.4	1.8	0.2 ms	1.4	2.2	0.2	0.2	6.3
Visual, GLB	0.1	0.4	1.8	0.2 ms	3.2	51 ms	0.4	0.2	6.3
Visual, OBJ	0.1	0.4	1.7	0.2 ms	3.1	1.5	0.3	0.3	7.5

Board Repo: columbia-fsae/2021_accumulator_electronics Board: AIL_TSAL.kicad_pcb Folder AIL+TSAL Shield / 07-10-2020 Complexity 195 / 1000 (size 140, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 27, 128, 27 Triangles, simulation 379,374 in 31 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 13 MB 263 MB STEP 65 MB 296 MB STL 19 MB 277 MB OBJ 38 MB 278 MB Visual GLB 8.8 MB 276 MB OBJ 26 MB 276 MB

766. Slave Board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	2.3	12.1	1 ms	8.6	0.4	0.9	0.3	25.3
Simulation, STEP	0.7	2.6	12.2	0.8 ms	8.5	7.3	1.0	0.3	32.6
Simulation, STL	0.6	2.5	12.1	0.8 ms	9.5	0.8	1.0	0.3	26.7
Simulation, OBJ	0.5	2.4	11.4	0.9 ms	8.7	12.7	1.1	0.4	37.3
Visual, GLB	0.6	2.3	11.7	1 ms	21.8	0.3	3.3	0.3	40.4
Visual, OBJ	0.6	2.6	11.7	2 ms	22.7	9.2	3.2	0.3	50.2

Board Repo: columbia-fsae/2021_accumulator_electronics Board: Slave Board.kicad_pcb Folder Battery Monitoring Board / 09-07-2020 BMB Complexity 252 / 1000 (size 197, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 148, 1,246, 328 Triangles, simulation 2,499,576 in 154 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 86 MB 970 MB STEP 429 MB 1.1 GB STL 125 MB 903 MB OBJ 263 MB 1.6 GB Visual GLB 65 MB 1.1 GB OBJ 202 MB 1.4 GB

767. Master_slave Connector

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.5	2.4	0.4 ms	2.2	92 ms	0.3	0.3	5.8
Simulation, STEP	0.2	0.5	2.2	0.3 ms	2.1	2.0	0.3	0.2	7.5
Simulation, STL	0.1	0.4	2.1	0.3 ms	2.0	0.2	0.3	0.2	5.4
Simulation, OBJ	0.2	0.5	2.3	0.3 ms	2.1	3.2	0.3	0.2	8.7
Visual, GLB	0.2	0.5	2.3	0.4 ms	4.8	72 ms	0.6	0.3	8.6
Visual, OBJ	0.2	0.5	2.2	0.2 ms	4.6	2.0	0.6	0.2	10.3

Board Repo: columbia-fsae/2021_accumulator_electronics Board: Master_slave Connector.kicad_pcb Folder BMS M_S Connector / 8-1-2020 Complexity 193 / 1000 (size 138, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 8, 202, 61 Triangles, simulation 669,754 in 18 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 23 MB 397 MB STEP 107 MB 411 MB STL 33 MB 371 MB OBJ 68 MB 480 MB Visual GLB 16 MB 408 MB OBJ 47 MB 441 MB

768. Inverter ISO Analog

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.6	0.2 ms	1.2	52 ms	0.2	0.2	3.6
Simulation, STEP	0.1	0.4	1.6	0.2 ms	1.2	1.4	0.2	0.2	5.0
Simulation, STL	0.1	0.3	1.6	0.1 ms	1.1	89 ms	0.2	0.2	3.6
Simulation, OBJ	0.1	0.4	1.5	0.2 ms	1.1	1.8	0.2	0.2	5.3
Visual, GLB	0.1	0.3	1.6	0.2 ms	2.1	27 ms	0.2	0.2	4.5
Visual, OBJ	0.1	0.3	1.6	0.2 ms	2.1	1.0	0.3	0.3	5.7

Board Repo: columbia-fsae/2021_accumulator_electronics Board: Inverter ISO Analog.kicad_pcb Folder Inverter ISO Analog Complexity 146 / 1000 (size 91, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 6, 18, 2 Triangles, simulation 315,632 in 16 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 235 MB STEP 48 MB 259 MB STL 16 MB 243 MB OBJ 31 MB 262 MB Visual GLB 5.5 MB 219 MB OBJ 16 MB 220 MB

769. Power Transducer

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.5	0.2 ms	1.2	55 ms	0.2	0.2	3.6
Simulation, STEP	0.1	0.3	1.5	0.2 ms	1.1	1.4	0.2	0.2	4.8
Simulation, STL	0.2	0.3	1.5	0.3 ms	1.1	66 ms	0.2	0.2	3.5
Simulation, OBJ	0.1	0.3	1.6	0.2 ms	1.1	1.8	0.2	0.3	5.4
Visual, GLB	0.1	0.3	1.5	0.3 ms	2.5	36 ms	0.3	0.3	4.9
Visual, OBJ	0.1	0.3	1.5	0.2 ms	2.4	1.1	0.2	0.3	6.0

Board Repo: columbia-fsae/2021_accumulator_electronics Board: Power Transducer.kicad_pcb Folder Power Transducer-Shield / 07-02-2020 Complexity 182 / 1000 (size 127, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 19, 84, 11 Triangles, simulation 287,172 in 28 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 10.0 MB 247 MB STEP 49 MB 251 MB STL 14 MB 245 MB OBJ 29 MB 239 MB Visual GLB 6.5 MB 222 MB OBJ 19 MB 223 MB

770. panel_proto_data_slicer_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	0.5	2.3	0.4 ms	5.2	0.1	0.3	0.3	9.2
Simulation, STEP	0.3	0.5	2.0	0.3 ms	4.5	3.2	0.3	0.2	11.0
Simulation, STL	0.4	0.5	2.1	0.3 ms	4.7	0.2	0.3	0.2	8.3
Simulation, OBJ	0.3	0.5	2.0	0.5 ms	4.9	2.8	0.3	0.2	11.0
Visual, GLB	0.4	0.5	1.9	0.5 ms	5.9	77 ms	0.9	0.2	9.9
Visual, OBJ	0.4	0.4	2.0	0.3 ms	5.8	2.5	0.7	0.2	12.0

Board Repo: CoolNamesAllTaken/adsbee Board: panel_proto_data_slicer_board.kicad_pcb Folder kicad / prototyping / panel_proto_data_slicer_board Complexity 234 / 1000 (size 179, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper text Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 156, 552, 48 Triangles, simulation 616,084 in 105 parts Note panel Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 20 MB 400 MB STEP 116 MB 446 MB STL 31 MB 402 MB OBJ 62 MB 470 MB Visual GLB 17 MB 550 MB OBJ 49 MB 531 MB

771. panel_proto_lna_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.5	1.7	0.4 ms	2.9	96 ms	0.3	0.2	6.1
Simulation, STEP	0.3	0.5	1.7	0.8 ms	2.8	2.5	0.2	0.2	8.3
Simulation, STL	0.3	0.6	1.6	0.5 ms	2.7	0.1	0.2	0.2	5.7
Simulation, OBJ	0.3	0.6	1.4	0.5 ms	2.9	2.2	0.2	0.2	7.9
Visual, GLB	0.4	0.5	1.6	0.4 ms	4.6	64 ms	0.4	0.3	7.8
Visual, OBJ	0.3	0.4	1.6	0.5 ms	4.6	1.9	0.5	0.2	9.6

Board Repo: CoolNamesAllTaken/adsbee Board: panel_proto_lna_board.kicad_pcb Folder kicad / prototyping / panel_proto_lna_board Complexity 226 / 1000 (size 171, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper text Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 144, 240, 72 Triangles, simulation 491,028 in 164 parts Note panel Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 16 MB 355 MB STEP 89 MB 406 MB STL 25 MB 351 MB OBJ 49 MB 406 MB Visual GLB 13 MB 453 MB OBJ 38 MB 444 MB

772. panel_proto_tracking_comparator_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	0.7	2.6	0.4 ms	8.5	0.2	0.5	0.3	13.2
Simulation, STEP	0.7	0.9	2.7	0.4 ms	8.7	5.7	0.4	0.3	19.5
Simulation, STL	0.5	0.7	2.8	0.3 ms	8.5	0.3	0.4	0.3	13.5
Simulation, OBJ	0.5	0.7	2.7	0.6 ms	8.5	5.0	0.5	0.3	18.2
Visual, GLB	0.6	0.7	2.7	0.8 ms	9.5	0.1	0.8	0.2	14.6
Visual, OBJ	0.5	0.6	2.6	0.8 ms	8.9	4.9	1.2	0.2	19.0

Board Repo: CoolNamesAllTaken/adsbee Board: panel_proto_tracking_comparator_board.kicad_pcb Folder kicad / prototyping / panel_proto_tracking_comparator_board Complexity 211 / 1000 (size 181, features 30) KESE features rounded, trapezoid or chamfered pads, copper drawings, copper text Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 192, 696, 0 Triangles, simulation 897,184 in 175 parts Note panel Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 30 MB 551 MB STEP 182 MB 587 MB STL 45 MB 551 MB OBJ 90 MB 645 MB Visual GLB 27 MB 620 MB OBJ 82 MB 612 MB

773. panel_saw_eval_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	0.7	0.2 ms	0.7	29 ms	97 ms	0.2	2.1
Simulation, STEP	0.2	0.3	0.7	0.3 ms	0.7	0.9	69 ms	0.2	3.1
Simulation, STL	0.2	0.3	0.7	0.2 ms	0.6	35 ms	70 ms	0.2	2.1
Simulation, OBJ	0.2	0.3	0.7	0.3 ms	0.7	0.9	78 ms	0.2	2.9
Visual, GLB	0.2	0.3	0.7	0.2 ms	1.3	25 ms	0.1	0.2	2.8
Visual, OBJ	0.2	0.3	0.6	0.2 ms	1.3	0.6	0.1	0.2	3.3

Board Repo: CoolNamesAllTaken/adsbee Board: panel_saw_eval_board.kicad_pcb Folder kicad / prototyping / panel_saw_eval_board Complexity 201 / 1000 (size 151, features 50) KESE features through vias, filled zones, knockout text Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 36, 48, 96 Triangles, simulation 147,520 in 44 parts Note panel Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 5.0 MB 199 MB STEP 17 MB 212 MB STL 7.4 MB 199 MB OBJ 15 MB 199 MB Visual GLB 4.0 MB 176 MB OBJ 12 MB 179 MB

774. proto_ads_bee_detector_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.6	2.1	0.3 ms	2.0	80 ms	0.2	0.2	5.5
Simulation, STEP	0.4	0.6	2.1	0.2 ms	2.1	2.0	0.2	0.2	7.7
Simulation, STL	0.3	0.6	2.1	0.2 ms	2.0	0.2	0.2	0.2	5.6
Simulation, OBJ	0.3	0.6	2.1	0.2 ms	2.0	2.9	0.2	0.2	8.4
Visual, GLB	0.3	0.6	2.0	0.3 ms	3.9	71 ms	0.4	0.2	7.5
Visual, OBJ	0.3	0.6	2.0	0.3 ms	3.9	2.1	0.5	0.2	9.6

Board Repo: CoolNamesAllTaken/adsbee Board: proto_ads_bee_detector_board.kicad_pcb Folder kicad / prototyping / proto_ads_bee_detector_board Complexity 260 / 1000 (size 160, features 100) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper text, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 70, 204, 58 Triangles, simulation 509,420 in 26 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 18 MB 319 MB STEP 78 MB 383 MB STL 25 MB 311 MB OBJ 51 MB 408 MB Visual GLB 14 MB 372 MB OBJ 40 MB 413 MB

775. proto_ads_bee_mcu_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.5	0.3 ms	1.1	63 ms	0.2	0.2	3.5
Simulation, STEP	0.2	0.3	1.3	0.3 ms	1.2	1.3	0.2	0.2	4.6
Simulation, STL	0.2	0.3	1.5	0.4 ms	1.2	90 ms	0.3	0.2	3.7
Simulation, OBJ	0.2	0.3	1.5	0.6 ms	1.1	1.6	0.2	0.2	5.1
Visual, GLB	0.2	0.4	1.4	0.3 ms	2.8	38 ms	0.3	0.2	5.2
Visual, OBJ	0.2	0.3	1.5	0.6 ms	3.4	1.2	0.4	0.2	7.1

Board Repo: CoolNamesAllTaken/adsbee Board: proto_ads_bee_mcu_board.kicad_pcb Folder kicad / prototyping / proto_ads_bee_mcu_board Complexity 237 / 1000 (size 137, features 100) KESE features through vias, rounded, trapezoid or chamfered pads, drill offsets, filled zones, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 20, 182, 6 Triangles, simulation 403,648 in 60 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 258 MB STEP 61 MB 306 MB STL 20 MB 269 MB OBJ 40 MB 320 MB Visual GLB 9.6 MB 332 MB OBJ 28 MB 338 MB

776. proto_ads_bee_rf_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	96 ms	93 ms	0.4	0.1 ms	0.6	14 ms	39 ms	0.2	1.4
Simulation, STEP	98 ms	97 ms	0.4	0.1 ms	0.5	0.7	38 ms	0.2	2.0
Simulation, STL	99 ms	93 ms	0.3	0.1 ms	0.6	25 ms	44 ms	0.2	1.4
Simulation, OBJ	0.1	93 ms	0.3	0.1 ms	0.5	0.4	40 ms	0.2	1.6
Visual, GLB	99 ms	91 ms	0.3	0.1 ms	0.9	12 ms	75 ms	0.2	1.7
Visual, OBJ	98 ms	93 ms	0.3	0.1 ms	0.9	0.3	73 ms	0.2	1.9

Board Repo: CoolNamesAllTaken/adsbee Board: proto_ads_bee_rf_board.kicad_pcb Folder kicad / prototyping / proto_ads_bee_rf_board Complexity 218 / 1000 (size 118, features 100) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper text, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 16, 30, 14 Triangles, simulation 91,664 in 24 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.2 MB 183 MB STEP 15 MB 192 MB STL 4.6 MB 177 MB OBJ 8.8 MB 181 MB Visual GLB 2.5 MB 154 MB OBJ 7.0 MB 150 MB

777. proto_amp_bodge_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	25 ms	38 ms	0.1	0.1 ms	0.5	8 ms	27 ms	0.2	1.0
Simulation, STEP	23 ms	34 ms	0.1	0.1 ms	0.5	0.4	25 ms	0.2	1.3
Simulation, STL	32 ms	32 ms	0.1	0.1 ms	0.4	11 ms	28 ms	0.2	0.9
Simulation, OBJ	23 ms	33 ms	0.1	0.1 ms	0.4	0.2	26 ms	0.2	1.1
Visual, GLB	27 ms	38 ms	0.1	0.1 ms	0.5	8 ms	44 ms	0.2	0.9
Visual, OBJ	25 ms	34 ms	0.1	0.1 ms	0.5	0.2	45 ms	0.2	1.1

Board Repo: CoolNamesAllTaken/adsbee Board: proto_amp_bodge_board.kicad_pcb Folder kicad / prototyping / proto_amp_bodge_board Complexity 131 / 1000 (size 96, features 35) KESE features rounded, trapezoid or chamfered pads, copper text, TrueType text Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 6, 33, 0 Triangles, simulation 46,370 in 13 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 1.6 MB 58 MB STEP 9.8 MB 63 MB STL 2.3 MB 58 MB OBJ 4.4 MB 73 MB Visual GLB 1.5 MB 79 MB OBJ 4.1 MB 79 MB

778. proto_data_slicer_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	83 ms	48 ms	0.2	0.1 ms	0.4	9 ms	25 ms	0.2	0.9
Simulation, STEP	81 ms	47 ms	0.1	0.1 ms	0.5	0.7	26 ms	0.2	1.7
Simulation, STL	92 ms	51 ms	0.2	0.1 ms	0.4	15 ms	31 ms	0.2	1.0
Simulation, OBJ	91 ms	49 ms	0.2	0.1 ms	0.4	0.3	30 ms	0.2	1.3
Visual, GLB	83 ms	47 ms	0.2	0.1 ms	0.5	8 ms	50 ms	0.2	1.1
Visual, OBJ	81 ms	47 ms	0.2	0.1 ms	0.5	0.2	46 ms	0.2	1.2

Board Repo: CoolNamesAllTaken/adsbee Board: proto_data_slicer_board.kicad_pcb Folder kicad / prototyping / proto_data_slicer_board Complexity 167 / 1000 (size 112, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper text Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 13, 46, 4 Triangles, simulation 51,216 in 17 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 1.8 MB 77 MB STEP 9.4 MB 186 MB STL 2.6 MB 78 MB OBJ 4.8 MB 94 MB Visual GLB 1.4 MB 113 MB OBJ 3.8 MB 111 MB

779. proto_lna_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	89 ms	51 ms	0.1	0.1 ms	0.4	9 ms	26 ms	0.2	0.9
Simulation, STEP	0.1	57 ms	0.2	0.1 ms	0.3	0.3	27 ms	0.2	1.2
Simulation, STL	84 ms	47 ms	0.1	0.1 ms	0.3	13 ms	26 ms	0.2	0.8
Simulation, OBJ	87 ms	51 ms	0.1	0.1 ms	0.4	0.2	25 ms	0.2	1.0
Visual, GLB	95 ms	54 ms	0.1	0.1 ms	0.5	8 ms	44 ms	0.2	1.1
Visual, OBJ	90 ms	56 ms	0.2	0.1 ms	0.6	0.2	41 ms	0.2	1.4

Board Repo: CoolNamesAllTaken/adsbee Board: proto_lna_board.kicad_pcb Folder kicad / prototyping / proto_lna_board Complexity 160 / 1000 (size 105, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper text Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 12, 20, 6 Triangles, simulation 41,780 in 21 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 1.5 MB 72 MB STEP 7.6 MB 75 MB STL 2.1 MB 72 MB OBJ 3.9 MB 79 MB Visual GLB 1.1 MB 96 MB OBJ 3.0 MB 97 MB

780. proto_tracking_comparator_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	86 ms	38 ms	0.1	0.1 ms	0.4	8 ms	26 ms	0.2	0.9
Simulation, STEP	0.1	43 ms	0.1	0.1 ms	0.4	0.3	27 ms	0.2	1.2
Simulation, STL	90 ms	41 ms	0.1	0.1 ms	0.4	11 ms	22 ms	0.2	0.9
Simulation, OBJ	0.1	40 ms	0.1	0.1 ms	0.4	0.2	26 ms	0.2	1.1
Visual, GLB	0.1	40 ms	0.1	0.1 ms	0.5	10 ms	49 ms	0.3	1.1
Visual, OBJ	93 ms	38 ms	0.1	0.1 ms	0.5	0.2	40 ms	0.2	1.2

Board Repo: CoolNamesAllTaken/adsbee Board: proto_tracking_comparator_board.kicad_pcb Folder kicad / prototyping / proto_tracking_comparator_board Complexity 126 / 1000 (size 96, features 30) KESE features rounded, trapezoid or chamfered pads, copper drawings, copper text Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 8, 29, 0 Triangles, simulation 39,648 in 14 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 1.4 MB 74 MB STEP 8.4 MB 79 MB STL 2.0 MB 74 MB OBJ 3.8 MB 82 MB Visual GLB 1.2 MB 100 MB OBJ 3.3 MB 101 MB

781. proto_ufl_match_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	2.5	6.4	0.3 ms	11.5	0.3	0.5	0.3	22.1
Simulation, STEP	0.6	2.4	6.3	0.5 ms	11.3	6.3	0.6	0.3	27.7
Simulation, STL	0.7	2.5	6.4	0.3 ms	11.5	0.5	0.4	0.3	22.3
Simulation, OBJ	0.6	2.6	6.3	0.3 ms	11.0	8.9	0.5	0.3	30.1
Visual, GLB	0.6	2.4	6.6	0.4 ms	14.2	0.2	1.8	0.2	26.0
Visual, OBJ	0.6	2.4	6.3	0.5 ms	14.0	7.0	2.2	0.2	32.8

Board Repo: CoolNamesAllTaken/adsbee Board: proto_ufl_match_board.kicad_pcb Folder kicad / prototyping / proto_ufl_match_board Complexity 289 / 1000 (size 204, features 85) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 224, 384, 736 Triangles, simulation 1,600,152 in 13 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 56 MB 762 MB STEP 246 MB 918 MB STL 80 MB 739 MB OBJ 166 MB 1.1 GB Visual GLB 45 MB 921 MB OBJ 135 MB 943 MB

782. proto_ufl_pi_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.4	1.5	0.1 ms	5.0	99 ms	0.3	0.2	7.7
Simulation, STEP	0.2	0.4	1.4	0.2 ms	5.1	3.9	0.2	0.2	11.6
Simulation, STL	0.3	0.4	1.5	0.1 ms	5.1	0.1	0.3	0.2	7.9
Simulation, OBJ	0.3	0.4	1.6	0.1 ms	5.3	3.1	0.3	0.2	11.1
Visual, GLB	0.3	0.4	1.5	0.1 ms	5.4	72 ms	0.5	0.3	8.4
Visual, OBJ	0.2	0.4	1.5	0.2 ms	5.5	2.7	0.5	0.3	11.1

Board Repo: CoolNamesAllTaken/adsbee Board: proto_ufl_pi_board.kicad_pcb Folder kicad / prototyping / proto_ufl_pi_board Complexity 209 / 1000 (size 139, features 70) KESE features rounded, trapezoid or chamfered pads, filled zones, copper text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 100, 80, 0 Triangles, simulation 498,460 in 10 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 399 MB STEP 110 MB 429 MB STL 25 MB 400 MB OBJ 50 MB 396 MB Visual GLB 16 MB 536 MB OBJ 47 MB 542 MB

783. saw_eval_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	57 ms	77 ms	0.1 ms	0.1	4 ms	12 ms	0.3	0.7
Simulation, STEP	83 ms	43 ms	71 ms	0.1 ms	0.1	0.1	15 ms	0.3	0.7
Simulation, STL	99 ms	38 ms	68 ms	0.1 ms	0.1	5 ms	13 ms	0.2	0.6
Simulation, OBJ	82 ms	49 ms	78 ms	0.1 ms	0.1	72 ms	13 ms	0.2	0.7
Visual, GLB	83 ms	37 ms	65 ms	0.1 ms	0.2	4 ms	32 ms	0.2	0.7
Visual, OBJ	90 ms	46 ms	67 ms	0.1 ms	0.2	71 ms	38 ms	0.2	0.8

Board Repo: CoolNamesAllTaken/adsbee Board: saw_eval_board.kicad_pcb Folder kicad / prototyping / saw_eval_board Complexity 137 / 1000 (size 87, features 50) KESE features through vias, filled zones, knockout text Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 3, 4, 8 Triangles, simulation 12,296 in 11 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 454 kB 66 MB STEP 1.4 MB 66 MB STL 616 kB 61 MB OBJ 1.2 MB 66 MB Visual GLB 372 kB 69 MB OBJ 943 kB 83 MB

784. discipline-pcb

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	54 ms	0.3	1.3	0.2 ms	1.4	37 ms	0.1	0.2	3.4
Simulation, STEP	55 ms	0.2	1.1	0.2 ms	1.3	1.2	0.2	0.3	4.4
Simulation, STL	58 ms	0.3	1.2	0.1 ms	1.4	62 ms	0.1	0.2	3.3
Simulation, OBJ	61 ms	0.3	1.2	0.1 ms	1.4	1.1	0.1	0.2	4.4
Visual, GLB	52 ms	0.2	1.2	0.1 ms	2.3	19 ms	0.1	0.2	4.2
Visual, OBJ	61 ms	0.2	1.2	0.1 ms	2.4	0.5	0.1	0.2	4.7

Board Repo: coseyfannitutti/discipline Board: discipline-pcb.kicad_pcb Folder bottom Complexity 84 / 1000 (size 39, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 0, 0, 1 Triangles, simulation 225,470 in 12 parts Note no components Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.0 MB 204 MB STEP 49 MB 236 MB STL 11 MB 215 MB OBJ 23 MB 208 MB Visual GLB 4.0 MB 160 MB OBJ 11 MB 158 MB

785. discipline-pcb

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	4.4	21.9	0.4 ms	19.6	0.7	2.7	0.3	50.7
Simulation, STEP	1.1	4.6	20.9	0.6 ms	19.9	11.5	2.7	0.3	60.9
Simulation, STL	1.1	4.4	20.9	0.5 ms	19.8	1.7	2.5	0.3	50.8
Simulation, OBJ	1.0	4.7	21.4	0.5 ms	20.1	19.9	2.6	0.3	70.0
Visual, GLB	1.0	4.6	21.2	0.7 ms	41.5	0.4	4.9	0.3	73.9
Visual, OBJ	1.2	4.6	21.3	0.9 ms	42.2	13.4	4.3	0.3	87.2

Board Repo: coseyfannitutti/discipline Board: discipline-pcb.kicad_pcb Complexity 255 / 1000 (size 200, features 55) KESE features through vias, slotted holes, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 171, 2,199, 77 Triangles, simulation 4,100,942 in 126 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 141 MB 1.3 GB STEP 744 MB 1.6 GB STL 205 MB 1.4 GB OBJ 439 MB 2.7 GB Visual GLB 91 MB 1.5 GB OBJ 284 MB 1.9 GB

786. discipline-pcb

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.5	0.4	0.1 ms	2.0	68 ms	0.1	0.2	3.4
Simulation, STEP	0.1	0.5	0.4	0.1 ms	1.9	1.9	0.1	0.2	5.2
Simulation, STL	0.1	0.5	0.5	0.1 ms	1.9	0.1	0.2	0.2	3.5
Simulation, OBJ	0.1	0.4	0.5	0.1 ms	2.1	2.4	0.1	0.2	6.0
Visual, GLB	0.1	0.5	0.5	0.1 ms	3.9	67 ms	0.5	0.2	5.7
Visual, OBJ	0.1	0.5	0.5	0.1 ms	3.6	1.6	0.5	0.2	7.1

Board Repo: coseyfannitutti/discipline Board: discipline-pcb.kicad_pcb Folder plate Complexity 47 / 1000 (size 17, features 30) KESE features filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 0, 0, 0 Triangles, simulation 443,680 in 8 parts Note no components Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 365 MB STEP 112 MB 375 MB STL 22 MB 357 MB OBJ 45 MB 362 MB Visual GLB 12 MB 347 MB OBJ 37 MB 350 MB

787. BlankMSXCartHSH

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	2.7	9.2	1 ms	17.4	0.5	0.8	0.3	31.2
Simulation, STEP	0.3	2.6	9.3	1 ms	16.9	8.1	0.9	0.3	38.4
Simulation, STL	0.3	2.8	9.5	1 ms	16.4	1.0	0.9	0.2	31.1
Simulation, OBJ	0.3	2.6	9.3	1 ms	16.9	14.0	0.8	0.2	44.0
Visual, GLB	0.3	2.6	8.8	2 ms	30.0	0.4	3.6	0.2	45.9
Visual, OBJ	0.3	2.8	9.1	2 ms	31.1	12.6	3.3	0.3	59.5

Board Repo: cristianoag/trh9000 Board: BlankMSXCartHSH.kicad_pcb Folder Hardware / Kicad / MSX_Breadboard_Large_V9990 Complexity 270 / 1000 (size 215, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 6, 1,220, 1,034 Triangles, simulation 2,765,694 in 299 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 93 MB 1.1 GB STEP 369 MB 1.4 GB STL 138 MB 1.1 GB OBJ 288 MB 1.8 GB Visual GLB 80 MB 1.5 GB OBJ 255 MB 1.7 GB

788. TRH9000

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.1	5.6	1.0 ms	7.2	0.3	1.0	0.3	17.0
Simulation, STEP	0.4	2.2	5.5	0.9 ms	6.9	5.3	1.1	0.3	21.8
Simulation, STL	0.5	2.1	5.8	0.9 ms	6.9	0.8	1.0	0.3	17.5
Simulation, OBJ	0.5	2.1	5.6	1 ms	6.9	10.3	0.9	0.3	26.5
Visual, GLB	0.4	2.0	5.6	1 ms	17.1	0.2	2.0	0.3	27.7
Visual, OBJ	0.4	2.1	5.1	1 ms	15.8	6.7	2.0	0.2	32.4

Board Repo: cristianoag/trh9000 Board: TRH9000.kicad_pcb Folder Hardware / Kicad / TRH9000_1.7 Complexity 345 / 1000 (size 250, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 64, 2,127, 295 Triangles, simulation 2,038,064 in 215 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 69 MB 822 MB STEP 289 MB 844 MB STL 102 MB 814 MB OBJ 214 MB 1.3 GB Visual GLB 45 MB 858 MB OBJ 141 MB 995 MB

789. trhmsx

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.9	4.6	14.0	1 ms	12.8	0.6	1.9	0.3	38.2
Simulation, STEP	3.6	4.5	14.2	1 ms	13.4	9.0	1.7	0.4	46.8
Simulation, STL	3.4	4.4	14.3	1.0 ms	13.3	1.4	2.0	0.3	39.2
Simulation, OBJ	3.7	4.9	14.9	0.9 ms	13.6	22.0	2.1	0.3	61.5
Visual, GLB	3.7	4.8	15.1	1.0 ms	32.5	0.4	3.8	0.4	60.7
Visual, OBJ	3.9	4.8	14.9	1 ms	31.0	13.2	3.6	0.3	71.6

Board Repo: cristianoag/trhmsx Board: trhmsx.kicad_pcb Folder hardware / trhmsx Complexity 358 / 1000 (size 263, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 130, 3,267, 305 Triangles, simulation 3,447,680 in 379 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 120 MB 1.1 GB STEP 470 MB 1.3 GB STL 172 MB 1.1 GB OBJ 370 MB 2.3 GB Visual GLB 70 MB 1.4 GB OBJ 221 MB 1.6 GB

790. mackerel-10-dram

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	2.2	8.4	0.7 ms	7.9	0.4	1.2	0.3	20.7
Simulation, STEP	0.5	2.1	8.1	0.6 ms	7.9	5.7	1.2	0.3	25.7
Simulation, STL	0.4	2.0	7.8	0.6 ms	7.7	0.7	1.2	0.3	20.2
Simulation, OBJ	0.4	2.1	8.4	0.6 ms	7.8	13.8	1.2	0.3	34.0
Visual, GLB	0.4	2.3	8.3	0.6 ms	12.9	0.2	1.2	0.2	25.5
Visual, OBJ	0.5	2.1	8.5	0.9 ms	11.9	5.5	1.2	0.2	29.9

Board Repo: crmaykish/mackerel-68k Board: mackerel-10-dram.kicad_pcb Folder hardware / mack-10-proto / mackerel-10-dram Complexity 304 / 1000 (size 219, features 85) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 41, 533, 31 Triangles, simulation 2,580,718 in 140 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 86 MB 743 MB STEP 277 MB 928 MB STL 129 MB 708 MB OBJ 268 MB 1.7 GB Visual GLB 36 MB 1.0 GB OBJ 111 MB 850 MB

791. mackerel-10-ide

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.5	3.3	0.6 ms	2.9	0.1	0.3	0.2	7.4
Simulation, STEP	0.1	0.5	3.3	0.8 ms	2.8	2.1	0.3	0.2	9.4
Simulation, STL	0.1	0.5	3.3	0.6 ms	2.7	0.2	0.3	0.3	7.4
Simulation, OBJ	0.1	0.5	3.3	0.7 ms	2.7	3.1	0.3	0.2	10.3
Visual, GLB	0.1	0.5	3.4	0.9 ms	4.4	49 ms	0.4	0.2	9.1
Visual, OBJ	0.1	0.6	3.4	0.6 ms	4.2	1.6	0.5	0.2	10.6

Board Repo: crmaykish/mackerel-68k Board: mackerel-10-ide.kicad_pcb Folder hardware / mack-10-proto / mackerel-10-ide Complexity 46 / 1000 (size 36, features 10) KESE features rounded, trapezoid or chamfered pads Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 5, 0, 0 Triangles, simulation 692,920 in 102 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 20 MB 320 MB STEP 69 MB 392 MB STL 35 MB 320 MB OBJ 69 MB 499 MB Visual GLB 12 MB 414 MB OBJ 37 MB 408 MB

792. mackerel-10-v1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	4.3	15.3	1 ms	15.0	0.7	2.2	0.3	38.7
Simulation, STEP	0.7	4.0	15.1	1 ms	14.7	9.9	2.2	0.3	47.1
Simulation, STL	0.8	4.4	15.4	2 ms	15.5	1.6	2.4	0.3	40.3
Simulation, OBJ	0.9	4.5	15.3	2 ms	15.5	26.2	2.3	0.3	64.9
Visual, GLB	0.8	4.5	15.8	1 ms	26.6	0.3	3.1	0.3	51.4
Visual, OBJ	0.8	4.3	14.6	1 ms	26.5	11.4	3.6	0.3	61.4

Board Repo: crmaykish/mackerel-68k Board: mackerel-10-v1.kicad_pcb Folder hardware / mack-10-proto / mackerel-10-v1 Complexity 342 / 1000 (size 247, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 61, 1,430, 118 Triangles, simulation 4,120,696 in 142 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 137 MB 1.1 GB STEP 460 MB 1.4 GB STL 206 MB 1.1 GB OBJ 434 MB 2.6 GB Visual GLB 62 MB 1.2 GB OBJ 195 MB 1.4 GB

793. mackerel-08-v1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	4.6	16.2	0.7 ms	15.9	0.9	2.2	0.3	41.1
Simulation, STEP	1.0	4.7	16.0	1 ms	16.3	10.7	2.2	0.3	51.2
Simulation, STL	1.0	4.4	15.3	1 ms	16.2	1.7	2.2	0.3	41.2
Simulation, OBJ	1.0	4.6	16.0	2 ms	16.2	28.0	2.0	0.3	68.2
Visual, GLB	0.9	4.2	14.9	1 ms	30.0	0.3	3.3	0.3	53.9
Visual, OBJ	0.9	4.5	15.1	1 ms	32.4	13.4	3.9	0.3	70.4

Board Repo: crmaykish/mackerel-68k Board: mackerel-08-v1.kicad_pcb Folder hardware / mackerel-08-v1 Complexity 352 / 1000 (size 257, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 80, 2,060, 208 Triangles, simulation 5,252,394 in 146 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 175 MB 1.3 GB STEP 584 MB 1.8 GB STL 263 MB 1.3 GB OBJ 554 MB 3.3 GB Visual GLB 83 MB 1.5 GB OBJ 264 MB 1.8 GB

794. mackerel-10-v1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.7	8.0	29.4	1 ms	26.5	1.2	4.2	0.5	71.4
Simulation, STEP	1.6	7.6	28.1	1 ms	25.6	18.1	4.2	0.4	85.6
Simulation, STL	1.5	7.3	26.9	1 ms	25.6	2.6	4.3	0.4	68.7
Simulation, OBJ	1.5	7.4	28.4	2 ms	25.7	46.2	4.5	0.4	114.1
Visual, GLB	1.5	7.6	27.3	2 ms	44.2	0.6	5.3	0.3	86.8
Visual, OBJ	1.5	8.2	27.2	2 ms	43.1	18.8	5.3	0.3	104.4

Board Repo: crmaykish/mackerel-68k Board: mackerel-10-v1.kicad_pcb Folder hardware / mackerel-10-v1 Complexity 361 / 1000 (size 266, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 113, 2,261, 200 Triangles, simulation 7,002,228 in 217 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 235 MB 1.6 GB STEP 776 MB 2.2 GB STL 350 MB 1.6 GB OBJ 743 MB 4.3 GB Visual GLB 102 MB 2.2 GB OBJ 326 MB 2.2 GB

795. mackerel-30-proto

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	7.6	29.5	2 ms	28.0	1.6	4.5	0.4	73.2
Simulation, STEP	1.6	7.3	29.7	3 ms	28.6	18.3	4.6	0.4	90.6
Simulation, STL	1.5	7.7	29.2	3 ms	28.6	3.5	4.8	0.5	75.7
Simulation, OBJ	1.6	7.9	29.7	2 ms	28.3	46.7	4.7	0.4	119.3
Visual, GLB	1.5	7.9	29.7	3 ms	58.3	0.6	7.9	0.4	106.2
Visual, OBJ	1.7	7.6	30.1	3 ms	58.2	20.5	8.1	0.4	126.5

Board Repo: crmaykish/mackerel-68k Board: mackerel-30-proto.kicad_pcb Folder hardware / mackerel-30-proto Complexity 368 / 1000 (size 273, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 130, 2,615, 294 Triangles, simulation 8,393,056 in 304 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 281 MB 1.9 GB STEP 930 MB 2.6 GB STL 420 MB 1.9 GB OBJ 892 MB 5.2 GB Visual GLB 129 MB 2.3 GB OBJ 417 MB 2.8 GB

796. hdmi_adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.1	0.6	0.2 ms	0.7	26 ms	99 ms	0.3	1.9
Simulation, STEP	86 ms	0.1	0.5	0.2 ms	0.6	0.8	95 ms	0.3	2.5
Simulation, STL	0.1	0.1	0.6	0.2 ms	0.7	34 ms	0.1	0.2	1.8
Simulation, OBJ	89 ms	0.1	0.6	0.2 ms	0.7	0.7	0.1	0.2	2.5
Visual, GLB	96 ms	0.1	0.6	0.2 ms	1.4	16 ms	91 ms	0.2	2.5
Visual, OBJ	87 ms	0.1	0.5	0.2 ms	1.4	0.5	89 ms	0.2	2.9

Board Repo: cropinghigh/zynq_a9_mb Board: hdmi_adapter.kicad_pcb Folder hardware / hdmi_adapter Complexity 158 / 1000 (size 113, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 2, 153, 6 Triangles, simulation 145,640 in 31 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.8 MB 193 MB STEP 21 MB 204 MB STL 7.3 MB 196 MB OBJ 14 MB 193 MB Visual GLB 3.1 MB 157 MB OBJ 8.8 MB 157 MB

797. zynq_test

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.2	12.4	40.8	2 ms	49.6	2.6	7.1	0.6	116.4
Simulation, STEP	3.5	12.2	39.5	2 ms	49.6	30.4	7.3	0.6	143.2
Simulation, STL	3.3	12.1	39.5	2 ms	49.0	5.2	7.1	0.6	116.9
Simulation, OBJ	3.2	12.5	39.7	2 ms	48.3	72.8	7.5	0.7	184.6
Visual, GLB	3.6	12.2	39.3	2 ms	125.4	1.4	12.8	0.5	195.2
Visual, OBJ	3.3	12.0	39.0	3 ms	121.5	35.0	12.7	0.5	223.9

Board Repo: cropinghigh/zynq_a9_mb Board: zynq_test.kicad_pcb Folder hardware Complexity 490 / 1000 (size 335, features 155) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, copper text, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 9 (20241229) Parts, tracks, vias 471, 18,336, 1,096 Triangles, simulation 12,610,460 in 489 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 425 MB 2.8 GB STEP 1.7 GB 4.0 GB STL 631 MB 2.8 GB OBJ 1.4 GB 8.0 GB Visual GLB 233 MB 3.7 GB OBJ 753 MB 4.9 GB

798. aquila_main

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	3.5	9.0	1.0 ms	8.7	0.4	1.0	0.2	23.7
Simulation, STEP	0.7	3.4	8.9	0.9 ms	8.6	6.1	1.0	0.3	28.9
Simulation, STL	0.7	3.5	8.8	0.9 ms	8.4	0.7	1.1	0.2	23.6
Simulation, OBJ	0.7	3.4	8.8	0.9 ms	8.4	12.3	1.1	0.3	34.9
Visual, GLB	0.7	3.4	8.7	1 ms	19.8	0.2	2.1	0.2	35.1
Visual, OBJ	0.7	3.5	8.7	0.9 ms	19.6	7.3	3.0	0.2	43.1

Board Repo: cuspaceflight/aquila-avionics Board: aquila_main.kicad_pcb Folder schematics / aquila_main Complexity 313 / 1000 (size 213, features 100) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 130, 870, 472 Triangles, simulation 2,961,764 in 147 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 101 MB 1.1 GB STEP 371 MB 1.2 GB STL 148 MB 1.1 GB OBJ 313 MB 2.0 GB Visual GLB 59 MB 1.3 GB OBJ 185 MB 1.3 GB

799. daq_griffin

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	2.7	8.8	0.5 ms	8.1	0.4	1.0	0.3	21.9
Simulation, STEP	0.7	2.5	8.7	0.7 ms	7.9	6.1	1.0	0.3	27.3
Simulation, STL	0.8	2.4	8.9	0.8 ms	8.2	0.7	1.1	0.3	22.4
Simulation, OBJ	0.8	2.5	8.9	0.6 ms	7.9	12.9	1.0	0.3	34.2
Visual, GLB	0.7	2.5	8.9	0.5 ms	18.0	0.2	1.8	0.2	32.3
Visual, OBJ	0.8	2.6	9.0	0.9 ms	17.4	8.1	2.1	0.2	40.2

Board Repo: cuspaceflight/white-giant-sensing-pcb Board: daq_griffin.kicad_pcb Folder daq_griffin Complexity 311 / 1000 (size 211, features 100) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 220, 962, 166 Triangles, simulation 2,543,048 in 175 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 84 MB 827 MB STEP 332 MB 930 MB STL 127 MB 788 MB OBJ 266 MB 1.7 GB Visual GLB 53 MB 1.2 GB OBJ 163 MB 1.2 GB

800. OpeN64

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.8	5.1	22.9	1 ms	23.5	0.8	2.6	0.3	57.0
Simulation, STEP	2.1	5.2	23.6	2 ms	24.1	14.8	2.7	0.4	72.7
Simulation, STL	1.8	5.1	22.9	2 ms	24.3	1.8	2.6	0.3	58.8
Simulation, OBJ	2.0	5.4	23.7	0.7 ms	24.7	28.8	2.9	0.3	87.9
Visual, GLB	1.8	5.2	23.6	2 ms	53.6	0.6	6.7	0.3	91.8
Visual, OBJ	1.9	5.2	23.8	0.7 ms	55.1	22.3	7.1	0.3	115.7

Board Repo: cy-888/OpeN64 Board: OpeN64.kicad_pcb Folder OpeN64 Complexity 312 / 1000 (size 217, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper drawings, knockout text, TrueType text Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 273, 2,133, 934 Triangles, simulation 5,227,676 in 220 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 178 MB 1.7 GB STEP 1.0 GB 2.2 GB STL 261 MB 1.7 GB OBJ 553 MB 3.4 GB Visual GLB 137 MB 2.2 GB OBJ 431 MB 2.7 GB

801. HDMI-to-LH550WF1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.3	6.5	0.9 ms	4.9	0.2	0.5	0.2	14.0
Simulation, STEP	0.4	1.3	6.6	0.6 ms	4.7	2.9	0.5	0.2	16.7
Simulation, STL	0.4	1.3	6.5	0.7 ms	5.3	0.4	0.6	0.2	14.8
Simulation, OBJ	0.3	1.5	6.7	0.7 ms	4.8	6.4	0.5	0.2	20.4
Visual, GLB	0.3	1.3	6.7	1.0 ms	10.2	0.1	1.1	0.2	20.0
Visual, OBJ	0.4	1.4	7.2	0.7 ms	9.7	4.1	1.0	0.2	24.0

Board Repo: cyrozap/HDMI-to-MIPI Board: HDMI-to-LH550WF1.kicad_pcb Folder HDMI-to-LH550WF1 Complexity 314 / 1000 (size 269, features 45) KESE features through vias, filled zones, copper text Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 139, 1,897, 159 Triangles, simulation 1,463,414 in 125 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 52 MB 601 MB STEP 222 MB 714 MB STL 73 MB 599 MB OBJ 156 MB 1.0 GB Visual GLB 34 MB 769 MB OBJ 102 MB 804 MB

802. LH550WF1-breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.4	0.2 ms	2.1	65 ms	0.2	0.2	4.6
Simulation, STEP	0.2	0.3	1.3	0.2 ms	1.9	2.1	0.2	0.2	6.2
Simulation, STL	0.2	0.3	1.2	0.3 ms	1.9	0.2	0.2	0.2	4.2
Simulation, OBJ	0.2	0.4	1.4	0.2 ms	2.0	2.5	0.2	0.3	6.9
Visual, GLB	0.2	0.3	1.2	0.2 ms	3.9	78 ms	0.4	0.2	6.2
Visual, OBJ	0.2	0.3	1.3	0.2 ms	4.2	2.4	0.5	0.2	9.1

Board Repo: cyrozap/HDMI-to-MIPI Board: LH550WF1-breakout.kicad_pcb Folder LH550WF1-breakout Complexity 185 / 1000 (size 150, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 2, 1,462, 47 Triangles, simulation 423,170 in 28 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 295 MB STEP 83 MB 330 MB STL 21 MB 294 MB OBJ 42 MB 343 MB Visual GLB 12 MB 357 MB OBJ 35 MB 384 MB

803. SSD2828QN4-breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.4	0.3 ms	1.8	93 ms	0.3	0.3	5.6
Simulation, STEP	0.2	0.6	2.3	0.3 ms	1.9	2.0	0.3	0.3	7.7
Simulation, STL	0.3	0.7	2.4	0.6 ms	1.9	0.2	0.3	0.3	6.1
Simulation, OBJ	0.4	0.6	2.6	0.4 ms	2.2	2.7	0.3	0.3	9.1
Visual, GLB	0.3	0.7	2.5	0.3 ms	4.1	67 ms	0.5	0.4	8.5
Visual, OBJ	0.4	0.8	2.7	0.7 ms	4.2	1.6	0.5	0.3	10.4

Board Repo: cyrozap/HDMI-to-MIPI Board: SSD2828QN4-breakout.kicad_pcb Folder SSD2828QN4-breakout Complexity 207 / 1000 (size 207, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 18, 1,423, 0 Triangles, simulation 357,258 in 69 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 12 MB 262 MB STEP 64 MB 302 MB STL 18 MB 271 MB OBJ 37 MB 305 MB Visual GLB 7.9 MB 275 MB OBJ 23 MB 285 MB

804. reDIP-SID

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.3	5.2	0.8 ms	5.0	0.2	0.6	0.2	12.9
Simulation, STEP	0.4	1.2	5.2	0.5 ms	5.2	3.4	0.6	0.3	16.2
Simulation, STL	0.4	1.2	5.4	0.5 ms	5.2	0.3	0.7	0.2	13.4
Simulation, OBJ	0.4	1.1	5.3	0.5 ms	5.0	7.7	0.6	0.2	20.4
Visual, GLB	0.4	1.2	5.2	0.5 ms	9.6	0.1	1.1	0.2	17.9
Visual, OBJ	0.4	1.2	5.3	0.5 ms	9.8	4.1	1.2	0.2	22.3

Board Repo: daglem/reDIP-SID Board: reDIP-SID.kicad_pcb Folder hardware Complexity 364 / 1000 (size 239, features 125) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 68, 1,168, 124 Triangles, simulation 1,333,082 in 116 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 47 MB 480 MB STEP 226 MB 582 MB STL 67 MB 475 MB OBJ 140 MB 909 MB Visual GLB 26 MB 584 MB OBJ 78 MB 643 MB

805. qca7000

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	3.2	17.3	1 ms	14.7	0.8	1.9	0.3	38.9
Simulation, STEP	0.7	3.1	17.3	1 ms	15.0	9.4	1.8	0.3	47.7
Simulation, STL	0.8	3.1	16.9	1 ms	15.1	1.4	1.9	0.3	39.5
Simulation, OBJ	0.7	3.0	17.1	0.9 ms	15.0	19.0	1.9	0.2	57.0
Visual, GLB	0.9	3.1	17.4	1 ms	29.7	0.3	3.3	0.2	54.9
Visual, OBJ	0.8	3.1	17.3	1 ms	29.7	10.0	3.5	0.3	64.8

Board Repo: damienmaguire/foccci Board: qca7000.kicad_pcb Folder pcb Complexity 379 / 1000 (size 269, features 110) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 195, 1,854, 411 Triangles, simulation 4,480,960 in 225 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 151 MB 1.3 GB STEP 622 MB 1.6 GB STL 224 MB 1.3 GB OBJ 473 MB 2.8 GB Visual GLB 82 MB 1.4 GB OBJ 259 MB 1.7 GB

806. blank-plank-rev0b

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.2	2.7	9.8	0.4 ms	8.2	0.3	0.9	0.3	23.4
Simulation, STEP	1.2	2.8	9.7	0.4 ms	8.6	5.7	0.9	0.3	29.3
Simulation, STL	1.1	2.9	9.9	0.4 ms	8.3	0.7	0.9	0.3	24.1
Simulation, OBJ	1.2	2.6	9.6	0.5 ms	8.2	10.1	0.9	0.3	32.9
Visual, GLB	1.1	2.7	9.3	0.4 ms	14.8	0.2	1.3	0.2	29.6
Visual, OBJ	1.2	2.9	9.8	0.5 ms	14.9	6.1	1.6	0.2	36.8

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: blank-plank-rev0b.kicad_pcb Folder adapter-blank-plank-1REV0B Complexity 258 / 1000 (size 148, features 110) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 908, 21, 4 Triangles, simulation 1,992,666 in 22 parts Note mostly unrouted Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 70 MB 894 MB STEP 303 MB 971 MB STL 100 MB 877 MB OBJ 214 MB 1.4 GB Visual GLB 39 MB 970 MB OBJ 117 MB 976 MB

807. flash-zif-rev3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.3	0.4 ms	1.2	50 ms	0.2	0.2	3.5
Simulation, STEP	0.1	0.3	1.3	0.3 ms	1.1	1.4	0.2	0.2	4.7
Simulation, STL	0.1	0.4	1.4	0.3 ms	1.2	0.1	0.2	0.3	3.6
Simulation, OBJ	0.1	0.3	1.3	0.4 ms	1.2	1.5	0.2	0.2	4.8
Visual, GLB	0.1	0.3	1.4	0.5 ms	3.0	41 ms	0.3	0.3	5.5
Visual, OBJ	0.1	0.3	1.3	0.4 ms	2.8	1.1	0.3	0.2	6.3

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: flash-zif-rev3.kicad_pcb Folder adapter-flash-dip-1REV3 Complexity 201 / 1000 (size 131, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 8, 138, 36 Triangles, simulation 313,026 in 25 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 252 MB STEP 49 MB 275 MB STL 16 MB 251 MB OBJ 31 MB 268 MB Visual GLB 8.3 MB 261 MB OBJ 24 MB 261 MB

808. flash-sop-rev3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	2.0	0.3 ms	1.6	83 ms	0.3	0.2	4.8
Simulation, STEP	0.2	0.4	2.0	0.2 ms	1.6	1.5	0.3	0.2	6.2
Simulation, STL	0.2	0.4	2.0	0.2 ms	1.6	0.1	0.3	0.2	4.7
Simulation, OBJ	0.2	0.4	2.1	0.4 ms	1.6	2.4	0.3	0.2	7.2
Visual, GLB	0.2	0.4	2.0	0.2 ms	3.6	71 ms	0.4	0.2	6.9
Visual, OBJ	0.2	0.4	1.9	0.2 ms	3.5	1.9	0.5	0.2	8.5

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: flash-sop-rev3.kicad_pcb Folder adapter-flash-sop-1REV3 Complexity 207 / 1000 (size 137, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 10, 168, 49 Triangles, simulation 501,934 in 29 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 294 MB STEP 76 MB 346 MB STL 25 MB 282 MB OBJ 50 MB 386 MB Visual GLB 13 MB 363 MB OBJ 38 MB 364 MB

809. flash-sop-lotes-rev3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.4	0.4 ms	1.2	52 ms	0.2	0.3	3.7
Simulation, STEP	0.2	0.4	1.3	0.2 ms	1.2	1.3	0.2	0.2	4.7
Simulation, STL	0.2	0.3	1.4	0.3 ms	1.3	96 ms	0.2	0.2	3.7
Simulation, OBJ	0.2	0.3	1.6	0.3 ms	1.2	2.3	0.2	0.2	6.1
Visual, GLB	0.2	0.4	1.5	0.2 ms	3.0	46 ms	0.3	0.2	5.6
Visual, OBJ	0.2	0.3	1.4	0.2 ms	3.1	1.6	0.3	0.2	7.0

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: flash-sop-lotes-rev3.kicad_pcb Folder adapter-flash-sop-lotes-1REV3 Complexity 205 / 1000 (size 135, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 10, 148, 42 Triangles, simulation 315,852 in 25 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 247 MB STEP 52 MB 279 MB STL 16 MB 241 MB OBJ 32 MB 268 MB Visual GLB 9.4 MB 278 MB OBJ 27 MB 289 MB

810. flash-wson-rev3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.2	0.2 ms	1.2	49 ms	0.2	0.2	3.3
Simulation, STEP	0.2	0.3	1.2	0.2 ms	1.2	1.3	0.2	0.2	4.6
Simulation, STL	0.2	0.3	1.1	0.2 ms	1.4	95 ms	0.2	0.3	3.5
Simulation, OBJ	0.2	0.3	1.2	0.2 ms	1.2	1.8	0.2	0.2	5.1
Visual, GLB	0.2	0.3	1.2	0.3 ms	2.5	40 ms	0.3	0.2	4.8
Visual, OBJ	0.1	0.3	1.0	0.2 ms	2.4	1.5	0.3	0.2	5.8

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: flash-wson-rev3.kicad_pcb Folder adapter-flash-wson-1REV3 Complexity 204 / 1000 (size 134, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 10, 143, 41 Triangles, simulation 302,386 in 25 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 10 MB 237 MB STEP 48 MB 275 MB STL 15 MB 238 MB OBJ 30 MB 241 MB Visual GLB 8.8 MB 270 MB OBJ 26 MB 271 MB

811. bp5-ir-toy-v3-rev3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.7	0.3 ms	1.5	73 ms	0.2	0.2	4.3
Simulation, STEP	0.2	0.4	1.7	0.1 ms	1.4	1.5	0.2	0.2	5.6
Simulation, STL	0.2	0.4	1.6	0.2 ms	1.4	96 ms	0.2	0.2	4.1
Simulation, OBJ	0.2	0.4	1.6	0.2 ms	1.5	2.3	0.2	0.2	6.4
Visual, GLB	0.2	0.4	1.6	0.4 ms	3.2	46 ms	0.4	0.2	6.1
Visual, OBJ	0.2	0.4	1.6	0.3 ms	3.4	1.8	0.4	0.2	8.0

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: bp5-ir-toy-v3-rev3.kicad_pcb Folder adapter-ir-toy-3REV3 Complexity 203 / 1000 (size 148, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 35, 168, 37 Triangles, simulation 445,936 in 35 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 277 MB STEP 75 MB 321 MB STL 22 MB 280 MB OBJ 45 MB 355 MB Visual GLB 12 MB 322 MB OBJ 34 MB 320 MB

812. wago kf141r adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	78 ms	98 ms	0.6	0.2 ms	0.6	21 ms	73 ms	0.2	1.7
Simulation, STEP	0.1	0.1	0.6	0.1 ms	0.6	0.9	76 ms	0.2	2.5
Simulation, STL	91 ms	0.1	0.6	0.1 ms	0.6	45 ms	78 ms	0.2	1.7
Simulation, OBJ	81 ms	0.1	0.6	0.1 ms	0.6	0.7	78 ms	0.2	2.3
Visual, GLB	80 ms	0.1	0.6	0.1 ms	0.9	11 ms	0.1	0.2	2.0
Visual, OBJ	78 ms	0.1	0.6	0.1 ms	0.9	0.4	82 ms	0.2	2.4

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: wago kf141r adapter.kicad_pcb Folder adapter-kf141r-quick-connect-1REV0 Complexity 95 / 1000 (size 85, features 10) KESE features curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 2, 30, 0 Triangles, simulation 132,576 in 20 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.1 MB 182 MB STEP 15 MB 195 MB STL 6.6 MB 182 MB OBJ 13 MB 185 MB Visual GLB 2.3 MB 154 MB OBJ 6.5 MB 155 MB

813. wago kf141v adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	91 ms	0.1	0.6	0.2 ms	0.7	31 ms	90 ms	0.3	1.9
Simulation, STEP	89 ms	0.1	0.7	0.2 ms	0.7	0.9	76 ms	0.2	2.7
Simulation, STL	0.1	0.1	0.6	0.2 ms	0.7	47 ms	85 ms	0.3	1.9
Simulation, OBJ	90 ms	0.1	0.6	0.5 ms	0.7	0.6	79 ms	0.2	2.4
Visual, GLB	92 ms	0.1	0.6	0.2 ms	1.1	13 ms	0.1	0.2	2.2
Visual, OBJ	91 ms	0.1	0.6	0.2 ms	1.2	0.3	92 ms	0.3	2.6

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: wago kf141v adapter.kicad_pcb Folder adapter-kf141v-quick-connect-1REV0 Complexity 95 / 1000 (size 85, features 10) KESE features curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 2, 30, 0 Triangles, simulation 132,656 in 20 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.1 MB 186 MB STEP 15 MB 196 MB STL 6.6 MB 181 MB OBJ 13 MB 186 MB Visual GLB 2.3 MB 154 MB OBJ 6.5 MB 155 MB

814. adapter-ram-ddr5-1REV2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.9	4.3	0.6 ms	3.6	0.1	0.3	0.2	9.8
Simulation, STEP	0.3	0.9	4.6	0.6 ms	3.5	3.0	0.3	0.3	13.0
Simulation, STL	0.3	0.9	4.3	0.6 ms	3.6	0.2	0.4	0.2	9.9
Simulation, OBJ	0.3	1.0	4.3	0.6 ms	3.5	3.8	0.4	0.2	13.5
Visual, GLB	0.3	1.0	4.1	0.5 ms	7.6	96 ms	0.8	0.2	14.2
Visual, OBJ	0.4	0.9	4.2	0.5 ms	7.1	3.1	0.9	0.3	16.9

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: adapter-ram-ddr5-1REV2.kicad_pcb Folder adapter-ram-ddr5-1REV2 Complexity 256 / 1000 (size 146, features 110) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 21, 165, 59 Triangles, simulation 690,766 in 213 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 25 MB 429 MB STEP 118 MB 461 MB STL 35 MB 436 MB OBJ 72 MB 533 MB Visual GLB 20 MB 497 MB OBJ 60 MB 526 MB

815. rs232-dual-adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.7	0.3 ms	1.6	60 ms	0.2	0.2	4.3
Simulation, STEP	0.2	0.3	1.7	0.2 ms	1.5	1.4	0.2	0.2	5.6
Simulation, STL	0.2	0.3	1.8	0.3 ms	1.5	0.1	0.3	0.2	4.4
Simulation, OBJ	0.2	0.3	1.7	0.3 ms	1.6	2.1	0.2	0.2	6.2
Visual, GLB	0.2	0.3	1.7	0.2 ms	2.9	53 ms	0.3	0.2	5.5
Visual, OBJ	0.2	0.3	1.6	0.3 ms	2.8	1.3	0.3	0.2	6.8

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: rs232-dual-adapter.kicad_pcb Folder adapter-rs232-dual-1REV0 Complexity 238 / 1000 (size 138, features 100) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 18, 168, 22 Triangles, simulation 414,134 in 52 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 273 MB STEP 62 MB 314 MB STL 21 MB 276 MB OBJ 41 MB 335 MB Visual GLB 10 MB 309 MB OBJ 29 MB 314 MB

816. sim-rev3c

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	1.9	0.4 ms	2.0	80 ms	0.3	0.3	5.1
Simulation, STEP	0.2	0.5	2.0	0.2 ms	2.1	1.7	0.3	0.2	7.0
Simulation, STL	0.2	0.5	1.9	0.2 ms	2.0	0.2	0.3	0.2	5.2
Simulation, OBJ	0.2	0.4	1.8	0.2 ms	2.1	2.2	0.2	0.2	7.1
Visual, GLB	0.2	0.5	1.8	0.2 ms	4.3	68 ms	0.8	0.2	7.9
Visual, OBJ	0.2	0.4	1.9	0.3 ms	4.2	2.0	0.9	0.3	9.9

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: sim-rev3c.kicad_pcb Folder adapter-sim-iccard-1REV3C Complexity 248 / 1000 (size 148, features 100) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 12, 262, 97 Triangles, simulation 450,316 in 27 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 16 MB 291 MB STEP 78 MB 353 MB STL 23 MB 294 MB OBJ 46 MB 360 MB Visual GLB 14 MB 370 MB OBJ 40 MB 391 MB

817. stemma-qwiic-grove-gravity-bog-plank-1REV1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.8	0.2 ms	1.4	58 ms	0.2	0.2	4.3
Simulation, STEP	0.2	0.4	1.7	0.1 ms	1.4	1.5	0.2	0.2	5.6
Simulation, STL	0.2	0.4	1.7	0.1 ms	1.5	0.1	0.2	0.2	4.2
Simulation, OBJ	0.2	0.4	1.7	0.2 ms	1.4	2.0	0.2	0.2	6.1
Visual, GLB	0.2	0.4	1.7	0.2 ms	3.3	52 ms	0.4	0.2	6.2
Visual, OBJ	0.2	0.4	1.9	0.2 ms	3.5	1.6	0.4	0.2	8.2

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: stemma-qwiic-grove-gravity-bog-plank-1REV1.kicad_pcb Folder adapter-stemma-qwiic-grove-gravity-bog-plank-1REV1 Complexity 242 / 1000 (size 142, features 100) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 13, 135, 77 Triangles, simulation 427,608 in 22 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 267 MB STEP 67 MB 309 MB STL 21 MB 270 MB OBJ 44 MB 343 MB Visual GLB 11 MB 303 MB OBJ 34 MB 311 MB

818. vpp-maker-rev6-ian

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.2	0.2 ms	1.2	58 ms	0.2	0.2	3.3
Simulation, STEP	0.2	0.4	1.2	0.2 ms	1.1	1.3	0.2	0.2	4.5
Simulation, STL	0.1	0.4	1.2	0.2 ms	1.1	79 ms	0.2	0.2	3.4
Simulation, OBJ	0.2	0.4	1.3	0.2 ms	1.2	1.9	0.2	0.3	5.4
Visual, GLB	0.2	0.4	1.2	0.3 ms	2.5	34 ms	0.2	0.2	4.7
Visual, OBJ	0.2	0.4	1.2	0.2 ms	2.3	1.2	0.2	0.2	5.8

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: vpp-maker-rev6-ian.kicad_pcb Folder adapter-vpp-maker-1REV6 Complexity 209 / 1000 (size 139, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 23, 115, 34 Triangles, simulation 301,980 in 31 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 10 MB 237 MB STEP 44 MB 262 MB STL 15 MB 260 MB OBJ 30 MB 239 MB Visual GLB 7.8 MB 233 MB OBJ 23 MB 241 MB

819. REV10a

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	5.2	22.0	1 ms	17.6	0.6	1.9	0.3	48.8
Simulation, STEP	0.9	4.5	19.9	0.9 ms	16.6	9.5	1.6	0.3	53.4
Simulation, STL	1.0	4.3	19.5	0.5 ms	16.0	1.1	1.6	0.3	43.7
Simulation, OBJ	0.9	4.4	19.0	0.8 ms	15.7	20.4	1.7	0.3	62.3
Visual, GLB	1.0	4.1	19.4	1 ms	35.0	0.4	4.5	0.3	64.8
Visual, OBJ	0.9	4.4	19.6	1.0 ms	34.1	14.4	4.5	0.2	78.2

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: REV10a.kicad_pcb Folder bus_pirate_pcb / 5-REV10A Complexity 387 / 1000 (size 267, features 120) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 210, 2,417, 547 Triangles, simulation 3,375,460 in 212 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 116 MB 1.1 GB STEP 556 MB 1.4 GB STL 169 MB 1.1 GB OBJ 363 MB 2.3 GB Visual GLB 77 MB 1.2 GB OBJ 243 MB 1.7 GB

820. BusPirate-5-rev8

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	4.7	19.8	0.8 ms	45.6	0.7	2.1	0.3	74.1
Simulation, STEP	0.9	4.8	20.3	0.7 ms	45.7	12.0	2.0	0.3	86.1
Simulation, STL	0.9	4.7	20.4	1 ms	45.9	1.4	2.1	0.4	75.8
Simulation, OBJ	1.0	4.5	19.8	1 ms	44.7	22.9	2.2	0.4	95.4
Visual, GLB	0.9	4.7	21.2	1 ms	34.7	0.4	4.2	0.4	66.4
Visual, OBJ	0.8	4.2	19.5	1.0 ms	33.6	14.9	4.5	0.3	77.8

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: BusPirate-5-rev8.kicad_pcb Folder bus_pirate_pcb / 5-REV8 Complexity 355 / 1000 (size 265, features 90) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 193, 2,281, 490 Triangles, simulation 3,531,122 in 210 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 123 MB 1.1 GB STEP 535 MB 1.5 GB STL 177 MB 1.2 GB OBJ 378 MB 2.3 GB Visual GLB 82 MB 1.4 GB OBJ 259 MB 1.8 GB

821. 5XL-REV0

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	3.1	12.0	1 ms	13.9	0.6	1.6	0.3	32.3
Simulation, STEP	0.9	3.2	11.7	1 ms	14.3	8.2	1.5	0.3	40.1
Simulation, STL	0.9	3.2	11.8	4 ms	14.3	1.0	1.8	0.4	33.3
Simulation, OBJ	0.9	3.3	11.8	1 ms	14.2	15.1	1.6	0.3	47.2
Visual, GLB	0.8	3.3	11.8	1 ms	26.0	0.3	3.6	0.3	46.2
Visual, OBJ	0.9	3.1	12.0	2 ms	25.6	10.4	3.7	0.3	55.9

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: 5XL-REV0.kicad_pcb Folder bus_pirate_pcb / 5XL-REV0 Complexity 388 / 1000 (size 268, features 120) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 216, 2,471, 536 Triangles, simulation 2,905,454 in 218 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 99 MB 1.0 GB STEP 432 MB 1.3 GB STL 145 MB 1.0 GB OBJ 309 MB 1.9 GB Visual GLB 70 MB 1.2 GB OBJ 221 MB 1.5 GB

822. 6-REV2b

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	2.8	10.7	1 ms	12.6	0.5	1.3	0.3	28.8
Simulation, STEP	0.7	2.7	10.9	1 ms	11.8	7.7	1.3	0.3	35.5
Simulation, STL	0.7	2.7	10.5	1 ms	11.9	0.8	1.1	0.3	28.1
Simulation, OBJ	0.7	2.4	10.5	0.9 ms	13.8	13.3	1.4	0.3	42.4
Visual, GLB	0.7	2.8	10.9	0.5 ms	22.5	0.3	2.5	0.2	40.0
Visual, OBJ	0.7	2.5	10.9	1 ms	23.3	9.1	3.3	0.3	50.1

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: 6-REV2b.kicad_pcb Folder bus_pirate_pcb / 6-REV2B Complexity 387 / 1000 (size 267, features 120) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 216, 2,531, 445 Triangles, simulation 2,941,898 in 216 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 101 MB 1.0 GB STEP 485 MB 1.3 GB STL 147 MB 978 MB OBJ 315 MB 1.9 GB Visual GLB 70 MB 1.4 GB OBJ 222 MB 1.5 GB

823. BusPirate-5-rev10

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	3.8	17.4	0.5 ms	14.2	0.5	1.5	0.2	38.7
Simulation, STEP	0.8	3.9	17.5	0.5 ms	13.6	8.7	1.4	0.2	46.3
Simulation, STL	0.8	3.8	17.6	0.9 ms	13.9	1.1	1.6	0.3	39.1
Simulation, OBJ	0.9	4.1	17.9	0.5 ms	14.1	18.0	1.6	0.3	56.9
Visual, GLB	0.8	3.8	17.6	0.6 ms	28.0	0.4	3.5	0.2	54.4
Visual, OBJ	0.9	4.0	17.7	0.9 ms	26.8	11.7	3.5	0.2	64.9

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: BusPirate-5-rev10.kicad_pcb Folder bus_pirate_pcb / development / 5-REV10-PFET-bug Complexity 387 / 1000 (size 267, features 120) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 210, 2,414, 548 Triangles, simulation 3,359,754 in 215 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 116 MB 1.1 GB STEP 551 MB 1.4 GB STL 168 MB 1.1 GB OBJ 362 MB 2.2 GB Visual GLB 76 MB 1.3 GB OBJ 242 MB 1.6 GB

824. 7-REV0

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	2.7	10.0	0.6 ms	12.2	0.5	1.1	0.2	27.5
Simulation, STEP	0.8	2.8	9.8	0.9 ms	12.1	7.3	1.1	0.2	34.2
Simulation, STL	0.8	2.8	9.5	0.5 ms	11.5	0.9	1.2	0.3	27.0
Simulation, OBJ	0.8	2.8	9.9	0.8 ms	12.3	15.4	1.1	0.3	42.5
Visual, GLB	0.7	2.9	10.0	0.8 ms	22.0	0.3	2.5	0.2	38.6
Visual, OBJ	0.7	2.8	9.4	0.7 ms	21.3	10.6	2.9	0.2	48.1

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: 7-REV0.kicad_pcb Folder bus_pirate_pcb / development / 7-REV0A-prototype-1 Complexity 390 / 1000 (size 270, features 120) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 241, 2,812, 465 Triangles, simulation 2,913,992 in 247 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 99 MB 993 MB STEP 404 MB 1.3 GB STL 146 MB 970 MB OBJ 308 MB 2.0 GB Visual GLB 70 MB 1.3 GB OBJ 220 MB 1.5 GB

825. 7-REV1-freeze

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	3.3	10.5	0.9 ms	13.9	0.6	1.4	0.3	30.9
Simulation, STEP	0.9	3.4	10.8	0.8 ms	14.0	8.5	1.3	0.3	39.3
Simulation, STL	0.8	3.4	10.5	1 ms	13.5	1.1	1.3	0.3	31.0
Simulation, OBJ	0.8	3.3	9.6	0.6 ms	13.5	15.1	1.3	0.3	44.0
Visual, GLB	0.9	3.3	11.2	1 ms	28.7	0.4	4.4	0.3	49.2
Visual, OBJ	0.8	3.4	10.5	0.6 ms	26.3	10.8	4.8	0.3	57.0

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: 7-REV1-freeze.kicad_pcb Folder bus_pirate_pcb / development / 7-REV1-vout-protection Complexity 390 / 1000 (size 270, features 120) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 249, 2,812, 465 Triangles, simulation 2,909,062 in 247 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 98 MB 969 MB STEP 404 MB 1.3 GB STL 145 MB 995 MB OBJ 307 MB 2.0 GB Visual GLB 70 MB 1.2 GB OBJ 220 MB 1.5 GB

826. 7-REV1B

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	1.4	0.8	0.4 ms	0.7	18 ms	45 ms	0.3	4.1
Simulation, STEP	0.9	1.4	0.9	0.4 ms	0.7	0.8	34 ms	0.3	4.8
Simulation, STL	0.8	1.3	0.9	0.4 ms	0.8	26 ms	41 ms	0.3	4.1
Simulation, OBJ	1.0	1.5	0.9	0.4 ms	0.7	0.5	44 ms	0.2	4.8
Visual, GLB	0.8	1.3	0.9	0.4 ms	1.1	13 ms	77 ms	0.3	4.4
Visual, OBJ	0.9	1.5	0.8	0.8 ms	1.0	0.3	78 ms	0.2	4.8

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: 7-REV1B.kicad_pcb Folder bus_pirate_pcb / development / 7-REV1B-prototype-2 Complexity 390 / 1000 (size 270, features 120) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 240, 2,924, 508 Triangles, simulation 95,348 in 26 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.2 MB 230 MB STEP 7.6 MB 229 MB STL 4.8 MB 232 MB OBJ 9.5 MB 228 MB Visual GLB 2.6 MB 207 MB OBJ 7.3 MB 205 MB

827. 7-REV2-vout-protection

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	1.4	0.8	0.5 ms	0.6	18 ms	35 ms	0.2	4.0
Simulation, STEP	0.9	1.3	0.8	0.6 ms	0.5	0.7	32 ms	0.3	4.5
Simulation, STL	0.9	1.3	0.7	0.3 ms	0.6	26 ms	40 ms	0.2	3.8
Simulation, OBJ	1.0	1.4	0.8	0.4 ms	0.6	0.5	41 ms	0.2	4.6
Visual, GLB	1.0	1.3	0.8	0.6 ms	1.0	13 ms	98 ms	0.2	4.4
Visual, OBJ	0.9	1.3	0.8	0.5 ms	1.1	0.4	67 ms	0.3	4.8

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: 7-REV2-vout-protection.kicad_pcb Folder bus_pirate_pcb / development / 7-REV2-prototype3a Complexity 393 / 1000 (size 273, features 120) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 265, 3,158, 537 Triangles, simulation 89,118 in 26 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.0 MB 233 MB STEP 6.4 MB 239 MB STL 4.5 MB 237 MB OBJ 8.9 MB 228 MB Visual GLB 2.4 MB 212 MB OBJ 6.7 MB 213 MB

828. 7-REV2-vout-protection

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	1.1	0.3	0.3 ms	58 ms	2 ms	4 ms	0.2	2.6
Simulation, STEP	0.9	1.1	0.2	0.3 ms	44 ms	38 ms	4 ms	0.2	2.5
Simulation, STL	1.0	1.1	0.2	0.1 ms	44 ms	2 ms	4 ms	0.2	2.6
Simulation, OBJ	0.9	1.1	0.2	0.2 ms	44 ms	22 ms	3 ms	0.2	2.4
Visual, GLB	0.9	1.1	0.2	0.1 ms	81 ms	2 ms	18 ms	0.2	2.6
Visual, OBJ	0.9	1.1	0.3	0.1 ms	74 ms	17 ms	17 ms	0.2	2.6

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: 7-REV2-vout-protection.kicad_pcb Folder bus_pirate_pcb / development / 7-REV2-prototype3b-side-leds Complexity 393 / 1000 (size 273, features 120) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 265, 3,201, 529 Triangles, simulation 4,188 in 6 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 114 kB 133 MB STEP 586 kB 134 MB STL 210 kB 133 MB OBJ 375 kB 133 MB Visual GLB 133 kB 133 MB OBJ 327 kB 133 MB

829. programming_pin_mount.v1.0

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	13 ms	43 ms	98 ms	0.1 ms	0.2	4 ms	18 ms	0.2	0.6
Simulation, STEP	8 ms	43 ms	94 ms	0.1 ms	0.2	0.1	18 ms	0.2	0.6
Simulation, STL	8 ms	28 ms	85 ms	0.1 ms	0.2	7 ms	17 ms	0.2	0.5
Simulation, OBJ	14 ms	37 ms	93 ms	0.1 ms	0.2	84 ms	19 ms	0.2	0.7
Visual, GLB	8 ms	28 ms	93 ms	0.1 ms	0.3	3 ms	25 ms	0.1	0.6
Visual, OBJ	8 ms	35 ms	86 ms	0.1 ms	0.2	39 ms	24 ms	0.2	0.6

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: programming_pin_mount.v1.0.kicad_pcb Folder debug-station Complexity 47 / 1000 (size 47, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 1, 3, 0 Triangles, simulation 21,728 in 13 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 711 kB 42 MB STEP 2.3 MB 44 MB STL 1.1 MB 41 MB OBJ 2.0 MB 46 MB Visual GLB 357 kB 50 MB OBJ 918 kB 58 MB

830. flash-dip-rev4

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.0	0.3 ms	0.9	44 ms	0.2	0.2	2.7
Simulation, STEP	0.1	0.3	1.1	0.2 ms	0.9	1.0	0.1	0.2	3.8
Simulation, STL	0.1	0.2	1.1	0.1 ms	0.9	69 ms	0.2	0.2	2.8
Simulation, OBJ	0.1	0.2	1.1	0.3 ms	1.0	1.3	0.2	0.2	4.0
Visual, GLB	0.1	0.2	1.1	0.2 ms	2.3	35 ms	0.3	0.2	4.2
Visual, OBJ	0.1	0.2	1.2	0.2 ms	2.3	1.0	0.3	0.2	5.3

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: flash-dip-rev4.kicad_pcb Folder development / adapter-flash-dip-1REV4 Complexity 201 / 1000 (size 131, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 8, 141, 37 Triangles, simulation 325,172 in 25 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 240 MB STEP 49 MB 282 MB STL 16 MB 241 MB OBJ 32 MB 246 MB Visual GLB 8.7 MB 268 MB OBJ 25 MB 270 MB

831. flash-sop-rev4

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.4	0.3 ms	2.0	90 ms	0.4	0.2	5.8
Simulation, STEP	0.2	0.6	2.5	0.3 ms	1.8	1.9	0.4	0.2	7.6
Simulation, STL	0.2	0.5	2.6	0.5 ms	2.0	0.2	0.4	0.3	6.2
Simulation, OBJ	0.2	0.5	2.5	0.3 ms	1.9	3.2	0.4	0.2	9.0
Visual, GLB	0.2	0.5	2.6	0.4 ms	4.5	87 ms	0.6	0.3	8.8
Visual, OBJ	0.2	0.5	2.5	0.3 ms	4.3	2.5	0.6	0.2	10.8

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: flash-sop-rev4.kicad_pcb Folder development / adapter-flash-sop-1REV4 Complexity 207 / 1000 (size 137, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 10, 172, 48 Triangles, simulation 493,998 in 29 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 299 MB STEP 71 MB 344 MB STL 25 MB 297 MB OBJ 50 MB 368 MB Visual GLB 13 MB 359 MB OBJ 37 MB 360 MB

832. kaybee-plank

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	2.3	0.2 ms	1.8	84 ms	0.4	0.3	5.5
Simulation, STEP	0.2	0.5	2.2	0.3 ms	1.9	1.8	0.3	0.2	7.2
Simulation, STL	0.2	0.5	2.5	0.2 ms	2.0	0.1	0.3	0.3	5.9
Simulation, OBJ	0.2	0.5	2.2	0.5 ms	2.0	3.3	0.3	0.3	8.8
Visual, GLB	0.3	0.5	2.2	0.2 ms	4.0	58 ms	0.4	0.2	7.8
Visual, OBJ	0.2	0.5	2.1	0.5 ms	4.1	2.0	0.4	0.3	9.6

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: kaybee-plank.kicad_pcb Folder development / adapter-kaybee-plank-1REV0 Complexity 250 / 1000 (size 140, features 110) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 20, 175, 24 Triangles, simulation 421,190 in 37 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 270 MB STEP 70 MB 310 MB STL 21 MB 266 MB OBJ 43 MB 317 MB Visual GLB 10 MB 315 MB OBJ 30 MB 313 MB

833. kaybee-plank

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	2.3	0.4 ms	2.0	76 ms	0.3	0.2	5.5
Simulation, STEP	0.2	0.4	2.2	0.2 ms	1.9	1.8	0.3	0.3	7.1
Simulation, STL	0.2	0.6	2.3	0.3 ms	1.9	0.1	0.3	0.3	5.7
Simulation, OBJ	0.2	0.6	2.2	0.3 ms	1.9	2.7	0.3	0.2	8.1
Visual, GLB	0.2	0.5	2.2	0.3 ms	4.1	53 ms	0.4	0.2	7.7
Visual, OBJ	0.2	0.4	2.3	0.4 ms	3.8	1.8	0.4	0.2	9.2

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: kaybee-plank.kicad_pcb Folder development / adapter-kaybee-plank-1REV1 Complexity 259 / 1000 (size 149, features 110) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 27, 220, 47 Triangles, simulation 490,076 in 41 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 290 MB STEP 81 MB 344 MB STL 25 MB 287 MB OBJ 50 MB 388 MB Visual GLB 12 MB 344 MB OBJ 36 MB 349 MB

834. ram-ddr5

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.9	3.9	0.8 ms	3.4	0.1	0.3	0.2	9.2
Simulation, STEP	0.3	0.9	4.0	0.6 ms	3.6	3.0	0.3	0.3	12.4
Simulation, STL	0.3	0.8	4.0	0.6 ms	3.4	0.3	0.3	0.3	9.4
Simulation, OBJ	0.3	0.9	3.9	0.8 ms	3.6	3.2	0.3	0.2	12.5
Visual, GLB	0.3	0.8	3.9	0.6 ms	7.0	91 ms	0.9	0.3	13.2
Visual, OBJ	0.3	0.8	3.9	0.6 ms	7.1	3.0	0.9	0.2	16.1

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: ram-ddr5.kicad_pcb Folder development / adapter-ram-ddr5-1REV0 Complexity 248 / 1000 (size 148, features 100) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 23, 188, 60 Triangles, simulation 679,542 in 213 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 24 MB 427 MB STEP 117 MB 471 MB STL 34 MB 427 MB OBJ 71 MB 527 MB Visual GLB 20 MB 538 MB OBJ 59 MB 496 MB

835. ram-ddr5-1REV1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.8	3.9	0.7 ms	2.9	98 ms	0.3	0.2	8.5
Simulation, STEP	0.3	0.8	3.7	0.4 ms	3.1	2.5	0.3	0.2	10.9
Simulation, STL	0.3	0.8	3.6	0.6 ms	3.1	0.2	0.3	0.2	8.5
Simulation, OBJ	0.3	0.8	3.8	2 ms	2.9	2.9	0.3	0.2	11.1
Visual, GLB	0.2	0.8	3.7	0.4 ms	6.1	85 ms	0.7	0.2	11.8
Visual, OBJ	0.3	0.8	3.8	0.4 ms	6.2	2.5	0.8	0.2	14.6

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: ram-ddr5-1REV1.kicad_pcb Folder development / adapter-ram-ddr5-1REV1 Complexity 258 / 1000 (size 148, features 110) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 23, 184, 61 Triangles, simulation 701,270 in 213 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 25 MB 420 MB STEP 121 MB 469 MB STL 35 MB 420 MB OBJ 73 MB 540 MB Visual GLB 21 MB 478 MB OBJ 61 MB 586 MB

836. sim-iccard-rev4

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.6	0.2 ms	1.5	75 ms	0.3	0.2	4.2
Simulation, STEP	0.2	0.4	1.6	0.2 ms	1.5	1.3	0.2	0.2	5.4
Simulation, STL	0.2	0.5	1.5	0.2 ms	1.6	0.1	0.2	0.2	4.2
Simulation, OBJ	0.2	0.4	1.5	0.2 ms	1.5	2.0	0.2	0.2	6.0
Visual, GLB	0.2	0.4	1.5	0.2 ms	3.3	50 ms	0.4	0.2	6.0
Visual, OBJ	0.2	0.4	1.6	0.2 ms	3.2	1.7	0.5	0.2	7.8

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: sim-iccard-rev4.kicad_pcb Folder development / adapter-sim-iccard-1REV4 Complexity 247 / 1000 (size 147, features 100) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 12, 261, 87 Triangles, simulation 395,666 in 27 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 269 MB STEP 62 MB 324 MB STL 20 MB 268 MB OBJ 40 MB 323 MB Visual GLB 12 MB 335 MB OBJ 35 MB 334 MB

837. stemma-qwiic-grove-gravity-bog-plank

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.8	0.1 ms	1.5	64 ms	0.2	0.2	4.2
Simulation, STEP	0.2	0.4	1.7	0.4 ms	1.4	1.4	0.2	0.2	5.5
Simulation, STL	0.1	0.4	1.8	0.2 ms	1.4	94 ms	0.2	0.2	4.2
Simulation, OBJ	0.1	0.3	1.8	0.2 ms	1.6	2.0	0.2	0.2	6.3
Visual, GLB	0.2	0.4	1.9	0.2 ms	4.1	51 ms	0.4	0.2	7.3
Visual, OBJ	0.2	0.4	1.9	0.4 ms	3.7	1.7	0.6	0.3	8.7

Board Repo: DangerousPrototypes/BusPirate5-hardware Board: stemma-qwiic-grove-gravity-bog-plank.kicad_pcb Folder development / adapter-stemma-qwiic-grove-gravity-bog-1REV0 Complexity 242 / 1000 (size 142, features 100) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 13, 124, 77 Triangles, simulation 397,162 in 24 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 271 MB STEP 60 MB 302 MB STL 20 MB 265 MB OBJ 41 MB 324 MB Visual GLB 10 MB 299 MB OBJ 31 MB 297 MB

838. BPUv2a

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	7.6	26.9	2 ms	23.2	1.3	3.3	0.4	64.3
Simulation, STEP	1.4	7.4	26.9	1 ms	23.1	15.8	3.2	0.4	78.2
Simulation, STL	1.4	7.0	25.8	0.9 ms	22.9	2.1	3.4	0.4	63.0
Simulation, OBJ	1.3	6.9	26.3	2 ms	22.7	35.6	3.3	0.4	96.4
Visual, GLB	1.5	7.3	26.0	2 ms	52.2	0.7	7.1	0.3	95.1
Visual, OBJ	1.4	6.9	26.2	1 ms	53.6	26.0	7.7	0.3	122.0

Board Repo: DangerousPrototypes/BusPirateUltraHardware Board: BPUv2a.kicad_pcb Folder BPUv2a Complexity 334 / 1000 (size 289, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 211, 4,865, 509 Triangles, simulation 5,364,414 in 332 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 186 MB 1.7 GB STEP 904 MB 1.8 GB STL 268 MB 1.6 GB OBJ 579 MB 3.5 GB Visual GLB 119 MB 1.9 GB OBJ 380 MB 2.5 GB

839. dragon64

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	7.1	41.8	2 ms	27.1	1.3	6.1	0.4	85.3
Simulation, STEP	1.5	7.0	40.3	2 ms	26.5	19.8	5.5	0.4	100.9
Simulation, STL	1.4	6.9	40.9	2 ms	26.1	2.7	6.0	0.4	84.4
Simulation, OBJ	1.4	6.9	41.1	2 ms	27.4	43.0	5.4	0.3	125.5
Visual, GLB	1.3	6.7	40.3	1 ms	67.5	0.8	6.9	0.3	123.7
Visual, OBJ	1.4	6.8	40.8	2 ms	72.4	27.0	8.6	0.3	157.3

Board Repo: danwerner21/Dragon64 Board: dragon64.kicad_pcb Folder Dragon64Board Complexity 286 / 1000 (size 221, features 65) KESE features through vias, rounded, trapezoid or chamfered pads, drill offsets, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 224, 6,439, 226 Triangles, simulation 7,758,606 in 277 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 262 MB 2.4 GB STEP 1.3 GB 3.0 GB STL 388 MB 2.3 GB OBJ 823 MB 4.9 GB Visual GLB 166 MB 2.6 GB OBJ 529 MB 3.2 GB

840. DragonKeyboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.1	5.4	0.5 ms	3.2	0.2	0.4	0.3	10.8
Simulation, STEP	0.3	1.1	5.3	0.5 ms	3.1	2.8	0.4	0.2	13.3
Simulation, STL	0.3	1.1	5.3	0.6 ms	3.3	0.2	0.4	0.2	10.9
Simulation, OBJ	0.3	1.1	5.2	0.5 ms	3.1	5.9	0.4	0.2	16.2
Visual, GLB	0.3	1.1	5.2	0.8 ms	6.4	96 ms	0.7	0.2	14.1
Visual, OBJ	0.4	1.0	5.4	0.5 ms	6.2	3.3	0.9	0.2	17.4

Board Repo: danwerner21/Dragon64 Board: DragonKeyboard.kicad_pcb Folder Dragon64Keyboard Complexity 192 / 1000 (size 167, features 25) KESE features through vias, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 55, 590, 27 Triangles, simulation 1,111,518 in 27 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 38 MB 480 MB STEP 177 MB 544 MB STL 56 MB 516 MB OBJ 114 MB 790 MB Visual GLB 22 MB 524 MB OBJ 66 MB 530 MB

841. CartRiser

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.4	0.3 ms	1.2	58 ms	0.2	0.2	3.5
Simulation, STEP	0.1	0.3	1.4	0.2 ms	1.4	1.3	0.2	0.2	4.8
Simulation, STL	0.1	0.2	1.4	0.4 ms	1.3	86 ms	0.2	0.2	3.5
Simulation, OBJ	0.1	0.3	1.4	0.3 ms	1.3	2.0	0.2	0.2	5.4
Visual, GLB	0.1	0.2	1.3	0.3 ms	2.5	31 ms	0.2	0.2	4.6
Visual, OBJ	0.1	0.2	1.4	0.3 ms	2.5	1.3	0.3	0.2	6.0

Board Repo: danwerner21/TI99_22 Board: CartRiser.kicad_pcb Folder CartRiser / CartRiser Complexity 162 / 1000 (size 112, features 50) KESE features filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 2, 159, 0 Triangles, simulation 407,960 in 45 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 13 MB 268 MB STEP 55 MB 302 MB STL 20 MB 275 MB OBJ 40 MB 307 MB Visual GLB 8.1 MB 292 MB OBJ 24 MB 291 MB

842. IO_Riser

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	1.1	0.2 ms	0.9	40 ms	0.2	0.3	2.8
Simulation, STEP	0.1	0.2	1.0	0.6 ms	1.0	1.1	0.2	0.2	3.7
Simulation, STL	0.1	0.2	1.0	0.2 ms	1.0	61 ms	0.2	0.2	2.8
Simulation, OBJ	95 ms	0.2	1.1	0.3 ms	0.9	1.3	0.2	0.2	4.0
Visual, GLB	98 ms	0.2	1.0	0.2 ms	1.9	22 ms	0.2	0.2	3.6
Visual, OBJ	99 ms	0.2	1.1	0.2 ms	2.0	0.8	0.2	0.2	4.6

Board Repo: danwerner21/TI99_22 Board: IO_Riser.kicad_pcb Folder IORiser / IO_Riser Complexity 187 / 1000 (size 122, features 65) KESE features through vias, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 2, 274, 7 Triangles, simulation 249,684 in 51 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.0 MB 237 MB STEP 34 MB 244 MB STL 12 MB 221 MB OBJ 24 MB 229 MB Visual GLB 4.8 MB 217 MB OBJ 14 MB 217 MB

843. Keyboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.0	5.6	0.4 ms	4.5	0.2	0.5	0.3	12.6
Simulation, STEP	0.5	1.1	5.5	0.3 ms	4.5	3.5	0.5	0.2	15.8
Simulation, STL	0.5	1.1	5.6	0.3 ms	4.4	0.3	0.6	0.3	12.8
Simulation, OBJ	0.5	1.1	5.7	0.3 ms	4.4	6.6	0.6	0.2	19.1
Visual, GLB	0.4	1.0	5.8	0.4 ms	10.0	0.1	1.1	0.2	18.7
Visual, OBJ	0.5	1.1	5.7	0.5 ms	9.9	4.1	1.3	0.2	22.7

Board Repo: danwerner21/TI99_22 Board: Keyboard.kicad_pcb Folder Keyboard Complexity 205 / 1000 (size 160, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 57, 390, 8 Triangles, simulation 1,564,256 in 45 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 53 MB 691 MB STEP 255 MB 755 MB STL 78 MB 687 MB OBJ 162 MB 1.1 GB Visual GLB 34 MB 683 MB OBJ 101 MB 818 MB

844. Console

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.6	9.8	49.2	4 ms	37.8	1.9	7.5	0.5	108.2
Simulation, STEP	1.6	8.7	51.3	2 ms	37.5	28.0	7.1	0.5	134.7
Simulation, STL	2.0	9.7	50.7	2 ms	37.4	4.2	7.1	0.4	111.7
Simulation, OBJ	2.1	9.5	49.6	2 ms	37.2	53.6	7.1	0.6	159.6
Visual, GLB	2.0	9.2	49.3	3 ms	106.8	1.1	14.5	0.4	183.5
Visual, OBJ	2.2	10.2	52.6	2 ms	113.4	33.7	14.5	0.4	227.0

Board Repo: danwerner21/TI99_22 Board: Console.kicad_pcb Folder mainboard Complexity 294 / 1000 (size 229, features 65) KESE features through vias, rounded, trapezoid or chamfered pads, drill offsets, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 244, 9,062, 592 Triangles, simulation 9,777,460 in 365 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 334 MB 3.2 GB STEP 1.8 GB 3.8 GB STL 489 MB 3.2 GB OBJ 1.0 GB 6.1 GB Visual GLB 215 MB 3.3 GB OBJ 688 MB 4.2 GB

845. unicorn

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.6	2.8	0.3 ms	2.8	0.1	0.5	0.4	7.4
Simulation, STEP	0.2	0.5	2.8	0.4 ms	2.8	2.6	0.5	0.3	9.6
Simulation, STL	0.2	0.5	2.7	0.3 ms	2.7	0.3	0.5	0.2	7.1
Simulation, OBJ	0.2	0.6	2.9	0.4 ms	3.0	3.7	0.5	0.3	11.1
Visual, GLB	0.2	0.5	2.7	0.5 ms	5.4	81 ms	0.7	0.3	9.9
Visual, OBJ	0.2	0.5	2.9	0.6 ms	4.9	2.6	0.8	0.2	12.2

Board Repo: danwerner21/TI99_22 Board: unicorn.kicad_pcb Folder unicornboard / unicorn Complexity 197 / 1000 (size 132, features 65) KESE features through vias, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 6, 281, 8 Triangles, simulation 666,686 in 57 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 22 MB 372 MB STEP 106 MB 417 MB STL 33 MB 373 MB OBJ 66 MB 470 MB Visual GLB 14 MB 408 MB OBJ 43 MB 402 MB

846. vic2020keyboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.2	6.4	0.7 ms	6.1	0.2	0.6	0.3	15.2
Simulation, STEP	0.4	1.3	6.3	0.9 ms	6.0	4.0	0.6	0.3	18.8
Simulation, STL	0.4	1.3	6.3	0.4 ms	5.8	0.4	0.6	0.3	15.0
Simulation, OBJ	0.4	1.2	6.3	0.6 ms	5.9	7.0	0.7	0.3	21.9
Visual, GLB	0.4	1.3	6.2	0.2 ms	10.6	0.1	1.1	0.3	20.0
Visual, OBJ	0.4	1.2	6.5	0.5 ms	10.3	4.3	1.3	0.3	24.3

Board Repo: danwerner21/vic2020 Board: vic2020keyboard.kicad_pcb Folder vic2020keyboard Complexity 223 / 1000 (size 168, features 55) KESE features through vias, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 68, 545, 19 Triangles, simulation 1,505,518 in 31 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 51 MB 549 MB STEP 232 MB 695 MB STL 75 MB 559 MB OBJ 156 MB 1.0 GB Visual GLB 31 MB 680 MB OBJ 94 MB 708 MB

847. Vic2020mainboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	7.8	41.6	2 ms	28.2	1.4	4.8	0.4	85.3
Simulation, STEP	1.0	7.6	42.0	2 ms	29.1	19.6	4.7	0.5	104.5
Simulation, STL	1.1	7.6	41.6	1 ms	30.8	3.0	5.3	0.4	89.9
Simulation, OBJ	1.1	7.9	44.3	0.9 ms	29.9	45.6	5.3	0.5	134.7
Visual, GLB	1.4	7.8	43.0	2 ms	66.1	0.8	6.4	0.4	125.7
Visual, OBJ	1.0	7.7	41.4	2 ms	65.5	25.5	5.8	0.3	147.3

Board Repo: danwerner21/vic2020 Board: Vic2020mainboard.kicad_pcb Folder vic2020mainboard Complexity 270 / 1000 (size 215, features 55) KESE features through vias, slotted holes, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 129, 5,946, 398 Triangles, simulation 6,529,804 in 197 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 225 MB 1.7 GB STEP 1.2 GB 2.3 GB STL 327 MB 1.8 GB OBJ 704 MB 4.2 GB Visual GLB 136 MB 2.2 GB OBJ 430 MB 2.8 GB

848. we816

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.2	6.7	44.3	1 ms	38.1	1.4	7.0	0.4	99.0
Simulation, STEP	1.4	6.5	47.7	1 ms	38.0	22.2	5.8	0.4	122.0
Simulation, STL	1.3	6.6	45.6	1 ms	38.2	2.9	6.5	0.4	101.5
Simulation, OBJ	1.3	6.5	45.5	1 ms	36.8	43.9	5.7	0.4	140.0
Visual, GLB	1.2	6.2	45.9	2 ms	80.1	0.7	7.2	0.3	141.8
Visual, OBJ	1.4	6.1	43.5	1 ms	80.3	24.2	7.3	0.3	163.0

Board Repo: danwerner21/we816 Board: we816.kicad_pcb Folder Hardware Complexity 287 / 1000 (size 212, features 75) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, drill offsets, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 130, 5,339, 183 Triangles, simulation 7,297,986 in 342 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 252 MB 2.0 GB STEP 1.4 GB 2.5 GB STL 365 MB 1.9 GB OBJ 797 MB 4.7 GB Visual GLB 144 MB 2.3 GB OBJ 462 MB 3.0 GB

849. AudioSID

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.3	7.5	0.7 ms	7.8	0.4	1.1	0.3	20.1
Simulation, STEP	0.5	2.2	7.1	0.7 ms	7.6	5.3	1.0	0.2	23.9
Simulation, STL	0.6	2.3	7.5	0.7 ms	7.9	0.6	1.1	0.2	20.2
Simulation, OBJ	0.6	2.3	7.3	1 ms	7.9	13.4	1.1	0.3	32.9
Visual, GLB	0.5	2.4	7.6	0.7 ms	12.2	0.2	1.4	0.2	24.5
Visual, OBJ	0.6	2.4	7.6	0.7 ms	12.7	6.2	1.3	0.2	31.1

Board Repo: ddraig68k/hardware Board: AudioSID.kicad_pcb Folder expansion / AudioSID Complexity 308 / 1000 (size 233, features 75) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 69, 754, 92 Triangles, simulation 2,551,884 in 130 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 85 MB 750 MB STEP 276 MB 911 MB STL 128 MB 723 MB OBJ 266 MB 1.7 GB Visual GLB 39 MB 859 MB OBJ 120 MB 933 MB

850. AudioYM2151

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.1	7.3	0.9 ms	7.3	0.4	1.1	0.3	19.1
Simulation, STEP	0.5	2.1	7.3	0.8 ms	7.1	5.5	1.1	0.3	23.8
Simulation, STL	0.7	1.8	7.2	0.7 ms	7.1	0.7	1.1	0.3	19.0
Simulation, OBJ	0.6	2.0	6.9	1 ms	7.2	11.1	1.1	0.3	29.0
Visual, GLB	0.6	1.9	6.8	1 ms	14.1	0.2	1.4	0.3	25.1
Visual, OBJ	0.6	1.9	6.9	0.7 ms	13.8	5.1	1.6	0.3	30.2

Board Repo: ddraig68k/hardware Board: AudioYM2151.kicad_pcb Folder expansion / AudioYM2151 Complexity 301 / 1000 (size 226, features 75) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 54, 666, 47 Triangles, simulation 2,254,706 in 163 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 76 MB 727 MB STEP 271 MB 866 MB STL 113 MB 734 MB OBJ 235 MB 1.5 GB Visual GLB 37 MB 838 MB OBJ 111 MB 876 MB

851. Eth8019

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.0	3.0	0.5 ms	3.4	0.2	0.5	0.2	8.6
Simulation, STEP	0.3	1.0	3.1	0.6 ms	3.3	2.7	0.5	0.2	11.2
Simulation, STL	0.3	1.0	3.1	0.6 ms	3.4	0.3	0.5	0.2	8.8
Simulation, OBJ	0.3	1.0	3.2	0.6 ms	3.4	5.8	0.5	0.2	14.4
Visual, GLB	0.3	1.0	3.0	0.6 ms	6.5	0.1	0.8	0.2	12.0
Visual, OBJ	0.3	0.9	3.2	0.6 ms	6.3	3.3	0.9	0.2	15.1

Board Repo: ddraig68k/hardware Board: Eth8019.kicad_pcb Folder expansion / Eth8019 Complexity 290 / 1000 (size 225, features 65) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 30, 734, 109 Triangles, simulation 1,182,046 in 138 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 40 MB 444 MB STEP 143 MB 523 MB STL 59 MB 483 MB OBJ 120 MB 804 MB Visual GLB 22 MB 589 MB OBJ 67 MB 581 MB

852. GfxTMS9918

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	2.3	7.3	0.5 ms	7.5	0.4	1.2	0.4	19.4
Simulation, STEP	0.5	2.2	7.0	0.8 ms	7.7	5.2	1.1	0.3	24.0
Simulation, STL	0.6	2.3	7.0	0.5 ms	7.7	0.7	1.1	0.2	19.7
Simulation, OBJ	0.4	2.3	7.2	0.4 ms	7.9	12.3	1.1	0.3	31.5
Visual, GLB	0.5	2.2	7.4	0.8 ms	12.9	0.2	1.5	0.3	24.9
Visual, OBJ	0.5	2.0	7.3	0.5 ms	13.0	5.3	1.6	0.3	29.9

Board Repo: ddraig68k/hardware Board: GfxTMS9918.kicad_pcb Folder expansion / GfxTMS9918 Complexity 280 / 1000 (size 225, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 33, 687, 120 Triangles, simulation 2,607,248 in 139 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 86 MB 756 MB STEP 276 MB 973 MB STL 130 MB 738 MB OBJ 272 MB 1.7 GB Visual GLB 38 MB 966 MB OBJ 117 MB 1.0 GB

853. GfxV9958

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	2.5	13.1	0.8 ms	13.0	0.5	1.5	0.3	31.6
Simulation, STEP	0.8	2.4	13.2	0.7 ms	13.3	8.4	1.5	0.3	39.9
Simulation, STL	0.7	2.4	13.4	1 ms	13.1	1.4	1.5	0.3	32.9
Simulation, OBJ	0.8	2.4	13.8	1.0 ms	13.2	17.2	1.7	0.3	49.5
Visual, GLB	0.7	2.5	14.1	1 ms	29.7	0.3	4.1	0.3	51.8
Visual, OBJ	0.8	2.5	13.5	1 ms	30.0	10.4	4.5	0.3	62.0

Board Repo: ddraig68k/hardware Board: GfxV9958.kicad_pcb Folder expansion / GfxV9958 Complexity 298 / 1000 (size 223, features 75) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 69, 1,045, 153 Triangles, simulation 3,196,584 in 176 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 107 MB 1.1 GB STEP 460 MB 1.3 GB STL 160 MB 1.1 GB OBJ 334 MB 2.0 GB Visual GLB 69 MB 1.2 GB OBJ 216 MB 1.4 GB

854. GfxV9990

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.6	5.1	1 ms	5.6	0.2	0.7	0.3	14.0
Simulation, STEP	0.4	1.6	4.8	0.8 ms	5.5	4.1	0.8	0.2	17.4
Simulation, STL	0.5	1.8	5.3	1 ms	5.8	0.5	0.8	0.2	14.8
Simulation, OBJ	0.5	1.7	5.4	1 ms	5.6	7.7	0.7	0.3	21.9
Visual, GLB	0.5	1.7	5.0	0.9 ms	11.0	0.2	1.3	0.3	19.9
Visual, OBJ	0.5	1.7	5.1	2 ms	11.3	4.5	1.4	0.2	24.6

Board Repo: ddraig68k/hardware Board: GfxV9990.kicad_pcb Folder expansion / GfxV9990 Complexity 331 / 1000 (size 256, features 75) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 70, 1,292, 182 Triangles, simulation 1,889,402 in 232 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 64 MB 644 MB STEP 237 MB 777 MB STL 94 MB 636 MB OBJ 195 MB 1.3 GB Visual GLB 37 MB 782 MB OBJ 114 MB 869 MB

855. GfxVGA

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.4	7.4	1 ms	7.5	0.3	1.2	0.3	19.5
Simulation, STEP	0.5	2.3	7.4	0.9 ms	7.6	5.9	1.2	0.3	25.2
Simulation, STL	0.6	2.3	7.3	1.0 ms	7.0	0.7	1.2	0.4	19.3
Simulation, OBJ	0.6	2.2	7.1	0.9 ms	7.3	10.9	1.1	0.3	29.4
Visual, GLB	0.5	2.3	7.0	0.5 ms	21.4	0.2	2.3	0.3	34.1
Visual, OBJ	0.5	2.2	7.3	0.5 ms	21.0	6.6	2.5	0.3	40.3

Board Repo: ddraig68k/hardware Board: GfxVGA.kicad_pcb Folder expansion / GfxVGA Complexity 294 / 1000 (size 209, features 85) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 96, 1,375, 250 Triangles, simulation 2,112,700 in 219 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 71 MB 739 MB STEP 264 MB 893 MB STL 106 MB 702 MB OBJ 221 MB 1.4 GB Visual GLB 45 MB 921 MB OBJ 139 MB 1.0 GB

856. JoypadController

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.0	6.3	0.7 ms	4.8	0.2	0.7	0.3	13.7
Simulation, STEP	0.3	1.0	6.0	0.6 ms	5.0	4.1	0.7	0.2	17.4
Simulation, STL	0.3	1.0	5.8	0.7 ms	5.1	0.4	0.7	0.3	13.6
Simulation, OBJ	0.3	1.0	5.9	0.5 ms	5.1	6.9	0.7	0.3	20.1
Visual, GLB	0.4	1.0	5.9	0.5 ms	10.8	0.1	1.4	0.2	19.8
Visual, OBJ	0.3	1.0	5.8	0.7 ms	10.9	4.7	1.4	0.3	24.5

Board Repo: ddraig68k/hardware Board: JoypadController.kicad_pcb Folder expansion / JoypadController Complexity 265 / 1000 (size 200, features 65) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 32, 421, 66 Triangles, simulation 1,511,678 in 115 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 49 MB 689 MB STEP 215 MB 703 MB STL 76 MB 677 MB OBJ 154 MB 979 MB Visual GLB 32 MB 658 MB OBJ 98 MB 746 MB

857. yddraig

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.6	14.0	48.7	3 ms	50.2	3.0	6.0	0.6	125.2
Simulation, STEP	2.5	13.6	48.5	3 ms	50.1	30.3	6.4	0.6	152.1
Simulation, STL	2.8	14.1	48.7	3 ms	50.3	6.8	6.0	0.6	129.2
Simulation, OBJ	2.7	13.6	47.8	4 ms	50.3	89.8	6.3	0.6	211.0
Visual, GLB	2.6	13.9	47.9	3 ms	95.8	1.1	14.1	0.5	175.9
Visual, OBJ	2.6	13.5	47.2	3 ms	96.1	35.9	13.9	0.5	209.7

Board Repo: ddraig68k/hardware Board: yddraig.kicad_pcb Folder yddraig Complexity 344 / 1000 (size 279, features 65) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 217, 4,848, 1,042 Triangles, simulation 16,082,112 in 493 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 540 MB 3.2 GB STEP 1.8 GB 4.5 GB STL 804 MB 3.5 GB OBJ 1.7 GB 10 GB Visual GLB 244 MB 4.0 GB OBJ 795 MB 5.2 GB

858. muon

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.6	2.3	0.3 ms	3.0	0.1	0.4	0.2	6.9
Simulation, STEP	0.3	0.6	2.3	0.2 ms	3.5	2.9	0.4	0.2	10.3
Simulation, STL	0.4	0.6	2.4	0.3 ms	3.0	0.2	0.4	0.3	7.2
Simulation, OBJ	0.3	0.6	2.3	0.3 ms	3.1	3.7	0.4	0.2	10.6
Visual, GLB	0.3	0.6	2.3	0.2 ms	6.8	0.1	0.7	0.2	11.1
Visual, OBJ	0.3	0.7	2.5	0.3 ms	6.6	2.9	0.7	0.3	13.9

Board Repo: Dekanova/muon-kbd Board: muon.kicad_pcb Folder pcb Complexity 298 / 1000 (size 203, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 55, 381, 50 Triangles, simulation 568,856 in 79 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 20 MB 347 MB STEP 108 MB 421 MB STL 28 MB 350 MB OBJ 58 MB 436 MB Visual GLB 17 MB 474 MB OBJ 50 MB 481 MB

859. FC_REV_A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	4.3	17.1	1 ms	15.3	0.7	1.9	0.3	40.5
Simulation, STEP	0.8	4.2	17.3	0.8 ms	15.2	9.5	1.8	0.3	49.2
Simulation, STL	0.8	4.2	17.1	0.8 ms	15.3	1.4	1.7	0.3	40.8
Simulation, OBJ	1.0	4.2	17.2	1.0 ms	15.3	20.5	2.0	0.3	60.6
Visual, GLB	0.9	4.1	17.1	1 ms	30.0	0.4	3.9	0.2	56.7
Visual, OBJ	0.9	4.2	17.2	1 ms	29.3	10.6	3.5	0.3	65.9

Board Repo: desanv01/flight-controller-v1 Board: FC_REV_A.kicad_pcb Folder fabrication / jlcpcb / source / hardware Complexity 342 / 1000 (size 287, features 55) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 6 File format KiCad 10 (20260206) Parts, tracks, vias 311, 3,989, 531 Triangles, simulation 4,674,492 in 318 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 162 MB 1.2 GB STEP 672 MB 1.7 GB STL 234 MB 1.2 GB OBJ 503 MB 3.1 GB Visual GLB 81 MB 1.4 GB OBJ 265 MB 1.8 GB

860. stm32_board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.2	1 ms	1.4	50 ms	0.2	0.3	3.6
Simulation, STEP	0.2	0.3	1.1	0.5 ms	1.5	1.6	0.2	0.2	5.1
Simulation, STL	0.2	0.3	1.2	0.2 ms	1.5	80 ms	0.2	0.2	3.7
Simulation, OBJ	0.3	0.4	1.2	0.2 ms	1.6	1.7	0.2	0.3	5.6
Visual, GLB	0.2	0.3	1.2	0.2 ms	2.6	43 ms	0.3	0.3	4.9
Visual, OBJ	0.2	0.3	1.1	0.2 ms	2.4	1.1	0.2	0.3	5.4

Board Repo: devnithw/stm32-devboard Board: stm32_board.kicad_pcb Complexity 280 / 1000 (size 185, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 28, 198, 23 Triangles, simulation 249,750 in 58 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.5 MB 233 MB STEP 38 MB 255 MB STL 12 MB 230 MB OBJ 25 MB 234 MB Visual GLB 6.5 MB 237 MB OBJ 19 MB 237 MB

861. DDR4_8GB_UDIMM

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.5	13.6	20.5	2 ms	38.8	2.6	5.5	0.5	83.9
Simulation, STEP	2.3	13.1	19.9	1 ms	39.0	21.9	5.6	0.5	102.3
Simulation, STL	2.3	13.1	20.3	2 ms	40.3	5.7	5.8	0.5	88.1
Simulation, OBJ	2.4	13.3	20.4	0.8 ms	39.6	92.7	6.1	0.5	175.0
Visual, GLB	2.6	13.7	20.1	0.9 ms	65.9	0.9	9.0	0.4	112.6
Visual, OBJ	2.1	13.1	20.0	1 ms	66.2	30.5	8.9	0.3	141.2

Board Repo: dganin-hw/ddr4-8gb-udimm Board: DDR4_8GB_UDIMM.kicad_pcb Folder kicad Complexity 478 / 1000 (size 348, features 130) KESE features through vias, covered, plugged, capped or filled vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 10 File format KiCad 10 (20260206) Parts, tracks, vias 306, 11,005, 1,577 Triangles, simulation 13,736,090 in 319 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 453 MB 2.9 GB STEP 1.1 GB 4.0 GB STL 687 MB 2.8 GB OBJ 1.5 GB 8.5 GB Visual GLB 180 MB 3.1 GB OBJ 601 MB 3.8 GB

862. dfb1_r5

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	5.5	22.4	2 ms	20.9	1.1	4.8	0.4	55.9
Simulation, STEP	0.8	5.9	25.8	1 ms	26.7	25.2	6.2	0.5	91.0
Simulation, STL	1.1	8.2	30.8	3 ms	28.4	3.0	6.6	0.5	78.5
Simulation, OBJ	1.0	8.3	31.7	1 ms	29.8	42.3	5.2	0.5	118.7
Visual, GLB	0.9	6.8	27.2	2 ms	47.7	0.4	4.7	0.4	88.0
Visual, OBJ	0.7	5.4	24.4	1 ms	44.6	16.6	5.3	0.3	97.4

Board Repo: dh219/DFB Board: dfb1_r5.kicad_pcb Folder DFB1 / kicad5 / dfb1_r5 Complexity 334 / 1000 (size 264, features 70) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 79, 3,144, 369 Triangles, simulation 5,193,380 in 255 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 175 MB 1.5 GB STEP 634 MB 1.7 GB STL 260 MB 1.5 GB OBJ 548 MB 3.3 GB Visual GLB 87 MB 1.5 GB OBJ 273 MB 1.8 GB

863. laptop_kbrd

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	0.8	0.1	0.1 ms	16 ms	2 ms	2 ms	0.2	1.8
Simulation, STEP	0.5	0.8	0.1	0.1 ms	10 ms	10 ms	2 ms	0.2	1.6
Simulation, STL	0.5	0.8	0.1	0.1 ms	11 ms	1 ms	2 ms	0.2	1.6
Simulation, OBJ	0.5	0.9	0.2	0.2 ms	12 ms	4 ms	2 ms	0.3	1.8
Visual, GLB	0.4	0.8	0.1	0.1 ms	25 ms	1 ms	10 ms	0.2	1.6
Visual, OBJ	0.5	0.8	0.1	0.1 ms	20 ms	3 ms	8 ms	0.2	1.7

Board Repo: dileepvr/novenaX_kicad Board: laptop_kbrd.kicad_pcb Complexity 288 / 1000 (size 263, features 25) KESE features through vias, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 143, 3,347, 349 Triangles, simulation 536 in 3 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 18 kB 89 MB STEP 126 kB 88 MB STL 27 kB 89 MB OBJ 50 kB 87 MB Visual GLB 24 kB 88 MB OBJ 50 kB 87 MB

864. Piunora

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	10.3	3.4	10.9	0.5 ms	11.3	0.6	1.2	0.6	38.3
Simulation, STEP	9.7	3.2	10.6	1 ms	11.3	6.7	1.7	0.5	43.8
Simulation, STL	9.5	3.2	10.7	1 ms	11.2	1.0	1.2	0.5	37.1
Simulation, OBJ	10.0	3.2	10.7	1 ms	11.3	16.8	1.2	0.4	53.7
Visual, GLB	9.9	3.1	10.8	1.0 ms	26.7	0.3	2.9	0.5	54.3
Visual, OBJ	10.4	3.4	11.0	0.5 ms	26.5	11.2	3.0	0.5	66.0

Board Repo: Diodes-Delight/Piunora-Hardware Board: Piunora.kicad_pcb Folder KiCad Complexity 274 / 1000 (size 214, features 60) KESE features microvias, rounded, trapezoid or chamfered pads, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 67, 2,148, 570 Triangles, simulation 2,836,050 in 130 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 97 MB 1.3 GB STEP 318 MB 1.5 GB STL 142 MB 1.3 GB OBJ 299 MB 2.2 GB Visual GLB 62 MB 1.5 GB OBJ 194 MB 1.7 GB

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