Corpus Testing 17

Corpus Page 17

Part 17 of 29 of Corpus Testing: boards 1,729 to 1,836, six runs each, one file format a run, as Corpus Testing describes.

1729. uMyriad7002-append

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	2.3	1.0	0.6 ms	0.5	13 ms	23 ms	0.3	5.0
Simulation, STEP	0.8	2.3	0.9	0.8 ms	0.4	0.7	20 ms	0.3	5.4
Simulation, STL	0.9	2.2	0.9	0.7 ms	0.4	15 ms	24 ms	0.2	4.6
Simulation, OBJ	0.7	2.3	1.0	0.7 ms	0.4	0.3	20 ms	0.2	4.9
Visual, GLB	0.9	2.3	1.0	0.5 ms	0.5	9 ms	54 ms	0.3	5.0
Visual, OBJ	0.8	2.2	1.0	0.6 ms	0.5	0.2	51 ms	0.2	5.0

Board Repo: myriadrf/reference-development-kit Board: uMyriad7002-append.kicad_pcb Folder umyriadrf-7002 / v2 / KiCAD Complexity 333 / 1000 (size 298, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 8 File format KiCad 3 (3) Parts, tracks, vias 272, 3,360, 701 Triangles, simulation 55,824 in 16 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 1.6 MB 223 MB STEP 6.6 MB 227 MB STL 2.8 MB 224 MB OBJ 5.5 MB 230 MB Visual GLB 1.4 MB 230 MB OBJ 4.5 MB 225 MB

1730. uMyriad7002

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	1.3	0.5	0.3 ms	0.1	4 ms	12 ms	0.2	2.7
Simulation, STEP	0.6	1.3	0.5	0.2 ms	0.1	0.1	14 ms	0.2	2.8
Simulation, STL	0.6	1.3	0.5	0.2 ms	99 ms	4 ms	12 ms	0.2	2.8
Simulation, OBJ	0.6	1.3	0.5	0.3 ms	0.1	76 ms	13 ms	0.2	2.8
Visual, GLB	0.6	1.4	0.5	0.2 ms	0.3	5 ms	27 ms	0.2	3.0
Visual, OBJ	0.6	1.3	0.5	0.3 ms	0.3	51 ms	18 ms	0.2	3.0

Board Repo: myriadrf/reference-development-kit Board: uMyriad7002.kicad_pcb Folder umyriadrf-7002 / v2 / KiCAD Complexity 314 / 1000 (size 279, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 8 File format KiCad 3 (3) Parts, tracks, vias 177, 2,058, 436 Triangles, simulation 11,772 in 16 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 359 kB 104 MB STEP 1.5 MB 105 MB STL 590 kB 105 MB OBJ 1.2 MB 106 MB Visual GLB 340 kB 104 MB OBJ 959 kB 105 MB

1731. Zipper

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	8.6	25.9	2 ms	28.0	1.3	4.2	0.4	69.9
Simulation, STEP	1.2	7.9	25.0	1 ms	27.7	14.4	4.4	0.4	81.0
Simulation, STL	1.3	7.9	26.1	2 ms	29.2	3.4	4.4	0.4	72.8
Simulation, OBJ	1.4	8.3	26.0	1 ms	28.5	43.2	4.1	0.4	111.9
Visual, GLB	1.3	8.4	25.3	2 ms	57.4	0.7	7.5	0.3	101.1
Visual, OBJ	1.4	8.2	25.8	2 ms	56.9	24.7	7.6	0.3	124.9

Board Repo: myriadrf/reference-development-kit Board: Zipper.kicad_pcb Folder zipper / hardware / v2 / KiCAD Complexity 350 / 1000 (size 295, features 55) KESE features through vias, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 6 File format KiCad 3 (3) Parts, tracks, vias 173, 3,620, 614 Triangles, simulation 7,391,440 in 297 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 251 MB 2.3 GB STEP 764 MB 2.7 GB STL 370 MB 2.2 GB OBJ 786 MB 4.6 GB Visual GLB 137 MB 2.3 GB OBJ 446 MB 2.9 GB

1732. Stream

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.4	6.8	3.4	0.4 ms	0.2	7 ms	13 ms	0.3	13.1
Simulation, STEP	2.4	6.9	3.4	0.1 ms	0.2	0.3	12 ms	0.2	13.4
Simulation, STL	2.3	6.9	3.3	0.1 ms	0.2	11 ms	13 ms	0.3	13.1
Simulation, OBJ	2.3	6.9	3.6	0.2 ms	0.3	0.3	18 ms	0.3	13.7
Visual, GLB	2.5	7.3	3.5	0.1 ms	0.6	8 ms	33 ms	0.3	14.2
Visual, OBJ	2.5	7.1	3.4	0.1 ms	0.5	0.2	27 ms	0.3	13.9

Board Repo: myriadrf/STREAM Board: Stream.kicad_pcb Folder hardware / STREAM / v2 / v2r1 / KiCAD Complexity 402 / 1000 (size 357, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 12 File format KiCad 3 (3) Parts, tracks, vias 695, 10,937, 1,470 Triangles, simulation 41,954 in 20 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 1.2 MB 416 MB STEP 3.4 MB 414 MB STL 2.1 MB 419 MB OBJ 4.2 MB 421 MB Visual GLB 931 kB 417 MB OBJ 3.2 MB 414 MB

1733. uSTREAM

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.4	3.6	1.5	0.4 ms	0.2	6 ms	14 ms	0.2	6.9
Simulation, STEP	1.5	3.5	1.5	0.1 ms	0.2	0.2	20 ms	0.2	7.1
Simulation, STL	1.4	3.6	1.6	0.4 ms	0.2	8 ms	16 ms	0.2	7.0
Simulation, OBJ	1.4	3.5	1.4	0.1 ms	0.2	0.2	17 ms	0.2	6.8
Visual, GLB	1.4	3.7	1.6	0.1 ms	0.5	7 ms	32 ms	0.2	7.5
Visual, OBJ	1.5	3.6	1.6	0.2 ms	0.6	0.1	33 ms	0.2	7.7

Board Repo: myriadrf/STREAM Board: uSTREAM.kicad_pcb Folder hardware / uSTREAM / v2 / KiCAD Complexity 379 / 1000 (size 334, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 12 File format KiCad 3 (3) Parts, tracks, vias 346, 5,344, 992 Triangles, simulation 28,340 in 20 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 832 kB 282 MB STEP 3.5 MB 281 MB STL 1.4 MB 282 MB OBJ 2.9 MB 282 MB Visual GLB 755 kB 281 MB OBJ 2.3 MB 281 MB

1734. Vivaldi

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	96 ms	33 ms	42 ms	0.1 ms	0.1	3 ms	11 ms	0.2	0.5
Simulation, STEP	82 ms	27 ms	34 ms	0.1 ms	0.1	95 ms	11 ms	0.4	0.7
Simulation, STL	73 ms	24 ms	32 ms	0.1 ms	0.1	5 ms	18 ms	0.2	0.5
Simulation, OBJ	72 ms	25 ms	35 ms	0.1 ms	0.1	50 ms	14 ms	0.3	0.6
Visual, GLB	75 ms	26 ms	32 ms	0.1 ms	0.2	4 ms	51 ms	0.3	0.7
Visual, OBJ	74 ms	26 ms	57 ms	0.1 ms	0.3	49 ms	35 ms	0.2	0.7

Board Repo: myriadrf/vivaldi-antenna Board: Vivaldi.kicad_pcb Folder hardware / KiCAD Complexity 98 / 1000 (size 63, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 1, 4, 2 Triangles, simulation 9,304 in 10 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 331 kB 62 MB STEP 2.0 MB 62 MB STL 466 kB 62 MB OBJ 845 kB 62 MB Visual GLB 302 kB 83 MB OBJ 772 kB 84 MB

1735. Yellow

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.9	9.3	31.4	1 ms	24.0	1.2	3.6	0.3	71.7
Simulation, STEP	2.0	9.1	31.9	1 ms	24.1	15.0	3.6	0.4	86.1
Simulation, STL	2.0	9.0	32.7	2 ms	24.0	2.3	3.4	0.3	73.7
Simulation, OBJ	1.9	9.1	31.8	1 ms	23.4	41.2	3.7	0.3	111.3
Visual, GLB	2.1	9.2	31.9	2 ms	58.6	0.7	7.6	0.3	110.3
Visual, OBJ	1.9	9.1	31.1	0.9 ms	57.7	26.8	7.0	0.3	133.9

Board Repo: NabuCasa/yellow Board: Yellow.kicad_pcb Complexity 441 / 1000 (size 291, features 150) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 280, 3,463, 1,961 Triangles, simulation 6,590,014 in 390 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 222 MB 2.2 GB STEP 788 MB 2.6 GB STL 330 MB 2.4 GB OBJ 695 MB 4.2 GB Visual GLB 159 MB 2.5 GB OBJ 511 MB 3.4 GB

1736. keyboard_system

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.5	1.7	0.2 ms	2.0	86 ms	0.3	0.3	5.2
Simulation, STEP	0.3	0.5	1.6	0.2 ms	1.9	1.6	0.3	0.2	6.4
Simulation, STL	0.3	0.5	1.5	0.2 ms	2.0	0.1	0.3	0.2	4.8
Simulation, OBJ	0.3	0.5	1.6	0.3 ms	1.8	2.8	0.3	0.2	7.5
Visual, GLB	0.3	0.5	1.6	0.3 ms	4.3	56 ms	0.5	0.2	7.6
Visual, OBJ	0.3	0.5	1.5	0.2 ms	4.1	1.8	0.6	0.2	9.0

Board Repo: nalgonda-tiger/vohm Board: keyboard_system.kicad_pcb Folder keyboard_system Complexity 327 / 1000 (size 217, features 110) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 34, 433, 59 Triangles, simulation 574,658 in 55 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 20 MB 316 MB STEP 84 MB 393 MB STL 29 MB 316 MB OBJ 59 MB 436 MB Visual GLB 16 MB 409 MB OBJ 47 MB 423 MB

1737. LattePandaMu_Motherboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.6	5.7	22.3	2 ms	30.8	0.9	2.9	0.4	64.4
Simulation, STEP	1.7	5.4	21.6	2 ms	29.3	13.1	2.8	0.3	74.2
Simulation, STL	1.5	5.9	22.5	2 ms	29.3	1.7	2.9	0.4	64.2
Simulation, OBJ	1.6	5.8	22.1	2 ms	29.4	23.7	3.2	0.3	86.0
Visual, GLB	1.7	6.0	22.5	3 ms	45.8	0.5	6.1	0.3	83.0
Visual, OBJ	1.8	5.9	23.6	2 ms	44.9	15.9	6.5	0.4	99.0

Board Repo: nalgonda-tiger/vohm Board: LattePandaMu_Motherboard.kicad_pcb Folder LattePandaMu_Motherboard-Main Complexity 413 / 1000 (size 278, features 135) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 305, 4,033, 724 Triangles, simulation 4,431,648 in 487 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 153 MB 1.4 GB STEP 679 MB 1.9 GB STL 222 MB 1.5 GB OBJ 478 MB 2.9 GB Visual GLB 110 MB 1.8 GB OBJ 350 MB 2.3 GB

1738. NewAudio_System

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.2	5.5	0.6 ms	7.6	0.2	0.6	0.2	15.8
Simulation, STEP	0.5	1.1	5.4	0.6 ms	7.6	4.3	0.5	0.2	19.6
Simulation, STL	0.5	1.1	5.5	0.7 ms	7.9	0.5	0.6	0.2	16.4
Simulation, OBJ	0.5	1.2	5.6	0.5 ms	7.6	6.3	0.6	0.2	22.1
Visual, GLB	0.5	1.3	5.5	0.6 ms	11.3	0.1	1.3	0.2	20.3
Visual, OBJ	0.5	1.2	5.4	0.4 ms	11.8	4.7	1.3	0.2	25.2

Board Repo: nalgonda-tiger/vohm Board: NewAudio_System.kicad_pcb Folder NewAudio_System Complexity 307 / 1000 (size 212, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 198, 1,101, 188 Triangles, simulation 1,635,412 in 155 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 56 MB 661 MB STEP 276 MB 792 MB STL 82 MB 642 MB OBJ 171 MB 1.1 GB Visual GLB 40 MB 734 MB OBJ 123 MB 878 MB

1739. webcam_microphone_system

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	0.7	2.1	0.3 ms	2.9	0.1	0.4	0.3	7.0
Simulation, STEP	0.4	0.7	2.2	0.3 ms	2.9	2.6	0.4	0.2	9.3
Simulation, STL	0.4	0.6	2.1	0.3 ms	2.9	0.2	0.4	0.2	6.9
Simulation, OBJ	0.4	0.6	2.3	0.3 ms	3.1	4.1	0.4	0.2	11.1
Visual, GLB	0.4	0.7	2.1	0.4 ms	5.8	86 ms	0.6	0.2	9.9
Visual, OBJ	0.4	0.6	2.1	0.4 ms	5.9	2.9	0.7	0.2	12.8

Board Repo: nalgonda-tiger/vohm Board: webcam_microphone_system.kicad_pcb Folder webcam_microphone_system Complexity 353 / 1000 (size 228, features 125) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 61, 593, 73 Triangles, simulation 696,602 in 95 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 24 MB 365 MB STEP 106 MB 430 MB STL 35 MB 367 MB OBJ 71 MB 509 MB Visual GLB 17 MB 484 MB OBJ 52 MB 475 MB

1740. PQ_ADCS

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.2	3.7	0.3 ms	3.8	0.2	0.7	0.3	10.2
Simulation, STEP	0.4	1.2	3.7	0.4 ms	4.0	3.1	0.7	0.2	13.3
Simulation, STL	0.3	1.2	3.8	0.4 ms	4.1	0.3	0.6	0.2	10.6
Simulation, OBJ	0.4	1.3	3.8	0.4 ms	4.1	6.9	0.6	0.2	17.3
Visual, GLB	0.4	1.1	3.7	0.4 ms	8.5	0.1	0.9	0.2	14.8
Visual, OBJ	0.4	1.1	3.5	0.5 ms	8.3	4.1	1.1	0.3	18.7

Board Repo: nanosatlab/pocat-hw Board: PQ_ADCS.kicad_pcb Folder pq_adcs / PQ_ADCS Complexity 296 / 1000 (size 196, features 100) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 7 (20221018) Parts, tracks, vias 45, 603, 89 Triangles, simulation 1,290,194 in 93 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 43 MB 503 MB STEP 171 MB 593 MB STL 65 MB 496 MB OBJ 132 MB 871 MB Visual GLB 26 MB 638 MB OBJ 79 MB 603 MB

1741. PQ_ADCS

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.5	4.9	0.4 ms	4.9	0.2	0.7	0.2	12.9
Simulation, STEP	0.4	1.3	4.7	0.7 ms	4.9	3.6	0.6	0.3	15.9
Simulation, STL	0.4	1.3	4.7	0.4 ms	4.9	0.5	0.7	0.3	12.8
Simulation, OBJ	0.4	1.4	4.7	0.4 ms	4.9	8.1	0.7	0.2	20.3
Visual, GLB	0.4	1.3	4.8	0.4 ms	10.2	0.2	1.0	0.3	18.2
Visual, OBJ	0.4	1.4	4.8	0.4 ms	9.7	4.7	1.2	0.2	22.5

Board Repo: nanosatlab/pocat-hw Board: PQ_ADCS.kicad_pcb Folder pq_adcs / PQ_ADCS_HBridge Complexity 302 / 1000 (size 202, features 100) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 10 (20260206) Parts, tracks, vias 56, 779, 123 Triangles, simulation 1,549,468 in 103 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 52 MB 532 MB STEP 204 MB 653 MB STL 77 MB 532 MB OBJ 160 MB 1.1 GB Visual GLB 31 MB 674 MB OBJ 93 MB 724 MB

1742. PQ_BotBoard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	1.5	3.7	0.2 ms	6.2	0.2	0.5	0.3	13.2
Simulation, STEP	0.9	1.5	3.6	0.2 ms	6.0	3.8	0.5	0.2	16.5
Simulation, STL	0.9	1.5	3.6	0.2 ms	6.0	0.3	0.5	0.3	13.1
Simulation, OBJ	0.9	1.5	3.4	0.3 ms	6.2	5.2	0.5	0.2	17.9
Visual, GLB	1.0	1.6	3.6	0.2 ms	8.4	0.1	0.9	0.3	15.8
Visual, OBJ	0.8	1.5	3.7	0.2 ms	8.5	3.7	0.9	0.2	19.3

Board Repo: nanosatlab/pocat-hw Board: PQ_BotBoard.kicad_pcb Folder pq_botboard / PQ_BotBoard Complexity 279 / 1000 (size 189, features 90) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 10 (20260206) Parts, tracks, vias 21, 808, 57 Triangles, simulation 861,722 in 44 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 31 MB 448 MB STEP 120 MB 514 MB STL 43 MB 459 MB OBJ 90 MB 661 MB Visual GLB 22 MB 564 MB OBJ 66 MB 537 MB

1743. PQ_Botnotsobot

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	0.9	1.6	0.2 ms	4.1	90 ms	0.2	0.2	8.0
Simulation, STEP	0.7	0.9	1.6	0.1 ms	4.1	3.2	0.2	0.2	10.8
Simulation, STL	0.8	1.0	1.6	0.2 ms	4.3	0.2	0.2	0.3	8.4
Simulation, OBJ	0.7	0.9	1.5	0.1 ms	3.9	2.4	0.2	0.2	9.9
Visual, GLB	0.8	0.9	1.7	0.1 ms	4.7	66 ms	0.4	0.2	8.9
Visual, OBJ	0.7	0.9	1.9	0.2 ms	4.3	2.4	0.7	0.2	11.2

Board Repo: nanosatlab/pocat-hw Board: PQ_Botnotsobot.kicad_pcb Folder pq_botnotsobot / PQ_Botnotsobot Complexity 84 / 1000 (size 29, features 55) KESE features copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 2, 0, 0 Triangles, simulation 363,220 in 21 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 366 MB STEP 54 MB 368 MB STL 18 MB 367 MB OBJ 40 MB 367 MB Visual GLB 13 MB 382 MB OBJ 37 MB 338 MB

1744. EGSE

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.0	8.5	25.5	0.7 ms	22.6	1.3	3.4	0.4	64.6
Simulation, STEP	2.9	8.9	26.0	0.8 ms	22.7	14.8	3.2	0.4	78.9
Simulation, STL	3.0	8.7	25.2	1 ms	21.7	2.1	2.9	0.4	64.1
Simulation, OBJ	2.8	8.4	24.7	1 ms	21.8	38.5	3.0	0.3	99.6
Visual, GLB	2.9	8.5	24.3	1 ms	43.4	0.6	4.5	0.3	84.6
Visual, OBJ	3.1	8.4	24.7	2 ms	45.0	19.6	5.0	0.3	106.1

Board Repo: nanosatlab/pocat-hw Board: EGSE.kicad_pcb Folder pq_egse Complexity 323 / 1000 (size 223, features 100) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 6 File format KiCad 7 (20221018) Parts, tracks, vias 104, 2,243, 172 Triangles, simulation 7,126,428 in 99 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 241 MB 1.9 GB STEP 746 MB 2.4 GB STL 356 MB 1.9 GB OBJ 760 MB 4.6 GB Visual GLB 123 MB 2.0 GB OBJ 386 MB 2.5 GB

1745. PQ_EPS

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	0.8	3.1	0.5 ms	3.3	0.2	0.5	0.2	8.4
Simulation, STEP	0.3	0.8	3.3	0.4 ms	3.2	2.5	0.5	0.2	10.9
Simulation, STL	0.4	0.8	3.1	0.5 ms	3.3	0.4	0.5	0.2	8.7
Simulation, OBJ	0.4	0.8	3.1	0.6 ms	3.2	4.9	0.5	0.2	13.1
Visual, GLB	0.4	0.9	3.1	0.5 ms	7.8	0.1	0.9	0.3	13.4
Visual, OBJ	0.3	0.8	3.1	0.5 ms	7.6	3.3	1.1	0.2	16.4

Board Repo: nanosatlab/pocat-hw Board: PQ_EPS.kicad_pcb Folder pq_eps / PQ_EPS Complexity 280 / 1000 (size 190, features 90) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 82, 475, 96 Triangles, simulation 1,126,386 in 91 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 38 MB 538 MB STEP 167 MB 584 MB STL 56 MB 508 MB OBJ 114 MB 807 MB Visual GLB 26 MB 658 MB OBJ 80 MB 661 MB

1746. PQ_Lat_Board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	1.1	2.1	0.3 ms	4.8	0.1	0.3	0.3	9.5
Simulation, STEP	0.7	1.1	1.9	0.6 ms	4.6	3.4	0.3	0.3	12.4
Simulation, STL	0.7	1.0	1.9	0.2 ms	4.9	0.2	0.3	0.3	9.2
Simulation, OBJ	0.7	1.1	1.9	0.2 ms	4.5	2.8	0.3	0.3	11.5
Visual, GLB	0.7	1.0	2.1	0.2 ms	5.5	67 ms	0.6	0.2	10.2
Visual, OBJ	0.7	1.0	1.9	0.3 ms	5.4	2.3	0.7	0.3	12.3

Board Repo: nanosatlab/pocat-hw Board: PQ_Lat_Board.kicad_pcb Folder pq_latboard / PQ_Lat_Board Complexity 260 / 1000 (size 180, features 80) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 10 (20260206) Parts, tracks, vias 14, 670, 19 Triangles, simulation 554,510 in 30 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 20 MB 417 MB STEP 80 MB 413 MB STL 28 MB 417 MB OBJ 60 MB 466 MB Visual GLB 16 MB 459 MB OBJ 47 MB 419 MB

1747. PQ_Lat_Board_Deploy

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	0.9	1.9	0.3 ms	3.6	90 ms	0.3	0.2	7.7
Simulation, STEP	0.6	0.9	1.9	0.2 ms	3.8	2.7	0.3	0.2	10.3
Simulation, STL	0.6	0.9	1.9	0.2 ms	3.6	0.2	0.2	0.2	7.7
Simulation, OBJ	0.6	0.9	1.9	0.2 ms	3.9	2.5	0.2	0.2	10.3
Visual, GLB	0.6	0.9	1.9	0.2 ms	4.7	71 ms	0.5	0.2	8.9
Visual, OBJ	0.6	1.0	1.9	0.3 ms	5.0	2.1	0.8	0.2	11.6

Board Repo: nanosatlab/pocat-hw Board: PQ_Lat_Board_Deploy.kicad_pcb Folder pq_latboard_deploy Complexity 271 / 1000 (size 181, features 90) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 10 (20260206) Parts, tracks, vias 14, 675, 21 Triangles, simulation 593,064 in 29 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 22 MB 421 MB STEP 84 MB 439 MB STL 30 MB 418 MB OBJ 64 MB 491 MB Visual GLB 17 MB 418 MB OBJ 49 MB 412 MB

1748. pq_obc_comms

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.8	3.5	0.4 ms	3.9	0.2	0.6	0.3	9.5
Simulation, STEP	0.3	0.8	3.3	0.4 ms	3.9	3.0	0.5	0.3	12.1
Simulation, STL	0.3	0.8	3.4	0.4 ms	3.9	0.4	0.6	0.2	9.7
Simulation, OBJ	0.3	0.8	3.5	0.4 ms	4.0	5.2	0.5	0.2	14.6
Visual, GLB	0.3	0.8	3.5	0.7 ms	8.4	0.1	0.9	0.3	14.2
Visual, OBJ	0.3	0.8	3.5	0.6 ms	8.6	3.3	0.9	0.2	17.6

Board Repo: nanosatlab/pocat-hw Board: pq_obc_comms.kicad_pcb Folder pq_obc_comms / pq_obc_comms Complexity 346 / 1000 (size 231, features 115) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 68, 538, 131 Triangles, simulation 1,237,286 in 105 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 42 MB 526 MB STEP 194 MB 606 MB STL 62 MB 510 MB OBJ 127 MB 855 MB Visual GLB 28 MB 708 MB OBJ 85 MB 738 MB

1749. PQ_PL1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	97 ms	0.2	1.0	0.2 ms	0.9	47 ms	0.2	0.2	2.6
Simulation, STEP	97 ms	0.2	1.0	0.2 ms	0.9	1.1	0.2	0.2	3.6
Simulation, STL	0.1	0.2	1.0	0.3 ms	0.9	70 ms	0.2	0.2	2.6
Simulation, OBJ	0.1	0.2	1.0	0.2 ms	0.9	1.3	0.2	0.2	3.8
Visual, GLB	97 ms	0.2	1.0	0.2 ms	2.4	33 ms	0.3	0.2	4.1
Visual, OBJ	92 ms	0.2	1.0	0.2 ms	2.4	1.0	0.3	0.2	5.1

Board Repo: nanosatlab/pocat-hw Board: PQ_PL1.kicad_pcb Folder pq_pl1 / PQ_PL1 Complexity 139 / 1000 (size 74, features 65) KESE features filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 5, 9, 0 Triangles, simulation 341,986 in 49 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 255 MB STEP 52 MB 272 MB STL 17 MB 258 MB OBJ 34 MB 260 MB Visual GLB 8.0 MB 266 MB OBJ 23 MB 265 MB

1750. PCB_P L2_PCB_2022-10-05

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.1	3.3	0.4 ms	3.1	0.1	0.4	0.2	8.7
Simulation, STEP	0.3	1.1	3.2	0.3 ms	3.0	2.2	0.4	0.2	10.6
Simulation, STL	0.4	1.0	3.2	0.3 ms	3.0	0.2	0.4	0.2	8.4
Simulation, OBJ	0.3	1.1	3.3	0.3 ms	3.1	3.9	0.4	0.2	12.3
Visual, GLB	0.4	1.1	3.4	0.4 ms	6.9	56 ms	0.5	0.2	12.5
Visual, OBJ	0.3	1.2	3.2	0.3 ms	6.9	2.0	0.6	0.2	14.4

Board Repo: nanosatlab/pocat-hw Board: PCB_P L2_PCB_2022-10-05.kicad_pcb Folder pq_pl2 / Imports Complexity 261 / 1000 (size 181, features 80) KESE features through vias, slotted holes, custom pads, filled zones, copper drawings, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 66, 267, 78 Triangles, simulation 791,228 in 117 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 27 MB 400 MB STEP 134 MB 458 MB STL 40 MB 393 MB OBJ 80 MB 571 MB Visual GLB 14 MB 450 MB OBJ 42 MB 407 MB

1751. PQ_PL2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	1.5	4.5	0.7 ms	4.5	0.2	0.5	0.2	12.4
Simulation, STEP	0.9	1.6	4.5	0.6 ms	4.7	3.0	0.5	0.2	15.4
Simulation, STL	0.9	1.7	4.5	0.6 ms	4.5	0.4	0.5	0.2	12.8
Simulation, OBJ	0.9	1.5	4.7	0.5 ms	4.7	6.5	0.5	0.3	19.1
Visual, GLB	0.9	1.5	4.6	0.4 ms	9.4	0.1	1.1	0.2	17.8
Visual, OBJ	0.9	1.5	4.8	0.6 ms	9.5	4.8	1.4	0.2	23.2

Board Repo: nanosatlab/pocat-hw Board: PQ_PL2.kicad_pcb Folder pq_pl2 / PQ_PL2 Complexity 319 / 1000 (size 189, features 130) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 72, 364, 136 Triangles, simulation 1,196,648 in 104 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 42 MB 510 MB STEP 159 MB 662 MB STL 60 MB 510 MB OBJ 125 MB 856 MB Visual GLB 30 MB 599 MB OBJ 90 MB 728 MB

1752. PQ1_TopBoard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	1.1	2.5	0.2 ms	4.5	77 ms	0.2	0.2	9.5
Simulation, STEP	0.8	1.0	2.4	0.2 ms	4.5	3.3	0.2	0.2	12.4
Simulation, STL	0.8	1.0	2.5	0.1 ms	4.8	0.3	0.2	0.3	9.8
Simulation, OBJ	0.8	1.0	2.5	0.2 ms	4.7	2.5	0.2	0.3	11.9
Visual, GLB	0.8	1.0	2.6	0.2 ms	4.8	77 ms	0.4	0.2	9.9
Visual, OBJ	0.8	1.0	2.7	0.2 ms	4.8	2.4	0.6	0.2	12.5

Board Repo: nanosatlab/pocat-hw Board: PQ1_TopBoard.kicad_pcb Folder pq_topboard / PQ1_TopBoard Complexity 211 / 1000 (size 121, features 90) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 10, 64, 17 Triangles, simulation 405,998 in 22 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 390 MB STEP 66 MB 397 MB STL 20 MB 387 MB OBJ 44 MB 388 MB Visual GLB 14 MB 382 MB OBJ 41 MB 408 MB

1753. PQ1_TopBoardV9

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	1.0	2.6	0.2 ms	3.8	94 ms	0.3	0.2	8.6
Simulation, STEP	0.7	0.9	2.5	0.2 ms	3.9	2.9	0.2	0.2	11.3
Simulation, STL	0.7	0.9	2.4	0.2 ms	3.8	0.1	0.2	0.2	8.4
Simulation, OBJ	0.7	0.9	2.4	0.2 ms	3.8	2.8	0.2	0.2	11.1
Visual, GLB	0.7	0.9	2.4	0.2 ms	4.9	68 ms	0.5	0.2	9.7
Visual, OBJ	0.7	0.9	2.4	0.2 ms	5.1	2.5	0.8	0.2	12.5

Board Repo: nanosatlab/pocat-hw Board: PQ1_TopBoardV9.kicad_pcb Folder pq_topboard_lband Complexity 251 / 1000 (size 136, features 115) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper text, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 14, 89, 50 Triangles, simulation 494,486 in 21 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 18 MB 397 MB STEP 78 MB 395 MB STL 25 MB 394 MB OBJ 53 MB 427 MB Visual GLB 17 MB 440 MB OBJ 48 MB 446 MB

1754. PQ_MagYBoard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	1.0	0.1 ms	1.5	46 ms	0.1	0.2	3.7
Simulation, STEP	0.2	0.6	1.0	0.1 ms	1.4	2.1	0.1	0.2	5.5
Simulation, STL	0.2	0.6	1.0	0.1 ms	1.5	80 ms	0.1	0.2	3.8
Simulation, OBJ	0.2	0.6	1.0	0.1 ms	1.3	1.2	92 ms	0.2	4.6
Visual, GLB	0.2	0.6	0.9	0.1 ms	2.6	41 ms	0.3	0.2	4.8
Visual, OBJ	0.2	0.6	1.0	0.1 ms	2.5	1.1	0.3	0.2	5.8

Board Repo: nanosatlab/pocat-hw Board: PQ_MagYBoard.kicad_pcb Folder pq_ymag_board / PQ_MAGY / PQ_MagYBoard Complexity 226 / 1000 (size 156, features 70) KESE features through vias, rounded, trapezoid or chamfered pads, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 10 (20260206) Parts, tracks, vias 2, 468, 5 Triangles, simulation 248,848 in 13 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.1 MB 273 MB STEP 39 MB 289 MB STL 12 MB 279 MB OBJ 27 MB 278 MB Visual GLB 7.7 MB 265 MB OBJ 22 MB 253 MB

1755. Control_Boards

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.2	4.3	21.1	2 ms	16.9	0.9	2.4	0.3	47.1
Simulation, STEP	1.1	4.5	20.4	3 ms	16.3	12.6	2.6	0.4	57.9
Simulation, STL	1.1	4.3	20.4	2 ms	17.1	1.9	2.5	0.4	47.9
Simulation, OBJ	1.2	4.1	20.4	2 ms	16.2	25.9	2.5	0.3	70.6
Visual, GLB	1.0	4.3	20.9	1 ms	45.2	0.6	6.3	0.4	78.8
Visual, OBJ	1.1	4.6	21.3	2 ms	42.9	17.4	6.0	0.3	93.6

Board Repo: nasa-jpl/open-source-rover Board: Control_Boards.kicad_pcb Folder electrical / pcb / control_board Complexity 241 / 1000 (size 206, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 112, 3,720, 265 Triangles, simulation 5,125,220 in 242 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 173 MB 1.8 GB STEP 782 MB 2.0 GB STL 256 MB 1.8 GB OBJ 545 MB 3.3 GB Visual GLB 123 MB 2.2 GB OBJ 392 MB 2.7 GB

1756. groundlark-field-head

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.2	0.2 ms	2.1	0.1	0.4	0.2	5.8
Simulation, STEP	0.2	0.6	2.3	0.2 ms	2.3	1.7	0.4	0.2	7.7
Simulation, STL	0.2	0.6	2.0	0.2 ms	2.1	0.2	0.4	0.2	5.7
Simulation, OBJ	0.2	0.6	2.3	0.2 ms	2.2	3.3	0.4	0.2	9.3
Visual, GLB	0.2	0.6	2.2	0.2 ms	4.8	61 ms	0.5	0.2	8.6
Visual, OBJ	0.2	0.6	2.3	0.3 ms	4.9	1.8	0.4	0.2	10.3

Board Repo: naturalhazardscience/groundlark Board: groundlark-field-head.kicad_pcb Folder hw / burrowlark-usb / boards / groundlark-field-head Complexity 321 / 1000 (size 216, features 105) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 34, 455, 46 Triangles, simulation 742,580 in 66 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 24 MB 347 MB STEP 86 MB 402 MB STL 37 MB 359 MB OBJ 74 MB 541 MB Visual GLB 13 MB 355 MB OBJ 39 MB 382 MB

1757. field_head

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.4	1.6	0.4 ms	1.1	83 ms	0.2	0.2	3.7
Simulation, STEP	0.1	0.5	1.7	0.4 ms	1.1	1.3	0.2	0.2	5.1
Simulation, STL	0.1	0.4	1.7	0.3 ms	1.2	0.1	0.2	0.2	3.9
Simulation, OBJ	0.1	0.4	1.5	0.3 ms	1.1	1.8	0.2	0.2	5.4
Visual, GLB	0.1	0.4	1.8	0.3 ms	2.9	38 ms	0.3	0.2	5.8
Visual, OBJ	0.1	0.5	1.8	0.3 ms	3.0	1.2	0.4	0.2	7.2

Board Repo: naturalhazardscience/groundlark Board: field_head.kicad_pcb Folder hw / burrowlark-usb / layout / field_head Complexity 165 / 1000 (size 95, features 70) KESE features slotted holes, rounded, trapezoid or chamfered pads, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 34, 0, 0 Triangles, simulation 398,116 in 64 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 268 MB STEP 56 MB 292 MB STL 20 MB 291 MB OBJ 41 MB 322 MB Visual GLB 8.6 MB 301 MB OBJ 25 MB 297 MB

1758. groundlark-daqhat-01

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.3	5.4	12.3	0.9 ms	17.6	1.2	2.0	0.3	40.1
Simulation, STEP	1.2	5.5	12.9	1 ms	18.7	12.2	2.2	0.4	53.0
Simulation, STL	1.3	5.5	12.7	1 ms	18.2	2.2	2.2	0.4	42.6
Simulation, OBJ	1.4	5.2	12.4	1 ms	17.6	30.7	2.3	0.4	69.9
Visual, GLB	1.2	5.4	12.0	1 ms	51.2	0.5	5.5	0.3	76.2
Visual, OBJ	1.3	5.3	13.3	1 ms	51.3	15.5	5.8	0.3	92.8

Board Repo: naturalhazardscience/groundlark Board: groundlark-daqhat-01.kicad_pcb Folder hw / groundlark-fpga-hat / boards / groundlark-daqhat-01 Complexity 417 / 1000 (size 297, features 120) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 9 (20241229) Parts, tracks, vias 190, 12,366, 745 Triangles, simulation 5,819,912 in 381 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 195 MB 1.6 GB STEP 676 MB 1.9 GB STL 291 MB 1.7 GB OBJ 625 MB 3.7 GB Visual GLB 106 MB 1.9 GB OBJ 343 MB 2.2 GB

1759. pi-trenz-stack-concept

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.2	5.1	12.2	0.9 ms	17.3	0.8	2.1	0.3	39.1
Simulation, STEP	1.3	5.0	12.0	0.8 ms	17.3	11.2	2.1	0.3	49.1
Simulation, STL	1.2	4.9	12.1	0.8 ms	17.0	1.7	2.1	0.3	39.5
Simulation, OBJ	1.3	5.4	12.0	0.9 ms	17.2	32.2	2.1	0.3	70.6
Visual, GLB	1.3	5.0	12.2	0.9 ms	50.6	0.4	4.3	0.3	74.1
Visual, OBJ	1.5	5.0	12.1	0.9 ms	45.4	16.4	4.6	0.3	85.3

Board Repo: naturalhazardscience/groundlark Board: pi-trenz-stack-concept.kicad_pcb Folder hw / groundlark-fpga-hat / boards / groundlark-daqhat-01 Complexity 417 / 1000 (size 297, features 120) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 9 (20241229) Parts, tracks, vias 190, 12,366, 745 Triangles, simulation 5,819,912 in 381 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 195 MB 1.6 GB STEP 676 MB 1.9 GB STL 291 MB 1.7 GB OBJ 625 MB 3.7 GB Visual GLB 106 MB 2.2 GB OBJ 343 MB 2.3 GB

1760. stack-exploded

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	4.9	11.7	1 ms	17.7	0.9	2.0	0.3	38.6
Simulation, STEP	1.1	5.0	11.8	2 ms	17.6	11.2	2.0	0.3	49.1
Simulation, STL	1.2	5.2	11.6	1 ms	17.3	2.0	2.1	0.3	39.8
Simulation, OBJ	1.2	4.5	12.3	1 ms	17.0	27.4	2.2	0.3	64.9
Visual, GLB	1.2	5.4	11.7	1 ms	47.1	0.4	5.2	0.3	71.4
Visual, OBJ	1.2	5.1	11.4	1 ms	47.7	15.4	6.4	0.3	87.4

Board Repo: naturalhazardscience/groundlark Board: stack-exploded.kicad_pcb Folder hw / groundlark-fpga-hat / boards / groundlark-daqhat-01 Complexity 417 / 1000 (size 297, features 120) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 9 (20241229) Parts, tracks, vias 190, 12,366, 745 Triangles, simulation 5,819,912 in 381 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 195 MB 1.6 GB STEP 676 MB 2.0 GB STL 291 MB 1.7 GB OBJ 625 MB 3.6 GB Visual GLB 106 MB 2.0 GB OBJ 343 MB 2.2 GB

1761. stack-service-envelopes

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	6.0	16.2	2 ms	21.9	1.2	2.5	0.3	49.7
Simulation, STEP	1.5	6.2	14.3	1 ms	20.2	13.4	2.5	0.4	58.5
Simulation, STL	1.5	6.4	14.7	1 ms	21.0	1.9	2.4	0.4	48.3
Simulation, OBJ	1.5	5.9	14.7	2 ms	19.8	36.7	2.5	0.4	81.3
Visual, GLB	1.6	5.8	13.8	1 ms	55.2	0.5	5.2	0.3	82.3
Visual, OBJ	1.5	5.8	14.5	1.0 ms	54.6	18.3	5.5	0.3	100.5

Board Repo: naturalhazardscience/groundlark Board: stack-service-envelopes.kicad_pcb Folder hw / groundlark-fpga-hat / boards / groundlark-daqhat-01 Complexity 417 / 1000 (size 297, features 120) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 9 (20241229) Parts, tracks, vias 190, 12,366, 745 Triangles, simulation 5,819,912 in 381 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 195 MB 1.7 GB STEP 676 MB 2.0 GB STL 291 MB 1.6 GB OBJ 625 MB 3.7 GB Visual GLB 106 MB 2.0 GB OBJ 343 MB 2.3 GB

1762. trenz-mounted

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	6.2	14.6	1 ms	20.4	1.0	2.4	0.4	46.4
Simulation, STEP	1.4	5.9	14.1	1 ms	19.3	13.8	2.4	0.4	57.2
Simulation, STL	1.5	5.8	14.1	1 ms	19.1	2.0	2.3	0.4	45.3
Simulation, OBJ	1.6	6.2	14.7	1 ms	19.7	35.4	2.5	0.3	80.4
Visual, GLB	1.4	6.0	14.2	1.0 ms	53.9	0.5	5.1	0.3	81.4
Visual, OBJ	1.6	5.9	14.1	1 ms	52.3	19.7	5.0	0.3	98.9

Board Repo: naturalhazardscience/groundlark Board: trenz-mounted.kicad_pcb Folder hw / groundlark-fpga-hat / boards / groundlark-daqhat-01 Complexity 417 / 1000 (size 297, features 120) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 9 (20241229) Parts, tracks, vias 190, 12,366, 745 Triangles, simulation 5,819,912 in 381 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 195 MB 1.6 GB STEP 676 MB 2.0 GB STL 291 MB 1.6 GB OBJ 625 MB 3.7 GB Visual GLB 106 MB 1.8 GB OBJ 343 MB 2.2 GB

1763. trenz_hat

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	7.3	5.2	0.7 ms	4.4	0.2	0.4	0.2	18.3
Simulation, STEP	0.4	7.0	4.8	0.6 ms	4.1	3.4	0.4	0.3	20.4
Simulation, STL	0.4	7.2	4.6	1 ms	3.9	0.3	0.4	0.2	17.1
Simulation, OBJ	0.4	7.0	4.8	0.7 ms	4.0	5.4	0.4	0.2	22.1
Visual, GLB	0.4	7.0	4.7	0.6 ms	11.5	0.1	1.2	0.2	25.1
Visual, OBJ	0.4	7.0	4.7	0.6 ms	11.5	4.6	1.5	0.2	29.9

Board Repo: naturalhazardscience/groundlark Board: trenz_hat.kicad_pcb Folder hw / groundlark-fpga-hat / layout / trenz_hat Complexity 199 / 1000 (size 114, features 85) KESE features custom pads, rounded, trapezoid or chamfered pads, copper drawings, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 190, 0, 0 Triangles, simulation 1,028,724 in 290 parts Note mostly unrouted Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 36 MB 496 MB STEP 145 MB 605 MB STL 51 MB 498 MB OBJ 107 MB 719 MB Visual GLB 30 MB 630 MB OBJ 89 MB 781 MB

1764. raspberrypi_hat

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.8	0.2 ms	1.4	70 ms	0.3	0.2	4.2
Simulation, STEP	0.1	0.3	1.9	0.2 ms	1.5	1.5	0.2	0.2	5.7
Simulation, STL	0.1	0.3	1.7	0.2 ms	1.3	88 ms	0.2	0.2	4.0
Simulation, OBJ	0.1	0.3	1.9	0.2 ms	1.4	2.3	0.2	0.2	6.4
Visual, GLB	0.1	0.3	1.8	0.3 ms	2.6	34 ms	0.2	0.2	5.3
Visual, OBJ	0.1	0.3	1.8	0.2 ms	2.6	1.2	0.2	0.2	6.4

Board Repo: naturalhazardscience/groundlark Board: raspberrypi_hat.kicad_pcb Folder hw / shared / reference Complexity 161 / 1000 (size 131, features 30) KESE features filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 14, 63, 0 Triangles, simulation 438,762 in 24 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 271 MB STEP 62 MB 288 MB STL 22 MB 266 MB OBJ 44 MB 338 MB Visual GLB 7.7 MB 258 MB OBJ 22 MB 257 MB

1765. skylark-usb

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.1	3.3	0.4 ms	4.5	0.2	0.7	0.3	10.6
Simulation, STEP	0.4	1.2	3.4	0.3 ms	5.0	4.0	0.7	0.3	15.0
Simulation, STL	0.4	1.1	3.4	0.4 ms	5.0	0.4	0.7	0.3	11.3
Simulation, OBJ	0.5	1.2	3.3	0.4 ms	4.7	7.3	0.7	0.2	17.9
Visual, GLB	0.4	1.1	3.3	0.4 ms	9.9	0.1	1.2	0.2	16.3
Visual, OBJ	0.4	1.2	3.4	0.4 ms	9.8	5.4	1.2	0.2	21.7

Board Repo: naturalhazardscience/groundlark Board: skylark-usb.kicad_pcb Folder hw / skylark-usb / boards / skylark-usb Complexity 350 / 1000 (size 245, features 105) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 121, 1,037, 159 Triangles, simulation 1,271,024 in 109 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 43 MB 524 MB STEP 175 MB 671 MB STL 64 MB 530 MB OBJ 130 MB 861 MB Visual GLB 30 MB 735 MB OBJ 93 MB 725 MB

1766. skylark

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	0.9	2.0	0.3 ms	2.1	83 ms	0.2	0.2	6.0
Simulation, STEP	0.3	0.9	2.3	0.3 ms	2.0	1.9	0.2	0.2	8.0
Simulation, STL	0.3	0.9	2.0	0.2 ms	1.8	0.2	0.2	0.2	5.7
Simulation, OBJ	0.4	1.0	2.1	0.3 ms	2.0	2.7	0.2	0.2	8.6
Visual, GLB	0.3	1.0	2.2	0.6 ms	5.8	96 ms	0.7	0.3	10.3
Visual, OBJ	0.3	0.9	2.1	0.3 ms	6.1	2.3	0.8	0.2	12.8

Board Repo: naturalhazardscience/groundlark Board: skylark.kicad_pcb Folder hw / skylark-usb / layout / skylark Complexity 179 / 1000 (size 109, features 70) KESE features slotted holes, rounded, trapezoid or chamfered pads, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 121, 0, 0 Triangles, simulation 507,884 in 104 parts Note mostly unrouted Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 18 MB 344 MB STEP 72 MB 413 MB STL 25 MB 340 MB OBJ 53 MB 410 MB Visual GLB 16 MB 436 MB OBJ 46 MB 469 MB

1767. C64C-250469-01-A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	5.9	32.6	1 ms	25.3	1.1	3.2	0.3	69.4
Simulation, STEP	1.0	5.9	32.7	0.9 ms	25.2	17.2	3.4	0.3	85.7
Simulation, STL	0.9	5.9	32.2	0.8 ms	25.0	2.3	3.6	0.3	70.4
Simulation, OBJ	0.9	5.8	32.4	0.9 ms	24.6	35.7	3.3	0.3	103.1
Visual, GLB	1.0	5.8	33.1	1 ms	55.0	0.6	6.6	0.3	102.4
Visual, OBJ	1.0	5.9	33.6	0.9 ms	54.9	20.3	6.3	0.3	122.2

Board Repo: NeedfulThings/Commodore64C Board: C64C-250469-01-A.kicad_pcb Folder 250469-RevA Complexity 257 / 1000 (size 202, features 55) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 131, 2,533, 241 Triangles, simulation 6,379,874 in 215 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 218 MB 2.0 GB STEP 1.1 GB 2.3 GB STL 319 MB 2.0 GB OBJ 683 MB 4.1 GB Visual GLB 131 MB 2.3 GB OBJ 415 MB 2.8 GB

1768. ethersweep

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.2	9.7	0.4 ms	7.2	0.3	0.9	0.3	21.1
Simulation, STEP	0.7	2.3	9.9	0.4 ms	6.9	4.9	0.8	0.3	25.7
Simulation, STL	0.7	2.2	9.7	0.9 ms	7.1	0.8	0.8	0.3	21.6
Simulation, OBJ	0.7	2.0	9.5	0.6 ms	7.2	9.1	0.9	0.2	29.6
Visual, GLB	0.7	2.2	9.6	0.4 ms	15.5	0.2	2.2	0.2	30.7
Visual, OBJ	0.7	2.1	9.5	0.9 ms	15.6	6.7	2.3	0.2	37.2

Board Repo: Neumi/ethersweep Board: ethersweep.kicad_pcb Folder electronic_design / development / ethersweep402 Complexity 365 / 1000 (size 240, features 125) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 105, 1,249, 325 Triangles, simulation 1,969,696 in 117 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 69 MB 769 MB STEP 359 MB 856 MB STL 98 MB 738 MB OBJ 208 MB 1.3 GB Visual GLB 49 MB 861 MB OBJ 149 MB 1.1 GB

1769. ethersweep

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	2.2	8.9	0.6 ms	6.7	0.3	0.7	0.2	19.8
Simulation, STEP	0.7	2.2	9.0	0.5 ms	6.9	4.7	0.7	0.3	24.4
Simulation, STL	0.7	2.2	9.1	0.5 ms	6.8	0.6	0.8	0.2	20.5
Simulation, OBJ	0.7	2.3	9.0	0.5 ms	6.8	10.7	0.8	0.2	30.4
Visual, GLB	0.7	2.3	8.9	0.7 ms	15.1	0.2	1.5	0.2	28.9
Visual, OBJ	0.7	2.4	9.3	0.5 ms	15.5	6.2	1.9	0.2	36.2

Board Repo: Neumi/ethersweep Board: ethersweep.kicad_pcb Folder electronic_design / development / ethersweep406 Complexity 381 / 1000 (size 256, features 125) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 105, 1,174, 149 Triangles, simulation 2,029,642 in 138 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 70 MB 655 MB STEP 302 MB 787 MB STL 101 MB 712 MB OBJ 214 MB 1.4 GB Visual GLB 40 MB 847 MB OBJ 122 MB 940 MB

1770. ethersweep

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.5	2.2	0.2 ms	1.8	85 ms	0.3	0.2	5.4
Simulation, STEP	0.3	0.5	2.2	0.3 ms	1.7	1.7	0.3	0.2	6.9
Simulation, STL	0.2	0.6	2.1	0.2 ms	1.7	0.1	0.3	0.2	5.3
Simulation, OBJ	0.3	0.6	2.2	0.4 ms	1.7	2.8	0.3	0.2	8.1
Visual, GLB	0.3	0.6	2.2	0.3 ms	3.3	43 ms	0.4	0.3	7.0
Visual, OBJ	0.3	0.6	2.1	0.3 ms	3.4	1.4	0.3	0.2	8.4

Board Repo: Neumi/ethersweep Board: ethersweep.kicad_pcb Folder electronic_design / development / ethersweep407_CAN Complexity 295 / 1000 (size 155, features 140) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, knockout text, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 24, 154, 13 Triangles, simulation 503,738 in 44 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 274 MB STEP 67 MB 308 MB STL 25 MB 278 MB OBJ 51 MB 383 MB Visual GLB 8.8 MB 276 MB OBJ 26 MB 275 MB

1771. ethersweep

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.9	8.7	0.4 ms	5.8	0.2	0.7	0.2	18.0
Simulation, STEP	0.4	1.9	8.6	0.6 ms	5.7	4.0	0.7	0.2	21.5
Simulation, STL	0.4	1.9	8.6	0.4 ms	5.8	0.5	0.6	0.2	18.0
Simulation, OBJ	0.4	1.8	8.6	0.7 ms	5.8	7.2	0.7	0.2	24.7
Visual, GLB	0.4	1.8	8.6	0.9 ms	13.9	0.2	1.5	0.3	26.6
Visual, OBJ	0.4	1.9	8.4	0.6 ms	12.4	4.9	1.9	0.3	30.3

Board Repo: Neumi/ethersweep Board: ethersweep.kicad_pcb Folder electronic_design / development / ethersweep_tmc2209 Complexity 334 / 1000 (size 239, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 105, 1,094, 319 Triangles, simulation 1,767,076 in 122 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 61 MB 705 MB STEP 326 MB 809 MB STL 88 MB 712 MB OBJ 186 MB 1.2 GB Visual GLB 42 MB 884 MB OBJ 127 MB 947 MB

1772. ethersweep

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	2.5	10.6	0.6 ms	7.3	0.3	0.9	0.3	22.7
Simulation, STEP	0.8	2.5	10.4	0.6 ms	7.3	5.1	0.9	0.4	27.4
Simulation, STL	0.8	2.5	10.7	0.6 ms	7.5	0.6	0.8	0.3	23.2
Simulation, OBJ	0.8	2.6	10.6	0.6 ms	7.8	12.6	0.9	0.3	35.6
Visual, GLB	0.8	2.7	11.1	0.6 ms	17.2	0.2	1.5	0.3	33.9
Visual, OBJ	0.8	2.7	10.8	0.7 ms	16.6	6.8	1.8	0.3	39.9

Board Repo: Neumi/ethersweep Board: ethersweep.kicad_pcb Folder electronic_design / production / ethersweep405 Complexity 370 / 1000 (size 255, features 115) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 104, 1,173, 151 Triangles, simulation 2,021,426 in 138 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 70 MB 681 MB STEP 300 MB 775 MB STL 101 MB 692 MB OBJ 213 MB 1.4 GB Visual GLB 40 MB 864 MB OBJ 122 MB 946 MB

1773. FreeEEG32

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	3.2	13.3	1 ms	12.3	0.5	1.6	0.3	31.9
Simulation, STEP	0.8	3.2	13.2	1 ms	12.5	6.8	1.6	0.3	38.4
Simulation, STL	0.8	3.1	13.0	1 ms	12.4	0.9	1.5	0.3	32.0
Simulation, OBJ	0.8	3.1	13.0	1 ms	12.9	17.3	1.6	0.3	49.0
Visual, GLB	0.8	3.2	13.4	1 ms	27.0	0.3	2.3	0.3	47.3
Visual, OBJ	0.7	3.3	13.1	1 ms	26.8	10.3	2.7	0.2	57.3

Board Repo: neuroidss/freeeeg32 Board: FreeEEG32.kicad_pcb Folder KiCad Complexity 332 / 1000 (size 287, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 213, 4,412, 279 Triangles, simulation 2,598,444 in 378 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 93 MB 753 MB STEP 404 MB 988 MB STL 130 MB 768 MB OBJ 284 MB 1.8 GB Visual GLB 59 MB 1.1 GB OBJ 183 MB 1.3 GB

1774. tmp

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.7	4.2	0.5 ms	2.1	99 ms	0.3	0.3	7.9
Simulation, STEP	0.1	0.6	4.3	0.7 ms	2.2	2.0	0.4	0.2	9.9
Simulation, STL	0.2	0.7	4.1	0.7 ms	2.3	0.2	0.3	0.2	8.1
Simulation, OBJ	0.1	0.7	3.9	0.6 ms	2.2	3.1	0.3	0.2	10.5
Visual, GLB	0.2	0.6	4.0	0.5 ms	5.4	55 ms	0.5	0.2	11.0
Visual, OBJ	0.2	0.6	4.0	0.7 ms	5.6	1.6	0.6	0.2	12.7

Board Repo: neuroidss/freeeeg32 Board: tmp.kicad_pcb Folder KiCad Complexity 209 / 1000 (size 209, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 57, 360, 0 Triangles, simulation 756,624 in 90 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 27 MB 376 MB STEP 121 MB 442 MB STL 38 MB 382 MB OBJ 78 MB 551 MB Visual GLB 14 MB 414 MB OBJ 42 MB 418 MB

1775. nu8051-ufo-target-board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	3.2	0.5 ms	2.0	80 ms	0.4	0.2	6.7
Simulation, STEP	0.2	0.5	3.0	0.3 ms	2.0	1.8	0.4	0.2	8.1
Simulation, STL	0.2	0.6	3.0	0.4 ms	1.9	0.2	0.4	0.2	6.4
Simulation, OBJ	0.2	0.5	3.0	0.4 ms	2.0	3.0	0.3	0.2	9.2
Visual, GLB	0.2	0.5	3.1	0.4 ms	5.4	66 ms	0.5	0.3	10.1
Visual, OBJ	0.2	0.6	3.1	0.6 ms	5.2	2.1	0.6	0.2	11.9

Board Repo: newaetech/chipwhisperer-target-cw308t Board: nu8051-ufo-target-board.kicad_pcb Folder CW308T_NU8051_AT20 / kicad_src Complexity 241 / 1000 (size 141, features 100) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 9, 181, 86 Triangles, simulation 612,998 in 55 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 21 MB 340 MB STEP 96 MB 391 MB STL 31 MB 338 MB OBJ 62 MB 444 MB Visual GLB 15 MB 398 MB OBJ 44 MB 392 MB

1776. SONATA-ONE

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	4.2	15.9	46.5	3 ms	58.2	3.3	9.4	0.6	138.2
Simulation, STEP	4.2	15.8	45.5	2 ms	57.4	30.6	10.7	0.6	164.8
Simulation, STL	4.1	15.9	46.8	2 ms	58.3	6.6	10.2	0.6	142.4
Simulation, OBJ	4.3	15.6	45.3	2 ms	61.3	95.8	9.0	0.7	232.0
Visual, GLB	4.1	15.4	45.2	2 ms	140.1	1.3	15.8	0.5	222.4
Visual, OBJ	4.2	15.6	45.8	3 ms	140.8	45.2	16.0	0.6	268.2

Board Repo: newaetech/sonata-pcb Board: SONATA-ONE.kicad_pcb Folder sonata-one / sonata_kicad_project Complexity 487 / 1000 (size 327, features 160) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, copper text, curved board outline, knockout text, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 8 File format KiCad 8 (20240108) Parts, tracks, vias 468, 12,952, 1,328 Triangles, simulation 14,886,156 in 664 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 495 MB 3.2 GB STEP 1.8 GB 4.4 GB STL 744 MB 3.3 GB OBJ 1.7 GB 9.4 GB Visual GLB 262 MB 4.2 GB OBJ 881 MB 5.8 GB

1777. amulet_controller

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.6	6.7	23.0	0.7 ms	26.5	1.3	2.9	0.3	62.3
Simulation, STEP	1.7	6.5	23.0	0.6 ms	26.3	11.8	2.7	0.3	72.3
Simulation, STL	1.6	6.5	22.9	0.7 ms	26.1	2.5	3.0	0.3	62.8
Simulation, OBJ	1.6	6.6	23.0	0.7 ms	25.9	36.6	3.0	0.4	97.1
Visual, GLB	1.6	6.6	22.9	0.9 ms	72.2	0.4	4.6	0.3	108.6
Visual, OBJ	1.7	6.6	22.6	0.7 ms	72.1	15.4	4.4	0.3	123.1

Board Repo: nguyen-v/amulet_controller_kibot Board: amulet_controller.kicad_pcb Complexity 457 / 1000 (size 287, features 170) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, TrueType text, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 6 File format KiCad 8 (20240108) Parts, tracks, vias 285, 1,583, 794 Triangles, simulation 6,621,630 in 197 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 219 MB 1.6 GB STEP 735 MB 2.0 GB STL 331 MB 1.5 GB OBJ 697 MB 4.1 GB Visual GLB 94 MB 1.9 GB OBJ 299 MB 2.2 GB

1778. Asteroids_PCB

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.1	18.3	180.3	5 ms	125.1	6.0	15.1	0.8	347.7
Simulation, STEP	2.3	19.1	185.8	4 ms	126.2	76.5	15.0	0.8	425.6
Simulation, STL	2.2	18.3	178.1	3 ms	121.7	11.6	14.9	0.8	347.7
Simulation, OBJ	1.7	15.7	152.2	5 ms	101.5	103.8	11.1	0.8	386.8
Visual, GLB	2.7	21.4	190.9	5 ms	246.2	1.9	19.5	0.6	483.3
Visual, OBJ	2.5	18.3	181.5	4 ms	253.5	70.1	18.9	0.6	545.4

Board Repo: nmikstas/asteroids-pcb Board: Asteroids_PCB.kicad_pcb Folder Asteroids_PCB Complexity 286 / 1000 (size 236, features 50) KESE features rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline Tested 9th November 2026 to 10th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 475, 10,686, 0 Triangles, simulation 21,815,320 in 718 parts Verifier PASS in all six runs Run again Simulation, OBJ: failed in the corpus run, run again with the memory cap raised from 11 GB to 14.5 GB, and passed

File type File size Peak memory used Simulation GLB 750 MB 5.6 GB STEP 3.9 GB 7.2 GB STL 1.1 GB 5.3 GB OBJ 2.4 GB 14 GB Visual GLB 349 MB 5.8 GB OBJ 1.1 GB 6.9 GB

1779. ROM_To_2716

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	31 ms	0.2	2.2	0.2 ms	2.3	87 ms	0.4	0.2	5.4
Simulation, STEP	29 ms	0.2	2.1	0.4 ms	2.4	1.6	0.3	0.2	6.8
Simulation, STL	32 ms	0.2	2.2	0.3 ms	2.5	0.1	0.4	0.2	5.5
Simulation, OBJ	30 ms	0.2	2.1	0.2 ms	2.4	2.4	0.3	0.2	7.6
Visual, GLB	30 ms	0.2	2.1	0.2 ms	5.4	54 ms	0.3	0.2	8.4
Visual, OBJ	37 ms	0.2	2.2	0.2 ms	5.3	1.5	0.3	0.2	9.7

Board Repo: nmikstas/asteroids-pcb Board: ROM_To_2716.kicad_pcb Folder ROM_to_2716 Complexity 106 / 1000 (size 86, features 20) KESE features filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 2, 32, 0 Triangles, simulation 398,426 in 28 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 260 MB STEP 92 MB 288 MB STL 20 MB 241 MB OBJ 43 MB 322 MB Visual GLB 8.9 MB 245 MB OBJ 26 MB 247 MB

1780. quantum_arcade_pcb

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.9	19.7	137.8	6 ms	83.9	5.0	13.1	0.8	262.2
Simulation, STEP	2.1	22.3	135.2	4 ms	82.6	63.7	13.4	0.8	320.0
Simulation, STL	1.9	20.5	135.2	4 ms	85.6	11.1	12.2	0.9	267.5
Simulation, OBJ	2.2	21.3	139.5	5 ms	78.9	129.4	13.5	1.0	385.7
Visual, GLB	2.2	21.3	135.7	4 ms	190.2	2.2	21.8	0.6	374.0
Visual, OBJ	2.0	20.0	131.5	4 ms	192.4	59.8	21.0	0.7	427.5

Board Repo: nmikstas/quantum_arcade_pcb Board: quantum_arcade_pcb.kicad_pcb Folder quantum_arcade_pcb Complexity 297 / 1000 (size 242, features 55) KESE features through vias, filled zones, copper text, curved board outline Tested 9th November 2026 to 10th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 482, 13,501, 809 Triangles, simulation 18,765,660 in 702 parts Verifier PASS in all six runs Run again Simulation, OBJ: failed in the corpus run, run again with the memory cap raised from 11 GB to 14.5 GB, and passed

File type File size Peak memory used Simulation GLB 643 MB 4.8 GB STEP 3.3 GB 6.0 GB STL 938 MB 5.0 GB OBJ 2.1 GB 12 GB Visual GLB 350 MB 5.6 GB OBJ 1.1 GB 7.4 GB

1781. alu

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	3.8	18.8	2 ms	18.8	0.8	1.8	0.3	45.1
Simulation, STEP	0.7	3.7	19.1	1 ms	19.3	11.5	1.7	0.3	56.3
Simulation, STL	0.6	3.7	18.7	1 ms	18.9	1.7	1.5	0.3	45.4
Simulation, OBJ	0.7	3.8	19.1	1 ms	18.3	21.4	1.6	0.3	65.2
Visual, GLB	0.7	3.6	18.2	1 ms	25.2	0.3	3.5	0.3	51.9
Visual, OBJ	0.7	3.4	19.3	1 ms	23.6	11.8	3.4	0.3	62.5

Board Repo: Noah1989/74cpu Board: alu.kicad_pcb Complexity 205 / 1000 (size 190, features 15) KESE features through vias Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 280, 688, 86 Triangles, simulation 4,036,698 in 159 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 135 MB 1.1 GB STEP 547 MB 1.6 GB STL 202 MB 1.1 GB OBJ 424 MB 2.6 GB Visual GLB 75 MB 1.3 GB OBJ 234 MB 1.6 GB

1782. adcboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	3.7	21.7	1 ms	15.5	0.6	1.8	0.4	44.6
Simulation, STEP	1.0	3.6	21.3	0.9 ms	15.9	11.5	1.9	0.3	55.5
Simulation, STL	0.9	3.8	21.5	0.7 ms	16.1	1.4	1.7	0.3	45.8
Simulation, OBJ	1.1	3.6	22.2	0.9 ms	15.4	21.9	1.7	0.3	66.2
Visual, GLB	0.9	3.5	20.6	1.0 ms	29.2	0.4	3.1	0.3	58.0
Visual, OBJ	1.1	3.4	20.4	0.6 ms	29.5	12.5	2.8	0.3	70.1

Board Repo: nuclearfutureslab/ibxII-hardware Board: adcboard.kicad_pcb Folder adcboard Complexity 219 / 1000 (size 184, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 115, 920, 72 Triangles, simulation 3,351,378 in 110 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 116 MB 1.1 GB STEP 590 MB 1.3 GB STL 168 MB 1.2 GB OBJ 358 MB 2.2 GB Visual GLB 71 MB 1.2 GB OBJ 220 MB 1.6 GB

1783. hvboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.4	7.1	0.8 ms	5.0	0.2	0.6	0.2	14.9
Simulation, STEP	0.3	1.4	6.9	0.6 ms	5.2	3.7	0.6	0.2	18.3
Simulation, STL	0.3	1.4	6.9	0.6 ms	5.2	0.4	0.6	0.3	15.2
Simulation, OBJ	0.3	1.4	7.2	0.6 ms	5.2	7.8	0.6	0.2	22.9
Visual, GLB	0.3	1.4	7.0	0.8 ms	9.3	0.1	1.0	0.2	19.3
Visual, OBJ	0.3	1.4	7.0	0.7 ms	9.1	4.3	0.9	0.2	23.4

Board Repo: nuclearfutureslab/ibxII-hardware Board: hvboard.kicad_pcb Folder hvboard Complexity 205 / 1000 (size 160, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 50, 447, 5 Triangles, simulation 1,305,990 in 75 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 45 MB 532 MB STEP 226 MB 593 MB STL 65 MB 522 MB OBJ 135 MB 901 MB Visual GLB 26 MB 578 MB OBJ 76 MB 578 MB

1784. greybadge_pcb

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	2.2	11.9	0.8 ms	12.4	0.3	1.1	0.2	29.2
Simulation, STEP	0.9	2.1	11.8	0.7 ms	12.6	7.4	1.1	0.2	36.3
Simulation, STL	0.9	2.1	11.5	0.5 ms	12.9	0.6	1.2	0.2	29.4
Simulation, OBJ	0.9	2.1	11.8	0.9 ms	12.5	11.0	1.3	0.3	39.9
Visual, GLB	0.9	2.2	11.6	1 ms	22.0	0.3	2.6	0.3	39.8
Visual, OBJ	0.9	2.1	11.9	0.8 ms	22.8	8.9	2.9	0.2	49.7

Board Repo: NUSGreyhats/greybadge25 Board: greybadge_pcb.kicad_pcb Folder hardware / greybadge_pcb Complexity 386 / 1000 (size 251, features 135) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, knockout text, TrueType text Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 135, 1,721, 176 Triangles, simulation 2,062,768 in 300 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 72 MB 814 MB STEP 442 MB 1.0 GB STL 103 MB 832 MB OBJ 220 MB 1.4 GB Visual GLB 60 MB 1.1 GB OBJ 184 MB 1.2 GB

1785. battery

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.7	2.0	0.2 ms	2.0	0.1	0.3	0.2	5.6
Simulation, STEP	0.3	0.7	1.9	0.2 ms	2.1	1.8	0.3	0.2	7.4
Simulation, STL	0.3	0.8	1.9	0.2 ms	2.0	0.2	0.3	0.3	5.7
Simulation, OBJ	0.3	0.7	1.9	0.3 ms	2.0	3.6	0.4	0.2	9.3
Visual, GLB	0.3	0.7	2.0	0.3 ms	4.5	81 ms	0.6	0.2	8.4
Visual, OBJ	0.3	0.7	1.9	0.2 ms	4.5	2.2	0.5	0.3	10.4

Board Repo: nzevh/barebones Board: battery.kicad_pcb Folder hardware / battery Complexity 326 / 1000 (size 221, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, knockout text, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 39, 348, 129 Triangles, simulation 658,698 in 60 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 23 MB 331 MB STEP 80 MB 359 MB STL 33 MB 342 MB OBJ 66 MB 474 MB Visual GLB 14 MB 377 MB OBJ 42 MB 369 MB

1786. barebones

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.3	24.9	75.9	6 ms	59.9	3.0	6.7	0.6	174.3
Simulation, STEP	3.2	24.9	73.9	5 ms	57.9	37.0	6.8	0.6	204.3
Simulation, STL	3.2	25.9	74.7	5 ms	58.7	6.5	6.9	0.7	176.6
Simulation, OBJ	3.3	24.6	77.3	5 ms	60.0	87.9	7.3	0.7	261.0
Visual, GLB	3.1	25.4	75.8	5 ms	127.0	1.0	10.7	0.5	243.6
Visual, OBJ	3.1	24.6	74.7	8 ms	134.9	37.5	11.3	0.5	286.6

Board Repo: nzevh/barebones Board: barebones.kicad_pcb Folder hardware / motherboard Complexity 651 / 1000 (size 341, features 310) KESE features through vias, blind and buried vias, microvias, covered, plugged, capped or filled vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, knockout text, TrueType text, hatched fills, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 8 File format KiCad 10 (20260206) Parts, tracks, vias 1,031, 2,098, 1,881 Triangles, simulation 12,973,364 in 1327 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 442 MB 3.0 GB STEP 2.0 GB 4.2 GB STL 649 MB 3.0 GB OBJ 1.4 GB 8.3 GB Visual GLB 196 MB 3.3 GB OBJ 632 MB 4.2 GB

1787. m3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.2	3.6	10.5	1 ms	11.2	0.7	1.3	0.3	28.8
Simulation, STEP	1.0	3.5	10.8	0.8 ms	11.8	8.4	1.4	0.3	37.2
Simulation, STL	0.9	3.6	10.9	0.7 ms	11.7	0.9	1.3	0.3	29.6
Simulation, OBJ	1.0	3.5	10.9	0.5 ms	11.6	18.3	1.5	0.3	47.2
Visual, GLB	1.0	3.6	11.5	1 ms	24.3	0.3	2.9	0.3	43.9
Visual, OBJ	1.0	3.6	10.9	1 ms	23.9	12.7	3.1	0.2	55.4

Board Repo: oak-wjr/rocket-flight-computer Board: m3.kicad_pcb Folder m3_design / assembly_review Complexity 355 / 1000 (size 265, features 90) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 183, 2,037, 608 Triangles, simulation 2,975,214 in 175 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 102 MB 980 MB STEP 404 MB 1.3 GB STL 149 MB 1.0 GB OBJ 313 MB 2.0 GB Visual GLB 71 MB 1.2 GB OBJ 220 MB 1.4 GB

1788. m1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.8	3.0	0.4 ms	2.4	0.1	0.5	0.3	7.5
Simulation, STEP	0.3	0.9	2.8	0.4 ms	2.3	2.0	0.4	0.2	8.9
Simulation, STL	0.3	0.8	2.9	0.5 ms	2.5	0.2	0.5	0.2	7.5
Simulation, OBJ	0.4	0.8	2.9	0.2 ms	2.5	4.8	0.5	0.3	12.3
Visual, GLB	0.4	0.8	2.8	0.3 ms	5.3	63 ms	0.5	0.3	10.1
Visual, OBJ	0.4	0.8	2.9	0.4 ms	5.5	2.3	0.6	0.2	12.8

Board Repo: oak-wjr/rocket-flight-computer Board: m1.kicad_pcb Folder reference / m1_power_actuator Complexity 212 / 1000 (size 167, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 36, 84, 76 Triangles, simulation 778,592 in 40 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 27 MB 359 MB STEP 82 MB 406 MB STL 39 MB 352 MB OBJ 78 MB 551 MB Visual GLB 15 MB 410 MB OBJ 45 MB 415 MB

1789. m3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	2.6	7.9	0.5 ms	7.8	0.3	1.1	0.2	20.7
Simulation, STEP	0.7	2.4	7.7	0.4 ms	7.9	5.9	1.0	0.3	25.9
Simulation, STL	0.8	2.6	7.7	0.4 ms	7.9	0.6	1.1	0.3	20.9
Simulation, OBJ	0.7	2.5	8.0	1 ms	7.9	12.3	1.1	0.2	32.7
Visual, GLB	0.7	2.7	8.0	0.4 ms	17.1	0.2	2.1	0.2	31.1
Visual, OBJ	0.8	2.5	7.8	0.4 ms	16.8	8.5	2.2	0.3	38.9

Board Repo: oak-wjr/rocket-flight-computer Board: m3.kicad_pcb Folder reference / m3_assy_r1 Complexity 322 / 1000 (size 257, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 115, 1,707, 494 Triangles, simulation 2,125,432 in 151 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 72 MB 882 MB STEP 277 MB 1.0 GB STL 106 MB 810 MB OBJ 220 MB 1.4 GB Visual GLB 49 MB 944 MB OBJ 151 MB 1.1 GB

1790. A20-CAN_Rev_A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.7	3.0	0.2 ms	2.0	75 ms	0.3	0.2	6.7
Simulation, STEP	0.3	0.7	2.9	0.2 ms	1.9	1.8	0.3	0.2	8.2
Simulation, STL	0.3	0.7	3.0	0.2 ms	2.0	0.2	0.3	0.2	6.7
Simulation, OBJ	0.3	0.7	3.0	0.2 ms	1.9	2.9	0.3	0.3	9.4
Visual, GLB	0.3	0.7	3.0	0.4 ms	4.4	74 ms	0.5	0.2	9.3
Visual, OBJ	0.3	0.7	2.9	0.2 ms	4.1	2.7	0.5	0.2	11.5

Board Repo: OLIMEX/A20-CAN Board: A20-CAN_Rev_A.kicad_pcb Complexity 192 / 1000 (size 157, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 18, 411, 117 Triangles, simulation 492,504 in 27 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 17 MB 318 MB STEP 87 MB 389 MB STL 25 MB 337 MB OBJ 51 MB 392 MB Visual GLB 16 MB 407 MB OBJ 46 MB 396 MB

1791. A20-CAN-ISO_Rev_B

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.0	3.7	0.5 ms	2.6	0.1	0.5	0.3	8.5
Simulation, STEP	0.4	0.9	3.9	0.4 ms	2.6	2.3	0.4	0.2	10.7
Simulation, STL	0.3	0.9	3.6	0.4 ms	2.5	0.2	0.4	0.2	8.3
Simulation, OBJ	0.3	1.0	3.8	0.4 ms	2.7	3.6	0.4	0.2	12.1
Visual, GLB	0.3	0.9	3.7	0.5 ms	6.6	96 ms	0.6	0.2	12.6
Visual, OBJ	0.3	1.0	3.7	0.4 ms	6.6	3.2	0.7	0.3	15.7

Board Repo: OLIMEX/A20-CAN-ISO Board: A20-CAN-ISO_Rev_B.kicad_pcb Folder HARDWARE / A20-CAN-ISO-Rev_B Complexity 206 / 1000 (size 171, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 28, 758, 184 Triangles, simulation 702,972 in 130 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 25 MB 417 MB STEP 111 MB 477 MB STL 35 MB 433 MB OBJ 72 MB 530 MB Visual GLB 22 MB 527 MB OBJ 64 MB 539 MB

1792. AgonLight2_Rev_A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	4.2	20.8	0.7 ms	15.1	0.6	2.0	0.3	44.1
Simulation, STEP	1.2	4.2	21.2	0.7 ms	15.2	9.6	1.9	0.3	53.7
Simulation, STL	1.1	4.3	21.0	0.6 ms	15.3	1.4	2.1	0.3	45.4
Simulation, OBJ	1.1	4.3	21.1	0.6 ms	15.4	22.5	2.1	0.3	66.8
Visual, GLB	1.1	4.5	21.3	0.8 ms	36.0	0.4	4.4	0.3	68.0
Visual, OBJ	1.1	4.2	20.9	0.7 ms	36.2	15.1	4.9	0.3	82.8

Board Repo: OLIMEX/AgonLight2 Board: AgonLight2_Rev_A.kicad_pcb Folder HARDWARE / AgonLight2_Rev_A Complexity 313 / 1000 (size 268, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 229, 2,772, 400 Triangles, simulation 3,712,430 in 227 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 130 MB 1.3 GB STEP 559 MB 1.5 GB STL 186 MB 1.3 GB OBJ 400 MB 2.5 GB Visual GLB 88 MB 1.4 GB OBJ 275 MB 1.8 GB

1793. AgonLight2_Rev_B

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.2	4.6	20.9	1 ms	16.4	0.8	2.3	0.3	46.3
Simulation, STEP	1.2	4.6	21.7	0.6 ms	15.7	10.1	2.1	0.3	55.6
Simulation, STL	1.2	4.5	21.1	0.6 ms	15.4	1.5	2.3	0.3	46.3
Simulation, OBJ	1.1	4.8	21.5	0.6 ms	15.5	22.8	2.3	0.3	68.3
Visual, GLB	1.1	4.5	21.1	0.6 ms	37.5	0.5	4.6	0.3	69.6
Visual, OBJ	1.2	4.7	21.0	0.7 ms	36.4	16.1	4.5	0.3	84.3

Board Repo: OLIMEX/AgonLight2 Board: AgonLight2_Rev_B.kicad_pcb Folder HARDWARE / AgonLight2_Rev_B Complexity 313 / 1000 (size 268, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 229, 2,796, 400 Triangles, simulation 3,844,256 in 225 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 135 MB 1.4 GB STEP 596 MB 1.6 GB STL 192 MB 1.3 GB OBJ 416 MB 2.6 GB Visual GLB 94 MB 1.4 GB OBJ 294 MB 2.0 GB

1794. AgonLight2-HvIO_Rev_A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.9	3.6	0.6 ms	2.3	0.1	0.3	0.3	7.8
Simulation, STEP	0.3	0.8	3.6	0.7 ms	2.6	2.2	0.3	0.2	10.1
Simulation, STL	0.3	0.9	3.4	0.5 ms	2.3	0.2	0.3	0.3	7.7
Simulation, OBJ	0.3	0.9	3.3	0.3 ms	2.3	3.5	0.3	0.2	10.8
Visual, GLB	0.3	0.9	3.2	0.3 ms	5.1	80 ms	0.6	0.2	10.5
Visual, OBJ	0.3	0.9	3.2	0.3 ms	5.2	2.5	0.9	0.2	13.1

Board Repo: OLIMEX/AgonLight2-HvIO Board: AgonLight2-HvIO_Rev_A.kicad_pcb Folder HARDWARE / AgonLight2-HvIO_Rev_A Complexity 267 / 1000 (size 177, features 90) KESE features through vias, filled zones, copper text, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 62, 586, 180 Triangles, simulation 770,540 in 91 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 27 MB 423 MB STEP 131 MB 482 MB STL 39 MB 444 MB OBJ 80 MB 584 MB Visual GLB 21 MB 503 MB OBJ 62 MB 537 MB

1795. AgonLight2-HvIO_Rev_A1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.0	3.8	0.3 ms	2.7	0.1	0.4	0.3	8.6
Simulation, STEP	0.3	1.0	3.9	1 ms	2.7	2.2	0.3	0.2	10.7
Simulation, STL	0.3	1.1	3.5	0.3 ms	2.8	0.2	0.4	0.2	8.6
Simulation, OBJ	0.3	1.0	4.0	0.4 ms	2.5	3.8	0.4	0.2	12.3
Visual, GLB	0.3	1.0	3.6	0.4 ms	6.4	0.1	0.8	0.2	12.5
Visual, OBJ	0.3	0.9	3.8	0.3 ms	6.5	2.9	0.9	0.2	15.6

Board Repo: OLIMEX/AgonLight2-HvIO Board: AgonLight2-HvIO_Rev_A1.kicad_pcb Folder HARDWARE / AgonLight2-HvIO_Rev_A1 Complexity 267 / 1000 (size 177, features 90) KESE features through vias, filled zones, copper text, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 62, 586, 180 Triangles, simulation 770,556 in 91 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 27 MB 425 MB STEP 131 MB 475 MB STL 39 MB 419 MB OBJ 80 MB 582 MB Visual GLB 21 MB 542 MB OBJ 62 MB 502 MB

1796. AgonLight2-PROTO_Rev_A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.8	16.2	0.7 ms	14.5	0.4	1.3	0.3	36.0
Simulation, STEP	0.5	2.8	16.5	0.7 ms	14.6	7.7	1.2	0.3	43.6
Simulation, STL	0.5	2.8	15.9	0.9 ms	14.6	0.8	1.2	0.3	36.1
Simulation, OBJ	0.5	2.7	15.8	0.8 ms	14.3	15.9	1.2	0.3	50.7
Visual, GLB	0.5	2.8	16.4	0.8 ms	16.5	0.2	1.5	0.3	38.2
Visual, OBJ	0.5	2.8	16.0	0.8 ms	16.2	7.2	1.9	0.3	44.9

Board Repo: OLIMEX/AgonLight2-Proto Board: AgonLight2-PROTO_Rev_A.kicad_pcb Folder HARDWARE / AgonLight2-PROTO_Rev_A Complexity 224 / 1000 (size 149, features 75) KESE features through vias, filled zones, copper text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 6, 649, 71 Triangles, simulation 2,595,312 in 45 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 89 MB 885 MB STEP 320 MB 1.2 GB STL 130 MB 891 MB OBJ 275 MB 1.7 GB Visual GLB 42 MB 1.1 GB OBJ 129 MB 994 MB

1797. bb-ads1220

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	88 ms	0.2	0.8	0.2 ms	0.7	27 ms	0.1	0.2	2.2
Simulation, STEP	0.1	0.2	0.8	0.2 ms	0.7	0.9	0.1	0.2	3.0
Simulation, STL	99 ms	0.2	0.8	0.2 ms	0.7	45 ms	0.1	0.2	2.3
Simulation, OBJ	88 ms	0.2	0.8	0.2 ms	0.7	0.8	0.1	0.2	2.9
Visual, GLB	98 ms	0.2	0.8	0.2 ms	1.9	26 ms	0.2	0.2	3.4
Visual, OBJ	86 ms	0.2	0.7	0.2 ms	1.9	0.7	0.1	0.2	4.0

Board Repo: OLIMEX/BB-ADS1220 Board: bb-ads1220.kicad_pcb Folder HARDWARE / BB-ADS1220_Rev.A Complexity 153 / 1000 (size 118, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 6, 101, 10 Triangles, simulation 190,968 in 27 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 6.8 MB 208 MB STEP 35 MB 215 MB STL 9.6 MB 203 MB OBJ 19 MB 200 MB Visual GLB 5.3 MB 188 MB OBJ 15 MB 187 MB

1798. BB-ADS1262-Rev.A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	1.8	0.4 ms	1.4	70 ms	0.2	0.2	4.4
Simulation, STEP	0.2	0.4	1.9	0.3 ms	1.5	1.4	0.2	0.2	5.8
Simulation, STL	0.2	0.4	1.7	0.4 ms	1.5	0.1	0.2	0.2	4.2
Simulation, OBJ	0.2	0.4	1.9	0.3 ms	1.4	2.0	0.2	0.2	6.4
Visual, GLB	0.2	0.4	1.9	0.4 ms	3.6	55 ms	0.4	0.2	6.8
Visual, OBJ	0.2	0.4	1.8	0.3 ms	3.3	1.6	0.4	0.2	8.0

Board Repo: OLIMEX/BB-ADS1262 Board: BB-ADS1262-Rev.A.kicad_pcb Folder HARDWARE / BB-ADS1262_Rev.A1 Complexity 184 / 1000 (size 149, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171114) Parts, tracks, vias 27, 326, 9 Triangles, simulation 402,106 in 51 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 14 MB 279 MB STEP 75 MB 310 MB STL 20 MB 275 MB OBJ 42 MB 333 MB Visual GLB 12 MB 310 MB OBJ 34 MB 305 MB

1799. bb-ch340t

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	0.9	0.1 ms	1.1	31 ms	0.1	0.2	2.7
Simulation, STEP	0.2	0.3	0.9	0.2 ms	1.0	1.0	97 ms	0.3	3.8
Simulation, STL	0.1	0.3	0.9	0.1 ms	1.0	45 ms	99 ms	0.3	2.7
Simulation, OBJ	0.2	0.3	0.9	0.2 ms	1.0	1.0	97 ms	0.2	3.6
Visual, GLB	0.1	0.3	0.9	0.2 ms	1.8	28 ms	0.2	0.2	3.6
Visual, OBJ	0.2	0.3	0.9	0.2 ms	1.8	0.9	0.2	0.2	4.4

Board Repo: OLIMEX/BB-CH340T Board: bb-ch340t.kicad_pcb Folder HARDWARE / BB-CH340T-Rev.A Complexity 179 / 1000 (size 124, features 55) KESE features through vias, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 10, 109, 12 Triangles, simulation 159,360 in 31 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 5.8 MB 202 MB STEP 30 MB 219 MB STL 8.0 MB 202 MB OBJ 16 MB 202 MB Visual GLB 5.0 MB 192 MB OBJ 14 MB 191 MB

1800. bb-ch340t

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.0	0.2 ms	1.0	39 ms	0.1	0.2	2.8
Simulation, STEP	0.1	0.3	1.0	0.2 ms	0.9	1.1	0.1	0.2	3.7
Simulation, STL	0.1	0.3	1.1	0.2 ms	1.0	55 ms	0.1	0.3	3.0
Simulation, OBJ	0.1	0.3	1.1	0.2 ms	1.1	1.2	0.1	0.2	4.0
Visual, GLB	0.1	0.3	1.0	0.2 ms	2.4	35 ms	0.2	0.2	4.3
Visual, OBJ	0.1	0.3	1.1	0.2 ms	2.3	1.2	0.2	0.2	5.4

Board Repo: OLIMEX/BB-CH340T Board: bb-ch340t.kicad_pcb Folder HARDWARE / BB-CH340T-Rev.B Complexity 190 / 1000 (size 135, features 55) KESE features through vias, slotted holes, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171114) Parts, tracks, vias 15, 176, 12 Triangles, simulation 250,586 in 32 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.0 MB 222 MB STEP 48 MB 262 MB STL 13 MB 223 MB OBJ 26 MB 229 MB Visual GLB 7.3 MB 228 MB OBJ 21 MB 218 MB

1801. BB-LVL-SHIFT_Rev_A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.1	0.5	0.2 ms	0.6	25 ms	66 ms	0.2	1.6
Simulation, STEP	0.1	0.1	0.5	0.1 ms	0.6	0.9	63 ms	0.2	2.5
Simulation, STL	0.1	0.1	0.5	0.1 ms	0.6	30 ms	76 ms	0.2	1.6
Simulation, OBJ	0.1	0.1	0.5	0.1 ms	0.6	0.6	79 ms	0.2	2.2
Visual, GLB	99 ms	0.1	0.5	0.1 ms	1.5	21 ms	0.1	0.2	2.6
Visual, OBJ	0.1	0.1	0.6	0.2 ms	1.5	0.4	0.1	0.2	3.0

Board Repo: OLIMEX/BB-LVL-SHIFT Board: BB-LVL-SHIFT_Rev_A.kicad_pcb Folder HARDWARE / BB-LVL-SHIFT_Rev.A Complexity 202 / 1000 (size 122, features 80) KESE features through vias, filled zones, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 13, 85, 8 Triangles, simulation 128,976 in 23 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.6 MB 201 MB STEP 25 MB 205 MB STL 6.5 MB 192 MB OBJ 13 MB 190 MB Visual GLB 3.6 MB 159 MB OBJ 10 MB 160 MB

1802. BB-PWR-3608_revA

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.1	0.4	0.1 ms	0.5	15 ms	49 ms	0.2	1.4
Simulation, STEP	0.1	0.1	0.4	0.1 ms	0.5	0.7	51 ms	0.2	2.1
Simulation, STL	0.1	0.1	0.4	0.1 ms	0.5	21 ms	49 ms	0.2	1.4
Simulation, OBJ	0.1	0.1	0.4	0.1 ms	0.5	0.4	56 ms	0.2	1.8
Visual, GLB	97 ms	0.1	0.4	0.1 ms	1.2	12 ms	70 ms	0.2	2.1
Visual, OBJ	0.1	0.2	0.4	0.2 ms	1.1	0.3	94 ms	0.2	2.4

Board Repo: OLIMEX/BB-PWR-3608 Board: BB-PWR-3608_revA.kicad_pcb Complexity 163 / 1000 (size 118, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 13, 73, 3 Triangles, simulation 76,018 in 19 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 2.8 MB 179 MB STEP 13 MB 179 MB STL 3.8 MB 175 MB OBJ 7.7 MB 174 MB Visual GLB 2.1 MB 156 MB OBJ 5.8 MB 156 MB

1803. BB-PWR-8009_revA

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	93 ms	0.1	0.3	0.1 ms	0.5	14 ms	39 ms	0.2	1.3
Simulation, STEP	96 ms	0.1	0.4	0.1 ms	0.5	0.7	43 ms	0.2	2.0
Simulation, STL	94 ms	0.1	0.4	0.1 ms	0.5	19 ms	40 ms	0.2	1.3
Simulation, OBJ	95 ms	0.1	0.4	0.1 ms	0.5	0.4	46 ms	0.2	1.7
Visual, GLB	96 ms	0.1	0.4	0.1 ms	1.0	13 ms	82 ms	0.2	1.9
Visual, OBJ	0.1	0.1	0.4	0.1 ms	1.0	0.4	77 ms	0.2	2.3

Board Repo: OLIMEX/BB-PWR-8009 Board: BB-PWR-8009_revA.kicad_pcb Complexity 149 / 1000 (size 114, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 12, 63, 2 Triangles, simulation 80,210 in 17 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 3.0 MB 182 MB STEP 15 MB 186 MB STL 4.0 MB 176 MB OBJ 8.1 MB 180 MB Visual GLB 2.4 MB 158 MB OBJ 6.6 MB 158 MB

1804. BB-PWR-8113_revA

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.6	0.1 ms	0.7	22 ms	62 ms	0.3	2.0
Simulation, STEP	0.1	0.2	0.6	0.2 ms	0.6	0.8	56 ms	0.2	2.6
Simulation, STL	0.1	0.2	0.6	0.1 ms	0.6	28 ms	56 ms	0.3	1.9
Simulation, OBJ	0.1	0.2	0.6	0.2 ms	0.7	0.7	58 ms	0.2	2.6
Visual, GLB	0.1	0.2	0.6	0.1 ms	1.5	18 ms	0.1	0.2	2.9
Visual, OBJ	0.1	0.2	0.6	0.1 ms	1.5	0.5	0.1	0.2	3.3

Board Repo: OLIMEX/BB-PWR-8113 Board: BB-PWR-8113_revA.kicad_pcb Complexity 139 / 1000 (size 119, features 20) KESE features filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 15, 81, 0 Triangles, simulation 112,386 in 20 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.1 MB 191 MB STEP 21 MB 198 MB STL 5.6 MB 191 MB OBJ 11 MB 182 MB Visual GLB 3.4 MB 159 MB OBJ 9.3 MB 159 MB

1805. BB-TB6612FNG-Rev_A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	1.4	0.3 ms	1.1	51 ms	0.2	0.3	3.6
Simulation, STEP	0.1	0.4	1.4	0.3 ms	1.0	1.3	0.2	0.2	4.7
Simulation, STL	0.1	0.4	1.3	0.2 ms	1.1	88 ms	0.2	0.2	3.4
Simulation, OBJ	0.2	0.4	1.3	0.2 ms	1.1	1.5	0.2	0.2	4.9
Visual, GLB	0.1	0.4	1.4	0.3 ms	2.5	33 ms	0.3	0.2	5.0
Visual, OBJ	0.2	0.3	1.6	0.2 ms	2.6	1.2	0.2	0.2	6.3

Board Repo: OLIMEX/BB-TB6612 Board: BB-TB6612FNG-Rev_A.kicad_pcb Folder HARDWARE / BB-TB6612-Rev.A Complexity 167 / 1000 (size 132, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171114) Parts, tracks, vias 15, 159, 7 Triangles, simulation 273,036 in 27 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.6 MB 232 MB STEP 46 MB 248 MB STL 14 MB 222 MB OBJ 28 MB 231 MB Visual GLB 7.1 MB 211 MB OBJ 21 MB 221 MB

1806. Bike-TSL-Kit_RevA

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.2	0.3 ms	1.5	83 ms	0.3	0.2	5.2
Simulation, STEP	0.2	0.6	2.2	0.5 ms	1.6	1.6	0.3	0.2	6.7
Simulation, STL	0.2	0.7	2.2	0.2 ms	1.5	0.1	0.3	0.2	5.2
Simulation, OBJ	0.2	0.7	2.2	0.2 ms	1.5	2.7	0.3	0.2	7.9
Visual, GLB	0.2	0.7	2.3	0.3 ms	4.1	65 ms	0.5	0.2	8.1
Visual, OBJ	0.2	0.6	2.2	0.3 ms	4.1	2.2	0.5	0.2	10.1

Board Repo: OLIMEX/Bike-TSL-Kit Board: Bike-TSL-Kit_RevA.kicad_pcb Folder HARDWARE / Bike-TSL-Kit.Rev-A Complexity 206 / 1000 (size 161, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 46, 390, 45 Triangles, simulation 445,982 in 50 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 16 MB 300 MB STEP 82 MB 338 MB STL 22 MB 299 MB OBJ 47 MB 360 MB Visual GLB 14 MB 351 MB OBJ 40 MB 362 MB

1807. DCDC-50-5-12_Rev_A1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.8	2.2	0.2 ms	1.9	94 ms	0.3	0.3	5.8
Simulation, STEP	0.3	0.7	2.0	0.2 ms	2.0	1.5	0.3	0.3	7.0
Simulation, STL	0.2	0.7	2.1	0.3 ms	2.0	0.2	0.3	0.2	5.7
Simulation, OBJ	0.2	0.7	2.0	0.3 ms	2.2	2.9	0.3	0.3	8.7
Visual, GLB	0.2	0.7	2.0	0.2 ms	3.8	62 ms	0.6	0.3	7.7
Visual, OBJ	0.2	0.7	1.6	0.2 ms	3.8	2.0	0.6	0.2	9.3

Board Repo: OLIMEX/DCDC-50-5-12 Board: DCDC-50-5-12_Rev_A1.kicad_pcb Folder HARDWARE / DCDC50-5-12-Rev.A1 Complexity 233 / 1000 (size 178, features 55) KESE features through vias, slotted holes, filled zones, copper text Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 28, 295, 142 Triangles, simulation 636,148 in 35 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 22 MB 337 MB STEP 68 MB 410 MB STL 32 MB 351 MB OBJ 65 MB 467 MB Visual GLB 13 MB 346 MB OBJ 40 MB 359 MB

1808. TERES_PCB1-A64-MAIN_Rev.B

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.7	10.0	37.6	2 ms	34.1	1.8	5.9	0.5	91.7
Simulation, STEP	1.7	10.1	39.1	1 ms	35.1	19.7	5.3	0.4	111.4
Simulation, STL	1.6	10.4	43.2	1 ms	34.3	4.2	5.7	0.5	99.9
Simulation, OBJ	1.6	9.8	41.2	1 ms	34.0	45.4	5.7	0.4	138.1
Visual, GLB	1.7	10.0	39.6	2 ms	78.1	0.7	7.7	0.4	138.2
Visual, OBJ	1.8	9.8	38.2	1 ms	79.5	24.5	9.5	0.4	163.7

Board Repo: OLIMEX/DIY-LAPTOP Board: TERES_PCB1-A64-MAIN_Rev.B.kicad_pcb Folder HARDWARE / A64-TERES / TERES-PCB1-A64-MAIN / Rev.B Complexity 381 / 1000 (size 336, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 6 File format KiCad 5 (20160815) Parts, tracks, vias 400, 13,060, 1,291 Triangles, simulation 9,712,620 in 480 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 337 MB 2.4 GB STEP 1.3 GB 3.1 GB STL 486 MB 2.4 GB OBJ 1.1 GB 6.2 GB Visual GLB 186 MB 2.9 GB OBJ 607 MB 4.0 GB

1809. TERES_PCB1-A64-MAIN_Rev.C

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.9	14.4	48.7	2 ms	45.1	2.3	6.9	0.5	119.8
Simulation, STEP	1.7	14.1	48.1	2 ms	44.1	21.2	6.4	0.5	136.2
Simulation, STL	1.8	14.1	47.5	1 ms	45.6	4.8	6.9	0.5	121.2
Simulation, OBJ	1.7	14.2	49.4	1 ms	45.5	69.0	6.6	0.5	186.9
Visual, GLB	1.7	14.2	48.4	2 ms	101.2	1.0	12.0	0.4	179.1
Visual, OBJ	1.8	13.5	47.6	1 ms	98.3	32.1	11.4	0.3	205.1

Board Repo: OLIMEX/DIY-LAPTOP Board: TERES_PCB1-A64-MAIN_Rev.C.kicad_pcb Folder HARDWARE / A64-TERES / TERES-PCB1-A64-MAIN / Rev.C Complexity 364 / 1000 (size 339, features 25) KESE features through vias, slotted holes Tested 9th November 2026 Copper layers 6 File format KiCad 5 (20171114) Parts, tracks, vias 416, 15,612, 1,594 Triangles, simulation 10,472,450 in 492 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 362 MB 2.3 GB STEP 1.3 GB 3.3 GB STL 524 MB 2.4 GB OBJ 1.1 GB 6.5 GB Visual GLB 197 MB 3.2 GB OBJ 648 MB 4.3 GB

1810. TERES-PCB2-IO_Rev.B

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	1.0	0.2 ms	1.0	44 ms	0.1	0.2	2.7
Simulation, STEP	0.1	0.2	1.0	0.1 ms	1.0	1.0	0.1	0.2	3.6
Simulation, STL	0.1	0.2	1.0	0.3 ms	1.0	71 ms	0.2	0.2	2.8
Simulation, OBJ	0.1	0.2	1.0	0.2 ms	0.9	1.0	0.1	0.2	3.7
Visual, GLB	0.1	0.2	1.0	0.2 ms	2.1	31 ms	0.2	0.2	3.8
Visual, OBJ	0.1	0.2	1.0	0.2 ms	2.3	1.0	0.3	0.2	5.1

Board Repo: OLIMEX/DIY-LAPTOP Board: TERES-PCB2-IO_Rev.B.kicad_pcb Folder HARDWARE / A64-TERES / TERES-PCB2-IO / Rev.B Complexity 194 / 1000 (size 149, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20160815) Parts, tracks, vias 18, 379, 24 Triangles, simulation 271,896 in 41 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.8 MB 236 MB STEP 51 MB 264 MB STL 14 MB 235 MB OBJ 28 MB 236 MB Visual GLB 7.9 MB 248 MB OBJ 23 MB 244 MB

1811. TERES-PCB3-TOUCH-BTN_Rev.A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.5	0.1 ms	0.6	24 ms	80 ms	0.2	1.7
Simulation, STEP	0.1	0.2	0.5	0.1 ms	0.6	0.8	74 ms	0.2	2.5
Simulation, STL	0.1	0.2	0.6	0.1 ms	0.6	38 ms	78 ms	0.2	1.8
Simulation, OBJ	99 ms	0.2	0.5	0.1 ms	0.6	0.8	78 ms	0.2	2.5
Visual, GLB	98 ms	0.1	0.6	0.1 ms	1.5	20 ms	0.1	0.2	2.6
Visual, OBJ	0.1	0.2	0.5	0.1 ms	1.5	0.6	0.1	0.2	3.3

Board Repo: OLIMEX/DIY-LAPTOP Board: TERES-PCB3-TOUCH-BTN_Rev.A.kicad_pcb Folder HARDWARE / A64-TERES / TERES-PCB3-TOUCH-BTN / Rev.A Complexity 153 / 1000 (size 118, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20160815) Parts, tracks, vias 6, 87, 14 Triangles, simulation 150,842 in 20 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 5.4 MB 207 MB STEP 26 MB 214 MB STL 7.5 MB 202 MB OBJ 15 MB 209 MB Visual GLB 4.6 MB 177 MB OBJ 13 MB 181 MB

1812. PCB4-PWR-BTN_Rev.A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	79 ms	71 ms	0.3	0.1 ms	0.5	13 ms	35 ms	0.3	1.2
Simulation, STEP	82 ms	76 ms	0.2	0.1 ms	0.4	0.7	42 ms	0.2	1.7
Simulation, STL	77 ms	81 ms	0.3	0.1 ms	0.4	15 ms	39 ms	0.2	1.1
Simulation, OBJ	85 ms	80 ms	0.3	0.1 ms	0.5	0.3	38 ms	0.2	1.5
Visual, GLB	85 ms	88 ms	0.3	0.1 ms	1.0	8 ms	54 ms	0.2	1.7
Visual, OBJ	72 ms	72 ms	0.3	0.4 ms	0.9	0.2	60 ms	0.2	1.8

Board Repo: OLIMEX/DIY-LAPTOP Board: PCB4-PWR-BTN_Rev.A.kicad_pcb Folder HARDWARE / A64-TERES / TERES-PCB4-PWR-BTN / Rev.A Complexity 137 / 1000 (size 102, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20160815) Parts, tracks, vias 2, 43, 14 Triangles, simulation 68,078 in 14 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 2.4 MB 171 MB STEP 11 MB 176 MB STL 3.4 MB 170 MB OBJ 6.6 MB 170 MB Visual GLB 2.0 MB 151 MB OBJ 5.4 MB 152 MB

1813. TERES-PCB5-KEYBOARD_Rev.A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.7	3.0	0.5 ms	2.3	0.1	0.3	0.2	6.9
Simulation, STEP	0.3	0.8	3.0	0.4 ms	2.4	1.8	0.4	0.2	8.8
Simulation, STL	0.3	0.8	3.0	0.3 ms	2.3	0.1	0.3	0.2	7.1
Simulation, OBJ	0.3	0.8	3.0	0.3 ms	2.4	3.4	0.4	0.2	10.5
Visual, GLB	0.3	0.8	3.0	0.3 ms	5.6	0.1	0.6	0.2	10.6
Visual, OBJ	0.3	0.8	3.1	0.4 ms	5.8	3.2	0.6	0.2	14.0

Board Repo: OLIMEX/DIY-LAPTOP Board: TERES-PCB5-KEYBOARD_Rev.A.kicad_pcb Folder HARDWARE / A64-TERES / TERES-PCB5-KEYBOARD / Rev.A Complexity 247 / 1000 (size 212, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20170123) Parts, tracks, vias 46, 778, 76 Triangles, simulation 600,674 in 55 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 22 MB 350 MB STEP 117 MB 421 MB STL 30 MB 365 MB OBJ 64 MB 460 MB Visual GLB 20 MB 482 MB OBJ 59 MB 482 MB

1814. eduArdu_Rev_A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	2.0	7.3	1.0 ms	5.3	0.3	0.7	0.3	16.1
Simulation, STEP	0.4	2.0	7.4	0.7 ms	5.0	4.1	0.7	0.3	19.9
Simulation, STL	0.4	1.9	7.0	1 ms	5.2	0.6	0.7	0.3	16.2
Simulation, OBJ	0.4	2.0	7.2	1 ms	4.9	7.4	0.7	0.2	22.9
Visual, GLB	0.4	2.1	7.0	1 ms	12.5	0.2	1.6	0.2	24.0
Visual, OBJ	0.4	2.1	6.7	0.9 ms	12.6	5.6	1.5	0.2	29.1

Board Repo: OLIMEX/eduArdu Board: eduArdu_Rev_A.kicad_pcb Folder HARDWARE / eduArdu_Rev_A Complexity 285 / 1000 (size 230, features 55) KESE features through vias, slotted holes, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 101, 1,356, 158 Triangles, simulation 1,603,596 in 116 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 56 MB 624 MB STEP 292 MB 728 MB STL 80 MB 628 MB OBJ 170 MB 1.1 GB Visual GLB 42 MB 753 MB OBJ 128 MB 950 MB

1815. eduArdu_Rev_B

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	2.4	8.6	1 ms	5.9	0.3	0.8	0.3	18.8
Simulation, STEP	0.5	2.4	8.6	0.9 ms	6.0	4.8	0.8	0.2	23.4
Simulation, STL	0.4	2.4	8.5	0.8 ms	5.9	0.5	0.8	0.3	18.8
Simulation, OBJ	0.5	2.4	8.5	0.8 ms	6.0	10.1	0.9	0.3	28.7
Visual, GLB	0.5	2.4	8.6	1.0 ms	14.5	0.2	1.5	0.2	27.9
Visual, OBJ	0.5	2.4	8.5	1 ms	14.7	7.1	1.7	0.3	35.2

Board Repo: OLIMEX/eduArdu Board: eduArdu_Rev_B.kicad_pcb Folder HARDWARE / eduArdu_Rev_B Complexity 285 / 1000 (size 230, features 55) KESE features through vias, slotted holes, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 101, 1,377, 168 Triangles, simulation 1,628,488 in 116 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 57 MB 646 MB STEP 296 MB 754 MB STL 81 MB 673 MB OBJ 172 MB 1.1 GB Visual GLB 43 MB 814 MB OBJ 131 MB 979 MB

1816. ESP-PROG_Rev.C

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.1	0.2 ms	1.0	45 ms	0.2	0.2	3.0
Simulation, STEP	0.1	0.3	1.1	0.2 ms	1.0	1.2	0.2	0.2	4.2
Simulation, STL	0.1	0.3	1.1	0.3 ms	1.0	69 ms	0.2	0.2	3.0
Simulation, OBJ	0.1	0.3	1.2	0.2 ms	1.1	1.3	0.2	0.3	4.4
Visual, GLB	0.1	0.3	1.1	0.2 ms	2.5	38 ms	0.3	0.3	4.6
Visual, OBJ	0.1	0.3	1.1	0.2 ms	2.6	1.1	0.2	0.2	5.7

Board Repo: OLIMEX/ESP-PROG Board: ESP-PROG_Rev.C.kicad_pcb Folder HARDWARE / ESP-PROG-Rev.C Complexity 184 / 1000 (size 139, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 16, 204, 19 Triangles, simulation 277,428 in 36 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.9 MB 245 MB STEP 53 MB 256 MB STL 14 MB 237 MB OBJ 28 MB 243 MB Visual GLB 7.9 MB 235 MB OBJ 23 MB 234 MB

1817. ESP32-C3-DevKit-Lipo_Rev_A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	2.9	0.3 ms	2.2	95 ms	0.3	0.2	6.5
Simulation, STEP	0.3	0.6	2.8	0.4 ms	2.2	1.7	0.3	0.2	8.0
Simulation, STL	0.3	0.6	2.9	0.5 ms	2.1	0.2	0.3	0.2	6.6
Simulation, OBJ	0.3	0.6	2.8	0.3 ms	2.1	3.0	0.3	0.2	9.2
Visual, GLB	0.3	0.6	2.8	0.3 ms	5.6	86 ms	0.9	0.2	10.5
Visual, OBJ	0.3	0.6	2.8	0.4 ms	5.3	2.5	0.9	0.2	12.6

Board Repo: OLIMEX/ESP32-C3-DevKit-Lipo Board: ESP32-C3-DevKit-Lipo_Rev_A.kicad_pcb Folder HARDWARE / ESP32-C3-DevKit-Lipo_Rev_A Complexity 224 / 1000 (size 169, features 55) KESE features through vias, slotted holes, filled zones, copper text Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 41, 713, 63 Triangles, simulation 711,980 in 67 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 25 MB 372 MB STEP 140 MB 455 MB STL 36 MB 387 MB OBJ 74 MB 537 MB Visual GLB 21 MB 484 MB OBJ 63 MB 475 MB

1818. ESP32-C3-DevKit-Lipo_Rev_B

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	0.7	3.3	0.5 ms	2.5	0.1	0.3	0.3	7.6
Simulation, STEP	0.3	0.8	3.4	0.4 ms	2.5	2.1	0.3	0.2	9.7
Simulation, STL	0.4	0.8	3.3	0.4 ms	2.5	0.2	0.4	0.3	7.7
Simulation, OBJ	0.3	0.7	3.4	0.5 ms	2.6	3.4	0.3	0.2	10.9
Visual, GLB	0.3	0.8	3.4	0.4 ms	6.4	0.1	0.8	0.3	12.1
Visual, OBJ	0.3	0.8	3.4	0.4 ms	6.7	3.1	0.9	0.3	15.5

Board Repo: OLIMEX/ESP32-C3-DevKit-Lipo Board: ESP32-C3-DevKit-Lipo_Rev_B.kicad_pcb Folder HARDWARE / ESP32-C3-DevKit-Lipo_Rev_B Complexity 224 / 1000 (size 169, features 55) KESE features through vias, slotted holes, filled zones, copper text Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 42, 740, 61 Triangles, simulation 712,360 in 68 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 25 MB 367 MB STEP 141 MB 452 MB STL 36 MB 388 MB OBJ 74 MB 525 MB Visual GLB 21 MB 502 MB OBJ 63 MB 499 MB

1819. ESP32-C3-DevKit-Lipo_Rev_C

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.7	2.6	0.4 ms	2.3	0.1	0.3	0.2	6.6
Simulation, STEP	0.3	0.7	2.7	0.4 ms	2.4	2.0	0.3	0.3	8.8
Simulation, STL	0.3	0.7	2.6	0.4 ms	2.2	0.2	0.3	0.2	6.5
Simulation, OBJ	0.3	0.7	2.4	0.4 ms	2.2	2.9	0.3	0.3	9.2
Visual, GLB	0.3	0.6	2.6	0.7 ms	6.0	91 ms	0.7	0.3	10.7
Visual, OBJ	0.3	0.7	2.6	0.5 ms	5.5	2.8	0.9	0.3	13.1

Board Repo: OLIMEX/ESP32-C3-DevKit-Lipo Board: ESP32-C3-DevKit-Lipo_Rev_C.kicad_pcb Folder HARDWARE / ESP32-C3-DevKit-Lipo_Rev_C Complexity 241 / 1000 (size 171, features 70) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, knockout text Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 43, 768, 88 Triangles, simulation 667,752 in 67 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 24 MB 409 MB STEP 135 MB 425 MB STL 33 MB 410 MB OBJ 70 MB 498 MB Visual GLB 20 MB 479 MB OBJ 60 MB 485 MB

1820. ESP32-C3-DevKit-Lipo_Rev_D

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.6	2.9	0.6 ms	2.4	0.1	0.3	0.3	6.8
Simulation, STEP	0.3	0.8	2.9	0.5 ms	2.3	2.0	0.3	0.3	9.0
Simulation, STL	0.3	0.6	2.7	0.6 ms	2.2	0.2	0.3	0.2	6.5
Simulation, OBJ	0.3	0.8	2.6	0.4 ms	2.3	3.2	0.4	0.2	9.8
Visual, GLB	0.3	0.8	2.7	0.4 ms	6.1	95 ms	0.8	0.2	11.0
Visual, OBJ	0.3	0.7	3.0	0.6 ms	5.8	2.9	0.8	0.2	13.7

Board Repo: OLIMEX/ESP32-C3-DevKit-Lipo Board: ESP32-C3-DevKit-Lipo_Rev_D.kicad_pcb Folder HARDWARE / ESP32-C3-DevKit-Lipo_Rev_D Complexity 242 / 1000 (size 172, features 70) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, knockout text Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 43, 799, 88 Triangles, simulation 676,008 in 67 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 24 MB 386 MB STEP 138 MB 441 MB STL 34 MB 421 MB OBJ 71 MB 506 MB Visual GLB 21 MB 508 MB OBJ 61 MB 491 MB

1821. ESP32-C5-DevKit-Lipo_Rev_A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	1.0	4.1	0.8 ms	3.5	0.2	0.4	0.3	10.1
Simulation, STEP	0.6	1.1	4.2	0.4 ms	3.7	2.8	0.5	0.2	13.1
Simulation, STL	0.6	1.1	4.3	0.4 ms	3.7	0.3	0.6	0.3	10.8
Simulation, OBJ	0.6	1.1	4.3	0.5 ms	3.8	5.9	0.5	0.3	16.4
Visual, GLB	0.6	1.0	4.1	0.5 ms	9.3	0.1	1.1	0.3	16.6
Visual, OBJ	0.6	1.0	4.1	0.5 ms	9.0	4.5	1.3	0.2	20.6

Board Repo: OLIMEX/ESP32-C5-DevKit-Lipo Board: ESP32-C5-DevKit-Lipo_Rev_A.kicad_pcb Folder HARDWARE / ESP32-C5-DevKit-Lipo-Rev.A Complexity 296 / 1000 (size 191, features 105) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, knockout text, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 72, 2,143, 108 Triangles, simulation 906,752 in 84 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 32 MB 457 MB STEP 175 MB 509 MB STL 45 MB 449 MB OBJ 95 MB 670 MB Visual GLB 26 MB 592 MB OBJ 76 MB 598 MB

1822. ESP32-C5-EVB_Rev_A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.2	5.4	0.7 ms	3.9	0.2	0.5	0.2	11.9
Simulation, STEP	0.5	1.3	5.2	0.5 ms	3.9	3.0	0.5	0.2	14.6
Simulation, STL	0.5	1.4	5.5	0.5 ms	4.2	0.4	0.5	0.2	12.7
Simulation, OBJ	0.5	1.2	5.3	0.4 ms	3.9	5.7	0.5	0.2	17.4
Visual, GLB	0.5	1.2	5.5	0.5 ms	9.1	0.1	1.1	0.2	17.7
Visual, OBJ	0.5	1.3	5.3	0.5 ms	8.5	4.5	1.0	0.2	21.3

Board Repo: OLIMEX/ESP32-C5-EVB Board: ESP32-C5-EVB_Rev_A.kicad_pcb Folder HARDWARE / ESP32-C5-EVB-Rev.A Complexity 291 / 1000 (size 191, features 100) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 113, 1,157, 208 Triangles, simulation 1,127,592 in 105 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 40 MB 502 MB STEP 212 MB 602 MB STL 56 MB 492 MB OBJ 118 MB 798 MB Visual GLB 32 MB 630 MB OBJ 95 MB 687 MB

1823. ESP32-C6-DevKit-Lipo_Rev_A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	0.9	3.7	0.5 ms	3.5	0.2	0.5	0.3	9.4
Simulation, STEP	0.4	1.0	3.7	0.7 ms	3.4	2.5	0.5	0.2	11.7
Simulation, STL	0.4	0.8	3.5	0.3 ms	3.5	0.2	0.5	0.2	9.2
Simulation, OBJ	0.5	0.9	3.8	0.3 ms	3.4	4.8	0.5	0.2	14.2
Visual, GLB	0.4	0.9	3.7	0.3 ms	7.9	0.1	0.8	0.3	14.2
Visual, OBJ	0.4	0.9	3.5	0.3 ms	7.9	3.7	0.9	0.2	17.6

Board Repo: OLIMEX/ESP32-C6-DevKit-Lipo Board: ESP32-C6-DevKit-Lipo_Rev_A.kicad_pcb Folder HARDWARE / ESP32-C6-DevKit-Lipo.Rev.A Complexity 250 / 1000 (size 180, features 70) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, knockout text Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 71, 924, 115 Triangles, simulation 791,576 in 88 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 28 MB 400 MB STEP 156 MB 464 MB STL 40 MB 433 MB OBJ 83 MB 578 MB Visual GLB 22 MB 517 MB OBJ 67 MB 519 MB

1824. ESP32-C6-EVB_DIMM_Rev_A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.5	6.6	0.5 ms	4.3	0.2	0.6	0.3	14.1
Simulation, STEP	0.5	1.5	6.8	0.7 ms	4.5	3.7	0.6	0.2	17.8
Simulation, STL	0.5	1.5	6.8	0.5 ms	4.5	0.3	0.6	0.2	14.5
Simulation, OBJ	0.5	1.6	6.8	1 ms	4.3	7.5	0.6	0.2	21.5
Visual, GLB	0.6	1.6	6.8	0.7 ms	11.1	0.2	1.4	0.3	21.9
Visual, OBJ	0.6	1.6	6.7	1 ms	11.3	5.4	1.7	0.3	27.6

Board Repo: OLIMEX/ESP32-C6-EVB Board: ESP32-C6-EVB_DIMM_Rev_A.kicad_pcb Folder HARDWARE / Dimensions Complexity 252 / 1000 (size 187, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 102, 1,162, 124 Triangles, simulation 1,212,336 in 99 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 43 MB 563 MB STEP 226 MB 643 MB STL 61 MB 512 MB OBJ 128 MB 846 MB Visual GLB 34 MB 644 MB OBJ 102 MB 736 MB

1825. ESP32-C6-EVB_Rev_A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	1.6	6.4	0.5 ms	4.3	0.2	0.6	0.2	13.8
Simulation, STEP	0.4	1.4	6.5	0.7 ms	4.4	3.6	0.6	0.2	17.2
Simulation, STL	0.4	1.4	6.4	0.5 ms	4.5	0.4	0.6	0.2	14.0
Simulation, OBJ	0.5	1.4	6.4	0.5 ms	4.5	7.0	0.6	0.3	20.6
Visual, GLB	0.5	1.5	6.3	0.6 ms	10.7	0.2	1.1	0.2	20.6
Visual, OBJ	0.5	1.5	6.6	2 ms	10.8	5.7	1.1	0.3	26.4

Board Repo: OLIMEX/ESP32-C6-EVB Board: ESP32-C6-EVB_Rev_A.kicad_pcb Folder HARDWARE / Hardware-revision-A Complexity 252 / 1000 (size 187, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 102, 1,162, 124 Triangles, simulation 1,271,824 in 99 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 45 MB 543 MB STEP 237 MB 662 MB STL 64 MB 551 MB OBJ 134 MB 876 MB Visual GLB 36 MB 767 MB OBJ 108 MB 791 MB

1826. ESP32-DevKit-Lipo_Rev_A1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.4	5.1	0.7 ms	4.4	0.2	0.5	0.3	12.3
Simulation, STEP	0.4	1.4	5.3	0.4 ms	4.4	3.1	0.5	0.2	15.2
Simulation, STL	0.3	1.3	5.3	0.7 ms	4.2	0.4	0.5	0.2	12.3
Simulation, OBJ	0.3	1.3	5.0	0.4 ms	4.3	5.9	0.5	0.3	17.6
Visual, GLB	0.3	1.4	5.1	0.6 ms	10.1	0.2	1.1	0.2	18.4
Visual, OBJ	0.4	1.3	5.0	0.5 ms	9.8	4.6	1.1	0.3	22.4

Board Repo: OLIMEX/ESP32-DevKit-LiPo Board: ESP32-DevKit-Lipo_Rev_A1.kicad_pcb Folder HARDWARE / ESP32-DevKit-LiPo-Rev.A1 Complexity 221 / 1000 (size 176, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 40, 1,154, 96 Triangles, simulation 957,920 in 79 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 34 MB 448 MB STEP 194 MB 521 MB STL 48 MB 433 MB OBJ 100 MB 691 MB Visual GLB 28 MB 619 MB OBJ 82 MB 629 MB

1827. ESP32-DevKit-Lipo_Rev_B

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.1	4.9	0.6 ms	3.8	0.1	0.5	0.3	11.1
Simulation, STEP	0.4	0.9	4.5	0.3 ms	3.7	2.7	0.5	0.3	12.9
Simulation, STL	0.3	1.1	4.6	0.3 ms	3.7	0.3	0.5	0.2	10.8
Simulation, OBJ	0.3	1.1	4.7	0.2 ms	3.8	4.7	0.5	0.2	15.3
Visual, GLB	0.4	1.2	4.8	0.3 ms	9.6	0.2	1.4	0.3	17.9
Visual, OBJ	0.4	1.1	4.7	0.4 ms	9.6	3.9	1.1	0.3	21.2

Board Repo: OLIMEX/ESP32-DevKit-LiPo Board: ESP32-DevKit-Lipo_Rev_B.kicad_pcb Folder HARDWARE / ESP32-DevKit-LiPo-Rev.B Complexity 237 / 1000 (size 182, features 55) KESE features through vias, slotted holes, filled zones, copper text Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 47, 1,463, 112 Triangles, simulation 1,008,518 in 84 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 36 MB 466 MB STEP 197 MB 569 MB STL 50 MB 466 MB OBJ 105 MB 712 MB Visual GLB 30 MB 624 MB OBJ 90 MB 696 MB

1828. ESP32-DevKit-Lipo_Rev_C

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.1	5.1	0.3 ms	3.7	0.2	0.4	0.2	11.1
Simulation, STEP	0.4	1.2	4.9	0.2 ms	3.9	3.0	0.5	0.2	14.0
Simulation, STL	0.4	1.2	5.1	0.4 ms	3.9	0.2	0.5	0.2	11.5
Simulation, OBJ	0.4	1.2	4.8	0.4 ms	3.9	5.8	0.5	0.3	16.8
Visual, GLB	0.4	1.3	5.0	0.4 ms	9.6	0.1	1.1	0.2	17.8
Visual, OBJ	0.4	1.2	4.8	0.3 ms	11.0	5.5	1.2	0.3	24.4

Board Repo: OLIMEX/ESP32-DevKit-LiPo Board: ESP32-DevKit-Lipo_Rev_C.kicad_pcb Folder HARDWARE / ESP32-DevKit-LiPo-Rev.C Complexity 237 / 1000 (size 182, features 55) KESE features through vias, slotted holes, filled zones, copper text Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 48, 1,469, 112 Triangles, simulation 991,152 in 84 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 35 MB 461 MB STEP 192 MB 554 MB STL 50 MB 453 MB OBJ 104 MB 714 MB Visual GLB 30 MB 624 MB OBJ 88 MB 688 MB

1829. ESP32-DevKit-Lipo_Rev_D

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.1	4.8	0.6 ms	3.7	0.2	0.5	0.2	10.9
Simulation, STEP	0.3	1.1	4.8	0.6 ms	3.8	3.0	0.4	0.3	13.8
Simulation, STL	0.4	1.1	4.8	0.6 ms	3.9	0.4	0.6	0.3	11.4
Simulation, OBJ	0.3	1.1	4.9	0.6 ms	3.7	5.0	0.5	0.2	15.8
Visual, GLB	0.3	1.1	4.8	0.4 ms	9.5	0.2	1.4	0.2	17.6
Visual, OBJ	0.3	1.1	4.8	0.5 ms	9.6	4.1	1.3	0.3	21.6

Board Repo: OLIMEX/ESP32-DevKit-LiPo Board: ESP32-DevKit-Lipo_Rev_D.kicad_pcb Folder HARDWARE / ESP32-DevKit-LiPo-Rev.D Complexity 223 / 1000 (size 178, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 44, 1,221, 108 Triangles, simulation 989,400 in 76 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 35 MB 504 MB STEP 195 MB 559 MB STL 49 MB 474 MB OBJ 103 MB 697 MB Visual GLB 30 MB 653 MB OBJ 89 MB 676 MB

1830. ESP32-EVB_Rev_A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.0	8.3	2 ms	6.3	0.3	1.0	0.2	18.6
Simulation, STEP	0.5	2.1	8.1	0.8 ms	6.7	4.5	1.0	0.2	23.1
Simulation, STL	0.6	2.1	8.6	0.6 ms	6.8	0.5	0.9	0.2	19.8
Simulation, OBJ	0.5	2.0	8.0	0.6 ms	6.5	10.6	1.1	0.2	28.9
Visual, GLB	0.5	2.3	8.3	0.7 ms	16.3	0.2	1.2	0.2	29.1
Visual, OBJ	0.6	2.1	8.1	0.6 ms	16.8	7.3	1.4	0.3	36.6

Board Repo: OLIMEX/ESP32-EVB Board: ESP32-EVB_Rev_A.kicad_pcb Folder HARDWARE / REV-A Complexity 269 / 1000 (size 234, features 35) KESE features through vias, slotted holes, copper text Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20160815) Parts, tracks, vias 106, 1,818, 162 Triangles, simulation 1,854,502 in 105 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 65 MB 617 MB STEP 284 MB 725 MB STL 93 MB 622 MB OBJ 200 MB 1.3 GB Visual GLB 42 MB 763 MB OBJ 128 MB 938 MB

1831. ESP32-EVB_Rev_B

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.2	10.9	0.8 ms	8.3	0.3	1.0	0.2	23.4
Simulation, STEP	0.6	2.3	10.8	1.0 ms	8.1	5.5	1.1	0.2	28.6
Simulation, STL	0.5	1.9	10.6	1 ms	8.8	0.7	1.1	0.2	23.8
Simulation, OBJ	0.6	2.3	11.1	0.7 ms	8.6	10.6	1.1	0.3	34.6
Visual, GLB	0.5	2.2	11.0	1 ms	20.3	0.3	2.6	0.2	37.2
Visual, OBJ	0.6	2.1	11.0	0.8 ms	21.0	8.6	2.7	0.3	46.2

Board Repo: OLIMEX/ESP32-EVB Board: ESP32-EVB_Rev_B.kicad_pcb Folder HARDWARE / REV-B Complexity 300 / 1000 (size 245, features 55) KESE features through vias, slotted holes, filled zones, copper text Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20170123) Parts, tracks, vias 144, 2,751, 310 Triangles, simulation 2,202,244 in 143 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 78 MB 918 MB STEP 424 MB 965 MB STL 110 MB 872 MB OBJ 237 MB 1.5 GB Visual GLB 61 MB 1.0 GB OBJ 188 MB 1.3 GB

1832. ESP32-EVB_Rev_C

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.2	10.8	0.9 ms	8.6	0.3	1.1	0.3	23.8
Simulation, STEP	0.5	2.2	11.2	0.9 ms	8.7	5.5	1.1	0.2	29.4
Simulation, STL	0.6	2.1	10.8	1.0 ms	8.6	0.6	1.2	0.3	24.1
Simulation, OBJ	0.6	2.2	10.7	1 ms	8.6	10.7	1.3	0.3	34.3
Visual, GLB	0.5	2.2	10.7	0.9 ms	20.5	0.3	2.5	0.3	36.9
Visual, OBJ	0.5	2.0	11.0	1 ms	20.9	8.1	3.0	0.2	45.8

Board Repo: OLIMEX/ESP32-EVB Board: ESP32-EVB_Rev_C.kicad_pcb Folder HARDWARE / REV-C Complexity 300 / 1000 (size 245, features 55) KESE features through vias, slotted holes, filled zones, copper text Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20170123) Parts, tracks, vias 144, 2,790, 317 Triangles, simulation 2,217,096 in 143 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 78 MB 774 MB STEP 427 MB 995 MB STL 111 MB 836 MB OBJ 238 MB 1.5 GB Visual GLB 62 MB 1.2 GB OBJ 190 MB 1.3 GB

1833. ESP32-EVB_Rev_D

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.4	12.4	1 ms	9.6	0.4	1.3	0.3	26.9
Simulation, STEP	0.5	2.2	12.1	1.0 ms	9.5	6.3	1.3	0.3	32.2
Simulation, STL	0.7	2.4	12.6	0.8 ms	10.0	0.9	1.4	0.3	28.1
Simulation, OBJ	0.6	2.4	12.3	1.0 ms	9.7	11.1	1.4	0.3	37.8
Visual, GLB	0.6	2.4	12.5	1 ms	23.9	0.3	3.6	0.3	43.5
Visual, OBJ	0.7	2.4	12.2	1 ms	23.7	9.4	3.6	0.3	52.3

Board Repo: OLIMEX/ESP32-EVB Board: ESP32-EVB_Rev_D.kicad_pcb Folder HARDWARE / REV-D Complexity 301 / 1000 (size 246, features 55) KESE features through vias, slotted holes, filled zones, copper text Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20170123) Parts, tracks, vias 146, 2,818, 315 Triangles, simulation 2,219,460 in 143 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 78 MB 775 MB STEP 428 MB 1.0 GB STL 111 MB 801 MB OBJ 239 MB 1.5 GB Visual GLB 62 MB 1.1 GB OBJ 190 MB 1.3 GB

1834. ESP32-EVB_Rev_F

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	2.8	12.9	1.0 ms	11.1	0.4	1.5	0.3	29.8
Simulation, STEP	0.8	2.8	13.3	1 ms	10.8	6.9	1.4	0.3	36.3
Simulation, STL	0.7	2.8	12.9	1 ms	10.3	0.7	1.4	0.3	29.1
Simulation, OBJ	0.8	2.6	13.1	0.7 ms	10.7	14.9	1.4	0.2	43.6
Visual, GLB	0.8	2.6	12.8	0.8 ms	24.0	0.4	2.5	0.3	43.3
Visual, OBJ	0.7	2.7	12.6	0.7 ms	24.8	10.9	2.5	0.3	54.6

Board Repo: OLIMEX/ESP32-EVB Board: ESP32-EVB_Rev_F.kicad_pcb Folder HARDWARE / REV-F Complexity 301 / 1000 (size 246, features 55) KESE features through vias, slotted holes, filled zones, copper text Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 148, 2,880, 303 Triangles, simulation 2,246,438 in 143 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 79 MB 931 MB STEP 438 MB 1.0 GB STL 112 MB 916 MB OBJ 242 MB 1.5 GB Visual GLB 63 MB 1.1 GB OBJ 193 MB 1.4 GB

1835. ESP32-EVB_Rev_H

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.3	11.1	0.7 ms	9.7	0.3	1.2	0.3	25.6
Simulation, STEP	0.6	2.3	11.1	0.7 ms	9.6	6.2	1.2	0.3	31.2
Simulation, STL	0.6	2.4	11.3	0.7 ms	9.7	0.6	1.1	0.3	26.0
Simulation, OBJ	0.7	2.4	11.5	1 ms	9.8	12.0	1.1	0.3	37.7
Visual, GLB	0.6	2.3	11.0	0.7 ms	21.0	0.3	2.0	0.2	37.5
Visual, OBJ	0.6	2.4	11.1	0.6 ms	20.9	9.5	2.2	0.2	46.9

Board Repo: OLIMEX/ESP32-EVB Board: ESP32-EVB_Rev_H.kicad_pcb Folder HARDWARE / REV-H Complexity 291 / 1000 (size 246, features 45) KESE features through vias, slotted holes, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 146, 2,965, 310 Triangles, simulation 2,248,598 in 140 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 79 MB 846 MB STEP 430 MB 1.0 GB STL 112 MB 936 MB OBJ 242 MB 1.5 GB Visual GLB 64 MB 1.1 GB OBJ 197 MB 1.3 GB

1836. ESP32-EVB_Rev_I

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.1	9.9	0.8 ms	8.5	0.3	1.0	0.2	22.5
Simulation, STEP	0.5	1.9	9.5	0.8 ms	8.7	5.2	1.0	0.2	27.1
Simulation, STL	0.6	1.9	9.7	0.9 ms	8.3	0.6	1.0	0.2	22.3
Simulation, OBJ	0.5	1.9	9.4	1 ms	8.5	9.2	1.1	0.2	30.9
Visual, GLB	0.6	1.8	9.5	0.8 ms	19.3	0.2	2.8	0.3	34.5
Visual, OBJ	0.5	1.9	9.4	0.9 ms	19.5	7.8	3.1	0.2	42.4

Board Repo: OLIMEX/ESP32-EVB Board: ESP32-EVB_Rev_I.kicad_pcb Folder HARDWARE / REV-I Complexity 301 / 1000 (size 246, features 55) KESE features through vias, slotted holes, filled zones, copper text Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 147, 2,960, 310 Triangles, simulation 2,199,014 in 140 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 78 MB 858 MB STEP 417 MB 1.0 GB STL 110 MB 899 MB OBJ 236 MB 1.5 GB Visual GLB 63 MB 1.1 GB OBJ 193 MB 1.4 GB

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