Corpus Testing 22

Corpus Page 22

Part 22 of 29 of Corpus Testing: boards 2,269 to 2,376, six runs each, one file format a run, as Corpus Testing describes.

2269. VESC-controller

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	4.8	16.8	0.6 ms	13.3	0.6	1.7	0.3	38.4
Simulation, STEP	0.9	4.8	17.1	0.7 ms	13.4	8.7	1.7	0.3	46.8
Simulation, STL	1.1	4.9	17.3	1 ms	13.6	1.3	1.8	0.3	40.3
Simulation, OBJ	1.1	5.1	17.3	0.7 ms	13.3	21.7	1.7	0.3	60.4
Visual, GLB	1.1	4.7	17.1	0.8 ms	33.6	0.4	3.9	0.2	61.1
Visual, OBJ	1.0	4.9	17.3	0.7 ms	33.7	13.9	4.5	0.3	75.6

Board Repo: paltatech/vesc-controller Board: VESC-controller.kicad_pcb Folder pcb_design Complexity 362 / 1000 (size 287, features 75) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, drill offsets, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20170922) Parts, tracks, vias 337, 4,385, 698 Triangles, simulation 4,130,828 in 252 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 144 MB 1.3 GB STEP 526 MB 1.5 GB STL 207 MB 1.2 GB OBJ 445 MB 2.7 GB Visual GLB 91 MB 1.5 GB OBJ 286 MB 1.9 GB

2270. meta_breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	3.2	14.6	1 ms	11.5	0.5	2.3	0.3	33.2
Simulation, STEP	0.6	3.5	14.2	0.9 ms	11.1	7.2	2.0	0.3	38.9
Simulation, STL	0.6	3.1	13.9	1 ms	11.4	0.7	2.1	0.3	32.1
Simulation, OBJ	0.6	3.0	13.1	0.8 ms	10.9	15.6	2.0	0.3	45.4
Visual, GLB	0.6	3.0	13.3	1 ms	19.5	0.2	1.7	0.3	38.7
Visual, OBJ	0.6	2.9	13.8	1 ms	19.9	8.1	1.9	0.2	47.3

Board Repo: parallella/parallella-hw Board: meta_breakout.kicad_pcb Folder meta_breakout / src Complexity 214 / 1000 (size 179, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 5, 1,860, 120 Triangles, simulation 2,578,018 in 222 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 89 MB 737 MB STEP 387 MB 934 MB STL 129 MB 747 MB OBJ 275 MB 1.7 GB Visual GLB 45 MB 841 MB OBJ 139 MB 986 MB

2271. paracard-template

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	89 ms	0.1	0.5	0.4 ms	0.7	29 ms	99 ms	0.2	1.7
Simulation, STEP	81 ms	0.1	0.6	0.3 ms	0.6	0.9	0.1	0.2	2.7
Simulation, STL	0.1	0.2	0.6	0.3 ms	0.7	35 ms	92 ms	0.2	1.9
Simulation, OBJ	91 ms	0.1	0.5	0.3 ms	0.6	0.3	71 ms	0.1	1.9
Visual, GLB	83 ms	0.2	0.5	0.3 ms	2.3	16 ms	99 ms	0.2	3.4
Visual, OBJ	93 ms	0.2	0.6	0.6 ms	2.3	0.4	91 ms	0.2	3.9

Board Repo: parallella/parallella-hw Board: paracard-template.kicad_pcb Folder paratemplate Complexity 34 / 1000 (size 34, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 3 (3) Parts, tracks, vias 4, 0, 0 Triangles, simulation 72,068 in 202 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 2.9 MB 181 MB STEP 14 MB 186 MB STL 3.6 MB 181 MB OBJ 8.0 MB 180 MB Visual GLB 3.0 MB 156 MB OBJ 8.5 MB 156 MB

2272. porcupine

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	4.0	13.5	1 ms	11.3	0.6	1.8	0.3	31.9
Simulation, STEP	0.4	4.0	13.3	1.0 ms	11.1	6.7	1.8	0.3	37.5
Simulation, STL	0.4	4.0	12.9	0.9 ms	10.8	0.9	1.9	0.3	31.2
Simulation, OBJ	0.4	3.7	13.2	1.0 ms	10.9	18.0	2.1	0.3	48.6
Visual, GLB	0.4	4.1	13.1	0.9 ms	21.4	0.3	1.9	0.3	41.5
Visual, OBJ	0.4	3.8	12.9	1.0 ms	21.6	9.0	2.1	0.3	50.1

Board Repo: parallella/parallella-hw Board: porcupine.kicad_pcb Folder porcupine Complexity 264 / 1000 (size 209, features 55) KESE features through vias, drill offsets, filled zones, copper text Tested 9th November 2026 Copper layers 6 File format KiCad 4 (4) Parts, tracks, vias 28, 2,063, 215 Triangles, simulation 3,372,204 in 214 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 115 MB 770 MB STEP 387 MB 1.0 GB STL 169 MB 814 MB OBJ 357 MB 2.2 GB Visual GLB 51 MB 1.1 GB OBJ 165 MB 1.2 GB

2273. chocofi-topplate

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.1	0.3	0.1 ms	0.6	22 ms	59 ms	0.2	1.5
Simulation, STEP	0.1	98 ms	0.3	0.1 ms	0.6	1.0	57 ms	0.2	2.4
Simulation, STL	0.1	0.1	0.4	0.2 ms	0.6	33 ms	58 ms	0.2	1.5
Simulation, OBJ	0.1	99 ms	0.3	0.1 ms	0.6	0.7	77 ms	0.2	2.1
Visual, GLB	0.1	0.1	0.3	0.1 ms	1.4	25 ms	0.1	0.2	2.3
Visual, OBJ	0.1	0.1	0.4	0.1 ms	1.4	0.6	0.1	0.2	2.9

Board Repo: pashutk/chocofi Board: chocofi-topplate.kicad_pcb Folder pcb Complexity 82 / 1000 (size 17, features 65) KESE features filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20210606) Parts, tracks, vias 0, 0, 0 Triangles, simulation 140,648 in 12 parts Note no components Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.8 MB 209 MB STEP 33 MB 224 MB STL 7.0 MB 204 MB OBJ 14 MB 204 MB Visual GLB 4.2 MB 182 MB OBJ 12 MB 184 MB

2274. chocofi

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	2.4	8.7	0.3 ms	6.8	0.3	0.9	0.3	20.2
Simulation, STEP	0.7	2.3	8.6	0.4 ms	6.7	6.2	1.0	0.3	25.8
Simulation, STL	0.9	2.4	8.6	0.3 ms	6.8	0.6	0.9	0.3	20.4
Simulation, OBJ	0.7	2.4	8.5	0.6 ms	7.0	11.1	0.8	0.3	30.8
Visual, GLB	0.7	2.3	8.7	0.5 ms	18.1	0.2	2.2	0.3	32.5
Visual, OBJ	0.7	2.4	8.7	0.4 ms	17.6	8.8	2.3	0.3	40.6

Board Repo: pashutk/chocofi Board: chocofi.kicad_pcb Folder pcb Complexity 285 / 1000 (size 175, features 110) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20211014) Parts, tracks, vias 53, 797, 97 Triangles, simulation 1,835,776 in 56 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 64 MB 856 MB STEP 370 MB 862 MB STL 92 MB 855 MB OBJ 194 MB 1.3 GB Visual GLB 50 MB 985 MB OBJ 153 MB 1.1 GB

2275. pda6502v2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	4.1	13.1	1 ms	13.9	0.8	2.2	0.3	35.3
Simulation, STEP	0.8	4.3	13.0	1 ms	14.2	10.3	2.2	0.4	45.1
Simulation, STL	0.8	4.0	13.2	2 ms	14.1	1.5	2.2	0.3	36.1
Simulation, OBJ	0.9	4.2	13.2	0.7 ms	13.5	24.1	2.1	0.3	58.3
Visual, GLB	0.9	3.9	11.8	1 ms	30.6	0.4	4.0	0.3	51.9
Visual, OBJ	0.9	3.9	12.5	1 ms	31.5	14.2	4.1	0.3	67.4

Board Repo: pda/pda6502v2 Board: pda6502v2.kicad_pcb Folder kicad Complexity 316 / 1000 (size 261, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 87, 2,260, 321 Triangles, simulation 4,130,958 in 223 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 140 MB 1.2 GB STEP 515 MB 1.5 GB STL 207 MB 1.4 GB OBJ 436 MB 2.6 GB Visual GLB 79 MB 1.4 GB OBJ 254 MB 1.7 GB

2276. obc-adcs-board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.3	4.9	12.0	2 ms	17.4	1.0	2.6	0.3	39.6
Simulation, STEP	1.3	5.0	11.9	2 ms	17.5	10.9	2.4	0.4	49.4
Simulation, STL	1.5	5.1	11.8	3 ms	17.9	1.9	2.6	0.3	41.1
Simulation, OBJ	1.4	5.0	11.6	1 ms	17.6	32.0	2.8	0.4	70.8
Visual, GLB	1.5	5.0	12.3	2 ms	38.6	0.4	4.9	0.4	63.2
Visual, OBJ	1.3	5.1	12.1	1 ms	36.8	16.4	4.9	0.3	76.8

Board Repo: peaksat/obcboard_pcb Board: obc-adcs-board.kicad_pcb Complexity 356 / 1000 (size 251, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 8 File format KiCad 8 (20240108) Parts, tracks, vias 257, 3,863, 515 Triangles, simulation 5,758,330 in 492 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 191 MB 1.4 GB STEP 583 MB 1.8 GB STL 288 MB 1.4 GB OBJ 613 MB 3.6 GB Visual GLB 101 MB 1.9 GB OBJ 326 MB 2.2 GB

2277. mc0020x

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.6	6.9	39.0	2 ms	30.8	1.6	4.7	0.4	85.1
Simulation, STEP	1.4	7.2	39.5	2 ms	28.1	19.7	4.1	0.4	100.3
Simulation, STL	1.4	6.1	36.1	2 ms	30.1	3.0	4.3	0.5	81.5
Simulation, OBJ	1.6	7.3	39.6	3 ms	28.8	41.7	4.1	0.4	123.4
Visual, GLB	1.5	6.9	37.8	3 ms	73.0	0.9	9.1	0.3	129.7
Visual, OBJ	1.5	6.6	40.3	3 ms	75.4	23.7	9.4	0.4	157.2

Board Repo: pelrun/cpc-schematics Board: mc0020x.kicad_pcb Folder cpc6128 Complexity 313 / 1000 (size 228, features 85) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 249, 8,293, 589 Triangles, simulation 9,130,404 in 369 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 307 MB 2.5 GB STEP 1.3 GB 3.3 GB STL 457 MB 2.5 GB OBJ 966 MB 5.7 GB Visual GLB 187 MB 3.0 GB OBJ 601 MB 3.8 GB

2278. RevA

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	3.5	14.0	0.5 ms	9.7	0.4	1.1	0.3	29.6
Simulation, STEP	0.5	3.4	14.5	0.5 ms	9.4	7.1	1.1	0.3	36.3
Simulation, STL	0.6	3.3	13.4	0.5 ms	9.5	0.9	1.2	0.2	29.0
Simulation, OBJ	0.5	3.5	14.0	1 ms	9.4	14.4	1.1	0.3	43.2
Visual, GLB	0.5	3.4	14.0	0.8 ms	19.7	0.2	2.0	0.2	40.2
Visual, OBJ	0.5	3.3	14.1	0.8 ms	19.4	8.9	1.8	0.2	48.3

Board Repo: pergola-fpga/pergola Board: RevA.kicad_pcb Folder hardware / RevA Complexity 334 / 1000 (size 269, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 136, 1,513, 318 Triangles, simulation 2,761,988 in 189 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 96 MB 857 MB STEP 435 MB 1.1 GB STL 138 MB 858 MB OBJ 298 MB 1.9 GB Visual GLB 57 MB 1.1 GB OBJ 179 MB 1.3 GB

2279. CM5_MINIMA

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	1.4	5.2	0.9 ms	6.2	0.2	0.7	0.2	14.4
Simulation, STEP	0.6	1.4	4.9	0.7 ms	6.0	4.4	0.7	0.2	18.3
Simulation, STL	0.6	1.4	5.1	0.6 ms	6.1	0.5	0.8	0.2	14.6
Simulation, OBJ	0.6	1.4	4.9	0.6 ms	6.1	7.9	0.7	0.3	22.1
Visual, GLB	0.6	1.4	4.9	0.7 ms	13.1	0.2	1.4	0.3	21.8
Visual, OBJ	0.7	1.5	4.9	0.7 ms	13.1	5.9	1.5	0.2	27.9

Board Repo: piecol/CM5_MINIMA_REV1 Board: CM5_MINIMA.kicad_pcb Complexity 351 / 1000 (size 201, features 150) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 68, 969, 234 Triangles, simulation 1,470,828 in 210 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 51 MB 597 MB STEP 242 MB 769 MB STL 74 MB 604 MB OBJ 154 MB 1.0 GB Visual GLB 37 MB 713 MB OBJ 113 MB 817 MB

2280. CM5_MINIMA_2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	2.7	7.1	1 ms	10.0	0.6	1.4	0.3	22.8
Simulation, STEP	0.6	2.3	7.3	0.8 ms	9.4	6.1	1.2	0.2	27.2
Simulation, STL	0.6	2.6	6.7	1 ms	9.0	0.8	1.3	0.3	21.4
Simulation, OBJ	0.5	2.6	6.6	0.8 ms	9.6	12.4	1.4	0.2	33.4
Visual, GLB	0.5	2.5	6.8	0.5 ms	21.0	0.2	2.1	0.2	33.5
Visual, OBJ	0.7	2.8	6.9	0.7 ms	20.7	8.1	2.6	0.3	42.0

Board Repo: piecol/CM5_MINIMA_REV2 Board: CM5_MINIMA_2.kicad_pcb Complexity 346 / 1000 (size 221, features 125) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 6 File format KiCad 9 (20241229) Parts, tracks, vias 72, 1,848, 365 Triangles, simulation 2,701,666 in 226 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 92 MB 1.0 GB STEP 367 MB 1.1 GB STL 135 MB 1.0 GB OBJ 287 MB 1.8 GB Visual GLB 56 MB 1.1 GB OBJ 177 MB 1.3 GB

2281. carrier_template

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.6	0.1 ms	0.9	21 ms	62 ms	0.2	2.2
Simulation, STEP	0.1	0.2	0.7	0.2 ms	0.9	1.1	64 ms	0.2	3.2
Simulation, STL	0.1	0.2	0.7	0.1 ms	0.8	27 ms	63 ms	0.2	2.1
Simulation, OBJ	0.1	0.2	0.7	0.1 ms	0.9	0.6	60 ms	0.2	2.7
Visual, GLB	0.1	0.2	0.6	0.1 ms	1.8	22 ms	0.1	0.2	3.1
Visual, OBJ	0.1	0.2	0.6	0.1 ms	1.8	0.7	0.1	0.2	3.9

Board Repo: pinguz97/zynq-som Board: carrier_template.kicad_pcb Folder scripts / carrier_template Complexity 67 / 1000 (size 32, features 35) KESE features rounded, trapezoid or chamfered pads, arc tracks, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 3, 0, 0 Triangles, simulation 101,568 in 9 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.0 MB 199 MB STEP 19 MB 205 MB STL 5.1 MB 198 MB OBJ 11 MB 199 MB Visual GLB 4.2 MB 196 MB OBJ 12 MB 194 MB

2282. Zynq_SoM

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.2	7.6	19.9	3 ms	30.7	1.7	4.4	0.4	66.9
Simulation, STEP	2.3	7.3	20.1	2 ms	30.6	17.5	4.4	0.4	82.7
Simulation, STL	2.3	7.5	19.8	2 ms	30.3	3.2	4.6	0.4	68.0
Simulation, OBJ	2.2	7.4	20.1	2 ms	30.1	53.4	4.4	0.4	118.0
Visual, GLB	2.4	7.5	20.3	2 ms	87.3	0.7	7.3	0.4	125.9
Visual, OBJ	2.3	7.6	20.6	3 ms	88.8	25.6	7.4	0.4	152.6

Board Repo: pinguz97/zynq-som Board: Zynq_SoM.kicad_pcb Complexity 476 / 1000 (size 321, features 155) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, TrueType text, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 8 File format KiCad 9 (20241229) Parts, tracks, vias 267, 7,394, 941 Triangles, simulation 8,423,948 in 612 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 280 MB 2.1 GB STEP 866 MB 2.6 GB STL 421 MB 2.0 GB OBJ 900 MB 5.2 GB Visual GLB 133 MB 2.4 GB OBJ 447 MB 3.2 GB

2283. everestCM4

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	5.0	20.5	1 ms	21.7	0.8	2.7	0.3	52.5
Simulation, STEP	1.4	5.3	21.0	2 ms	21.8	13.7	2.6	0.4	66.2
Simulation, STL	1.4	5.4	21.0	2 ms	22.2	1.9	2.8	0.4	55.0
Simulation, OBJ	1.4	5.2	20.4	1 ms	21.6	29.9	3.1	0.4	81.9
Visual, GLB	1.4	5.3	21.1	1 ms	50.9	0.5	6.6	0.3	86.1
Visual, OBJ	1.4	5.8	22.2	2 ms	48.9	18.6	6.1	0.3	103.4

Board Repo: pionixpublic/reference-hardware Board: everestCM4.kicad_pcb Folder Yak Complexity 376 / 1000 (size 276, features 100) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 181, 3,488, 540 Triangles, simulation 5,046,938 in 316 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 172 MB 1.7 GB STEP 929 MB 2.0 GB STL 252 MB 1.6 GB OBJ 542 MB 3.3 GB Visual GLB 107 MB 1.8 GB OBJ 340 MB 2.2 GB

2284. yeti

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	7.3	20.9	0.9 ms	20.0	1.1	2.8	0.3	54.0
Simulation, STEP	1.6	7.2	22.1	0.6 ms	20.7	12.1	2.7	0.3	66.6
Simulation, STL	1.5	7.2	21.9	0.6 ms	20.8	2.2	3.0	0.4	57.1
Simulation, OBJ	1.5	7.3	22.1	1 ms	20.8	37.3	2.9	0.3	92.2
Visual, GLB	1.7	8.0	22.8	0.7 ms	39.5	0.4	4.6	0.3	77.3
Visual, OBJ	1.6	7.4	21.7	0.9 ms	36.7	15.3	4.5	0.3	87.5

Board Repo: pionixpublic/reference-hardware Board: yeti.kicad_pcb Folder Yeti Complexity 370 / 1000 (size 250, features 120) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 8 File format KiCad 6 (20211014) Parts, tracks, vias 262, 2,762, 718 Triangles, simulation 6,306,866 in 228 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 209 MB 1.7 GB STEP 746 MB 2.0 GB STL 315 MB 1.6 GB OBJ 693 MB 4.1 GB Visual GLB 98 MB 1.8 GB OBJ 324 MB 2.2 GB

2285. R1000AX

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.6	6.8	29.7	1 ms	27.6	1.2	3.7	0.4	71.0
Simulation, STEP	1.6	6.9	30.2	2 ms	28.1	15.4	3.9	0.4	86.4
Simulation, STL	1.7	7.0	29.1	1 ms	27.8	2.5	4.3	0.4	72.7
Simulation, OBJ	1.6	6.9	29.5	2 ms	27.8	41.7	3.9	0.4	111.8
Visual, GLB	1.7	7.0	29.3	2 ms	49.9	0.6	5.9	0.3	94.7
Visual, OBJ	1.8	6.8	29.5	2 ms	48.5	19.9	6.0	0.3	112.9

Board Repo: pluggee/R1000AX Board: R1000AX.kicad_pcb Folder pcb Complexity 308 / 1000 (size 263, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 127, 3,163, 399 Triangles, simulation 6,324,084 in 148 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 218 MB 1.6 GB STEP 817 MB 2.1 GB STL 316 MB 1.6 GB OBJ 682 MB 4.1 GB Visual GLB 108 MB 1.9 GB OBJ 345 MB 2.3 GB

2286. Hades

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	3.1	11.0	1.0 ms	14.4	0.6	1.6	0.3	31.7
Simulation, STEP	0.8	3.2	11.1	2 ms	14.8	9.3	1.7	0.3	41.1
Simulation, STL	0.6	3.0	11.1	1 ms	14.1	1.0	1.5	0.3	31.6
Simulation, OBJ	0.7	3.2	10.9	2 ms	14.4	17.0	1.9	0.3	48.4
Visual, GLB	0.7	3.2	11.4	0.8 ms	27.5	0.3	3.6	0.4	47.1
Visual, OBJ	0.7	3.2	11.3	0.9 ms	27.9	10.8	3.9	0.3	58.1

Board Repo: pms67/HadesFCS Board: Hades.kicad_pcb Folder Hardware / Hades Complexity 350 / 1000 (size 270, features 80) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 208, 1,978, 382 Triangles, simulation 3,210,182 in 265 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 110 MB 1.0 GB STEP 449 MB 1.4 GB STL 161 MB 1.0 GB OBJ 340 MB 2.1 GB Visual GLB 69 MB 1.3 GB OBJ 218 MB 1.5 GB

2287. HadesGPSDongle

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	0.9	0.2 ms	1.0	47 ms	0.1	0.2	2.8
Simulation, STEP	0.1	0.3	1.0	0.2 ms	0.9	1.2	0.1	0.2	4.0
Simulation, STL	0.1	0.4	1.0	0.2 ms	0.9	67 ms	0.1	0.2	2.8
Simulation, OBJ	0.1	0.3	0.9	0.2 ms	1.0	1.6	0.1	0.2	4.3
Visual, GLB	0.1	0.3	0.9	0.2 ms	2.0	27 ms	0.2	0.2	3.8
Visual, OBJ	0.2	0.4	0.9	0.2 ms	1.9	0.9	0.2	0.3	4.7

Board Repo: pms67/HadesFCS Board: HadesGPSDongle.kicad_pcb Folder Hardware / HadesGPSDongle Complexity 214 / 1000 (size 159, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 27, 124, 39 Triangles, simulation 268,474 in 40 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 9.0 MB 248 MB STEP 37 MB 256 MB STL 13 MB 244 MB OBJ 27 MB 235 MB Visual GLB 5.4 MB 213 MB OBJ 15 MB 210 MB

2288. HadesMicro

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.4	4.5	0.8 ms	5.4	0.2	0.8	0.3	13.0
Simulation, STEP	0.4	1.5	4.6	0.9 ms	5.4	4.0	0.8	0.3	16.9
Simulation, STL	0.4	1.5	4.5	0.6 ms	5.4	0.5	0.7	0.3	13.2
Simulation, OBJ	0.4	1.5	4.5	0.6 ms	5.6	8.0	0.8	0.3	21.1
Visual, GLB	0.4	1.6	4.8	0.7 ms	11.0	0.1	1.3	0.2	19.5
Visual, OBJ	0.4	1.5	4.7	0.7 ms	10.6	5.1	1.3	0.3	23.9

Board Repo: pms67/HadesFCS Board: HadesMicro.kicad_pcb Folder Hardware / HadesMicro Complexity 303 / 1000 (size 248, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 91, 893, 172 Triangles, simulation 1,393,582 in 125 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 48 MB 537 MB STEP 174 MB 674 MB STL 70 MB 527 MB OBJ 143 MB 926 MB Visual GLB 29 MB 760 MB OBJ 88 MB 682 MB

2289. HadesMicroJLCPCB

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.4	4.5	0.4 ms	5.0	0.2	0.7	0.3	12.5
Simulation, STEP	0.3	1.3	4.5	0.7 ms	5.2	3.9	0.7	0.2	16.2
Simulation, STL	0.4	1.3	4.6	0.4 ms	5.2	0.4	0.7	0.2	12.8
Simulation, OBJ	0.4	1.3	4.5	0.5 ms	5.1	7.8	0.7	0.2	19.9
Visual, GLB	0.5	1.3	4.4	0.4 ms	9.1	0.1	0.9	0.3	16.6
Visual, OBJ	0.4	1.4	4.7	0.4 ms	9.9	5.0	1.2	0.2	22.7

Board Repo: pms67/HadesFCS Board: HadesMicroJLCPCB.kicad_pcb Folder Hardware / HadesMicroJLCPCB Complexity 296 / 1000 (size 241, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 88, 912, 165 Triangles, simulation 1,440,242 in 130 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 49 MB 529 MB STEP 181 MB 670 MB STL 72 MB 522 MB OBJ 147 MB 956 MB Visual GLB 30 MB 663 MB OBJ 91 MB 701 MB

2290. HadesNT

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.8	6.2	0.9 ms	5.1	0.2	0.6	0.2	14.5
Simulation, STEP	0.3	1.8	5.9	0.7 ms	4.9	3.5	0.6	0.3	17.2
Simulation, STL	0.3	1.7	6.0	0.6 ms	5.0	0.5	0.6	0.2	14.3
Simulation, OBJ	0.4	1.9	6.1	0.7 ms	5.3	8.4	0.6	0.3	22.9
Visual, GLB	0.3	1.8	6.2	0.9 ms	10.0	0.1	1.2	0.2	19.8
Visual, OBJ	0.3	1.7	6.2	0.6 ms	10.1	4.6	1.2	0.2	24.4

Board Repo: pms67/HadesFCS Board: HadesNT.kicad_pcb Folder Hardware / HadesNT Complexity 311 / 1000 (size 246, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 100, 1,175, 201 Triangles, simulation 1,543,476 in 149 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 53 MB 555 MB STEP 210 MB 687 MB STL 77 MB 561 MB OBJ 161 MB 1.1 GB Visual GLB 30 MB 645 MB OBJ 91 MB 714 MB

2291. PicoGUS chipdown with edge rails

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.7	4.0	10.6	0.9 ms	11.2	0.6	1.3	0.3	30.8
Simulation, STEP	2.5	4.2	10.3	1 ms	10.9	9.0	1.3	0.3	38.6
Simulation, STL	2.5	4.2	10.4	1 ms	11.7	1.1	1.5	0.3	31.6
Simulation, OBJ	2.6	4.3	10.3	2 ms	11.7	20.8	1.5	0.4	51.7
Visual, GLB	2.6	4.2	10.4	1 ms	31.4	0.4	3.8	0.3	53.1
Visual, OBJ	2.5	4.0	10.4	1.0 ms	31.2	15.2	4.1	0.3	67.7

Board Repo: polpo/picogus Board: PicoGUS chipdown with edge rails.kicad_pcb Folder hw-chipdown Complexity 396 / 1000 (size 251, features 145) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, TrueType text, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 96, 1,334, 374 Triangles, simulation 3,297,988 in 176 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 115 MB 1.3 GB STEP 371 MB 1.5 GB STL 165 MB 1.3 GB OBJ 359 MB 2.3 GB Visual GLB 87 MB 1.5 GB OBJ 274 MB 1.9 GB

2292. PicoGUS chipdown

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.5	4.2	10.8	0.7 ms	11.2	0.6	1.4	0.3	31.0
Simulation, STEP	2.6	4.2	10.5	0.7 ms	11.4	9.6	1.4	0.3	39.9
Simulation, STL	2.6	4.1	10.8	0.7 ms	12.1	1.2	1.4	0.3	32.5
Simulation, OBJ	2.7	4.2	11.3	1 ms	11.7	21.0	1.4	0.3	52.6
Visual, GLB	2.6	4.1	10.9	0.7 ms	32.5	0.5	4.9	0.3	55.7
Visual, OBJ	2.6	4.2	10.8	0.7 ms	32.9	15.8	4.6	0.3	71.2

Board Repo: polpo/picogus Board: PicoGUS chipdown.kicad_pcb Folder hw-chipdown Complexity 396 / 1000 (size 251, features 145) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, TrueType text, stack-up, dielectric εr and tanδ, copper finish, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 96, 1,334, 374 Triangles, simulation 3,281,176 in 178 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 114 MB 1.2 GB STEP 367 MB 1.5 GB STL 164 MB 1.3 GB OBJ 357 MB 2.3 GB Visual GLB 86 MB 1.4 GB OBJ 272 MB 1.8 GB

2293. PicoGUS Hand386

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	1.8	4.4	0.6 ms	5.5	0.3	0.7	0.3	13.8
Simulation, STEP	0.8	1.9	4.3	0.6 ms	5.5	4.2	0.7	0.3	17.7
Simulation, STL	0.8	1.8	4.5	0.4 ms	5.4	0.5	0.6	0.2	13.9
Simulation, OBJ	0.8	1.9	4.3	0.5 ms	5.3	9.0	0.7	0.3	22.3
Visual, GLB	0.7	1.9	4.3	0.6 ms	11.9	0.2	1.4	0.2	20.7
Visual, OBJ	0.8	1.9	4.3	0.6 ms	11.9	6.3	1.7	0.2	27.1

Board Repo: polpo/picogus Board: PicoGUS Hand386.kicad_pcb Folder hw-hand386 Complexity 333 / 1000 (size 198, features 135) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, TrueType text, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 50, 903, 278 Triangles, simulation 1,662,280 in 127 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 57 MB 651 MB STEP 217 MB 755 MB STL 83 MB 631 MB OBJ 174 MB 1.2 GB Visual GLB 39 MB 737 MB OBJ 119 MB 901 MB

2294. PicoGUS

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	1.9	7.4	1 ms	7.0	0.3	0.8	0.2	18.6
Simulation, STEP	1.0	1.8	7.7	1 ms	6.7	5.1	0.8	0.2	23.4
Simulation, STL	1.1	1.9	7.0	2 ms	6.6	0.6	0.8	0.3	18.3
Simulation, OBJ	1.1	2.1	7.5	1.0 ms	6.7	9.3	0.9	0.3	27.8
Visual, GLB	1.1	2.0	7.4	0.9 ms	18.4	0.3	3.1	0.2	32.5
Visual, OBJ	1.1	1.9	7.5	1 ms	18.9	8.2	3.1	0.3	40.9

Board Repo: polpo/picogus Board: PicoGUS.kicad_pcb Folder hw Complexity 313 / 1000 (size 183, features 130) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, drill offsets, arc tracks, filled zones, TrueType text, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 51, 999, 296 Triangles, simulation 2,194,242 in 135 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 76 MB 847 MB STEP 325 MB 1.1 GB STL 110 MB 838 MB OBJ 234 MB 1.5 GB Visual GLB 63 MB 1.1 GB OBJ 194 MB 1.3 GB

2295. ISA adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.3	1.8	7.3	0.5 ms	6.0	0.3	0.7	0.3	17.7
Simulation, STEP	1.3	1.8	7.1	0.4 ms	6.1	5.2	0.7	0.2	22.3
Simulation, STL	1.2	1.8	7.2	0.4 ms	6.1	0.8	0.7	0.3	18.0
Simulation, OBJ	1.3	1.8	7.3	0.7 ms	6.2	9.0	0.7	0.3	26.6
Visual, GLB	1.3	1.9	7.2	0.7 ms	14.2	0.2	1.7	0.2	26.8
Visual, OBJ	1.3	1.9	7.2	0.5 ms	14.1	8.0	1.8	0.3	34.6

Board Repo: polpo/picogus Board: ISA adapter.kicad_pcb Folder isa-hand386 adapter Complexity 257 / 1000 (size 152, features 105) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, TrueType text, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 14, 279, 124 Triangles, simulation 1,493,942 in 122 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 52 MB 696 MB STEP 211 MB 767 MB STL 75 MB 730 MB OBJ 157 MB 1.1 GB Visual GLB 42 MB 894 MB OBJ 127 MB 945 MB

2296. pc_healthypi_move_program_adapter_v7

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.8	2.9	0.3 ms	2.1	90 ms	0.3	0.2	6.8
Simulation, STEP	0.3	0.8	2.9	0.2 ms	2.1	1.5	0.3	0.2	8.2
Simulation, STL	0.3	0.8	2.8	0.2 ms	2.2	0.1	0.3	0.2	6.7
Simulation, OBJ	0.4	0.8	2.8	0.2 ms	2.2	3.0	0.3	0.2	9.7
Visual, GLB	0.3	0.9	2.8	0.3 ms	5.6	69 ms	0.4	0.2	10.3
Visual, OBJ	0.3	0.8	2.7	0.2 ms	5.5	2.2	0.4	0.2	12.2

Board Repo: Protocentral/healthypi-move-hw Board: pc_healthypi_move_program_adapter_v7.kicad_pcb Folder pcbs / kicad_healthypi_move_program_adapter Complexity 239 / 1000 (size 154, features 85) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 9, 276, 25 Triangles, simulation 564,298 in 53 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 20 MB 295 MB STEP 101 MB 356 MB STL 28 MB 296 MB OBJ 60 MB 451 MB Visual GLB 15 MB 375 MB OBJ 45 MB 377 MB

2297. pc_healthypi_move_nRF5340_v12

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.0	4.5	0.6 ms	5.5	0.3	1.0	0.3	14.2
Simulation, STEP	0.5	1.9	4.5	0.6 ms	5.8	3.9	1.0	0.3	17.9
Simulation, STL	0.6	2.1	4.3	0.6 ms	5.5	0.4	0.8	0.3	14.0
Simulation, OBJ	0.4	1.9	4.3	0.6 ms	5.5	8.1	0.9	0.2	21.3
Visual, GLB	0.5	1.9	4.2	0.5 ms	11.6	0.2	1.3	0.2	20.0
Visual, OBJ	0.5	1.9	4.3	0.5 ms	12.8	4.5	1.5	0.2	25.7

Board Repo: Protocentral/healthypi-move-hw Board: pc_healthypi_move_nRF5340_v12.kicad_pcb Folder pcbs / main board / kicad_pc_healthypi_move_nRF5340_v12 Complexity 407 / 1000 (size 257, features 150) KESE features through vias, microvias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 6 File format KiCad 9 (20241229) Parts, tracks, vias 78, 1,711, 186 Triangles, simulation 1,636,860 in 129 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 56 MB 572 MB STEP 230 MB 733 MB STL 82 MB 568 MB OBJ 176 MB 1.1 GB Visual GLB 33 MB 793 MB OBJ 105 MB 801 MB

2298. pc_healthypi_move_sensor_v9

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	1.8	5.1	0.4 ms	5.9	0.3	0.9	0.2	15.2
Simulation, STEP	0.9	2.0	5.1	2 ms	5.7	3.6	0.9	0.3	18.5
Simulation, STL	1.0	2.1	5.0	0.4 ms	5.8	0.4	0.9	0.2	15.4
Simulation, OBJ	0.8	2.0	5.0	0.5 ms	5.9	8.1	1.0	0.2	23.0
Visual, GLB	0.9	2.0	5.8	0.5 ms	12.8	0.1	1.1	0.3	23.0
Visual, OBJ	0.9	2.1	5.2	0.5 ms	13.0	4.8	1.4	0.3	27.7

Board Repo: Protocentral/healthypi-move-hw Board: pc_healthypi_move_sensor_v9.kicad_pcb Folder pcbs / sensor board / kicad_pc_healthypi_move_sensor_v9 Complexity 371 / 1000 (size 261, features 110) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 6 File format KiCad 9 (20241229) Parts, tracks, vias 80, 1,142, 158 Triangles, simulation 1,702,322 in 119 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 59 MB 598 MB STEP 241 MB 710 MB STL 85 MB 592 MB OBJ 183 MB 1.2 GB Visual GLB 33 MB 738 MB OBJ 105 MB 840 MB

2299. healthylink_compute_v5

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.1	5.6	0.8 ms	7.6	0.3	1.0	0.2	17.5
Simulation, STEP	0.6	2.0	5.5	0.7 ms	7.6	5.0	1.0	0.2	21.9
Simulation, STL	0.6	2.0	5.3	0.7 ms	7.8	0.6	1.0	0.3	17.6
Simulation, OBJ	0.5	2.0	5.5	0.8 ms	7.4	10.6	1.0	0.3	27.3
Visual, GLB	0.6	2.1	5.3	0.7 ms	14.9	0.2	1.6	0.3	24.9
Visual, OBJ	0.6	2.2	5.5	0.5 ms	14.8	5.9	1.9	0.3	31.2

Board Repo: protocentral/protocentral_healthypi6_hardware Board: healthylink_compute_v5.kicad_pcb Folder hardware / healthylink_compute_v5 Complexity 418 / 1000 (size 268, features 150) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, knockout text, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 6 File format KiCad 10 (20260206) Parts, tracks, vias 114, 930, 237 Triangles, simulation 2,134,666 in 222 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 72 MB 720 MB STEP 259 MB 845 MB STL 107 MB 695 MB OBJ 222 MB 1.4 GB Visual GLB 40 MB 850 MB OBJ 122 MB 939 MB

2300. healthylink_gpio_v2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	0.7	2.8	0.6 ms	2.4	94 ms	0.4	0.3	7.0
Simulation, STEP	0.4	0.6	2.9	0.3 ms	2.2	1.9	0.4	0.2	8.6
Simulation, STL	0.4	0.7	2.7	0.4 ms	2.4	0.2	0.4	0.3	6.9
Simulation, OBJ	0.4	0.6	2.8	0.5 ms	2.3	3.3	0.4	0.2	10.1
Visual, GLB	0.4	0.7	2.8	0.4 ms	6.1	90 ms	0.8	0.3	11.2
Visual, OBJ	0.4	0.7	2.7	0.3 ms	5.9	2.9	0.8	0.2	13.6

Board Repo: protocentral/protocentral_healthypi6_hardware Board: healthylink_gpio_v2.kicad_pcb Folder hardware / healthylink_gpio_v2 Complexity 287 / 1000 (size 147, features 140) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, knockout text, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 16, 288, 47 Triangles, simulation 591,150 in 65 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 21 MB 328 MB STEP 102 MB 399 MB STL 30 MB 341 MB OBJ 60 MB 427 MB Visual GLB 17 MB 449 MB OBJ 52 MB 469 MB

2301. healthypi_6_display_v7

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	1.2	0.2 ms	1.3	66 ms	0.2	0.2	3.4
Simulation, STEP	0.2	0.3	1.1	0.2 ms	1.4	1.6	0.2	0.3	5.2
Simulation, STL	0.2	0.4	1.3	0.2 ms	1.5	0.1	0.2	0.3	3.9
Simulation, OBJ	0.2	0.3	1.2	0.2 ms	1.5	1.5	0.2	0.3	5.2
Visual, GLB	0.2	0.3	1.1	0.2 ms	3.5	45 ms	0.3	0.3	5.9
Visual, OBJ	0.2	0.3	1.1	0.3 ms	3.3	1.4	0.4	0.3	7.0

Board Repo: protocentral/protocentral_healthypi6_hardware Board: healthypi_6_display_v7.kicad_pcb Folder hardware / healthypi_6_display_v7 Complexity 232 / 1000 (size 142, features 90) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 10 (20260206) Parts, tracks, vias 14, 189, 50 Triangles, simulation 240,022 in 41 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 8.5 MB 212 MB STEP 42 MB 227 MB STL 12 MB 212 MB OBJ 24 MB 212 MB Visual GLB 7.4 MB 210 MB OBJ 22 MB 215 MB

2302. healthypi_6_v5

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.6	4.5	17.1	2 ms	21.1	0.9	3.0	0.3	48.5
Simulation, STEP	1.6	4.5	17.5	1 ms	21.4	14.3	3.1	0.3	62.7
Simulation, STL	1.6	4.4	17.1	1 ms	20.6	1.7	3.0	0.3	48.6
Simulation, OBJ	1.6	4.7	17.1	1 ms	21.1	32.8	2.9	0.3	80.4
Visual, GLB	1.6	4.7	17.6	2 ms	46.9	0.5	4.6	0.3	76.3
Visual, OBJ	1.5	4.4	17.8	2 ms	47.8	17.4	4.9	0.3	94.0

Board Repo: protocentral/protocentral_healthypi6_hardware Board: healthypi_6_v5.kicad_pcb Folder hardware / healthypi_6_main_v5 Complexity 433 / 1000 (size 298, features 135) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 6 File format KiCad 10 (20260206) Parts, tracks, vias 229, 3,001, 665 Triangles, simulation 6,044,362 in 327 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 205 MB 1.6 GB STEP 889 MB 2.2 GB STL 302 MB 1.7 GB OBJ 645 MB 3.9 GB Visual GLB 115 MB 2.1 GB OBJ 373 MB 2.5 GB

2303. battery_board_v1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	2.2	7.5	0.7 ms	7.7	0.4	0.9	0.3	19.7
Simulation, STEP	0.7	2.2	7.4	0.6 ms	7.8	5.6	1.0	0.3	24.9
Simulation, STL	0.7	2.1	7.3	0.4 ms	7.9	0.5	0.8	0.3	19.6
Simulation, OBJ	0.7	2.1	7.2	0.4 ms	7.8	11.6	0.9	0.2	30.6
Visual, GLB	0.7	2.3	6.9	0.4 ms	17.9	0.2	1.6	0.3	29.9
Visual, OBJ	0.8	2.1	7.3	0.4 ms	17.6	7.4	2.4	0.3	38.1

Board Repo: proveskit/battery_board Board: battery_board_v1.kicad_pcb Folder battery_board_v2 Complexity 318 / 1000 (size 208, features 110) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 109, 1,234, 215 Triangles, simulation 1,805,022 in 117 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 62 MB 666 MB STEP 281 MB 850 MB STL 90 MB 651 MB OBJ 191 MB 1.2 GB Visual GLB 43 MB 1.0 GB OBJ 132 MB 986 MB

2304. Battery_Board_V3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.0	3.3	13.2	0.5 ms	13.5	0.4	1.6	0.3	33.2
Simulation, STEP	0.9	3.2	13.2	0.7 ms	12.7	8.9	1.4	0.3	40.5
Simulation, STL	0.9	3.0	13.3	0.5 ms	13.3	0.9	1.6	0.2	33.2
Simulation, OBJ	0.9	2.9	13.5	0.8 ms	13.9	16.4	1.4	0.2	49.2
Visual, GLB	1.0	3.2	14.0	1.0 ms	28.3	0.4	3.5	0.2	50.7
Visual, OBJ	1.0	3.2	13.9	0.9 ms	26.7	12.1	3.3	0.2	60.4

Board Repo: proveskit/battery_board Board: Battery_Board_V3.kicad_pcb Folder battery_board_v3 Complexity 387 / 1000 (size 267, features 120) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 7 (20221018) Parts, tracks, vias 177, 1,595, 240 Triangles, simulation 2,908,442 in 199 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 101 MB 997 MB STEP 506 MB 1.3 GB STL 145 MB 998 MB OBJ 314 MB 1.9 GB Visual GLB 75 MB 1.3 GB OBJ 233 MB 1.5 GB

2305. Battery_Board_V3a

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	2.9	12.5	0.7 ms	14.1	0.5	1.3	0.3	32.4
Simulation, STEP	0.9	2.9	12.4	0.7 ms	13.9	9.0	1.3	0.3	40.6
Simulation, STL	0.9	2.9	12.7	0.6 ms	14.2	1.1	1.5	0.3	33.6
Simulation, OBJ	0.9	3.0	12.4	0.7 ms	14.1	16.5	1.3	0.3	48.4
Visual, GLB	0.9	3.0	12.6	0.7 ms	26.8	0.3	3.2	0.2	47.1
Visual, OBJ	0.9	3.0	12.4	0.8 ms	26.8	11.3	3.4	0.2	58.1

Board Repo: proveskit/battery_board Board: Battery_Board_V3a.kicad_pcb Folder Battery_Board_V3a Complexity 405 / 1000 (size 270, features 135) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 192, 1,568, 235 Triangles, simulation 2,965,452 in 178 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 102 MB 1.0 GB STEP 513 MB 1.3 GB STL 148 MB 1.0 GB OBJ 320 MB 2.0 GB Visual GLB 74 MB 1.5 GB OBJ 232 MB 1.6 GB

2306. battery_board_v3b

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	3.3	16.4	0.8 ms	16.0	0.5	1.5	0.3	39.0
Simulation, STEP	1.0	3.5	16.8	0.5 ms	16.6	10.3	1.5	0.3	49.9
Simulation, STL	1.0	3.5	17.1	0.9 ms	16.1	1.0	1.6	0.3	40.6
Simulation, OBJ	1.1	3.4	16.4	0.7 ms	15.0	17.6	1.6	0.3	55.4
Visual, GLB	1.0	3.4	16.4	0.7 ms	28.8	0.3	3.4	0.2	53.5
Visual, OBJ	1.0	3.4	16.7	0.9 ms	28.8	13.7	4.2	0.3	68.1

Board Repo: proveskit/battery_board Board: battery_board_v3b.kicad_pcb Folder battery_board_v3b Complexity 407 / 1000 (size 272, features 135) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 194, 1,762, 256 Triangles, simulation 3,067,082 in 180 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 106 MB 1.1 GB STEP 523 MB 1.4 GB STL 153 MB 1.1 GB OBJ 331 MB 2.1 GB Visual GLB 78 MB 1.3 GB OBJ 244 MB 1.7 GB

2307. battery_board_v3c

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	3.6	18.0	1.0 ms	17.6	0.7	1.7	0.3	43.0
Simulation, STEP	1.1	3.7	17.9	0.9 ms	17.7	11.1	1.8	0.3	53.6
Simulation, STL	1.1	3.8	17.4	0.9 ms	17.3	1.2	1.7	0.3	42.8
Simulation, OBJ	1.0	3.8	17.9	0.5 ms	17.9	20.4	2.0	0.3	63.4
Visual, GLB	1.1	3.7	18.0	1 ms	31.9	0.4	4.2	0.3	59.7
Visual, OBJ	1.1	3.7	18.0	0.8 ms	31.1	14.2	3.9	0.3	72.2

Board Repo: proveskit/battery_board Board: battery_board_v3c.kicad_pcb Folder battery_board_v3c Complexity 409 / 1000 (size 274, features 135) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 196, 1,953, 284 Triangles, simulation 3,202,732 in 180 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 111 MB 1.2 GB STEP 546 MB 1.4 GB STL 160 MB 1.1 GB OBJ 346 MB 2.1 GB Visual GLB 81 MB 1.4 GB OBJ 255 MB 1.7 GB

2308. battery_pack_v1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	0.9	3.4	0.2 ms	2.4	0.1	0.4	0.2	7.7
Simulation, STEP	0.4	1.0	3.4	0.3 ms	2.4	1.9	0.3	0.2	9.7
Simulation, STL	0.4	0.9	3.4	0.2 ms	2.4	0.2	0.4	0.2	7.9
Simulation, OBJ	0.4	0.9	3.5	0.2 ms	2.5	4.1	0.3	0.2	12.0
Visual, GLB	0.4	0.9	3.4	0.3 ms	5.1	76 ms	0.6	0.2	10.7
Visual, OBJ	0.4	1.0	3.5	0.4 ms	5.4	2.7	0.6	0.2	13.8

Board Repo: proveskit/battery_board Board: battery_pack_v1.kicad_pcb Folder battery_pack_v1 Complexity 256 / 1000 (size 161, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 16, 135, 78 Triangles, simulation 785,718 in 28 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 27 MB 400 MB STEP 125 MB 461 MB STL 39 MB 386 MB OBJ 81 MB 579 MB Visual GLB 19 MB 451 MB OBJ 56 MB 492 MB

2309. battery_pack_v1a

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.8	2.6	0.3 ms	2.1	98 ms	0.3	0.2	6.4
Simulation, STEP	0.3	0.8	2.6	0.3 ms	2.1	1.7	0.2	0.2	8.0
Simulation, STL	0.3	0.7	2.7	0.3 ms	2.1	0.2	0.3	0.3	6.5
Simulation, OBJ	0.3	0.7	2.6	0.3 ms	2.0	3.1	0.3	0.2	9.2
Visual, GLB	0.3	0.7	2.6	0.3 ms	4.7	69 ms	0.6	0.2	9.3
Visual, OBJ	0.3	0.8	2.6	0.3 ms	4.6	2.1	0.6	0.2	11.3

Board Repo: proveskit/battery_board Board: battery_pack_v1a.kicad_pcb Folder battery_pack_v1a Complexity 256 / 1000 (size 161, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 16, 135, 76 Triangles, simulation 723,936 in 30 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 25 MB 364 MB STEP 118 MB 451 MB STL 36 MB 378 MB OBJ 75 MB 547 MB Visual GLB 18 MB 467 MB OBJ 54 MB 452 MB

2310. battery_pack_v2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.8	3.3	0.2 ms	3.1	0.1	0.5	0.2	8.4
Simulation, STEP	0.3	0.8	3.3	0.3 ms	3.2	2.4	0.5	0.2	10.8
Simulation, STL	0.3	0.8	3.4	0.2 ms	3.1	0.2	0.5	0.2	8.5
Simulation, OBJ	0.3	0.8	3.3	0.4 ms	3.2	5.0	0.4	0.2	13.2
Visual, GLB	0.3	0.8	3.3	0.2 ms	6.2	89 ms	0.7	0.2	11.7
Visual, OBJ	0.3	0.9	3.4	0.2 ms	6.2	3.3	0.7	0.2	15.0

Board Repo: proveskit/battery_board Board: battery_pack_v2.kicad_pcb Folder battery_pack_v2 Complexity 287 / 1000 (size 177, features 110) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 29, 327, 114 Triangles, simulation 932,774 in 34 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 32 MB 413 MB STEP 141 MB 523 MB STL 47 MB 417 MB OBJ 95 MB 668 MB Visual GLB 22 MB 530 MB OBJ 66 MB 535 MB

2311. inhibit_diagram

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	11 ms	63 ms	51 ms	0.1 ms	0.2	6 ms	20 ms	0.2	0.6
Simulation, STEP	11 ms	52 ms	50 ms	0.1 ms	0.2	0.3	19 ms	0.2	0.8
Simulation, STL	11 ms	53 ms	46 ms	0.1 ms	0.2	8 ms	18 ms	0.2	0.6
Simulation, OBJ	15 ms	53 ms	58 ms	0.1 ms	0.2	0.2	19 ms	0.3	0.8
Visual, GLB	11 ms	53 ms	49 ms	0.1 ms	0.2	6 ms	66 ms	0.2	0.6
Visual, OBJ	11 ms	57 ms	51 ms	0.1 ms	0.2	0.1	51 ms	0.2	0.7

Board Repo: proveskit/battery_board Board: inhibit_diagram.kicad_pcb Folder inhibit_diagram Complexity 106 / 1000 (size 106, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 0, 231, 0 Triangles, simulation 29,954 in 4 parts Note no components Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 1.0 MB 52 MB STEP 6.8 MB 57 MB STL 1.5 MB 52 MB OBJ 2.8 MB 57 MB Visual GLB 646 kB 69 MB OBJ 1.7 MB 55 MB

2312. FC_Board_v3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.6	4.0	11.9	1 ms	14.6	0.5	1.8	0.3	34.7
Simulation, STEP	1.4	3.9	11.6	1 ms	15.3	7.9	1.8	0.3	42.3
Simulation, STL	1.4	3.9	12.3	1 ms	15.0	0.8	2.2	0.4	35.9
Simulation, OBJ	1.5	4.2	12.0	0.9 ms	16.0	17.6	1.8	0.3	53.5
Visual, GLB	1.4	4.0	12.1	1 ms	22.4	0.4	2.4	0.2	42.9
Visual, OBJ	1.4	4.2	11.4	0.7 ms	21.3	9.7	2.4	0.3	50.6

Board Repo: proveskit/flight_controller_board Board: FC_Board_v3.kicad_pcb Folder Deprecated Versions / FC_External_v3 Complexity 348 / 1000 (size 243, features 105) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 6 (20211014) Parts, tracks, vias 75, 1,107, 233 Triangles, simulation 2,602,548 in 123 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 95 MB 834 MB STEP 492 MB 1.1 GB STL 130 MB 827 MB OBJ 294 MB 1.8 GB Visual GLB 56 MB 1.0 GB OBJ 173 MB 1.2 GB

2313. FC_V4a

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.9	2.7	8.7	0.8 ms	9.9	0.3	1.0	0.3	23.9
Simulation, STEP	0.9	2.7	8.3	0.8 ms	10.1	5.5	1.0	0.3	28.8
Simulation, STL	0.9	2.6	8.1	0.7 ms	9.8	0.6	1.0	0.3	23.2
Simulation, OBJ	0.9	2.8	8.6	0.7 ms	9.6	9.5	1.0	0.2	32.7
Visual, GLB	1.0	2.7	8.5	0.9 ms	17.1	0.2	1.9	0.2	31.6
Visual, OBJ	0.9	2.7	8.4	0.8 ms	16.4	7.2	2.2	0.3	38.0

Board Repo: proveskit/flight_controller_board Board: FC_V4a.kicad_pcb Folder Deprecated Versions / FC_V4a Complexity 397 / 1000 (size 252, features 145) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 91, 1,205, 211 Triangles, simulation 1,962,322 in 130 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 69 MB 734 MB STEP 335 MB 891 MB STL 98 MB 752 MB OBJ 211 MB 1.4 GB Visual GLB 50 MB 986 MB OBJ 153 MB 1.1 GB

2314. FC_V4b

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	2.3	7.7	0.7 ms	10.4	0.3	0.9	0.3	22.6
Simulation, STEP	0.8	2.2	7.7	0.7 ms	9.9	5.8	0.9	0.3	27.6
Simulation, STL	0.8	2.3	7.5	0.9 ms	10.1	0.8	0.8	0.3	22.6
Simulation, OBJ	0.7	2.3	7.5	0.8 ms	10.2	9.4	0.8	0.2	31.0
Visual, GLB	0.8	2.2	7.5	0.8 ms	16.9	0.2	2.2	0.2	30.0
Visual, OBJ	0.7	2.2	7.6	0.8 ms	17.1	7.0	2.6	0.2	37.3

Board Repo: proveskit/flight_controller_board Board: FC_V4b.kicad_pcb Folder Deprecated Versions / FC_V4b Complexity 402 / 1000 (size 257, features 145) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 108, 1,453, 257 Triangles, simulation 2,254,680 in 135 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 79 MB 836 MB STEP 385 MB 992 MB STL 113 MB 826 MB OBJ 244 MB 1.5 GB Visual GLB 57 MB 1.1 GB OBJ 175 MB 1.3 GB

2315. FC_V4c_Express

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.3	3.3	11.5	0.9 ms	14.6	0.4	1.2	0.3	32.7
Simulation, STEP	1.3	3.1	11.4	0.9 ms	14.6	8.1	1.3	0.3	40.0
Simulation, STL	1.3	3.2	11.1	1 ms	13.8	0.9	1.2	0.3	31.8
Simulation, OBJ	1.2	3.2	11.0	0.9 ms	13.9	14.3	1.2	0.3	45.2
Visual, GLB	1.3	3.2	11.1	0.8 ms	22.8	0.3	2.9	0.3	41.9
Visual, OBJ	1.2	3.1	11.1	0.8 ms	22.9	10.7	3.0	0.3	52.3

Board Repo: proveskit/flight_controller_board Board: FC_V4c_Express.kicad_pcb Folder Deprecated Versions / FC_V4c_Express Complexity 406 / 1000 (size 261, features 145) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 139, 1,608, 276 Triangles, simulation 2,462,246 in 150 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 86 MB 850 MB STEP 423 MB 1.1 GB STL 123 MB 869 MB OBJ 266 MB 1.8 GB Visual GLB 62 MB 1.2 GB OBJ 192 MB 1.4 GB

2316. FC_V5

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.4	4.3	14.1	0.5 ms	16.6	0.6	1.7	0.3	39.0
Simulation, STEP	1.4	4.0	14.3	1 ms	16.0	10.1	1.7	0.3	47.9
Simulation, STL	1.6	5.8	14.8	1.0 ms	17.5	1.1	1.8	0.3	42.8
Simulation, OBJ	1.4	4.3	14.3	0.6 ms	16.7	19.6	1.8	0.3	58.3
Visual, GLB	1.5	4.3	16.3	4 ms	37.5	0.5	4.8	0.3	65.2
Visual, OBJ	1.6	5.0	16.1	0.7 ms	36.4	15.6	5.1	0.3	80.0

Board Repo: proveskit/flight_controller_board Board: FC_V5.kicad_pcb Folder Deprecated Versions / FC_V5 Complexity 400 / 1000 (size 270, features 130) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 207, 2,147, 323 Triangles, simulation 3,476,500 in 221 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 121 MB 1.1 GB STEP 620 MB 1.4 GB STL 174 MB 1.1 GB OBJ 379 MB 2.4 GB Visual GLB 83 MB 1.4 GB OBJ 261 MB 1.8 GB

2317. FC_V5a

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.4	4.4	14.8	0.5 ms	15.7	0.7	1.7	0.3	39.0
Simulation, STEP	1.5	4.3	15.2	0.6 ms	15.8	10.4	1.7	0.2	49.1
Simulation, STL	1.4	4.4	14.9	1 ms	16.6	1.3	1.7	0.3	40.6
Simulation, OBJ	1.5	4.5	15.2	1 ms	16.3	22.4	1.7	0.3	62.0
Visual, GLB	1.5	4.6	15.2	1 ms	37.7	0.4	4.4	0.3	64.1
Visual, OBJ	1.5	4.6	15.5	1 ms	36.1	15.4	4.5	0.3	77.9

Board Repo: proveskit/flight_controller_board Board: FC_V5a.kicad_pcb Folder Deprecated Versions / FC_V5a Complexity 406 / 1000 (size 276, features 130) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 254, 2,647, 442 Triangles, simulation 4,208,656 in 231 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 146 MB 1.3 GB STEP 744 MB 1.6 GB STL 210 MB 1.3 GB OBJ 458 MB 2.8 GB Visual GLB 100 MB 1.6 GB OBJ 315 MB 2.1 GB

2318. FC_v5d

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.7	4.7	17.6	0.7 ms	17.6	0.8	2.4	0.3	45.2
Simulation, STEP	1.4	4.5	17.7	0.7 ms	17.8	11.5	2.1	0.3	55.4
Simulation, STL	1.5	4.6	17.4	0.6 ms	17.4	1.7	2.4	0.3	45.3
Simulation, OBJ	1.6	4.7	16.6	2 ms	17.4	22.4	2.5	0.4	65.6
Visual, GLB	1.6	4.7	16.7	2 ms	41.6	0.5	5.9	0.3	71.2
Visual, OBJ	1.6	4.6	17.2	0.7 ms	41.3	15.0	6.0	0.3	86.0

Board Repo: proveskit/flight_controller_board Board: FC_v5d.kicad_pcb Folder Deprecated Versions / FC_V5d_Express Complexity 414 / 1000 (size 284, features 130) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 252, 2,764, 512 Triangles, simulation 4,655,724 in 240 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 160 MB 1.5 GB STEP 800 MB 1.8 GB STL 233 MB 1.4 GB OBJ 507 MB 3.1 GB Visual GLB 106 MB 2.0 GB OBJ 337 MB 2.2 GB

2319. FC_V5d_Pro_Rev1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.9	10.3	28.5	0.8 ms	21.9	1.2	4.4	0.3	70.4
Simulation, STEP	3.8	10.3	29.4	0.9 ms	21.9	14.3	4.5	0.4	84.6
Simulation, STL	3.8	10.4	28.8	1 ms	22.2	2.4	4.5	0.4	72.6
Simulation, OBJ	4.0	10.4	28.9	0.8 ms	22.2	34.5	4.2	0.5	104.7
Visual, GLB	3.9	10.5	27.9	2 ms	52.2	0.6	7.2	0.3	102.6
Visual, OBJ	3.8	10.3	28.7	0.8 ms	53.5	23.2	7.7	0.3	127.5

Board Repo: proveskit/flight_controller_board Board: FC_V5d_Pro_Rev1.kicad_pcb Folder Deprecated Versions / FC_V5d_Pro_Rev1 Complexity 428 / 1000 (size 283, features 145) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 248, 2,703, 496 Triangles, simulation 5,218,602 in 233 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 185 MB 1.7 GB STEP 955 MB 2.1 GB STL 261 MB 1.7 GB OBJ 583 MB 3.6 GB Visual GLB 130 MB 2.1 GB OBJ 411 MB 2.7 GB

2320. FC_V4c_InspireFly_Special

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.2	2.8	10.0	0.8 ms	13.2	0.4	1.1	0.3	29.0
Simulation, STEP	1.0	3.0	10.7	1 ms	13.3	7.5	0.9	0.3	36.8
Simulation, STL	1.2	3.1	10.0	1.0 ms	13.0	0.8	1.1	0.3	29.5
Simulation, OBJ	1.0	3.1	10.2	0.9 ms	13.2	12.9	1.1	0.3	41.9
Visual, GLB	1.1	2.9	10.6	0.9 ms	22.6	0.3	2.8	0.3	40.6
Visual, OBJ	1.0	2.8	10.2	1 ms	21.8	10.0	3.2	0.3	49.2

Board Repo: proveskit/flight_controller_board Board: FC_V4c_InspireFly_Special.kicad_pcb Folder FC_V4c_InspireFly_Special Complexity 406 / 1000 (size 261, features 145) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 136, 1,569, 284 Triangles, simulation 2,557,134 in 149 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 89 MB 924 MB STEP 447 MB 1.1 GB STL 128 MB 866 MB OBJ 277 MB 1.8 GB Visual GLB 65 MB 1.3 GB OBJ 202 MB 1.4 GB

2321. FC_V5b

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	4.7	16.3	0.7 ms	16.8	0.7	2.0	0.3	42.2
Simulation, STEP	1.5	4.7	16.0	1 ms	16.5	11.5	2.0	0.3	52.5
Simulation, STL	1.5	4.6	15.6	0.9 ms	15.8	1.4	1.8	0.3	41.2
Simulation, OBJ	1.5	4.6	15.8	1 ms	16.0	23.8	2.2	0.3	64.3
Visual, GLB	1.5	4.9	16.0	2 ms	39.0	0.5	5.1	0.3	67.1
Visual, OBJ	1.5	4.6	16.0	0.6 ms	38.5	16.5	5.2	0.3	82.6

Board Repo: proveskit/flight_controller_board Board: FC_V5b.kicad_pcb Folder FC_V5b Complexity 410 / 1000 (size 280, features 130) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 253, 2,712, 433 Triangles, simulation 4,374,488 in 245 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 151 MB 1.3 GB STEP 771 MB 1.7 GB STL 219 MB 1.3 GB OBJ 477 MB 2.9 GB Visual GLB 103 MB 1.7 GB OBJ 325 MB 2.2 GB

2322. FC_V5c

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.8	5.3	20.1	2 ms	19.8	0.9	2.8	0.4	51.2
Simulation, STEP	2.0	5.6	20.0	0.8 ms	20.0	12.9	2.4	0.4	63.3
Simulation, STL	1.8	5.2	18.3	1 ms	18.6	1.8	2.4	0.4	48.4
Simulation, OBJ	1.8	5.1	18.1	0.7 ms	18.3	26.9	2.6	0.3	73.1
Visual, GLB	1.9	5.2	18.6	0.8 ms	43.2	0.5	5.0	0.3	74.6
Visual, OBJ	1.9	5.1	18.7	0.7 ms	42.5	17.4	5.4	0.3	91.3

Board Repo: proveskit/flight_controller_board Board: FC_V5c.kicad_pcb Folder FC_V5c Complexity 412 / 1000 (size 282, features 130) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 242, 2,594, 489 Triangles, simulation 4,501,378 in 242 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 155 MB 1.4 GB STEP 772 MB 1.7 GB STL 225 MB 1.4 GB OBJ 490 MB 3.0 GB Visual GLB 102 MB 1.8 GB OBJ 324 MB 2.0 GB

2323. FC_V5d_Production

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.7	10.1	28.9	0.8 ms	22.4	1.0	4.5	0.4	71.0
Simulation, STEP	3.8	10.3	29.5	0.8 ms	22.8	14.6	4.6	0.3	86.0
Simulation, STL	3.9	10.4	30.1	0.8 ms	23.3	2.2	4.6	0.4	74.9
Simulation, OBJ	3.8	10.5	30.7	1 ms	24.2	37.6	5.2	0.3	112.4
Visual, GLB	4.2	11.0	31.1	1 ms	59.5	0.7	6.7	0.4	113.7
Visual, OBJ	3.8	10.6	30.4	0.9 ms	56.9	23.3	7.3	0.4	132.6

Board Repo: proveskit/flight_controller_board Board: FC_V5d_Production.kicad_pcb Folder FC_V5d_Production Complexity 428 / 1000 (size 283, features 145) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 252, 2,703, 497 Triangles, simulation 5,242,696 in 236 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 186 MB 1.9 GB STEP 958 MB 2.1 GB STL 262 MB 1.8 GB OBJ 585 MB 3.5 GB Visual GLB 131 MB 2.2 GB OBJ 412 MB 2.6 GB

2324. FC_V5d_Production_Rev2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.2	8.8	25.1	0.8 ms	19.1	1.1	3.8	0.3	61.5
Simulation, STEP	3.2	9.0	26.1	0.8 ms	20.4	13.6	4.0	0.3	76.5
Simulation, STL	3.3	9.0	26.1	0.9 ms	19.8	2.2	4.1	0.3	64.9
Simulation, OBJ	3.4	9.3	25.8	0.8 ms	20.0	31.3	4.1	0.3	94.4
Visual, GLB	3.4	8.9	26.0	0.8 ms	47.0	0.6	6.5	0.3	92.7
Visual, OBJ	3.4	8.9	25.6	0.8 ms	47.1	20.3	5.6	0.3	111.2

Board Repo: proveskit/flight_controller_board Board: FC_V5d_Production_Rev2.kicad_pcb Folder FC_V5d_Production_Rev2 Complexity 428 / 1000 (size 283, features 145) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 248, 2,691, 494 Triangles, simulation 5,214,656 in 233 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 185 MB 1.7 GB STEP 956 MB 2.1 GB STL 261 MB 1.7 GB OBJ 582 MB 3.5 GB Visual GLB 130 MB 2.1 GB OBJ 411 MB 2.7 GB

2325. FC_V5e

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	4.2	12.7	29.7	0.8 ms	23.2	1.1	4.5	0.5	75.8
Simulation, STEP	4.0	12.6	30.2	0.8 ms	22.6	15.7	4.8	0.4	90.3
Simulation, STL	4.2	13.0	30.2	0.9 ms	22.3	2.6	4.8	0.4	77.4
Simulation, OBJ	4.2	12.8	29.7	0.7 ms	23.2	34.3	4.6	0.4	109.2
Visual, GLB	4.0	12.7	30.1	0.7 ms	55.2	0.7	7.2	0.3	110.3
Visual, OBJ	4.2	12.7	30.1	0.9 ms	54.5	23.6	7.7	0.4	133.2

Board Repo: proveskit/flight_controller_board Board: FC_V5e.kicad_pcb Folder FC_V5e Complexity 425 / 1000 (size 280, features 145) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 246, 2,780, 477 Triangles, simulation 5,281,252 in 234 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 187 MB 1.9 GB STEP 1.0 GB 2.1 GB STL 264 MB 2.0 GB OBJ 587 MB 3.6 GB Visual GLB 133 MB 2.2 GB OBJ 420 MB 2.8 GB

2326. FC_V5e_Production_Rev1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	3.7	9.2	24.5	0.6 ms	19.1	0.9	3.5	0.3	61.2
Simulation, STEP	3.9	9.1	24.8	0.7 ms	19.0	13.0	3.8	0.3	74.0
Simulation, STL	3.7	9.0	24.9	0.7 ms	19.3	1.6	3.8	0.4	62.6
Simulation, OBJ	3.7	8.9	25.2	0.6 ms	19.5	29.1	3.6	0.4	90.4
Visual, GLB	3.7	9.0	24.6	0.7 ms	47.3	0.6	5.1	0.3	90.6
Visual, OBJ	3.9	9.4	25.3	0.8 ms	47.8	22.0	5.2	0.3	114.0

Board Repo: proveskit/flight_controller_board Board: FC_V5e_Production_Rev1.kicad_pcb Folder FC_V5e_Production_Rev1 Complexity 425 / 1000 (size 280, features 145) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, copper text, curved board outline, knockout text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 247, 2,735, 477 Triangles, simulation 5,097,294 in 231 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 182 MB 1.8 GB STEP 1000 MB 2.1 GB STL 255 MB 1.8 GB OBJ 569 MB 3.5 GB Visual GLB 131 MB 2.0 GB OBJ 414 MB 2.7 GB

2327. cm5MiniITX

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	8.2	21.4	2 ms	18.6	1.1	2.6	0.3	53.9
Simulation, STEP	1.6	8.2	21.1	1.0 ms	18.2	12.2	3.0	0.4	64.6
Simulation, STL	1.6	8.4	22.6	2 ms	18.7	2.0	2.9	0.3	56.5
Simulation, OBJ	1.5	8.3	20.9	0.9 ms	18.7	32.2	3.1	0.4	85.0
Visual, GLB	1.6	8.8	21.7	1.0 ms	43.8	0.6	5.5	0.3	82.5
Visual, OBJ	1.5	8.3	20.9	0.9 ms	43.4	18.2	6.0	0.3	98.6

Board Repo: pullobi/cm5MiniITX Board: cm5MiniITX.kicad_pcb Complexity 346 / 1000 (size 216, features 130) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, curved board outline, TrueType text, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 51, 3,024, 728 Triangles, simulation 5,274,120 in 270 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 177 MB 1.5 GB STEP 613 MB 2.0 GB STL 264 MB 1.5 GB OBJ 558 MB 3.4 GB Visual GLB 107 MB 1.8 GB OBJ 342 MB 2.3 GB

2328. SwitchBlox

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.7	6.8	0.7 ms	5.4	0.2	0.7	0.3	15.4
Simulation, STEP	0.3	1.7	7.1	0.7 ms	5.2	3.2	0.6	0.2	18.3
Simulation, STL	0.3	1.7	7.0	0.7 ms	5.2	0.4	0.6	0.2	15.5
Simulation, OBJ	0.3	1.6	6.8	0.5 ms	5.1	6.6	0.7	0.2	21.3
Visual, GLB	0.3	1.7	6.7	0.6 ms	9.6	0.1	1.1	0.2	19.7
Visual, OBJ	0.3	1.7	6.9	0.7 ms	10.1	4.0	1.0	0.2	24.2

Board Repo: puyams/SwitchBlox Board: SwitchBlox.kicad_pcb Folder Hardware / Release Design Files / Source Kicad Files Complexity 273 / 1000 (size 228, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 84, 1,564, 105 Triangles, simulation 1,226,446 in 156 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 44 MB 464 MB STEP 237 MB 562 MB STL 61 MB 454 MB OBJ 130 MB 890 MB Visual GLB 28 MB 592 MB OBJ 83 MB 617 MB

2329. batteryboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.5	2.5	0.3 ms	1.9	77 ms	0.3	0.2	5.7
Simulation, STEP	0.3	0.5	2.3	0.1 ms	1.8	1.6	0.3	0.2	6.9
Simulation, STL	0.2	0.5	2.4	0.1 ms	1.7	0.1	0.3	0.2	5.5
Simulation, OBJ	0.2	0.5	2.3	0.2 ms	1.8	2.8	0.2	0.2	8.1
Visual, GLB	0.2	0.5	2.4	0.3 ms	3.6	54 ms	0.4	0.2	7.4
Visual, OBJ	0.2	0.5	2.3	0.2 ms	3.5	2.1	0.5	0.3	9.4

Board Repo: pycubed/hardware Board: batteryboard.kicad_pcb Folder batteryboard-v01 Complexity 193 / 1000 (size 138, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 24, 50, 48 Triangles, simulation 444,146 in 24 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 16 MB 277 MB STEP 78 MB 320 MB STL 22 MB 276 MB OBJ 47 MB 332 MB Visual GLB 11 MB 311 MB OBJ 33 MB 322 MB

2330. batteryboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.4	2.1	0.2 ms	1.3	70 ms	0.2	0.3	4.5
Simulation, STEP	0.2	0.4	2.0	0.3 ms	1.4	1.5	0.2	0.2	5.9
Simulation, STL	0.2	0.4	2.0	0.2 ms	1.4	0.1	0.2	0.2	4.5
Simulation, OBJ	0.2	0.4	2.0	0.2 ms	1.4	2.3	0.2	0.2	6.8
Visual, GLB	0.2	0.4	2.0	0.2 ms	3.2	52 ms	0.4	0.2	6.5
Visual, OBJ	0.2	0.4	2.0	0.2 ms	3.4	1.5	0.5	0.2	8.3

Board Repo: pycubed/hardware Board: batteryboard.kicad_pcb Folder batteryboard-v01b Complexity 193 / 1000 (size 138, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 24, 50, 48 Triangles, simulation 444,304 in 28 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 16 MB 291 MB STEP 77 MB 315 MB STL 22 MB 288 MB OBJ 46 MB 354 MB Visual GLB 11 MB 299 MB OBJ 33 MB 309 MB

2331. mainboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.7	2.9	9.9	0.9 ms	11.9	0.4	1.0	0.3	27.2
Simulation, STEP	0.7	3.0	9.7	1 ms	11.7	6.5	1.1	0.3	33.1
Simulation, STL	0.7	3.0	9.9	0.9 ms	11.3	0.8	1.0	0.3	27.1
Simulation, OBJ	0.6	3.0	9.9	1 ms	11.3	12.2	1.1	0.3	38.5
Visual, GLB	0.6	3.0	9.9	0.8 ms	20.0	0.2	2.6	0.3	36.7
Visual, OBJ	0.6	2.9	10.0	0.9 ms	20.2	8.7	3.1	0.2	45.9

Board Repo: pycubed/hardware Board: mainboard.kicad_pcb Folder mainboard-v01 Complexity 314 / 1000 (size 259, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 135, 1,293, 276 Triangles, simulation 2,746,652 in 195 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 96 MB 894 MB STEP 413 MB 1.2 GB STL 137 MB 890 MB OBJ 293 MB 1.9 GB Visual GLB 66 MB 1.2 GB OBJ 205 MB 1.4 GB

2332. mainboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	2.7	12.8	0.9 ms	11.0	0.5	1.2	0.3	29.3
Simulation, STEP	0.7	2.5	12.7	0.7 ms	10.8	7.6	1.2	0.3	35.7
Simulation, STL	0.8	2.6	12.5	2 ms	10.7	0.8	1.1	0.3	28.8
Simulation, OBJ	0.7	2.5	12.5	0.8 ms	10.4	16.3	1.2	0.3	43.9
Visual, GLB	0.7	2.6	12.8	0.8 ms	24.5	0.3	3.2	0.2	44.4
Visual, OBJ	0.7	2.7	12.6	0.9 ms	23.4	11.1	3.1	0.3	53.9

Board Repo: pycubed/hardware Board: mainboard.kicad_pcb Folder mainboard-v02 Complexity 313 / 1000 (size 258, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 142, 1,190, 252 Triangles, simulation 3,087,922 in 192 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 108 MB 1.1 GB STEP 454 MB 1.2 GB STL 154 MB 1.1 GB OBJ 332 MB 2.0 GB Visual GLB 71 MB 1.3 GB OBJ 222 MB 1.5 GB

2333. mainboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	3.5	15.4	0.6 ms	17.6	0.6	1.7	0.4	40.2
Simulation, STEP	1.3	3.3	15.5	0.9 ms	17.7	9.3	1.6	0.3	48.9
Simulation, STL	1.1	3.4	15.3	0.6 ms	17.9	1.1	1.6	0.3	40.7
Simulation, OBJ	1.2	3.4	16.0	1 ms	17.5	20.3	1.5	0.3	60.3
Visual, GLB	1.0	3.4	15.7	0.7 ms	31.5	0.4	4.4	0.3	56.7
Visual, OBJ	1.0	3.4	15.8	1.0 ms	31.8	14.2	5.0	0.3	71.6

Board Repo: pycubed/hardware Board: mainboard.kicad_pcb Folder mainboard-v04 Complexity 326 / 1000 (size 261, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 150, 1,339, 325 Triangles, simulation 3,637,308 in 213 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 127 MB 1.1 GB STEP 535 MB 1.4 GB STL 182 MB 1.1 GB OBJ 397 MB 2.4 GB Visual GLB 85 MB 1.4 GB OBJ 271 MB 1.8 GB

2334. mainboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	3.6	16.5	0.8 ms	15.7	0.7	1.7	0.3	39.6
Simulation, STEP	1.1	3.7	16.5	0.8 ms	15.6	9.7	1.7	0.3	48.6
Simulation, STL	1.2	3.7	16.1	0.8 ms	16.0	1.3	1.7	0.3	40.3
Simulation, OBJ	1.1	3.8	16.7	0.8 ms	16.0	19.7	1.9	0.3	59.5
Visual, GLB	1.1	3.8	17.2	0.7 ms	37.2	0.5	6.0	0.3	66.1
Visual, OBJ	1.2	3.9	16.8	0.9 ms	36.8	13.4	6.3	0.3	78.7

Board Repo: pycubed/hardware Board: mainboard.kicad_pcb Folder mainboard-v05 Complexity 361 / 1000 (size 271, features 90) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 220, 1,958, 409 Triangles, simulation 4,482,088 in 257 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 157 MB 1.7 GB STEP 695 MB 1.7 GB STL 224 MB 1.6 GB OBJ 492 MB 3.0 GB Visual GLB 108 MB 1.7 GB OBJ 344 MB 2.2 GB

2335. coco3

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.6	6.7	37.6	2 ms	33.0	1.3	4.4	0.4	86.0
Simulation, STEP	2.8	6.9	37.3	1 ms	32.3	19.7	4.4	0.4	103.8
Simulation, STL	2.8	6.7	37.9	1 ms	33.0	3.0	4.3	0.4	88.0
Simulation, OBJ	2.5	7.0	37.6	2 ms	32.5	46.7	4.4	0.4	131.1
Visual, GLB	2.7	7.0	38.6	1 ms	87.9	0.9	8.8	0.4	146.2
Visual, OBJ	2.9	7.0	38.8	1 ms	84.4	28.0	9.3	0.3	170.7

Board Repo: qbancoffee/coco_motherboards Board: coco3.kicad_pcb Folder 26-3334 / coco3 Complexity 323 / 1000 (size 258, features 65) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 7 (20221018) Parts, tracks, vias 205, 5,365, 359 Triangles, simulation 7,284,548 in 248 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 247 MB 2.4 GB STEP 1.2 GB 2.9 GB STL 364 MB 2.4 GB OBJ 773 MB 4.6 GB Visual GLB 172 MB 2.7 GB OBJ 549 MB 3.6 GB

2336. qomu-board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	0.6	2.0	0.2 ms	2.3	77 ms	0.3	0.3	5.7
Simulation, STEP	0.3	0.6	2.0	0.4 ms	2.2	1.8	0.3	0.2	7.4
Simulation, STL	0.3	0.6	1.9	0.2 ms	2.4	0.1	0.2	0.2	5.8
Simulation, OBJ	0.3	0.6	2.1	0.2 ms	2.2	2.4	0.2	0.2	8.2
Visual, GLB	0.3	0.6	2.0	0.3 ms	3.6	50 ms	0.3	0.2	6.9
Visual, OBJ	0.3	0.6	2.0	0.3 ms	3.7	1.5	0.2	0.3	8.5

Board Repo: QuickLogic-Corp/qomu-dev-board Board: qomu-board.kicad_pcb Complexity 340 / 1000 (size 245, features 95) KESE features blind and buried vias, custom pads, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 42, 821, 190 Triangles, simulation 426,198 in 51 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 15 MB 288 MB STEP 53 MB 321 MB STL 21 MB 289 MB OBJ 44 MB 352 MB Visual GLB 8.8 MB 303 MB OBJ 26 MB 308 MB

2337. unibone.routed

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	2.8	20.4	116.2	2 ms	92.5	3.7	9.0	0.6	245.2
Simulation, STEP	2.7	26.3	110.2	3 ms	64.4	37.6	8.7	0.6	250.5
Simulation, STL	2.5	20.6	97.5	3 ms	61.5	6.2	8.4	0.6	197.2
Simulation, OBJ	2.4	20.2	94.5	2 ms	61.2	99.1	8.9	0.5	286.8
Visual, GLB	2.5	20.2	95.1	3 ms	114.8	1.0	9.9	0.5	243.9
Visual, OBJ	2.4	19.4	94.7	2 ms	116.1	36.5	10.0	0.4	279.5

Board Repo: QUniBone/QUniBoneClassic Board: unibone.routed.kicad_pcb Folder 01.01_pcb / unibone Complexity 358 / 1000 (size 278, features 80) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, drill offsets, filled zones, copper drawings Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 224, 6,542, 358 Triangles, simulation 13,611,408 in 449 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 467 MB 3.3 GB STEP 1.9 GB 4.0 GB STL 681 MB 3.2 GB OBJ 1.5 GB 8.7 GB Visual GLB 201 MB 3.6 GB OBJ 652 MB 4.2 GB

2338. unibone.unrouted

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.4	17.4	57.2	3 ms	43.3	1.9	4.8	0.5	126.5
Simulation, STEP	1.4	16.1	54.8	2 ms	43.0	27.9	5.4	0.5	149.2
Simulation, STL	1.4	17.0	57.2	4 ms	43.2	4.4	4.9	0.5	128.7
Simulation, OBJ	1.5	16.7	55.1	2 ms	44.2	72.6	5.2	0.5	195.7
Visual, GLB	1.4	16.9	57.0	3 ms	76.9	0.6	7.1	0.4	160.3
Visual, OBJ	1.5	16.7	54.8	3 ms	71.1	25.1	7.5	0.4	177.0

Board Repo: QUniBone/QUniBoneClassic Board: unibone.unrouted.kicad_pcb Folder 01.01_pcb / unibone Complexity 308 / 1000 (size 248, features 60) KESE features through vias, custom pads, rounded, trapezoid or chamfered pads, drill offsets, copper drawings Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 224, 800, 120 Triangles, simulation 11,501,714 in 449 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 381 MB 2.7 GB STEP 1.5 GB 3.7 GB STL 575 MB 2.6 GB OBJ 1.2 GB 7.3 GB Visual GLB 157 MB 2.9 GB OBJ 506 MB 3.4 GB

2339. qmtech-minimig

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.6	7.1	30.4	1 ms	24.8	1.0	2.5	0.3	67.7
Simulation, STEP	1.5	7.1	30.9	2 ms	25.8	17.1	2.9	0.4	85.7
Simulation, STL	1.7	7.7	31.4	2 ms	25.9	1.9	2.6	0.4	71.7
Simulation, OBJ	1.7	6.7	31.8	1 ms	24.7	31.1	2.8	0.4	99.2
Visual, GLB	1.5	6.6	31.6	2 ms	51.9	0.6	5.1	0.4	97.8
Visual, OBJ	1.6	6.9	31.9	1.0 ms	49.8	18.1	4.9	0.3	113.6

Board Repo: ranzbak/qmtech_minimig Board: qmtech-minimig.kicad_pcb Complexity 377 / 1000 (size 302, features 75) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper text, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 207, 14,165, 316 Triangles, simulation 5,567,022 in 308 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 192 MB 1.8 GB STEP 954 MB 2.0 GB STL 278 MB 1.8 GB OBJ 598 MB 3.6 GB Visual GLB 113 MB 1.8 GB OBJ 358 MB 2.4 GB

2340. ACU5EV_Carrier_Base

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	85 ms	50 ms	52 ms	0.1 ms	74 ms	5 ms	6 ms	0.3	0.6
Simulation, STEP	0.1	78 ms	44 ms	0.1 ms	79 ms	0.1	6 ms	0.3	0.7
Simulation, STL	90 ms	39 ms	42 ms	0.1 ms	55 ms	3 ms	7 ms	0.3	0.5
Simulation, OBJ	93 ms	46 ms	46 ms	0.1 ms	67 ms	73 ms	8 ms	0.3	0.6
Visual, GLB	86 ms	40 ms	49 ms	0.1 ms	0.1	4 ms	39 ms	0.3	0.6
Visual, OBJ	95 ms	46 ms	47 ms	0.1 ms	0.1	51 ms	39 ms	0.3	0.7

Board Repo: raonslab2/fcboardkicad Board: ACU5EV_Carrier_Base.kicad_pcb Folder out / carrier_acu5ev Complexity 17 / 1000 (size 17, features 0) Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 0, 0, 0 Triangles, simulation 8,288 in 4 parts Note no components Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 293 kB 61 MB STEP 1.0 MB 61 MB STL 415 kB 60 MB OBJ 794 kB 62 MB Visual GLB 289 kB 84 MB OBJ 737 kB 86 MB

2341. AmplifierHat

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.8	2.2	6.5	0.4 ms	6.7	0.3	0.9	0.3	17.5
Simulation, STEP	0.7	2.1	6.2	0.4 ms	6.2	4.4	0.8	0.2	20.7
Simulation, STL	0.7	2.0	6.1	0.4 ms	6.4	0.6	0.9	0.3	17.1
Simulation, OBJ	0.7	2.2	6.2	0.4 ms	6.5	10.6	0.8	0.3	27.2
Visual, GLB	0.7	2.1	6.3	0.6 ms	14.0	0.2	1.5	0.2	25.1
Visual, OBJ	0.7	2.0	6.2	0.5 ms	14.3	6.7	1.6	0.3	31.8

Board Repo: rasmusstagsted/artixdevboard Board: AmplifierHat.kicad_pcb Folder AmplifierHat Complexity 307 / 1000 (size 212, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, copper drawings, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 163, 706, 387 Triangles, simulation 1,971,778 in 122 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 67 MB 799 MB STEP 218 MB 855 MB STL 99 MB 788 MB OBJ 203 MB 1.3 GB Visual GLB 41 MB 897 MB OBJ 124 MB 952 MB

2342. ArtixDevBoard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.5	5.4	23.2	3 ms	32.2	1.0	2.6	0.4	66.2
Simulation, STEP	1.3	5.6	22.3	1 ms	32.0	15.4	2.4	0.4	79.4
Simulation, STL	1.3	5.7	22.1	3 ms	31.8	2.2	2.5	0.4	65.9
Simulation, OBJ	1.2	5.0	21.2	2 ms	31.7	27.4	2.3	0.4	89.2
Visual, GLB	1.3	5.2	21.4	2 ms	55.3	0.6	7.4	0.3	91.5
Visual, OBJ	1.5	5.3	21.9	1 ms	56.9	20.2	8.0	0.3	114.0

Board Repo: rasmusstagsted/artixdevboard Board: ArtixDevBoard.kicad_pcb Complexity 423 / 1000 (size 303, features 120) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 4 File format KiCad 8 (20240108) Parts, tracks, vias 301, 5,140, 707 Triangles, simulation 5,070,308 in 523 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 174 MB 1.5 GB STEP 802 MB 2.1 GB STL 254 MB 1.6 GB OBJ 540 MB 3.3 GB Visual GLB 122 MB 2.0 GB OBJ 387 MB 2.6 GB

2343. scarlet-8088

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	4.4	16.6	58.6	2 ms	72.7	3.3	10.5	0.6	166.7
Simulation, STEP	4.1	16.6	59.5	15 ms	70.4	41.7	10.4	0.6	203.3
Simulation, STL	4.5	17.3	60.0	2 ms	68.3	7.0	9.7	0.6	167.4
Simulation, OBJ	4.8	20.0	69.2	2 ms	75.8	138.2	12.0	0.7	320.8
Visual, GLB	4.5	17.6	59.9	2 ms	152.5	1.4	14.9	0.5	251.3
Visual, OBJ	4.2	18.0	60.2	2 ms	146.4	54.9	14.2	0.5	298.4

Board Repo: Red-Lucy-Engineering/scarlet-8088 Board: scarlet-8088.kicad_pcb Complexity 388 / 1000 (size 283, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, knockout text, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 to 10th November 2026 Copper layers 4 File format KiCad 10 (20260206) Parts, tracks, vias 140, 6,778, 2,351 Triangles, simulation 18,399,402 in 411 parts Verifier PASS in all six runs Run again Simulation, OBJ: failed in the corpus run, run again with the memory cap raised from 11 GB to 14.5 GB, and passed

File type File size Peak memory used Simulation GLB 605 MB 3.9 GB STEP 2.1 GB 6.1 GB STL 920 MB 4.1 GB OBJ 2.1 GB 12 GB Visual GLB 324 MB 5.3 GB OBJ 1.1 GB 6.7 GB

2344. Motherboard

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.3	4.2	17.0	0.6 ms	15.7	0.6	1.9	0.2	40.9
Simulation, STEP	1.2	4.2	16.5	0.6 ms	15.0	8.6	1.8	0.3	47.5
Simulation, STL	1.3	4.1	16.8	0.9 ms	15.3	1.3	1.9	0.3	41.0
Simulation, OBJ	1.3	4.2	16.5	0.9 ms	16.0	19.7	1.7	0.3	59.7
Visual, GLB	1.3	4.3	17.2	0.6 ms	33.9	0.4	3.4	0.2	60.7
Visual, OBJ	1.3	4.1	16.8	0.8 ms	34.0	12.9	3.6	0.2	72.9

Board Repo: Redherring32/OpenTendo Board: Motherboard.kicad_pcb Folder Board Files Complexity 297 / 1000 (size 202, features 95) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, filled zones, curved board outline, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 99, 2,644, 387 Triangles, simulation 3,801,422 in 142 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 129 MB 1.2 GB STEP 573 MB 1.5 GB STL 190 MB 1.1 GB OBJ 401 MB 2.5 GB Visual GLB 86 MB 1.6 GB OBJ 271 MB 1.8 GB

2345. Arduino_Altair_8800

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	3.9	17.9	2 ms	14.9	0.7	2.1	0.3	40.4
Simulation, STEP	0.7	4.3	18.8	1 ms	13.9	9.2	2.2	0.4	49.5
Simulation, STL	0.7	4.1	20.0	1 ms	14.0	1.0	1.9	0.3	42.1
Simulation, OBJ	0.6	3.9	19.5	1 ms	14.3	18.4	2.2	0.3	59.1
Visual, GLB	0.6	3.9	18.5	2 ms	24.9	0.3	2.1	0.3	50.4
Visual, OBJ	0.6	4.0	18.4	1 ms	24.6	8.8	2.6	0.3	59.2

Board Repo: Redlolz/Altair8800-Simulator-PCB Board: Arduino_Altair_8800.kicad_pcb Complexity 225 / 1000 (size 190, features 35) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 178, 1,081, 50 Triangles, simulation 2,890,994 in 235 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 98 MB 1.0 GB STEP 492 MB 1.1 GB STL 145 MB 934 MB OBJ 307 MB 1.9 GB Visual GLB 53 MB 1.2 GB OBJ 163 MB 1.1 GB

2346. Wii PCB

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.1	4.9	23.3	2 ms	21.8	0.9	2.6	0.3	55.0
Simulation, STEP	1.2	4.9	22.9	2 ms	21.8	14.6	2.6	0.3	68.3
Simulation, STL	1.3	4.6	23.8	2 ms	21.2	1.9	2.7	0.3	55.8
Simulation, OBJ	1.4	5.0	23.6	2 ms	21.8	29.7	2.7	0.4	84.5
Visual, GLB	1.3	4.9	23.1	2 ms	53.8	0.6	8.6	0.4	92.7
Visual, OBJ	1.3	4.8	23.8	2 ms	56.4	21.2	8.7	0.3	116.5

Board Repo: ReflowOven/Wee_Wii Board: Wii PCB.kicad_pcb Folder KiCad_Files / Wii_PCB Complexity 384 / 1000 (size 279, features 105) KESE features through vias, rounded, trapezoid or chamfered pads, arc tracks, filled zones, copper drawings, stack-up, dielectric εr and tanδ, mask and silkscreen colours Tested 9th November 2026 Copper layers 4 File format KiCad 9 (20241229) Parts, tracks, vias 181, 6,430, 830 Triangles, simulation 6,132,510 in 459 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 211 MB 2.0 GB STEP 968 MB 2.4 GB STL 307 MB 2.0 GB OBJ 658 MB 4.0 GB Visual GLB 142 MB 2.2 GB OBJ 459 MB 3.1 GB

2347. AppleII

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.4	8.5	58.9	3 ms	45.2	1.8	6.3	0.4	122.5
Simulation, STEP	1.3	8.4	59.9	3 ms	48.4	29.4	6.1	0.4	153.9
Simulation, STL	1.4	8.8	59.3	3 ms	45.5	4.9	6.3	0.4	126.7
Simulation, OBJ	1.3	8.6	61.1	2 ms	46.5	65.8	5.8	0.4	189.6
Visual, GLB	1.4	8.4	58.6	2 ms	87.3	1.0	10.6	0.3	167.7
Visual, OBJ	1.3	8.0	58.5	3 ms	87.0	35.3	9.4	0.3	199.9

Board Repo: reifsnyderb/Apple-II-R0 Board: AppleII.kicad_pcb Complexity 318 / 1000 (size 228, features 90) KESE features through vias, slotted holes, filled zones, TrueType text, stack-up, dielectric εr and tanδ Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 194, 10,767, 374 Triangles, simulation 11,575,970 in 495 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 387 MB 2.7 GB STEP 1.7 GB 4.2 GB STL 579 MB 2.6 GB OBJ 1.2 GB 7.1 GB Visual GLB 220 MB 3.4 GB OBJ 709 MB 4.5 GB

2348. 11ua

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	2.9	0.2 ms	2.7	0.1	0.3	0.2	6.6
Simulation, STEP	0.1	0.3	2.7	0.2 ms	2.9	1.7	0.3	0.2	8.3
Simulation, STL	0.1	0.3	2.9	0.4 ms	3.1	0.1	0.3	0.2	7.0
Simulation, OBJ	0.1	0.3	2.9	0.3 ms	3.0	2.5	0.3	0.2	9.4
Visual, GLB	0.1	0.3	3.0	0.3 ms	5.7	52 ms	0.4	0.2	9.9
Visual, OBJ	0.1	0.3	2.9	0.4 ms	5.2	1.6	0.4	0.2	10.7

Board Repo: rene-dev/stmbl Board: 11ua.kicad_pcb Folder hw / kicad / 11ua Complexity 193 / 1000 (size 148, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 6 (20190605) Parts, tracks, vias 26, 184, 49 Triangles, simulation 555,700 in 32 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 20 MB 330 MB STEP 114 MB 386 MB STL 28 MB 307 MB OBJ 58 MB 424 MB Visual GLB 13 MB 374 MB OBJ 39 MB 359 MB

2349. triple_adapter

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.1	7.2	0.6 ms	6.0	0.2	0.6	0.3	15.5
Simulation, STEP	0.3	1.1	7.0	0.4 ms	5.9	3.9	0.6	0.2	19.1
Simulation, STL	0.3	1.0	6.9	0.5 ms	6.2	0.6	0.6	0.3	15.8
Simulation, OBJ	0.3	1.1	7.3	0.5 ms	6.5	7.6	0.5	0.3	23.7
Visual, GLB	0.3	1.1	6.7	0.4 ms	12.4	0.2	1.3	0.2	22.2
Visual, OBJ	0.3	1.1	7.2	0.5 ms	12.6	5.2	1.7	0.3	28.4

Board Repo: rene-dev/stmbl Board: triple_adapter.kicad_pcb Folder hw / kicad / 11ua Complexity 236 / 1000 (size 181, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 78, 831, 138 Triangles, simulation 1,473,076 in 33 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 51 MB 582 MB STEP 261 MB 727 MB STL 74 MB 605 MB OBJ 154 MB 1.0 GB Visual GLB 37 MB 880 MB OBJ 110 MB 832 MB

2350. db25_bob

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.3	1.2	9.8	0.8 ms	7.2	0.3	0.9	0.2	19.9
Simulation, STEP	0.3	1.2	9.7	0.4 ms	7.1	4.4	0.8	0.2	23.7
Simulation, STL	0.3	1.2	9.7	0.7 ms	7.5	0.4	0.9	0.2	20.1
Simulation, OBJ	0.3	1.2	9.6	0.4 ms	7.1	9.0	0.9	0.2	28.3
Visual, GLB	0.3	1.3	9.8	0.5 ms	12.6	0.2	1.4	0.2	25.7
Visual, OBJ	0.3	1.2	10.1	0.5 ms	13.7	5.9	1.6	0.2	33.0

Board Repo: rene-dev/stmbl Board: db25_bob.kicad_pcb Folder hw / kicad / bob / db25_bob Complexity 221 / 1000 (size 186, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 94, 1,289, 65 Triangles, simulation 1,631,048 in 156 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 58 MB 615 MB STEP 303 MB 751 MB STL 82 MB 619 MB OBJ 174 MB 1.1 GB Visual GLB 38 MB 767 MB OBJ 114 MB 859 MB

2351. db25_bob_v2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.4	10.3	1 ms	6.7	0.2	0.8	0.3	20.1
Simulation, STEP	0.4	1.4	9.9	1 ms	6.7	4.6	0.8	0.3	24.1
Simulation, STL	0.4	1.4	9.5	1 ms	6.1	0.4	0.6	0.3	18.8
Simulation, OBJ	0.4	1.3	9.6	1 ms	6.8	8.6	0.8	0.3	27.7
Visual, GLB	0.4	1.4	9.9	2 ms	12.9	0.1	1.1	0.3	26.0
Visual, OBJ	0.4	1.3	9.8	1 ms	11.7	4.1	1.1	0.2	28.8

Board Repo: rene-dev/stmbl Board: db25_bob_v2.kicad_pcb Folder hw / kicad / bob / db25_bob_v2 Complexity 266 / 1000 (size 231, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 129, 941, 56 Triangles, simulation 1,359,766 in 314 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 47 MB 615 MB STEP 232 MB 645 MB STL 68 MB 619 MB OBJ 143 MB 957 MB Visual GLB 26 MB 615 MB OBJ 79 MB 630 MB

2352. ethernet_bob

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.6	2.9	11.7	0.5 ms	10.7	0.5	1.4	0.3	28.1
Simulation, STEP	0.6	2.9	11.7	0.4 ms	10.7	6.1	1.5	0.3	33.7
Simulation, STL	0.6	3.0	11.9	0.6 ms	11.0	1.1	1.3	0.3	29.1
Simulation, OBJ	0.6	2.9	11.8	1 ms	11.0	14.2	1.4	0.3	42.2
Visual, GLB	0.6	2.9	11.5	0.9 ms	22.8	0.3	2.8	0.3	41.1
Visual, OBJ	0.6	3.0	12.0	0.6 ms	22.2	8.5	3.4	0.2	49.9

Board Repo: rene-dev/stmbl Board: ethernet_bob.kicad_pcb Folder hw / kicad / bob / ethernet_bob Complexity 289 / 1000 (size 244, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 68, 1,672, 112 Triangles, simulation 3,430,750 in 160 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 117 MB 1.1 GB STEP 396 MB 1.4 GB STL 172 MB 1.1 GB OBJ 363 MB 2.2 GB Visual GLB 66 MB 1.2 GB OBJ 207 MB 1.5 GB

2353. io_base

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	1.4	9.5	0.7 ms	5.9	0.2	0.6	0.3	18.3
Simulation, STEP	0.3	1.4	9.8	0.7 ms	6.1	3.9	0.7	0.3	22.5
Simulation, STL	0.3	1.4	9.4	0.7 ms	5.7	0.5	0.7	0.3	18.2
Simulation, OBJ	0.3	1.5	9.6	0.7 ms	5.7	7.8	0.6	0.3	25.9
Visual, GLB	0.3	1.3	9.4	0.6 ms	12.6	0.1	1.3	0.3	25.3
Visual, OBJ	0.3	1.3	9.7	0.7 ms	12.1	4.1	1.4	0.2	29.1

Board Repo: rene-dev/stmbl Board: io_base.kicad_pcb Folder hw / kicad / bob / ethernet_bob / io_base Complexity 197 / 1000 (size 172, features 25) KESE features through vias, drill offsets Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20160815) Parts, tracks, vias 98, 531, 36 Triangles, simulation 1,345,646 in 181 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 46 MB 555 MB STEP 217 MB 623 MB STL 67 MB 559 MB OBJ 140 MB 903 MB Visual GLB 25 MB 611 MB OBJ 76 MB 593 MB

2354. ethernet_bob_base

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.2	12.2	0.6 ms	8.0	0.3	0.9	0.3	24.4
Simulation, STEP	0.4	2.3	12.6	0.6 ms	8.2	6.1	1.1	0.3	30.8
Simulation, STL	0.7	2.5	12.5	0.7 ms	8.4	0.5	0.9	0.3	25.8
Simulation, OBJ	0.4	2.1	12.3	0.8 ms	8.1	11.0	0.9	0.3	35.1
Visual, GLB	0.4	2.3	12.1	0.7 ms	14.7	0.2	1.5	0.2	31.3
Visual, OBJ	0.5	2.1	12.0	0.5 ms	14.9	6.7	1.8	0.2	38.2

Board Repo: rene-dev/stmbl Board: ethernet_bob_base.kicad_pcb Folder hw / kicad / bob / ethernet_bob_base Complexity 279 / 1000 (size 224, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 111, 544, 92 Triangles, simulation 2,128,744 in 169 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 73 MB 835 MB STEP 381 MB 937 MB STL 106 MB 914 MB OBJ 224 MB 1.4 GB Visual GLB 44 MB 853 MB OBJ 134 MB 1.0 GB

2355. Bob

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.1	14.4	0.7 ms	10.9	0.4	1.5	0.3	30.1
Simulation, STEP	0.4	2.0	14.4	0.9 ms	10.6	6.3	1.5	0.3	35.5
Simulation, STL	0.5	2.2	14.2	0.9 ms	10.7	0.9	1.4	0.3	30.2
Simulation, OBJ	0.5	2.0	13.9	0.6 ms	10.5	11.9	1.5	0.3	40.5
Visual, GLB	0.5	2.1	14.1	0.8 ms	23.7	0.3	3.0	0.3	44.1
Visual, OBJ	0.5	2.2	14.2	0.6 ms	24.7	8.7	3.3	0.3	53.8

Board Repo: rene-dev/stmbl Board: Bob.kicad_pcb Folder hw / kicad / de0bob Complexity 238 / 1000 (size 203, features 35) KESE features through vias, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20170123) Parts, tracks, vias 140, 2,759, 170 Triangles, simulation 2,427,452 in 212 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 85 MB 907 MB STEP 447 MB 1.0 GB STL 121 MB 841 MB OBJ 260 MB 1.6 GB Visual GLB 61 MB 1.1 GB OBJ 188 MB 1.4 GB

2356. diff_driver

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	1.2	0.2 ms	1.0	44 ms	0.2	0.2	3.0
Simulation, STEP	0.1	0.3	1.3	0.2 ms	1.1	1.2	0.2	0.2	4.5
Simulation, STL	0.1	0.3	1.3	0.2 ms	1.0	91 ms	0.2	0.2	3.1
Simulation, OBJ	0.1	0.3	1.3	0.2 ms	1.0	1.3	0.2	0.2	4.4
Visual, GLB	0.1	0.3	1.1	0.3 ms	2.5	35 ms	0.2	0.2	4.5
Visual, OBJ	0.1	0.3	1.3	0.2 ms	2.7	1.0	0.3	0.2	5.8

Board Repo: rene-dev/stmbl Board: diff_driver.kicad_pcb Folder hw / kicad / diff_driver Complexity 180 / 1000 (size 125, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 14, 90, 10 Triangles, simulation 300,518 in 27 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 252 MB STEP 54 MB 261 MB STL 15 MB 248 MB OBJ 30 MB 260 MB Visual GLB 7.3 MB 230 MB OBJ 21 MB 231 MB

2357. mesabob

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.3	53 ms	0.1 ms	22 ms	2 ms	2 ms	0.2	0.8
Simulation, STEP	0.2	0.3	50 ms	0.1 ms	15 ms	19 ms	2 ms	0.2	0.8
Simulation, STL	0.3	0.3	46 ms	0.1 ms	14 ms	1 ms	2 ms	0.2	0.8
Simulation, OBJ	0.2	0.3	47 ms	0.1 ms	15 ms	11 ms	2 ms	0.2	0.8
Visual, GLB	0.2	0.3	51 ms	0.1 ms	29 ms	1 ms	9 ms	0.2	0.8
Visual, OBJ	0.2	0.3	54 ms	0.1 ms	41 ms	11 ms	9 ms	0.2	0.8

Board Repo: rene-dev/stmbl Board: mesabob.kicad_pcb Folder hw / kicad / mesabob Complexity 216 / 1000 (size 161, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 44, 446, 25 Triangles, simulation 1,872 in 3 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 56 kB 77 MB STEP 33 kB 76 MB STL 94 kB 77 MB OBJ 174 kB 79 MB Visual GLB 72 kB 77 MB OBJ 175 kB 77 MB

2358. powerstep

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.3	0.2 ms	0.9	40 ms	0.1	0.2	3.1
Simulation, STEP	0.1	0.3	1.3	0.2 ms	0.9	1.1	0.1	0.2	4.1
Simulation, STL	0.1	0.3	1.3	0.2 ms	0.9	62 ms	0.1	0.2	3.0
Simulation, OBJ	0.1	0.3	1.3	0.3 ms	0.9	1.3	0.2	0.2	4.3
Visual, GLB	0.1	0.3	1.3	0.2 ms	2.2	26 ms	0.2	0.3	4.4
Visual, OBJ	0.1	0.3	1.3	0.3 ms	2.2	0.7	0.2	0.2	5.0

Board Repo: rene-dev/stmbl Board: powerstep.kicad_pcb Folder hw / kicad / powerstep Complexity 232 / 1000 (size 187, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20170123) Parts, tracks, vias 28, 48, 8 Triangles, simulation 217,938 in 58 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 7.6 MB 221 MB STEP 36 MB 238 MB STL 11 MB 220 MB OBJ 22 MB 227 MB Visual GLB 4.7 MB 207 MB OBJ 13 MB 210 MB

2359. rectifier

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.3	1.6	0.2 ms	1.2	59 ms	0.2	0.2	3.7
Simulation, STEP	0.1	0.4	1.7	0.2 ms	1.2	1.3	0.2	0.2	5.0
Simulation, STL	0.1	0.3	1.7	0.2 ms	1.2	89 ms	0.2	0.2	3.9
Simulation, OBJ	0.1	0.3	1.6	0.2 ms	1.2	1.8	0.2	0.2	5.4
Visual, GLB	0.1	0.3	1.6	0.2 ms	2.4	32 ms	0.2	0.3	5.0
Visual, OBJ	0.1	0.3	1.6	0.3 ms	2.4	1.0	0.2	0.2	5.8

Board Repo: rene-dev/stmbl Board: rectifier.kicad_pcb Folder hw / kicad / rectifier Complexity 154 / 1000 (size 124, features 30) KESE features filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 15, 113, 0 Triangles, simulation 307,610 in 29 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 11 MB 243 MB STEP 54 MB 252 MB STL 15 MB 234 MB OBJ 31 MB 258 MB Visual GLB 6.1 MB 216 MB OBJ 18 MB 215 MB

2360. rectifier

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	0.6	4.0	0.6 ms	2.3	0.1	0.3	0.3	7.8
Simulation, STEP	0.2	0.6	3.8	0.3 ms	2.3	1.9	0.3	0.2	9.5
Simulation, STL	0.2	0.6	3.9	0.3 ms	2.1	0.1	0.3	0.2	7.6
Simulation, OBJ	0.2	0.7	3.9	0.4 ms	2.0	3.1	0.3	0.2	10.5
Visual, GLB	0.3	0.6	3.4	0.4 ms	4.2	54 ms	0.5	0.2	9.2
Visual, OBJ	0.2	0.6	3.4	0.4 ms	4.0	1.8	0.6	0.2	10.9

Board Repo: rene-dev/stmbl Board: rectifier.kicad_pcb Folder hw / kicad / rectifier2 Complexity 224 / 1000 (size 159, features 65) KESE features through vias, rounded, trapezoid or chamfered pads, drill offsets, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20170922) Parts, tracks, vias 80, 231, 27 Triangles, simulation 606,992 in 68 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 22 MB 340 MB STEP 110 MB 367 MB STL 30 MB 317 MB OBJ 63 MB 462 MB Visual GLB 13 MB 356 MB OBJ 38 MB 350 MB

2361. rj45_breakout

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	73 ms	0.1	0.5	0.1 ms	0.6	21 ms	67 ms	0.2	1.6
Simulation, STEP	77 ms	97 ms	0.5	0.2 ms	0.6	0.8	80 ms	0.2	2.3
Simulation, STL	72 ms	0.1	0.6	0.1 ms	0.6	32 ms	76 ms	0.2	1.6
Simulation, OBJ	71 ms	0.1	0.5	0.1 ms	0.6	0.6	76 ms	0.2	2.1
Visual, GLB	71 ms	0.1	0.5	0.1 ms	1.3	14 ms	79 ms	0.2	2.2
Visual, OBJ	98 ms	0.1	0.6	0.1 ms	1.1	0.3	81 ms	0.2	2.6

Board Repo: rene-dev/stmbl Board: rj45_breakout.kicad_pcb Folder hw / kicad / rj45_breakout Complexity 114 / 1000 (size 94, features 20) KESE features filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 4 (4) Parts, tracks, vias 3, 43, 0 Triangles, simulation 150,252 in 20 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 5.2 MB 187 MB STEP 27 MB 201 MB STL 7.5 MB 188 MB OBJ 15 MB 188 MB Visual GLB 3.0 MB 157 MB OBJ 8.4 MB 160 MB

2362. stmsp

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.5	2.2	12.2	0.6 ms	11.0	0.4	1.1	0.4	27.7
Simulation, STEP	0.5	2.1	12.1	0.4 ms	10.6	6.2	1.0	0.2	32.7
Simulation, STL	0.5	2.1	12.0	0.4 ms	10.6	0.7	1.0	0.3	27.1
Simulation, OBJ	0.5	2.1	11.8	0.4 ms	10.9	13.3	1.1	0.2	39.8
Visual, GLB	0.5	2.1	11.9	0.4 ms	18.7	0.2	1.8	0.3	35.6
Visual, OBJ	0.5	2.1	12.4	0.6 ms	18.9	8.2	1.9	0.3	44.4

Board Repo: rene-dev/stmbl Board: stmsp.kicad_pcb Folder hw / kicad / stmsp Complexity 310 / 1000 (size 255, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20170123) Parts, tracks, vias 128, 975, 276 Triangles, simulation 2,220,152 in 102 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 77 MB 735 MB STEP 365 MB 947 MB STL 111 MB 719 MB OBJ 234 MB 1.5 GB Visual GLB 47 MB 931 MB OBJ 144 MB 1.1 GB

2363. to220_powerstage

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.4	2.0	8.9	0.6 ms	8.4	0.4	1.1	0.3	21.6
Simulation, STEP	0.5	2.0	9.2	0.6 ms	8.3	6.3	1.2	0.3	27.7
Simulation, STL	0.5	2.1	9.0	1 ms	8.5	0.8	1.2	0.3	22.4
Simulation, OBJ	0.5	2.0	9.2	0.8 ms	8.4	14.3	1.3	0.3	35.9
Visual, GLB	0.5	2.2	9.7	0.8 ms	18.7	0.2	1.8	0.2	33.2
Visual, OBJ	0.4	2.0	9.5	0.7 ms	16.7	6.9	2.1	0.3	37.9

Board Repo: rene-dev/stmbl Board: to220_powerstage.kicad_pcb Folder hw / kicad / troller Complexity 297 / 1000 (size 252, features 45) KESE features through vias, filled zones, curved board outline Tested 9th November 2026 Copper layers 4 File format KiCad 4 (4) Parts, tracks, vias 119, 1,563, 231 Triangles, simulation 2,273,470 in 111 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 77 MB 802 MB STEP 313 MB 883 MB STL 114 MB 786 MB OBJ 235 MB 1.5 GB Visual GLB 40 MB 964 MB OBJ 122 MB 881 MB

2364. trollerv2

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.2	1.3	5.5	0.3 ms	4.6	0.2	0.5	0.3	12.5
Simulation, STEP	0.2	1.2	5.5	0.3 ms	4.7	3.2	0.5	0.3	15.7
Simulation, STL	0.2	1.2	5.5	0.2 ms	4.8	0.6	0.5	0.3	13.0
Simulation, OBJ	0.2	1.3	5.6	0.4 ms	4.8	7.6	0.6	0.3	20.3
Visual, GLB	0.2	1.2	5.4	0.3 ms	10.6	97 ms	1.0	0.2	18.8
Visual, OBJ	0.2	1.3	5.6	0.4 ms	10.9	3.4	1.1	0.2	22.6

Board Repo: rene-dev/stmbl Board: trollerv2.kicad_pcb Folder hw / kicad / trollerV2 Complexity 233 / 1000 (size 188, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20170922) Parts, tracks, vias 33, 162, 342 Triangles, simulation 1,338,818 in 47 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 45 MB 524 MB STEP 120 MB 606 MB STL 67 MB 510 MB OBJ 135 MB 907 MB Visual GLB 20 MB 626 MB OBJ 61 MB 641 MB

2365. stmbl_4.0

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.3	8.2	43.1	1 ms	24.5	1.1	3.1	0.3	81.6
Simulation, STEP	1.2	7.2	41.4	2 ms	24.0	17.0	3.0	0.3	94.0
Simulation, STL	1.1	7.2	42.9	1 ms	24.8	2.0	3.3	0.3	81.6
Simulation, OBJ	1.2	7.5	43.0	1 ms	23.9	30.6	3.4	0.3	109.9
Visual, GLB	1.4	7.7	42.0	1 ms	65.5	0.7	8.3	0.3	126.0
Visual, OBJ	1.5	7.3	42.8	1 ms	67.2	23.9	9.7	0.2	152.6

Board Repo: rene-dev/stmbl Board: stmbl_4.0.kicad_pcb Folder hw / kicad / v4.0 Complexity 326 / 1000 (size 271, features 55) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones, curved board outline Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 407, 2,788, 1,076 Triangles, simulation 5,892,236 in 242 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 205 MB 2.0 GB STEP 1.2 GB 2.4 GB STL 295 MB 1.9 GB OBJ 634 MB 3.9 GB Visual GLB 159 MB 2.4 GB OBJ 499 MB 3.2 GB

2366. indicator-board

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.1	0.5	0.1 ms	0.6	22 ms	71 ms	0.2	1.6
Simulation, STEP	0.1	0.1	0.4	0.1 ms	0.6	0.8	66 ms	0.2	2.4
Simulation, STL	0.1	0.1	0.4	0.2 ms	0.6	34 ms	78 ms	0.2	1.6
Simulation, OBJ	0.1	0.1	0.4	0.2 ms	0.6	0.7	90 ms	0.2	2.3
Visual, GLB	0.1	0.1	0.4	0.2 ms	1.3	15 ms	95 ms	0.2	2.3
Visual, OBJ	0.1	0.1	0.4	0.2 ms	1.3	0.5	95 ms	0.2	2.8

Board Repo: respiraworks/ventilator Board: indicator-board.kicad_pcb Folder pcb / indicator-board Complexity 182 / 1000 (size 137, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 15, 67, 7 Triangles, simulation 135,180 in 28 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 4.5 MB 193 MB STEP 20 MB 202 MB STL 6.8 MB 189 MB OBJ 13 MB 191 MB Visual GLB 3.2 MB 156 MB OBJ 9.0 MB 156 MB

2367. pressure_mpx5700ap,gp

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.1	0.7	0.2 ms	0.8	27 ms	75 ms	0.3	2.1
Simulation, STEP	0.1	0.2	0.7	0.2 ms	0.7	0.8	82 ms	0.2	2.7
Simulation, STL	0.1	0.1	0.6	0.1 ms	0.7	55 ms	81 ms	0.2	2.0
Simulation, OBJ	99 ms	0.1	0.7	0.1 ms	0.8	0.8	80 ms	0.2	2.8
Visual, GLB	99 ms	0.1	0.7	0.2 ms	1.3	21 ms	0.1	0.2	2.6
Visual, OBJ	0.1	0.2	0.7	0.2 ms	1.2	0.4	0.1	0.2	2.9

Board Repo: respiraworks/ventilator Board: pressure_mpx5700ap,gp.kicad_pcb Folder pcb / sensor-daughterboards / pressure_mpx5700ap,gp Complexity 153 / 1000 (size 108, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 12, 29, 6 Triangles, simulation 193,508 in 23 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 6.3 MB 199 MB STEP 23 MB 218 MB STL 9.7 MB 194 MB OBJ 19 MB 199 MB Visual GLB 3.7 MB 171 MB OBJ 11 MB 168 MB

2368. pressure_mpxv5004,10dp

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.1	0.7	0.1 ms	0.8	26 ms	81 ms	0.2	2.0
Simulation, STEP	0.1	0.2	0.7	0.2 ms	0.8	0.9	97 ms	0.2	3.0
Simulation, STL	0.1	0.2	0.8	0.1 ms	0.8	40 ms	87 ms	0.3	2.2
Simulation, OBJ	0.1	0.2	0.7	0.1 ms	0.8	0.9	85 ms	0.2	3.0
Visual, GLB	0.1	0.2	0.7	0.3 ms	1.5	16 ms	0.1	0.2	2.8
Visual, OBJ	0.1	0.1	0.7	0.2 ms	1.3	0.5	0.1	0.2	3.1

Board Repo: respiraworks/ventilator Board: pressure_mpxv5004,10dp.kicad_pcb Folder pcb / sensor-daughterboards / pressure_mpxv5004,10dp_common Complexity 154 / 1000 (size 109, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 12, 30, 7 Triangles, simulation 174,100 in 23 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 5.7 MB 195 MB STEP 22 MB 208 MB STL 8.7 MB 195 MB OBJ 17 MB 195 MB Visual GLB 3.6 MB 167 MB OBJ 10 MB 163 MB

2369. pressure_mpxv5004dp

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.2	0.8	0.2 ms	0.8	26 ms	88 ms	0.2	2.3
Simulation, STEP	0.1	0.2	0.8	0.1 ms	0.9	1.1	0.1	0.2	3.3
Simulation, STL	0.1	0.2	0.8	0.2 ms	0.8	41 ms	0.1	0.2	2.3
Simulation, OBJ	0.1	0.2	0.8	0.1 ms	0.9	0.9	91 ms	0.2	3.1
Visual, GLB	0.1	0.2	0.8	0.2 ms	1.3	21 ms	0.1	0.2	2.7
Visual, OBJ	0.1	0.2	0.7	0.2 ms	1.3	0.5	95 ms	0.2	3.0

Board Repo: respiraworks/ventilator Board: pressure_mpxv5004dp.kicad_pcb Folder pcb / sensor-daughterboards / pressure_mpxv5004dp Complexity 154 / 1000 (size 109, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 12, 30, 7 Triangles, simulation 158,660 in 22 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 5.2 MB 193 MB STEP 18 MB 200 MB STL 7.9 MB 192 MB OBJ 15 MB 193 MB Visual GLB 2.9 MB 159 MB OBJ 8.2 MB 159 MB

2370. pressure_mpxv5010dp

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	93 ms	0.1	0.7	0.2 ms	0.8	25 ms	78 ms	0.2	2.1
Simulation, STEP	99 ms	0.2	0.8	0.2 ms	0.7	0.8	86 ms	0.2	2.9
Simulation, STL	0.1	0.1	0.7	0.2 ms	0.9	42 ms	92 ms	0.2	2.2
Simulation, OBJ	0.1	0.1	0.7	0.2 ms	0.8	0.8	84 ms	0.2	2.9
Visual, GLB	93 ms	0.2	0.7	0.2 ms	1.2	19 ms	0.1	0.2	2.5
Visual, OBJ	0.1	0.1	0.7	0.1 ms	1.1	0.4	86 ms	0.3	2.9

Board Repo: respiraworks/ventilator Board: pressure_mpxv5010dp.kicad_pcb Folder pcb / sensor-daughterboards / pressure_mpxv5010dp Complexity 154 / 1000 (size 109, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 12, 30, 7 Triangles, simulation 158,644 in 22 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 5.2 MB 189 MB STEP 18 MB 206 MB STL 7.9 MB 193 MB OBJ 15 MB 193 MB Visual GLB 2.9 MB 160 MB OBJ 8.2 MB 159 MB

2371. pressure_ms4525do

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.1	0.6	0.1 ms	0.7	24 ms	74 ms	0.2	1.9
Simulation, STEP	86 ms	0.1	0.7	0.2 ms	0.7	0.8	74 ms	0.2	2.7
Simulation, STL	94 ms	0.1	0.7	0.1 ms	0.8	41 ms	76 ms	0.2	2.0
Simulation, OBJ	88 ms	0.1	0.7	0.1 ms	0.8	0.8	75 ms	0.2	2.7
Visual, GLB	85 ms	0.1	0.7	0.1 ms	1.2	17 ms	0.1	0.2	2.4
Visual, OBJ	0.1	0.1	0.7	0.1 ms	1.3	0.4	0.1	0.2	2.9

Board Repo: respiraworks/ventilator Board: pressure_ms4525do.kicad_pcb Folder pcb / sensor-daughterboards / pressure_ms4525do Complexity 138 / 1000 (size 93, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 8, 15, 3 Triangles, simulation 193,984 in 23 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 6.3 MB 200 MB STEP 23 MB 218 MB STL 9.7 MB 202 MB OBJ 19 MB 200 MB Visual GLB 3.7 MB 176 MB OBJ 11 MB 168 MB

2372. pressure_XGZP6897A

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	0.1	0.1	0.7	0.2 ms	0.7	25 ms	77 ms	0.2	2.0
Simulation, STEP	0.1	0.2	0.7	0.1 ms	0.7	0.9	79 ms	0.2	2.8
Simulation, STL	0.1	0.1	0.7	0.2 ms	0.8	35 ms	76 ms	0.2	2.0
Simulation, OBJ	95 ms	0.1	0.7	0.2 ms	0.7	0.8	82 ms	0.2	2.8
Visual, GLB	0.1	0.1	0.6	0.2 ms	1.2	15 ms	0.1	0.2	2.4
Visual, OBJ	91 ms	0.1	0.7	0.1 ms	1.2	0.4	87 ms	0.2	2.8

Board Repo: respiraworks/ventilator Board: pressure_XGZP6897A.kicad_pcb Folder pcb / sensor-daughterboards / pressure_XGZP6897A Complexity 157 / 1000 (size 112, features 45) KESE features through vias, rounded, trapezoid or chamfered pads, filled zones Tested 9th November 2026 Copper layers 2 File format KiCad 5 (20171130) Parts, tracks, vias 12, 38, 7 Triangles, simulation 160,728 in 22 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 5.2 MB 192 MB STEP 19 MB 208 MB STL 8.0 MB 193 MB OBJ 16 MB 193 MB Visual GLB 3.0 MB 159 MB OBJ 8.4 MB 159 MB

2373. Ventilator

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	5.0	22.0	99.2	3 ms	65.9	2.6	12.9	0.5	208.2
Simulation, STEP	4.7	21.8	97.9	2 ms	64.7	40.2	12.4	0.5	242.3
Simulation, STL	4.8	22.1	99.2	4 ms	65.1	5.5	12.7	0.5	209.8
Simulation, OBJ	4.8	22.2	97.4	2 ms	62.9	84.7	12.7	0.5	285.2
Visual, GLB	4.8	21.5	97.6	3 ms	142.0	1.7	13.4	0.4	281.4
Visual, OBJ	4.8	21.7	99.1	3 ms	144.5	54.0	13.7	0.4	338.3

Board Repo: respiraworks/ventilator Board: Ventilator.kicad_pcb Folder pcb Complexity 386 / 1000 (size 306, features 80) KESE features through vias, slotted holes, custom pads, rounded, trapezoid or chamfered pads, filled zones, copper drawings Tested 9th November 2026 Copper layers 4 File format KiCad 5 (20171130) Parts, tracks, vias 651, 5,225, 1,196 Triangles, simulation 12,721,758 in 554 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 433 MB 3.3 GB STEP 1.7 GB 4.8 GB STL 636 MB 3.3 GB OBJ 1.4 GB 8.0 GB Visual GLB 291 MB 4.4 GB OBJ 932 MB 5.7 GB

2374. DigiTrainer

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.2	5.7	25.4	3 ms	19.0	1.0	3.1	0.4	55.7
Simulation, STEP	1.3	5.9	25.5	2 ms	19.0	14.3	2.8	0.3	69.1
Simulation, STL	1.2	5.5	24.9	2 ms	17.9	2.1	2.9	0.3	54.9
Simulation, OBJ	1.2	5.7	24.5	2 ms	18.2	29.0	2.9	0.3	81.7
Visual, GLB	1.1	5.4	24.0	2 ms	44.5	0.5	6.3	0.3	82.1
Visual, OBJ	1.3	5.8	24.6	2 ms	47.3	19.8	6.4	0.3	105.5

Board Repo: RetroStack/BitStack-DigiTrainer Board: DigiTrainer.kicad_pcb Folder KiCAD Complexity 290 / 1000 (size 215, features 75) KESE features through vias, slotted holes, rounded, trapezoid or chamfered pads, curved board outline, knockout text, TrueType text Tested 9th November 2026 Copper layers 2 File format KiCad 8 (20240108) Parts, tracks, vias 262, 4,169, 145 Triangles, simulation 5,400,662 in 485 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 182 MB 1.6 GB STEP 795 MB 2.1 GB STL 270 MB 1.6 GB OBJ 572 MB 3.4 GB Visual GLB 120 MB 1.9 GB OBJ 381 MB 2.4 GB

2375. TRS80_Model_I_A_E1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.4	5.8	41.5	3 ms	32.3	1.4	4.8	0.3	87.6
Simulation, STEP	1.4	5.8	42.2	2 ms	33.2	21.7	5.3	0.4	110.0
Simulation, STL	1.4	6.2	42.2	2 ms	32.0	3.8	5.4	0.5	91.4
Simulation, OBJ	1.3	6.5	42.6	2 ms	33.0	44.0	5.3	0.4	133.1
Visual, GLB	1.4	5.9	42.3	2 ms	79.2	0.8	8.6	0.4	138.5
Visual, OBJ	1.4	6.7	43.0	2 ms	83.1	23.1	7.9	0.3	165.6

Board Repo: RetroStack/TRS-80-Model-I-A-E1 Board: TRS80_Model_I_A_E1.kicad_pcb Folder KiCAD Complexity 355 / 1000 (size 225, features 130) KESE features through vias, rounded, trapezoid or chamfered pads, drill offsets, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 221, 8,286, 335 Triangles, simulation 9,233,510 in 387 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 314 MB 2.8 GB STEP 1.6 GB 3.3 GB STL 462 MB 2.4 GB OBJ 988 MB 5.7 GB Visual GLB 176 MB 2.7 GB OBJ 562 MB 3.5 GB

2376. TRS80_Model_I_D_E1

Mode and format	1–2 read	3 resolve	4 geometry	5 materials	6 assemble	7 write	8 verify	start-up and exit	Total
Simulation, GLB	1.9	8.0	60.2	2 ms	47.8	1.9	7.0	0.5	127.3
Simulation, STEP	2.0	8.1	60.7	2 ms	49.7	30.2	7.3	0.5	158.5
Simulation, STL	2.0	8.5	61.1	3 ms	48.3	4.3	6.5	0.5	131.1
Simulation, OBJ	2.0	8.5	62.2	2 ms	48.0	62.5	6.9	0.5	190.6
Visual, GLB	2.1	8.1	61.7	2 ms	108.8	0.9	9.4	0.4	191.4
Visual, OBJ	1.9	8.0	58.8	3 ms	107.2	34.1	9.0	0.5	219.5

Board Repo: RetroStack/TRS-80-Model-I-D-E1 Board: TRS80_Model_I_D_E1.kicad_pcb Folder KiCAD Complexity 356 / 1000 (size 226, features 130) KESE features through vias, rounded, trapezoid or chamfered pads, drill offsets, filled zones, copper drawings, copper text, curved board outline, stack-up, dielectric εr and tanδ, copper finish Tested 9th November 2026 Copper layers 2 File format KiCad 9 (20241229) Parts, tracks, vias 225, 8,917, 349 Triangles, simulation 9,640,646 in 388 parts Verifier PASS in all six runs

File type File size Peak memory used Simulation GLB 329 MB 2.4 GB STEP 1.7 GB 3.4 GB STL 482 MB 2.5 GB OBJ 1.0 GB 6.0 GB Visual GLB 181 MB 2.9 GB OBJ 578 MB 3.6 GB

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