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CombinedCorpusTesting

github-actions[bot] edited this page Nov 11, 2026 · 15 revisions

Combined Corpus Testing

Every board of Corpus Testing on one page: the same sections as its Corpus Pages, together.

1. 8 Bit Computer

8 Bit Computer: stages 4 and 6 take 56% to 87% of a run. Simulation, GLB takes 84 s. Simulation, STEP takes 2 min. Simulation, STL takes 87 s. Simulation, OBJ takes 2 min. Visual, GLB takes 2 min. Visual, OBJ takes 3 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.1 6.0 41.7 2 ms 28.0 1.3 5.1 0.4 83.6
Simulation, STEP 1.1 6.2 40.8 3 ms 28.3 20.2 5.4 0.3 102.3
Simulation, STL 1.3 6.5 42.0 3 ms 28.5 2.9 5.2 0.4 86.8
Simulation, OBJ 1.1 6.1 41.6 2 ms 27.6 41.5 4.9 0.4 123.3
Visual, GLB 1.2 5.8 40.4 1 ms 74.9 0.8 9.4 0.3 132.8
Visual, OBJ 1.2 6.1 41.0 2 ms 73.0 23.1 9.2 0.3 153.9
Board Repo: 01GOD/PCB-8-bit-Computer
Board: 8 Bit Computer.kicad_pcb
Complexity 254 / 1000 (size 219, features 35)
KESE features through vias, filled zones
Tested 9th November 2026
Copper layers 2
File format KiCad 5 (20171130)
Parts, tracks, vias 319, 4,634, 117
Triangles, simulation 8,333,992 in 378 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 280 MB 2.5 GB
STEP 1.4 GB 3.2 GB
STL 417 MB 2.5 GB
OBJ 884 MB 5.2 GB
Visual
GLB 180 MB 2.7 GB
OBJ 571 MB 3.5 GB

2. Femto_frame

Femto_frame: stages 4 and 6 take 51% to 84% of a run. Simulation, GLB takes 2.6 s. Simulation, STEP takes 3.5 s. Simulation, STL takes 2.5 s. Simulation, OBJ takes 3.7 s. Visual, GLB takes 3.5 s. Visual, OBJ takes 4.0 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 33 ms 0.2 1.1 0.1 ms 0.9 39 ms 0.1 0.2 2.6
Simulation, STEP 33 ms 0.2 1.1 0.2 ms 0.9 1.0 0.1 0.2 3.5
Simulation, STL 39 ms 0.2 1.1 0.2 ms 0.9 54 ms 0.1 0.2 2.5
Simulation, OBJ 33 ms 0.2 1.1 0.2 ms 0.8 1.3 0.1 0.2 3.7
Visual, GLB 66 ms 0.2 1.1 0.1 ms 1.8 19 ms 0.1 0.2 3.5
Visual, OBJ 33 ms 0.2 1.1 0.1 ms 1.8 0.6 0.1 0.2 4.0
Board Repo: 32bitmicro/FEMTO
Board: Femto_frame.kicad_pcb
Folder source_files / Kicad / Frame
Complexity 212 / 1000 (size 167, features 45)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 6 (20211014)
Parts, tracks, vias 2, 0, 44
Triangles, simulation 246,284 in 14 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 8.6 MB 197 MB
STEP 34 MB 212 MB
STL 12 MB 206 MB
OBJ 25 MB 197 MB
Visual
GLB 4.2 MB 162 MB
OBJ 12 MB 162 MB

3. Femto_v1

Femto_v1: stages 4 and 6 take 46% to 80% of a run. Simulation, GLB takes 4.0 s. Simulation, STEP takes 5.9 s. Simulation, STL takes 4.1 s. Simulation, OBJ takes 6.9 s. Visual, GLB takes 6.4 s. Visual, OBJ takes 7.9 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.3 1.5 0.4 ms 1.4 71 ms 0.2 0.3 4.0
Simulation, STEP 0.2 0.3 1.6 0.2 ms 1.5 1.8 0.3 0.2 5.9
Simulation, STL 0.2 0.3 1.5 0.3 ms 1.5 0.1 0.3 0.2 4.1
Simulation, OBJ 0.2 0.3 1.5 0.3 ms 1.6 2.7 0.2 0.3 6.9
Visual, GLB 0.2 0.4 1.6 0.4 ms 3.6 39 ms 0.5 0.2 6.4
Visual, OBJ 0.2 0.3 1.4 0.2 ms 3.4 1.8 0.4 0.2 7.9
Board Repo: 32bitmicro/FEMTO
Board: Femto_v1.kicad_pcb
Folder source_files / Kicad / Module
Complexity 311 / 1000 (size 226, features 85)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 6 (20211014)
Parts, tracks, vias 26, 484, 17
Triangles, simulation 381,090 in 64 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 13 MB 283 MB
STEP 75 MB 302 MB
STL 19 MB 279 MB
OBJ 39 MB 309 MB
Visual
GLB 8.0 MB 257 MB
OBJ 24 MB 262 MB

4. Femto_tester_v1

Femto_tester_v1: stages 4 and 6 take 59% to 83% of a run. Simulation, GLB takes 7.3 s. Simulation, STEP takes 9.8 s. Simulation, STL takes 7.5 s. Simulation, OBJ takes 9.6 s. Visual, GLB takes 8.4 s. Visual, OBJ takes 10 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.4 2.9 0.3 ms 3.1 88 ms 0.3 0.3 7.3
Simulation, STEP 0.2 0.4 2.6 0.4 ms 3.2 2.8 0.3 0.3 9.8
Simulation, STL 0.2 0.4 2.8 0.4 ms 3.3 0.2 0.3 0.3 7.5
Simulation, OBJ 0.2 0.5 2.7 0.3 ms 3.2 2.4 0.3 0.3 9.6
Visual, GLB 0.2 0.5 2.8 0.4 ms 4.2 54 ms 0.4 0.3 8.4
Visual, OBJ 0.2 0.4 2.8 0.6 ms 4.2 1.6 0.5 0.3 10.1
Board Repo: 32bitmicro/FEMTO
Board: Femto_tester_v1.kicad_pcb
Folder source_files / Kicad / Tester
Complexity 282 / 1000 (size 162, features 120)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
arc tracks, filled zones,
copper drawings,
curved board outline, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 6 (20211014)
Parts, tracks, vias 74, 381, 6
Triangles, simulation 503,506 in 88 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 18 MB 374 MB
STEP 99 MB 394 MB
STL 25 MB 349 MB
OBJ 52 MB 366 MB
Visual
GLB 12 MB 379 MB
OBJ 34 MB 351 MB

5. Stroopwafel-LGA1151-CFL

Stroopwafel-LGA1151-CFL: stages 4 and 6 take 61% to 86% of a run. Simulation, GLB takes 68 s. Simulation, STEP takes 81 s. Simulation, STL takes 68 s. Simulation, OBJ takes 97 s. Visual, GLB takes 87 s. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.2 5.1 27.2 4 ms 30.6 0.9 2.1 0.4 67.6
Simulation, STEP 1.2 4.8 27.2 4 ms 29.9 15.8 2.2 0.4 81.5
Simulation, STL 1.2 4.7 26.9 4 ms 30.3 2.1 2.2 0.3 67.7
Simulation, OBJ 1.2 5.3 27.0 4 ms 32.5 28.5 2.3 0.3 97.0
Visual, GLB 1.2 5.1 27.8 5 ms 46.6 0.6 5.2 0.3 86.6
Visual, OBJ 1.3 5.1 28.4 5 ms 48.3 19.2 6.1 0.4 108.7
Board Repo: a-little-wifi/stroopwafel-lga1151-cfl
Board: Stroopwafel-LGA1151-CFL.kicad_pcb
Complexity 256 / 1000 (size 211, features 45)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 184, 55, 18
Triangles, simulation 5,009,250 in 1607 parts
Note mostly unrouted
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 162 MB 1.7 GB
STEP 677 MB 2.2 GB
STL 251 MB 1.7 GB
OBJ 524 MB 3.1 GB
Visual
GLB 114 MB 2.2 GB
OBJ 362 MB 2.4 GB

6. iMX6_BareBones

iMX6_BareBones: stages 4 and 6 take 50% to 85% of a run. Simulation, GLB takes 2 min. Simulation, STEP takes 2 min. Simulation, STL takes 2 min. Simulation, OBJ takes 3 min. Visual, GLB takes 3 min. Visual, OBJ takes 3 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 3.0 11.5 44.3 2 ms 44.8 2.0 5.8 0.5 112.0
Simulation, STEP 3.0 12.0 44.4 2 ms 45.1 26.0 5.3 0.5 136.4
Simulation, STL 2.8 11.2 40.9 2 ms 44.0 4.1 5.7 0.5 109.2
Simulation, OBJ 3.1 12.5 43.7 3 ms 42.3 63.7 5.2 0.4 170.9
Visual, GLB 2.9 11.5 41.4 3 ms 93.4 1.0 8.1 0.4 158.7
Visual, OBJ 2.9 11.6 43.9 3 ms 94.5 36.2 8.0 0.4 197.5
Board Repo: a1wolfe/imx6-barebones
Board: iMX6_BareBones.kicad_pcb
Folder Kicad
Complexity 449 / 1000 (size 329, features 120)
KESE features through vias, rounded,
trapezoid or chamfered pads,
arc tracks, filled zones,
curved board outline,
knockout text, stack-up,
dielectric εr and tanδ,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 6
File format KiCad 9 (20241229)
Parts, tracks, vias 498, 9,285, 1,155
Triangles, simulation 9,828,966 in 583 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 337 MB 2.2 GB
STEP 1.4 GB 3.1 GB
STL 491 MB 2.3 GB
OBJ 1.1 GB 6.3 GB
Visual
GLB 190 MB 3.1 GB
OBJ 626 MB 3.9 GB

7. A4092

A4092: stages 4 and 6 take 53% to 83% of a run. Simulation, GLB takes 80 s. Simulation, STEP takes 96 s. Simulation, STL takes 79 s. Simulation, OBJ takes 2 min. Visual, GLB takes 2 min. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2.0 9.6 30.2 3 ms 31.2 1.3 5.0 0.4 79.7
Simulation, STEP 1.8 9.0 29.2 1 ms 33.8 17.5 4.5 0.4 96.4
Simulation, STL 1.9 8.9 28.0 1 ms 32.5 2.9 4.7 0.4 79.3
Simulation, OBJ 1.7 9.0 28.7 4 ms 32.9 38.4 4.8 0.4 115.9
Visual, GLB 1.7 9.3 29.6 1 ms 68.3 1.0 8.0 0.4 118.3
Visual, OBJ 1.7 9.0 28.9 2 ms 62.7 24.5 7.9 0.3 135.0
Board Repo: A4091/A4092
Board: A4092.kicad_pcb
Folder Kicad / A4092
Complexity 364 / 1000 (size 279, features 85)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 9 (20241229)
Parts, tracks, vias 90, 5,116, 1,557
Triangles, simulation 6,808,994 in 302 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 232 MB 1.9 GB
STEP 888 MB 2.7 GB
STL 340 MB 1.9 GB
OBJ 727 MB 4.3 GB
Visual
GLB 148 MB 2.4 GB
OBJ 490 MB 3.1 GB

8. A4092-backpanel

A4092-backpanel: stages 4 and 6 take 49% to 86% of a run. Simulation, GLB takes 7.7 s. Simulation, STEP takes 9.7 s. Simulation, STL takes 7.5 s. Simulation, OBJ takes 11 s. Visual, GLB takes 10 s. Visual, OBJ takes 13 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.4 3.6 0.4 ms 2.4 0.1 0.6 0.3 7.7
Simulation, STEP 0.2 0.4 3.3 0.3 ms 2.4 2.6 0.5 0.2 9.7
Simulation, STL 0.2 0.4 3.3 0.5 ms 2.7 0.2 0.4 0.2 7.5
Simulation, OBJ 0.2 0.4 3.0 0.4 ms 2.4 4.2 0.4 0.2 10.8
Visual, GLB 0.2 0.4 3.4 0.4 ms 5.4 60 ms 0.5 0.3 10.2
Visual, OBJ 0.2 0.4 3.2 0.3 ms 5.3 2.4 0.7 0.3 12.7
Board Repo: A4091/A4092
Board: A4092-backpanel.kicad_pcb
Folder Kicad / Backpanel
Complexity 163 / 1000 (size 108, features 55)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 2, 118, 3
Triangles, simulation 641,034 in 37 parts
Note panel
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 22 MB 388 MB
STEP 96 MB 407 MB
STL 32 MB 373 MB
OBJ 65 MB 460 MB
Visual
GLB 12 MB 391 MB
OBJ 36 MB 386 MB

9. Flipper

Flipper: stages 4 and 6 take 47% to 84% of a run. Simulation, GLB takes 5.9 s. Simulation, STEP takes 7.7 s. Simulation, STL takes 6.5 s. Simulation, OBJ takes 10 s. Visual, GLB takes 8.0 s. Visual, OBJ takes 9.6 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.4 2.5 0.4 ms 2.2 0.1 0.3 0.2 5.9
Simulation, STEP 0.2 0.4 2.5 0.3 ms 2.1 1.9 0.4 0.2 7.7
Simulation, STL 0.2 0.3 2.7 0.3 ms 2.4 0.1 0.5 0.3 6.5
Simulation, OBJ 0.3 0.4 2.7 0.3 ms 2.0 4.0 0.4 0.2 10.0
Visual, GLB 0.2 0.4 2.6 0.4 ms 4.1 64 ms 0.3 0.3 8.0
Visual, OBJ 0.2 0.4 2.7 0.3 ms 4.1 1.6 0.3 0.2 9.6
Board Repo: A4091/A4092
Board: Flipper.kicad_pcb
Folder Kicad / Flipper
Complexity 169 / 1000 (size 99, features 70)
KESE features rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 2, 72, 0
Triangles, simulation 561,064 in 35 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 19 MB 319 MB
STEP 79 MB 372 MB
STL 28 MB 308 MB
OBJ 56 MB 416 MB
Visual
GLB 10 MB 349 MB
OBJ 31 MB 344 MB

10. A4092-terminator-dev

A4092-terminator-dev: stages 4 and 6 take 50% to 83% of a run. Simulation, GLB takes 5.8 s. Simulation, STEP takes 7.5 s. Simulation, STL takes 5.0 s. Simulation, OBJ takes 7.9 s. Visual, GLB takes 7.8 s. Visual, OBJ takes 9.6 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.4 2.5 0.3 ms 2.0 87 ms 0.4 0.3 5.8
Simulation, STEP 0.2 0.5 2.2 0.2 ms 2.1 1.9 0.3 0.2 7.5
Simulation, STL 0.2 0.4 1.9 0.2 ms 1.9 0.1 0.3 0.2 5.0
Simulation, OBJ 0.2 0.4 2.0 0.2 ms 1.9 2.8 0.3 0.3 7.9
Visual, GLB 0.2 0.5 2.1 0.3 ms 4.3 50 ms 0.3 0.3 7.8
Visual, OBJ 0.3 0.5 2.1 0.2 ms 4.3 1.8 0.4 0.3 9.6
Board Repo: A4091/A4092
Board: A4092-terminator-dev.kicad_pcb
Folder Kicad / Terminator-dev
Complexity 225 / 1000 (size 140, features 85)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 14, 124, 64
Triangles, simulation 455,982 in 41 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 16 MB 287 MB
STEP 67 MB 344 MB
STL 23 MB 275 MB
OBJ 46 MB 357 MB
Visual
GLB 10 MB 323 MB
OBJ 30 MB 321 MB

11. A4092-terminator-ds2107

A4092-terminator-ds2107: stages 4 and 6 take 50% to 81% of a run. Simulation, GLB takes 4.1 s. Simulation, STEP takes 5.7 s. Simulation, STL takes 4.2 s. Simulation, OBJ takes 6.4 s. Visual, GLB takes 5.6 s. Visual, OBJ takes 6.9 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 1.5 0.2 ms 1.6 75 ms 0.3 0.2 4.1
Simulation, STEP 0.2 0.3 1.6 0.2 ms 1.6 1.6 0.3 0.2 5.7
Simulation, STL 0.1 0.3 1.6 0.2 ms 1.6 0.1 0.3 0.2 4.2
Simulation, OBJ 0.1 0.3 1.6 0.3 ms 1.6 2.3 0.3 0.2 6.4
Visual, GLB 0.1 0.3 1.6 0.2 ms 3.0 56 ms 0.3 0.2 5.6
Visual, OBJ 0.1 0.3 1.6 0.2 ms 2.9 1.5 0.3 0.2 6.9
Board Repo: A4091/A4092
Board: A4092-terminator-ds2107.kicad_pcb
Folder Kicad / Terminator-DS21S07
Complexity 210 / 1000 (size 135, features 75)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 9, 201, 29
Triangles, simulation 441,348 in 35 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 15 MB 278 MB
STEP 76 MB 329 MB
STL 22 MB 282 MB
OBJ 45 MB 353 MB
Visual
GLB 9.3 MB 309 MB
OBJ 27 MB 309 MB

12. A4092-terminator

A4092-terminator: stages 4 and 6 take 50% to 80% of a run. Simulation, GLB takes 3.6 s. Simulation, STEP takes 5.3 s. Simulation, STL takes 3.9 s. Simulation, OBJ takes 5.8 s. Visual, GLB takes 5.1 s. Visual, OBJ takes 6.6 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 1.5 0.3 ms 1.2 81 ms 0.2 0.2 3.6
Simulation, STEP 0.1 0.2 1.4 0.2 ms 1.4 1.6 0.3 0.2 5.3
Simulation, STL 0.2 0.3 1.5 0.3 ms 1.4 0.1 0.2 0.3 3.9
Simulation, OBJ 0.2 0.2 1.4 0.3 ms 1.5 2.0 0.3 0.3 5.8
Visual, GLB 0.1 0.3 1.2 0.2 ms 2.9 33 ms 0.3 0.2 5.1
Visual, OBJ 0.1 0.2 1.3 0.3 ms 2.9 1.3 0.4 0.3 6.6
Board Repo: A4091/A4092
Board: A4092-terminator.kicad_pcb
Folder Kicad / Terminator-LT1118-2.85
Complexity 198 / 1000 (size 123, features 75)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 10, 115, 5
Triangles, simulation 381,136 in 37 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 13 MB 273 MB
STEP 66 MB 305 MB
STL 19 MB 266 MB
OBJ 38 MB 310 MB
Visual
GLB 7.8 MB 275 MB
OBJ 23 MB 281 MB

13. A4770

A4770: stages 4 and 6 take 54% to 85% of a run. Simulation, GLB takes 99 s. Simulation, STEP takes 2 min. Simulation, STL takes 98 s. Simulation, OBJ takes 2 min. Visual, GLB takes 2 min. Visual, OBJ takes 3 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2.2 10.1 37.1 2 ms 42.6 1.4 4.8 0.6 98.8
Simulation, STEP 2.3 9.3 35.5 4 ms 46.7 23.2 5.8 0.5 123.3
Simulation, STL 2.1 9.4 33.0 1 ms 43.5 3.2 5.8 0.5 97.6
Simulation, OBJ 2.4 10.3 35.1 1 ms 41.6 48.1 5.0 0.5 143.1
Visual, GLB 2.0 8.9 32.2 3 ms 80.9 0.9 8.6 0.3 133.7
Visual, OBJ 2.1 9.4 33.5 3 ms 77.7 29.3 8.5 0.4 161.0
Board Repo: A4091/cheetah
Board: A4770.kicad_pcb
Folder Kicad / A4770
Complexity 382 / 1000 (size 282, features 100)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
TrueType text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 9 (20241229)
Parts, tracks, vias 123, 5,754, 1,224
Triangles, simulation 6,769,822 in 344 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 232 MB 1.9 GB
STEP 977 MB 2.6 GB
STL 339 MB 1.8 GB
OBJ 725 MB 4.4 GB
Visual
GLB 149 MB 2.4 GB
OBJ 486 MB 3.3 GB

14. FPGA-BOARD

FPGA-BOARD: stages 4 and 6 take 44% to 83% of a run. Simulation, GLB takes 2 min. Simulation, STEP takes 3 min. Simulation, STL takes 2 min. Simulation, OBJ takes 3 min. Visual, GLB takes 3 min. Visual, OBJ takes 3 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 4.2 13.5 37.8 2 ms 55.2 3.3 7.9 0.6 122.6
Simulation, STEP 4.3 12.9 39.2 2 ms 54.5 32.6 7.4 0.5 151.3
Simulation, STL 4.6 13.3 37.8 2 ms 54.5 7.0 7.9 0.6 125.7
Simulation, OBJ 4.2 12.6 36.5 2 ms 52.7 87.2 7.5 0.6 201.2
Visual, GLB 4.5 12.8 38.5 2 ms 105.2 1.2 11.2 0.5 173.9
Visual, OBJ 4.2 12.5 36.3 2 ms 103.5 39.8 12.1 0.4 208.9
Board Repo: abdulajadi1/fpga-board
Board: FPGA-BOARD.kicad_pcb
Complexity 460 / 1000 (size 330, features 130)
KESE features through vias, slotted holes,
custom pads, rounded,
trapezoid or chamfered pads,
arc tracks, filled zones,
copper drawings, stack-up,
dielectric εr and tanδ,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 8
File format KiCad 10 (20260206)
Parts, tracks, vias 584, 10,158, 1,402
Triangles, simulation 13,826,402 in 647 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 462 MB 3.1 GB
STEP 1.6 GB 4.5 GB
STL 691 MB 3.1 GB
OBJ 1.5 GB 8.6 GB
Visual
GLB 222 MB 3.7 GB
OBJ 741 MB 4.7 GB

15. A4k-Replica-Acill

A4k-Replica-Acill: stages 4 and 6 take 41% to 77% of a run. Simulation, GLB takes 4 min. Simulation, STEP takes 4 min. Simulation, STL takes 4 min. Simulation, OBJ takes 6 min. Visual, GLB takes 6 min. Visual, OBJ takes 7 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 3.8 60.9 57.0 7 ms 85.2 3.5 12.0 0.7 223.2
Simulation, STEP 4.1 60.8 57.8 6 ms 81.0 44.9 11.2 0.8 260.6
Simulation, STL 3.6 58.9 57.7 6 ms 83.5 8.3 12.9 0.6 225.6
Simulation, OBJ 3.8 61.5 57.0 8 ms 80.4 116.0 11.7 0.6 331.1
Visual, GLB 3.5 55.4 60.0 3 ms 206.6 2.1 19.5 0.5 347.6
Visual, OBJ 3.8 56.5 60.1 3 ms 212.1 83.8 20.7 0.5 437.5
Board Repo: Acill/A4000RevB
Board: A4k-Replica-Acill.kicad_pcb
Folder Kicad
Complexity 381 / 1000 (size 281, features 100)
KESE features through vias, padstacks,
copper drawings, copper text,
stack-up, dielectric εr and tanδ,
mask and silkscreen colours
Tested 9th November 2026 to 10th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 775, 37,504, 2,698
Triangles, simulation 16,912,844 in 896 parts
Verifier PASS in all six runs
Run again Simulation, GLB; Simulation, STEP; Simulation, STL; Simulation, OBJ: failed in the corpus run, run again with fixes to KESE made after the corpus run, and passed
File
type
File
size
Peak memory
used
Simulation
GLB 564 MB 5.4 GB
STEP 2.3 GB 5.7 GB
STL 846 MB 5.2 GB
OBJ 1.9 GB 11 GB
Visual
GLB 424 MB 6.7 GB
OBJ 1.4 GB 8.6 GB

16. Backplane Helper

Backplane Helper: stages 4 and 6 take 53% to 83% of a run. Simulation, GLB takes 7.9 s. Simulation, STEP takes 10 s. Simulation, STL takes 7.8 s. Simulation, OBJ takes 12 s. Visual, GLB takes 9.7 s. Visual, OBJ takes 12 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.6 3.8 0.6 ms 2.6 0.1 0.4 0.3 7.9
Simulation, STEP 0.2 0.6 3.8 0.6 ms 2.6 2.2 0.4 0.2 10.2
Simulation, STL 0.2 0.6 3.7 0.5 ms 2.5 0.2 0.4 0.3 7.8
Simulation, OBJ 0.2 0.6 3.8 0.5 ms 2.7 4.1 0.4 0.3 12.1
Visual, GLB 0.2 0.6 3.8 0.5 ms 4.3 65 ms 0.4 0.3 9.7
Visual, OBJ 0.3 0.6 3.7 0.4 ms 4.3 2.3 0.5 0.3 12.1
Board Repo: acwright/6502
Board: Backplane Helper.kicad_pcb
Folder Hardware / Backplane Helper / Rev 1.0
Complexity 175 / 1000 (size 130, features 45)
KESE features through vias, filled zones,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 3, 395, 6
Triangles, simulation 746,688 in 48 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 25 MB 367 MB
STEP 107 MB 422 MB
STL 37 MB 363 MB
OBJ 75 MB 540 MB
Visual
GLB 14 MB 404 MB
OBJ 40 MB 407 MB

17. Backplane Pro

Backplane Pro: stages 4 and 6 take 55% to 86% of a run. Simulation, GLB takes 16 s. Simulation, STEP takes 20 s. Simulation, STL takes 17 s. Simulation, OBJ takes 23 s. Visual, GLB takes 21 s. Visual, OBJ takes 27 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 1.3 7.8 0.3 ms 5.6 0.3 0.8 0.2 16.3
Simulation, STEP 0.4 1.2 7.8 0.4 ms 5.4 4.1 0.7 0.3 19.9
Simulation, STL 0.5 1.3 7.7 0.5 ms 5.7 0.5 0.7 0.3 16.7
Simulation, OBJ 0.4 1.3 7.4 0.5 ms 5.1 7.5 0.7 0.2 22.7
Visual, GLB 0.3 1.2 7.6 0.5 ms 10.5 0.1 1.0 0.2 21.1
Visual, OBJ 0.4 1.2 8.1 0.5 ms 10.6 4.6 1.4 0.2 26.6
Board Repo: acwright/6502
Board: Backplane Pro.kicad_pcb
Folder Hardware / Backplane Pro / Rev 1.0
Complexity 262 / 1000 (size 172, features 90)
KESE features through vias, slotted holes,
custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 39, 1,027, 31
Triangles, simulation 1,649,758 in 67 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 55 MB 644 MB
STEP 257 MB 754 MB
STL 82 MB 669 MB
OBJ 171 MB 1.1 GB
Visual
GLB 32 MB 654 MB
OBJ 97 MB 802 MB

18. Backplane Pro

Backplane Pro: stages 4 and 6 take 55% to 85% of a run. Simulation, GLB takes 19 s. Simulation, STEP takes 23 s. Simulation, STL takes 19 s. Simulation, OBJ takes 28 s. Visual, GLB takes 26 s. Visual, OBJ takes 31 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.4 1.6 9.3 0.6 ms 6.4 0.3 0.8 0.3 19.2
Simulation, STEP 0.4 1.5 8.6 0.5 ms 6.2 5.0 0.9 0.3 22.9
Simulation, STL 0.5 1.5 8.8 0.5 ms 6.7 0.5 0.8 0.3 19.1
Simulation, OBJ 0.5 1.6 8.9 0.5 ms 6.4 9.5 0.8 0.3 27.9
Visual, GLB 0.4 1.4 9.0 0.9 ms 13.3 0.2 1.6 0.3 26.3
Visual, OBJ 0.5 1.5 9.0 0.9 ms 12.4 5.3 1.6 0.3 30.6
Board Repo: acwright/6502
Board: Backplane Pro.kicad_pcb
Folder Hardware / Backplane Pro / Rev 1.1
Complexity 256 / 1000 (size 166, features 90)
KESE features through vias, slotted holes,
custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 24, 984, 33
Triangles, simulation 1,751,664 in 59 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 59 MB 617 MB
STEP 263 MB 778 MB
STL 88 MB 655 MB
OBJ 182 MB 1.2 GB
Visual
GLB 33 MB 772 MB
OBJ 99 MB 767 MB

19. Backplane

Backplane: stages 4 and 6 take 54% to 85% of a run. Simulation, GLB takes 19 s. Simulation, STEP takes 24 s. Simulation, STL takes 19 s. Simulation, OBJ takes 29 s. Visual, GLB takes 25 s. Visual, OBJ takes 30 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.4 1.4 9.4 0.4 ms 6.2 0.3 0.9 0.3 18.9
Simulation, STEP 0.4 1.5 9.6 0.3 ms 6.4 5.2 1.0 0.3 24.3
Simulation, STL 0.4 1.6 9.6 0.4 ms 6.1 0.5 1.0 0.3 19.4
Simulation, OBJ 0.4 1.5 9.5 0.3 ms 6.3 10.6 0.9 0.2 29.5
Visual, GLB 0.4 1.6 9.4 0.4 ms 11.9 0.2 1.2 0.3 24.9
Visual, OBJ 0.5 1.5 9.8 0.4 ms 11.6 5.6 1.1 0.3 30.3
Board Repo: acwright/6502
Board: Backplane.kicad_pcb
Folder Hardware / Backplane / Rev 1.0
Complexity 201 / 1000 (size 156, features 45)
KESE features through vias, filled zones,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 7, 1,069, 52
Triangles, simulation 1,766,986 in 48 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 60 MB 643 MB
STEP 261 MB 772 MB
STL 88 MB 661 MB
OBJ 183 MB 1.2 GB
Visual
GLB 34 MB 742 MB
OBJ 104 MB 842 MB

20. Blinkenlights Card

Blinkenlights Card: stages 4 and 6 take 53% to 82% of a run. Simulation, GLB takes 11 s. Simulation, STEP takes 15 s. Simulation, STL takes 11 s. Simulation, OBJ takes 16 s. Visual, GLB takes 16 s. Visual, OBJ takes 22 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.4 0.9 3.6 0.5 ms 4.9 0.2 0.6 0.2 10.9
Simulation, STEP 0.4 1.0 3.8 0.5 ms 5.4 4.1 0.5 0.2 15.4
Simulation, STL 0.3 1.0 3.7 0.6 ms 5.2 0.4 0.5 0.2 11.3
Simulation, OBJ 0.4 1.0 3.6 0.7 ms 5.1 5.6 0.5 0.2 16.4
Visual, GLB 0.4 0.9 3.6 0.6 ms 9.7 0.2 1.1 0.2 16.1
Visual, OBJ 0.4 0.9 3.7 0.5 ms 10.0 5.4 1.3 0.3 21.9
Board Repo: acwright/6502
Board: Blinkenlights Card.kicad_pcb
Folder Hardware / Blinkenlights Card / Rev 1.0
Complexity 234 / 1000 (size 179, features 55)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 73, 630, 166
Triangles, simulation 1,095,960 in 109 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 38 MB 531 MB
STEP 200 MB 635 MB
STL 55 MB 518 MB
OBJ 112 MB 776 MB
Visual
GLB 35 MB 855 MB
OBJ 105 MB 841 MB

21. Breadboard Helper

Breadboard Helper: stages 4 and 6 take 51% to 83% of a run. Simulation, GLB takes 6.0 s. Simulation, STEP takes 7.6 s. Simulation, STL takes 6.0 s. Simulation, OBJ takes 8.9 s. Visual, GLB takes 8.6 s. Visual, OBJ takes 11 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.5 2.7 0.3 ms 2.0 92 ms 0.4 0.2 6.0
Simulation, STEP 0.2 0.5 2.7 0.6 ms 1.9 1.7 0.4 0.2 7.6
Simulation, STL 0.2 0.5 2.6 0.3 ms 1.9 0.2 0.5 0.2 6.0
Simulation, OBJ 0.2 0.5 2.6 0.3 ms 1.9 3.0 0.5 0.2 8.9
Visual, GLB 0.2 0.5 2.7 0.3 ms 4.5 66 ms 0.5 0.2 8.6
Visual, OBJ 0.2 0.5 2.7 0.3 ms 4.4 2.3 0.5 0.2 10.8
Board Repo: acwright/6502
Board: Breadboard Helper.kicad_pcb
Folder Hardware / Breadboard Helper / Rev 1.0
Complexity 170 / 1000 (size 125, features 45)
KESE features through vias, filled zones,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 3, 260, 12
Triangles, simulation 609,124 in 49 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 20 MB 343 MB
STEP 86 MB 385 MB
STL 30 MB 358 MB
OBJ 61 MB 435 MB
Visual
GLB 15 MB 425 MB
OBJ 44 MB 426 MB

22. Clock Helper

Clock Helper: stages 4 and 6 take 49% to 82% of a run. Simulation, GLB takes 6.0 s. Simulation, STEP takes 6.8 s. Simulation, STL takes 5.4 s. Simulation, OBJ takes 7.8 s. Visual, GLB takes 7.2 s. Visual, OBJ takes 8.9 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.4 2.7 0.3 ms 1.9 84 ms 0.3 0.3 6.0
Simulation, STEP 0.2 0.4 2.1 0.2 ms 1.6 1.8 0.3 0.3 6.8
Simulation, STL 0.2 0.4 2.3 0.3 ms 1.7 0.1 0.3 0.3 5.4
Simulation, OBJ 0.2 0.4 2.1 0.3 ms 1.7 2.8 0.3 0.2 7.8
Visual, GLB 0.2 0.4 2.2 0.3 ms 3.7 58 ms 0.4 0.2 7.2
Visual, OBJ 0.2 0.4 2.0 0.2 ms 3.8 1.9 0.3 0.2 8.9
Board Repo: acwright/6502
Board: Clock Helper.kicad_pcb
Folder Hardware / Clock Helper / Rev 1.0
Complexity 187 / 1000 (size 132, features 55)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 16, 97, 25
Triangles, simulation 479,936 in 37 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 16 MB 315 MB
STEP 68 MB 337 MB
STL 24 MB 304 MB
OBJ 48 MB 345 MB
Visual
GLB 11 MB 342 MB
OBJ 33 MB 347 MB

23. CPU Card Pro

CPU Card Pro: stages 4 and 6 take 51% to 83% of a run. Simulation, GLB takes 8.8 s. Simulation, STEP takes 11 s. Simulation, STL takes 8.7 s. Simulation, OBJ takes 14 s. Visual, GLB takes 13 s. Visual, OBJ takes 16 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.8 3.5 0.5 ms 3.4 0.1 0.5 0.2 8.8
Simulation, STEP 0.3 0.8 3.4 0.4 ms 3.3 2.9 0.5 0.2 11.4
Simulation, STL 0.3 0.8 3.4 0.5 ms 3.3 0.3 0.5 0.3 8.7
Simulation, OBJ 0.3 0.8 3.4 0.3 ms 3.5 4.8 0.5 0.2 13.5
Visual, GLB 0.3 0.8 3.4 0.4 ms 7.0 0.1 0.8 0.2 12.5
Visual, OBJ 0.3 0.8 3.5 0.4 ms 6.9 4.0 0.8 0.2 16.4
Board Repo: acwright/6502
Board: CPU Card Pro.kicad_pcb
Folder Hardware / CPU Card Pro / Rev 1.0
Complexity 217 / 1000 (size 162, features 55)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 17, 583, 151
Triangles, simulation 934,380 in 74 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 32 MB 446 MB
STEP 146 MB 560 MB
STL 47 MB 464 MB
OBJ 94 MB 629 MB
Visual
GLB 25 MB 650 MB
OBJ 75 MB 677 MB

24. CPU Card

CPU Card: stages 4 and 6 take 49% to 83% of a run. Simulation, GLB takes 7.2 s. Simulation, STEP takes 9.4 s. Simulation, STL takes 7.3 s. Simulation, OBJ takes 12 s. Visual, GLB takes 11 s. Visual, OBJ takes 14 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.6 2.8 0.5 ms 2.8 0.1 0.4 0.3 7.2
Simulation, STEP 0.2 0.7 2.7 0.3 ms 2.7 2.3 0.4 0.2 9.4
Simulation, STL 0.2 0.7 2.9 0.4 ms 2.6 0.2 0.4 0.3 7.3
Simulation, OBJ 0.3 0.8 2.9 0.4 ms 2.8 4.1 0.4 0.3 11.6
Visual, GLB 0.2 0.7 2.9 0.4 ms 6.1 92 ms 0.6 0.2 10.8
Visual, OBJ 0.3 0.7 2.9 0.4 ms 6.3 3.2 0.5 0.2 14.1
Board Repo: acwright/6502
Board: CPU Card.kicad_pcb
Folder Hardware / CPU Card / Rev 1.0
Complexity 232 / 1000 (size 152, features 80)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 12, 343, 124
Triangles, simulation 729,338 in 54 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 25 MB 407 MB
STEP 109 MB 461 MB
STL 36 MB 404 MB
OBJ 73 MB 537 MB
Visual
GLB 19 MB 473 MB
OBJ 58 MB 455 MB

25. CPU Card

CPU Card: stages 4 and 6 take 48% to 84% of a run. Simulation, GLB takes 7.5 s. Simulation, STEP takes 9.5 s. Simulation, STL takes 7.4 s. Simulation, OBJ takes 12 s. Visual, GLB takes 11 s. Visual, OBJ takes 15 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.7 3.0 0.5 ms 2.7 0.1 0.4 0.3 7.5
Simulation, STEP 0.3 0.7 2.9 0.5 ms 2.7 2.3 0.4 0.3 9.5
Simulation, STL 0.2 0.7 2.9 0.3 ms 2.7 0.2 0.4 0.3 7.4
Simulation, OBJ 0.3 0.7 3.0 0.4 ms 2.7 4.4 0.4 0.3 11.8
Visual, GLB 0.3 0.7 3.0 0.4 ms 6.4 90 ms 0.6 0.2 11.2
Visual, OBJ 0.2 0.7 3.2 0.4 ms 6.6 3.4 0.6 0.2 14.9
Board Repo: acwright/6502
Board: CPU Card.kicad_pcb
Folder Hardware / CPU Card / Rev 1.1
Complexity 232 / 1000 (size 152, features 80)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 12, 343, 124
Triangles, simulation 729,266 in 54 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 25 MB 405 MB
STEP 109 MB 463 MB
STL 36 MB 416 MB
OBJ 73 MB 515 MB
Visual
GLB 19 MB 467 MB
OBJ 58 MB 472 MB

26. DB25 Helper

DB25 Helper: stages 4 and 6 take 49% to 82% of a run. Simulation, GLB takes 4.8 s. Simulation, STEP takes 6.3 s. Simulation, STL takes 4.9 s. Simulation, OBJ takes 7.4 s. Visual, GLB takes 6.8 s. Visual, OBJ takes 8.8 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.4 2.0 0.2 ms 1.6 77 ms 0.3 0.2 4.8
Simulation, STEP 0.2 0.4 2.0 0.3 ms 1.6 1.6 0.3 0.3 6.3
Simulation, STL 0.2 0.4 2.1 0.2 ms 1.6 0.1 0.2 0.2 4.9
Simulation, OBJ 0.2 0.4 2.1 0.2 ms 1.6 2.7 0.3 0.2 7.4
Visual, GLB 0.2 0.4 2.1 0.3 ms 3.5 56 ms 0.4 0.2 6.8
Visual, OBJ 0.2 0.4 2.0 0.2 ms 3.5 1.9 0.5 0.2 8.8
Board Repo: acwright/6502
Board: DB25 Helper.kicad_pcb
Folder Hardware / DB25 Helper / Rev 1.0
Complexity 170 / 1000 (size 125, features 45)
KESE features through vias, filled zones,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 3, 145, 49
Triangles, simulation 495,190 in 32 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 17 MB 338 MB
STEP 64 MB 349 MB
STL 25 MB 336 MB
OBJ 49 MB 378 MB
Visual
GLB 12 MB 352 MB
OBJ 35 MB 350 MB

27. GPIO Breadboard Helper

GPIO Breadboard Helper: stages 4 and 6 take 51% to 82% of a run. Simulation, GLB takes 4.8 s. Simulation, STEP takes 6.1 s. Simulation, STL takes 4.6 s. Simulation, OBJ takes 6.9 s. Visual, GLB takes 7.2 s. Visual, OBJ takes 9.2 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.4 1.9 0.2 ms 1.8 84 ms 0.3 0.2 4.8
Simulation, STEP 0.2 0.4 1.9 0.2 ms 1.7 1.5 0.3 0.2 6.1
Simulation, STL 0.2 0.4 1.9 0.2 ms 1.6 0.1 0.2 0.3 4.6
Simulation, OBJ 0.2 0.4 1.9 0.2 ms 1.6 2.3 0.3 0.2 6.9
Visual, GLB 0.2 0.4 1.7 0.2 ms 4.1 59 ms 0.4 0.2 7.2
Visual, OBJ 0.2 0.5 1.9 0.2 ms 4.0 1.7 0.6 0.3 9.2
Board Repo: acwright/6502
Board: GPIO Breadboard Helper.kicad_pcb
Folder Hardware / GPIO Breadboard Helper / Rev 1.0
Complexity 174 / 1000 (size 129, features 45)
KESE features through vias, filled zones,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 4, 174, 48
Triangles, simulation 513,806 in 33 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 18 MB 317 MB
STEP 78 MB 359 MB
STL 26 MB 327 MB
OBJ 52 MB 391 MB
Visual
GLB 13 MB 374 MB
OBJ 38 MB 372 MB

28. GPIO Card

GPIO Card: stages 4 and 6 take 51% to 82% of a run. Simulation, GLB takes 7.9 s. Simulation, STEP takes 9.7 s. Simulation, STL takes 7.9 s. Simulation, OBJ takes 12 s. Visual, GLB takes 12 s. Visual, OBJ takes 15 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.7 3.0 0.5 ms 3.0 0.2 0.5 0.3 7.9
Simulation, STEP 0.3 0.6 3.0 0.3 ms 2.8 2.3 0.5 0.3 9.7
Simulation, STL 0.2 0.6 3.1 0.3 ms 2.9 0.3 0.5 0.3 7.9
Simulation, OBJ 0.2 0.7 3.0 0.4 ms 3.0 4.1 0.5 0.3 11.7
Visual, GLB 0.2 0.6 3.1 1.0 ms 6.7 0.1 0.9 0.3 11.9
Visual, OBJ 0.3 0.6 3.0 0.4 ms 7.0 2.7 0.9 0.3 14.7
Board Repo: acwright/6502
Board: GPIO Card.kicad_pcb
Folder Hardware / GPIO Card / Rev 1.0
Complexity 228 / 1000 (size 148, features 80)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 10, 305, 102
Triangles, simulation 857,132 in 79 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 29 MB 439 MB
STEP 127 MB 501 MB
STL 43 MB 464 MB
OBJ 86 MB 616 MB
Visual
GLB 21 MB 562 MB
OBJ 63 MB 554 MB

29. GPIO Helper

GPIO Helper: stages 4 and 6 take 49% to 83% of a run. Simulation, GLB takes 7.9 s. Simulation, STEP takes 9.7 s. Simulation, STL takes 7.6 s. Simulation, OBJ takes 12 s. Visual, GLB takes 11 s. Visual, OBJ takes 14 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.7 3.3 0.8 ms 2.7 0.2 0.4 0.3 7.9
Simulation, STEP 0.3 0.7 3.3 2 ms 2.6 2.1 0.4 0.2 9.7
Simulation, STL 0.3 0.6 3.2 0.4 ms 2.6 0.2 0.4 0.2 7.6
Simulation, OBJ 0.3 0.6 3.2 0.4 ms 2.7 4.5 0.4 0.2 11.9
Visual, GLB 0.3 0.7 3.2 0.4 ms 5.6 93 ms 0.6 0.2 10.7
Visual, OBJ 0.3 0.7 3.3 0.5 ms 6.0 2.8 0.7 0.2 13.9
Board Repo: acwright/6502
Board: GPIO Helper.kicad_pcb
Folder Hardware / GPIO Helper / Rev 1.0
Complexity 196 / 1000 (size 151, features 45)
KESE features through vias, filled zones,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 34, 179, 53
Triangles, simulation 844,730 in 40 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 28 MB 447 MB
STEP 115 MB 500 MB
STL 42 MB 497 MB
OBJ 85 MB 578 MB
Visual
GLB 19 MB 504 MB
OBJ 57 MB 526 MB

30. Joystick Helper

Joystick Helper: stages 4 and 6 take 50% to 79% of a run. Simulation, GLB takes 3.4 s. Simulation, STEP takes 4.7 s. Simulation, STL takes 3.5 s. Simulation, OBJ takes 5.0 s. Visual, GLB takes 4.9 s. Visual, OBJ takes 6.1 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.3 1.4 0.3 ms 1.1 51 ms 0.2 0.3 3.4
Simulation, STEP 0.2 0.3 1.5 0.2 ms 1.1 1.3 0.2 0.3 4.7
Simulation, STL 0.2 0.3 1.5 0.2 ms 1.0 84 ms 0.2 0.2 3.5
Simulation, OBJ 0.2 0.3 1.4 0.2 ms 1.1 1.7 0.2 0.2 5.0
Visual, GLB 0.2 0.3 1.4 0.2 ms 2.5 32 ms 0.3 0.3 4.9
Visual, OBJ 0.2 0.3 1.5 0.2 ms 2.6 1.1 0.3 0.2 6.1
Board Repo: acwright/6502
Board: Joystick Helper.kicad_pcb
Folder Hardware / Joystick Helper / Rev 1.0
Complexity 167 / 1000 (size 122, features 45)
KESE features through vias, filled zones,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 10, 75, 17
Triangles, simulation 327,932 in 22 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 11 MB 272 MB
STEP 43 MB 277 MB
STL 16 MB 252 MB
OBJ 33 MB 258 MB
Visual
GLB 7.7 MB 253 MB
OBJ 22 MB 258 MB

31. Keyboard Encoder Helper

Keyboard Encoder Helper: stages 4 and 6 take 53% to 84% of a run. Simulation, GLB takes 9.0 s. Simulation, STEP takes 11 s. Simulation, STL takes 9.2 s. Simulation, OBJ takes 13 s. Visual, GLB takes 14 s. Visual, OBJ takes 17 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.7 4.0 0.3 ms 3.2 0.1 0.5 0.2 9.0
Simulation, STEP 0.2 0.7 3.9 0.2 ms 3.1 2.6 0.5 0.2 11.3
Simulation, STL 0.2 0.7 4.0 0.6 ms 3.3 0.2 0.4 0.2 9.2
Simulation, OBJ 0.3 0.7 3.8 0.6 ms 3.1 4.5 0.4 0.2 13.0
Visual, GLB 0.3 0.8 4.3 0.4 ms 7.7 0.1 0.9 0.2 14.2
Visual, OBJ 0.3 0.8 3.6 0.4 ms 7.6 3.4 0.9 0.2 16.7
Board Repo: acwright/6502
Board: Keyboard Encoder Helper.kicad_pcb
Folder Hardware / Keyboard Encoder Helper / Rev 1.0
Complexity 205 / 1000 (size 150, features 55)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 11, 364, 99
Triangles, simulation 975,048 in 51 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 33 MB 485 MB
STEP 140 MB 519 MB
STL 49 MB 493 MB
OBJ 98 MB 667 MB
Visual
GLB 23 MB 561 MB
OBJ 68 MB 591 MB

32. Keyboard Helper

Keyboard Helper: stages 4 and 6 take 52% to 82% of a run. Simulation, GLB takes 26 s. Simulation, STEP takes 33 s. Simulation, STL takes 27 s. Simulation, OBJ takes 41 s. Visual, GLB takes 41 s. Visual, OBJ takes 50 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.7 2.4 11.3 0.3 ms 9.9 0.5 1.1 0.3 26.1
Simulation, STEP 0.8 2.4 11.5 0.5 ms 9.7 7.2 1.1 0.3 32.8
Simulation, STL 0.7 2.3 11.3 0.5 ms 10.1 1.0 1.1 0.3 26.8
Simulation, OBJ 0.7 2.4 11.4 0.3 ms 10.0 15.1 1.0 0.3 40.8
Visual, GLB 0.8 2.4 11.2 0.1 ms 22.7 0.4 3.5 0.2 41.2
Visual, OBJ 0.9 2.4 11.5 0.2 ms 22.1 10.1 3.3 0.3 50.4
Board Repo: acwright/6502
Board: Keyboard Helper.kicad_pcb
Folder Hardware / Keyboard Helper / Rev 1.0
Complexity 232 / 1000 (size 187, features 45)
KESE features through vias, filled zones,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 90, 925, 245
Triangles, simulation 2,925,074 in 36 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 98 MB 1.2 GB
STEP 344 MB 1.3 GB
STL 146 MB 1.2 GB
OBJ 304 MB 1.9 GB
Visual
GLB 69 MB 1.5 GB
OBJ 215 MB 1.4 GB

33. LCD Board

LCD Board: stages 4 and 6 take 55% to 84% of a run. Simulation, GLB takes 12 s. Simulation, STEP takes 15 s. Simulation, STL takes 12 s. Simulation, OBJ takes 17 s. Visual, GLB takes 17 s. Visual, OBJ takes 21 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 1.1 5.3 1 ms 4.1 0.2 0.6 0.3 11.9
Simulation, STEP 0.3 1.0 5.4 0.9 ms 4.2 3.2 0.5 0.3 14.8
Simulation, STL 0.3 1.0 5.0 0.7 ms 4.2 0.5 0.6 0.2 11.8
Simulation, OBJ 0.3 1.1 5.5 0.9 ms 4.0 5.8 0.5 0.2 17.5
Visual, GLB 0.3 1.0 5.1 0.8 ms 9.4 0.1 1.1 0.3 17.2
Visual, OBJ 0.3 1.0 5.0 0.8 ms 9.3 3.9 1.3 0.2 21.0
Board Repo: acwright/6502
Board: LCD Board.kicad_pcb
Folder Hardware / LCD Board / Rev 1.0
Complexity 230 / 1000 (size 150, features 80)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 13, 309, 100
Triangles, simulation 1,237,574 in 85 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 42 MB 608 MB
STEP 171 MB 625 MB
STL 62 MB 598 MB
OBJ 125 MB 847 MB
Visual
GLB 28 MB 711 MB
OBJ 84 MB 711 MB

34. LCD Card

LCD Card: stages 4 and 6 take 50% to 84% of a run. Simulation, GLB takes 8.1 s. Simulation, STEP takes 10 s. Simulation, STL takes 7.8 s. Simulation, OBJ takes 12 s. Visual, GLB takes 12 s. Visual, OBJ takes 15 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.7 3.6 0.4 ms 2.7 0.1 0.4 0.2 8.1
Simulation, STEP 0.3 0.7 3.7 0.4 ms 2.8 2.5 0.4 0.2 10.5
Simulation, STL 0.3 0.6 3.4 0.5 ms 2.7 0.2 0.4 0.2 7.8
Simulation, OBJ 0.2 0.7 3.4 0.5 ms 2.9 4.6 0.4 0.2 12.5
Visual, GLB 0.2 0.7 3.5 0.4 ms 6.4 98 ms 0.7 0.2 11.9
Visual, OBJ 0.3 0.6 3.5 0.4 ms 6.3 3.1 0.9 0.2 14.9
Board Repo: acwright/6502
Board: LCD Card.kicad_pcb
Folder Hardware / LCD Card / Rev 1.0
Complexity 226 / 1000 (size 146, features 80)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 12, 288, 65
Triangles, simulation 811,422 in 80 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 28 MB 447 MB
STEP 125 MB 483 MB
STL 41 MB 430 MB
OBJ 82 MB 586 MB
Visual
GLB 19 MB 461 MB
OBJ 57 MB 510 MB

35. Mega Helper

Mega Helper: stages 4 and 6 take 52% to 85% of a run. Simulation, GLB takes 11 s. Simulation, STEP takes 13 s. Simulation, STL takes 10 s. Simulation, OBJ takes 16 s. Visual, GLB takes 16 s. Visual, OBJ takes 20 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.9 4.6 0.5 ms 3.8 0.2 0.6 0.2 10.6
Simulation, STEP 0.2 0.8 4.5 0.6 ms 3.8 2.9 0.6 0.2 13.1
Simulation, STL 0.3 0.9 4.3 1 ms 3.7 0.3 0.5 0.3 10.2
Simulation, OBJ 0.3 0.8 4.8 1.0 ms 3.6 6.0 0.6 0.2 16.4
Visual, GLB 0.3 0.9 4.4 0.6 ms 9.0 0.1 0.9 0.3 15.8
Visual, OBJ 0.3 0.9 4.4 0.5 ms 8.9 4.2 0.8 0.2 19.5
Board Repo: acwright/6502
Board: Mega Helper.kicad_pcb
Folder Hardware / Mega Helper / Rev 1.0
Complexity 163 / 1000 (size 128, features 35)
KESE features through vias, filled zones
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 2, 200, 75
Triangles, simulation 1,011,878 in 85 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 33 MB 494 MB
STEP 127 MB 555 MB
STL 51 MB 478 MB
OBJ 101 MB 675 MB
Visual
GLB 24 MB 668 MB
OBJ 73 MB 672 MB

36. Memory Card

Memory Card: stages 4 and 6 take 53% to 83% of a run. Simulation, GLB takes 7.6 s. Simulation, STEP takes 10 s. Simulation, STL takes 7.7 s. Simulation, OBJ takes 11 s. Visual, GLB takes 12 s. Visual, OBJ takes 14 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.7 2.9 0.3 ms 3.0 0.1 0.4 0.2 7.6
Simulation, STEP 0.3 0.7 3.2 0.3 ms 3.2 2.3 0.4 0.2 10.4
Simulation, STL 0.2 0.6 2.9 0.2 ms 3.1 0.2 0.4 0.2 7.7
Simulation, OBJ 0.2 0.7 3.1 0.4 ms 2.9 3.7 0.4 0.2 11.1
Visual, GLB 0.2 0.7 3.1 0.3 ms 6.7 94 ms 0.7 0.2 11.8
Visual, OBJ 0.2 0.6 2.8 0.5 ms 6.4 2.7 0.7 0.2 13.7
Board Repo: acwright/6502
Board: Memory Card.kicad_pcb
Folder Hardware / Memory Card / Rev 1.0
Complexity 270 / 1000 (size 160, features 110)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 18, 455, 145
Triangles, simulation 912,660 in 62 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 31 MB 420 MB
STEP 147 MB 527 MB
STL 46 MB 450 MB
OBJ 92 MB 632 MB
Visual
GLB 24 MB 615 MB
OBJ 73 MB 604 MB

37. Prototype Card

Prototype Card: stages 4 and 6 take 48% to 82% of a run. Simulation, GLB takes 6.0 s. Simulation, STEP takes 7.4 s. Simulation, STL takes 5.7 s. Simulation, OBJ takes 8.6 s. Visual, GLB takes 8.8 s. Visual, OBJ takes 11 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.5 2.4 0.3 ms 2.0 92 ms 0.4 0.3 6.0
Simulation, STEP 0.3 0.5 2.3 0.5 ms 1.8 1.8 0.3 0.3 7.4
Simulation, STL 0.2 0.5 2.3 0.3 ms 1.8 0.2 0.4 0.3 5.7
Simulation, OBJ 0.3 0.6 2.3 0.3 ms 1.9 3.1 0.4 0.2 8.6
Visual, GLB 0.2 0.5 2.4 0.3 ms 4.8 65 ms 0.5 0.3 8.8
Visual, OBJ 0.3 0.5 2.3 0.3 ms 4.7 2.1 0.6 0.3 10.7
Board Repo: acwright/6502
Board: Prototype Card.kicad_pcb
Folder Hardware / Prototype Card / Rev 1.0
Complexity 193 / 1000 (size 138, features 55)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 7, 346, 23
Triangles, simulation 497,896 in 57 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 17 MB 349 MB
STEP 80 MB 356 MB
STL 25 MB 337 MB
OBJ 51 MB 381 MB
Visual
GLB 13 MB 366 MB
OBJ 38 MB 367 MB

38. PS2 Helper

PS2 Helper: stages 4 and 6 take 52% to 85% of a run. Simulation, GLB takes 11 s. Simulation, STEP takes 14 s. Simulation, STL takes 11 s. Simulation, OBJ takes 17 s. Visual, GLB takes 16 s. Visual, OBJ takes 20 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.9 4.8 0.6 ms 3.8 0.2 0.6 0.2 10.8
Simulation, STEP 0.3 0.8 4.7 0.6 ms 3.9 3.4 0.5 0.3 13.9
Simulation, STL 0.3 0.9 4.8 0.6 ms 3.8 0.3 0.5 0.3 10.8
Simulation, OBJ 0.3 0.9 4.8 1 ms 4.0 6.1 0.5 0.3 17.0
Visual, GLB 0.3 0.9 4.8 0.8 ms 8.8 0.1 0.8 0.3 16.0
Visual, OBJ 0.3 1.0 4.9 0.9 ms 8.6 4.2 0.8 0.3 20.0
Board Repo: acwright/6502
Board: PS2 Helper.kicad_pcb
Folder Hardware / PS2 Helper / Rev 1.0
Complexity 212 / 1000 (size 157, features 55)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 21, 350, 102
Triangles, simulation 1,097,420 in 61 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 37 MB 529 MB
STEP 156 MB 583 MB
STL 55 MB 553 MB
OBJ 110 MB 748 MB
Visual
GLB 25 MB 612 MB
OBJ 76 MB 612 MB

39. RAM Card

RAM Card: stages 4 and 6 take 50% to 83% of a run. Simulation, GLB takes 16 s. Simulation, STEP takes 19 s. Simulation, STL takes 14 s. Simulation, OBJ takes 22 s. Visual, GLB takes 22 s. Visual, OBJ takes 28 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 1.7 6.1 0.6 ms 6.0 0.2 1.0 0.3 16.0
Simulation, STEP 0.4 1.5 5.6 0.6 ms 6.1 4.6 0.8 0.3 19.2
Simulation, STL 0.4 1.3 5.4 0.8 ms 5.6 0.4 0.8 0.3 14.1
Simulation, OBJ 0.4 1.3 5.2 1 ms 5.6 7.9 0.8 0.3 21.6
Visual, GLB 0.4 1.3 5.9 1 ms 12.3 0.2 1.5 0.3 21.9
Visual, OBJ 0.4 1.3 5.6 1.0 ms 12.0 7.3 1.3 0.3 28.1
Board Repo: acwright/6502
Board: RAM Card.kicad_pcb
Folder Hardware / RAM Card / Rev 1.0
Complexity 280 / 1000 (size 170, features 110)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 21, 760, 238
Triangles, simulation 1,263,002 in 84 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 43 MB 564 MB
STEP 194 MB 656 MB
STL 63 MB 575 MB
OBJ 128 MB 839 MB
Visual
GLB 34 MB 680 MB
OBJ 104 MB 869 MB

40. RTC Card

RTC Card: stages 4 and 6 take 53% to 82% of a run. Simulation, GLB takes 7.9 s. Simulation, STEP takes 11 s. Simulation, STL takes 7.7 s. Simulation, OBJ takes 12 s. Visual, GLB takes 11 s. Visual, OBJ takes 15 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.7 3.1 0.4 ms 3.0 0.1 0.5 0.2 7.9
Simulation, STEP 0.3 0.7 3.2 0.5 ms 3.1 2.6 0.5 0.2 10.6
Simulation, STL 0.3 0.7 2.9 0.4 ms 2.9 0.2 0.6 0.2 7.7
Simulation, OBJ 0.3 0.7 3.3 0.4 ms 3.2 4.2 0.5 0.2 12.3
Visual, GLB 0.3 0.7 3.1 0.4 ms 6.3 97 ms 0.7 0.2 11.4
Visual, OBJ 0.3 0.8 3.1 0.4 ms 6.3 3.5 0.8 0.3 14.9
Board Repo: acwright/6502
Board: RTC Card.kicad_pcb
Folder Hardware / RTC Card / Rev 1.0
Complexity 235 / 1000 (size 155, features 80)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 16, 379, 111
Triangles, simulation 801,244 in 77 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 27 MB 390 MB
STEP 125 MB 491 MB
STL 40 MB 382 MB
OBJ 81 MB 586 MB
Visual
GLB 21 MB 531 MB
OBJ 62 MB 502 MB

41. Serial Card Pro

Serial Card Pro: stages 4 and 6 take 54% to 82% of a run. Simulation, GLB takes 9.6 s. Simulation, STEP takes 12 s. Simulation, STL takes 9.8 s. Simulation, OBJ takes 14 s. Visual, GLB takes 14 s. Visual, OBJ takes 17 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.9 3.9 0.5 ms 3.6 0.1 0.5 0.3 9.6
Simulation, STEP 0.3 0.8 3.7 1.0 ms 3.5 3.0 0.6 0.2 12.2
Simulation, STL 0.3 0.8 3.9 0.7 ms 3.6 0.4 0.5 0.2 9.8
Simulation, OBJ 0.3 0.8 3.8 0.6 ms 3.6 4.3 0.5 0.3 13.7
Visual, GLB 0.3 0.8 3.8 0.5 ms 7.6 0.1 1.0 0.2 13.8
Visual, OBJ 0.3 0.8 3.5 0.6 ms 7.7 3.2 1.0 0.3 16.8
Board Repo: acwright/6502
Board: Serial Card Pro.kicad_pcb
Folder Hardware / Serial Card Pro / Rev 1.0
Complexity 242 / 1000 (size 162, features 80)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 27, 435, 112
Triangles, simulation 922,114 in 94 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 32 MB 442 MB
STEP 146 MB 549 MB
STL 46 MB 444 MB
OBJ 93 MB 640 MB
Visual
GLB 23 MB 590 MB
OBJ 71 MB 580 MB

42. Serial Card

Serial Card: stages 4 and 6 take 52% to 82% of a run. Simulation, GLB takes 8.4 s. Simulation, STEP takes 11 s. Simulation, STL takes 8.5 s. Simulation, OBJ takes 12 s. Visual, GLB takes 13 s. Visual, OBJ takes 16 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.8 3.3 0.3 ms 3.1 0.1 0.5 0.2 8.4
Simulation, STEP 0.3 0.7 3.3 0.4 ms 3.2 2.7 0.5 0.2 10.9
Simulation, STL 0.3 0.7 3.2 0.3 ms 3.1 0.4 0.5 0.3 8.5
Simulation, OBJ 0.3 0.7 3.4 0.5 ms 3.0 4.3 0.5 0.2 12.4
Visual, GLB 0.3 0.7 3.4 0.3 ms 7.0 97 ms 1.0 0.3 12.7
Visual, OBJ 0.3 0.7 3.2 0.3 ms 6.8 3.2 1.3 0.3 15.7
Board Repo: acwright/6502
Board: Serial Card.kicad_pcb
Folder Hardware / Serial Card / Rev 1.0
Complexity 236 / 1000 (size 156, features 80)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 21, 364, 90
Triangles, simulation 799,922 in 82 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 27 MB 385 MB
STEP 124 MB 495 MB
STL 40 MB 403 MB
OBJ 80 MB 584 MB
Visual
GLB 20 MB 480 MB
OBJ 60 MB 542 MB

43. Sound Card

Sound Card: stages 4 and 6 take 49% to 81% of a run. Simulation, GLB takes 6.9 s. Simulation, STEP takes 9.2 s. Simulation, STL takes 7.1 s. Simulation, OBJ takes 11 s. Visual, GLB takes 9.7 s. Visual, OBJ takes 12 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.6 2.8 0.3 ms 2.4 0.1 0.4 0.3 6.9
Simulation, STEP 0.3 0.6 2.6 0.5 ms 2.5 2.5 0.4 0.3 9.2
Simulation, STL 0.3 0.6 3.1 0.6 ms 2.3 0.2 0.4 0.3 7.1
Simulation, OBJ 0.3 0.7 2.7 0.2 ms 2.5 3.5 0.6 0.2 10.5
Visual, GLB 0.3 0.6 2.7 0.4 ms 5.2 86 ms 0.6 0.3 9.7
Visual, OBJ 0.3 0.6 2.5 0.3 ms 5.3 2.8 0.6 0.3 12.4
Board Repo: acwright/6502
Board: Sound Card.kicad_pcb
Folder Hardware / Sound Card / Rev 1.0
Complexity 208 / 1000 (size 143, features 65)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 12, 250, 55
Triangles, simulation 555,072 in 67 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 19 MB 345 MB
STEP 88 MB 387 MB
STL 28 MB 359 MB
OBJ 56 MB 427 MB
Visual
GLB 14 MB 387 MB
OBJ 43 MB 386 MB

44. Storage Card Pro

Storage Card Pro: stages 4 and 6 take 55% to 81% of a run. Simulation, GLB takes 9.6 s. Simulation, STEP takes 12 s. Simulation, STL takes 9.7 s. Simulation, OBJ takes 15 s. Visual, GLB takes 14 s. Visual, OBJ takes 17 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.8 3.7 0.4 ms 3.9 0.1 0.6 0.2 9.6
Simulation, STEP 0.3 0.8 3.3 0.3 ms 3.8 2.9 0.7 0.2 12.1
Simulation, STL 0.3 0.8 3.7 0.3 ms 3.9 0.3 0.5 0.2 9.7
Simulation, OBJ 0.3 0.8 3.9 0.6 ms 4.1 4.6 0.6 0.2 14.6
Visual, GLB 0.3 0.9 3.4 0.3 ms 7.9 0.1 1.0 0.3 13.9
Visual, OBJ 0.4 0.9 3.1 0.3 ms 7.9 3.4 1.1 0.3 17.1
Board Repo: acwright/6502
Board: Storage Card Pro.kicad_pcb
Folder Hardware / Storage Card Pro / Rev 1.0
Complexity 218 / 1000 (size 163, features 55)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 26, 471, 135
Triangles, simulation 942,536 in 82 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 32 MB 439 MB
STEP 153 MB 529 MB
STL 47 MB 445 MB
OBJ 95 MB 679 MB
Visual
GLB 25 MB 561 MB
OBJ 77 MB 640 MB

45. Storage Card

Storage Card: stages 4 and 6 take 51% to 81% of a run. Simulation, GLB takes 4.7 s. Simulation, STEP takes 6.6 s. Simulation, STL takes 4.9 s. Simulation, OBJ takes 7.6 s. Visual, GLB takes 7.6 s. Visual, OBJ takes 9.2 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.4 1.7 0.3 ms 2.0 71 ms 0.3 0.2 4.7
Simulation, STEP 0.2 0.5 1.7 0.4 ms 2.0 1.8 0.3 0.2 6.6
Simulation, STL 0.2 0.4 1.6 0.5 ms 2.1 0.1 0.3 0.2 4.9
Simulation, OBJ 0.2 0.5 1.9 0.6 ms 2.0 2.4 0.3 0.3 7.6
Visual, GLB 0.2 0.5 1.8 0.3 ms 4.4 64 ms 0.5 0.2 7.6
Visual, OBJ 0.2 0.4 1.6 0.3 ms 4.3 1.8 0.6 0.2 9.2
Board Repo: acwright/6502
Board: Storage Card.kicad_pcb
Folder Hardware / Storage Card / Rev 1.0
Complexity 205 / 1000 (size 150, features 55)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 15, 284, 84
Triangles, simulation 557,162 in 85 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 19 MB 332 MB
STEP 90 MB 410 MB
STL 28 MB 330 MB
OBJ 56 MB 433 MB
Visual
GLB 16 MB 457 MB
OBJ 48 MB 401 MB

46. VERA Helper

VERA Helper: stages 4 and 6 take 55% to 82% of a run. Simulation, GLB takes 8.9 s. Simulation, STEP takes 12 s. Simulation, STL takes 9.4 s. Simulation, OBJ takes 14 s. Visual, GLB takes 13 s. Visual, OBJ takes 16 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.7 4.1 1 ms 3.1 0.2 0.4 0.2 8.9
Simulation, STEP 0.2 0.7 4.1 0.6 ms 3.4 2.5 0.5 0.2 11.7
Simulation, STL 0.2 0.7 4.1 0.7 ms 3.3 0.3 0.4 0.2 9.4
Simulation, OBJ 0.3 0.8 4.2 0.7 ms 3.3 4.5 0.4 0.3 13.7
Visual, GLB 0.3 0.8 4.1 0.9 ms 6.6 97 ms 0.8 0.3 13.0
Visual, OBJ 0.2 0.8 3.9 0.6 ms 7.5 3.0 0.9 0.2 16.5
Board Repo: acwright/6502
Board: VERA Helper.kicad_pcb
Folder Hardware / VERA Helper / Rev 1.0
Complexity 239 / 1000 (size 149, features 90)
KESE features through vias, slotted holes,
custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 14, 294, 82
Triangles, simulation 1,073,128 in 71 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 36 MB 548 MB
STEP 149 MB 580 MB
STL 54 MB 532 MB
OBJ 108 MB 752 MB
Visual
GLB 25 MB 663 MB
OBJ 76 MB 624 MB

47. VGA Card Pro

VGA Card Pro: stages 4 and 6 take 54% to 83% of a run. Simulation, GLB takes 15 s. Simulation, STEP takes 19 s. Simulation, STL takes 14 s. Simulation, OBJ takes 22 s. Visual, GLB takes 21 s. Visual, OBJ takes 26 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.4 1.5 5.7 1 ms 5.7 0.2 0.8 0.4 14.7
Simulation, STEP 0.4 1.3 5.8 0.7 ms 6.0 4.6 0.9 0.3 19.3
Simulation, STL 0.4 1.2 5.7 0.7 ms 5.6 0.4 0.7 0.3 14.3
Simulation, OBJ 0.4 1.3 5.7 0.7 ms 6.4 7.7 0.8 0.3 22.5
Visual, GLB 0.4 1.3 5.6 0.7 ms 11.8 0.2 1.5 0.3 21.1
Visual, OBJ 0.4 1.3 5.4 0.9 ms 11.6 5.8 1.6 0.3 26.4
Board Repo: acwright/6502
Board: VGA Card Pro.kicad_pcb
Folder Hardware / VGA Card Pro / Rev 1.0
Complexity 262 / 1000 (size 172, features 90)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
drill offsets, filled zones,
copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 33, 637, 197
Triangles, simulation 1,219,950 in 116 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 42 MB 526 MB
STEP 189 MB 653 MB
STL 61 MB 529 MB
OBJ 124 MB 830 MB
Visual
GLB 32 MB 794 MB
OBJ 97 MB 733 MB

48. VGA Card

VGA Card: stages 4 and 6 take 46% to 81% of a run. Simulation, GLB takes 8.5 s. Simulation, STEP takes 12 s. Simulation, STL takes 8.7 s. Simulation, OBJ takes 15 s. Visual, GLB takes 14 s. Visual, OBJ takes 17 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.4 0.9 3.0 0.3 ms 3.4 0.1 0.5 0.3 8.5
Simulation, STEP 0.4 0.8 3.3 0.3 ms 3.8 3.1 0.5 0.3 12.3
Simulation, STL 0.3 0.8 3.4 0.6 ms 3.2 0.2 0.6 0.2 8.7
Simulation, OBJ 0.3 0.8 3.2 0.4 ms 3.6 6.2 0.6 0.2 14.9
Visual, GLB 0.4 0.9 3.5 0.4 ms 7.7 0.1 0.9 0.3 13.8
Visual, OBJ 0.3 0.9 3.3 0.4 ms 7.2 3.9 1.1 0.3 17.0
Board Repo: acwright/6502
Board: VGA Card.kicad_pcb
Folder Hardware / VGA Card / Rev 1.0
Complexity 230 / 1000 (size 150, features 80)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 12, 333, 102
Triangles, simulation 757,742 in 94 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 26 MB 372 MB
STEP 116 MB 464 MB
STL 38 MB 393 MB
OBJ 76 MB 558 MB
Visual
GLB 19 MB 537 MB
OBJ 58 MB 519 MB

49. Video Card Pro

Video Card Pro: stages 4 and 6 take 50% to 81% of a run. Simulation, GLB takes 14 s. Simulation, STEP takes 17 s. Simulation, STL takes 15 s. Simulation, OBJ takes 22 s. Visual, GLB takes 22 s. Visual, OBJ takes 29 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 1.2 5.4 0.7 ms 5.4 0.2 0.8 0.3 13.8
Simulation, STEP 0.4 1.1 5.1 0.7 ms 5.3 4.2 0.6 0.2 17.0
Simulation, STL 0.4 1.4 5.9 0.7 ms 5.6 0.3 0.7 0.3 14.6
Simulation, OBJ 0.4 1.2 5.7 0.8 ms 5.3 8.1 0.8 0.3 21.8
Visual, GLB 0.5 1.4 5.6 0.6 ms 12.2 0.2 1.9 0.3 22.0
Visual, OBJ 0.4 1.3 5.7 0.6 ms 12.0 7.4 2.4 0.2 29.4
Board Repo: acwright/6502
Board: Video Card Pro.kicad_pcb
Folder Hardware / Video Card Pro / Rev 1.0
Complexity 274 / 1000 (size 174, features 100)
KESE features through vias, slotted holes,
custom pads, rounded,
trapezoid or chamfered pads,
drill offsets, filled zones,
copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 33, 800, 202
Triangles, simulation 1,288,982 in 94 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 44 MB 548 MB
STEP 206 MB 648 MB
STL 64 MB 598 MB
OBJ 131 MB 873 MB
Visual
GLB 34 MB 721 MB
OBJ 103 MB 732 MB

50. Video Card

Video Card: stages 4 and 6 take 57% to 83% of a run. Simulation, GLB takes 14 s. Simulation, STEP takes 18 s. Simulation, STL takes 14 s. Simulation, OBJ takes 20 s. Visual, GLB takes 20 s. Visual, OBJ takes 26 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 1.1 5.1 0.8 ms 6.2 0.2 0.7 0.2 13.9
Simulation, STEP 0.3 1.1 5.0 0.8 ms 5.9 4.3 0.7 0.2 17.6
Simulation, STL 0.3 1.2 5.4 0.8 ms 5.7 0.4 0.7 0.3 13.9
Simulation, OBJ 0.3 1.1 5.3 0.7 ms 5.8 6.2 0.6 0.2 19.6
Visual, GLB 0.3 1.1 4.9 2 ms 12.0 0.2 1.6 0.2 20.4
Visual, OBJ 0.3 1.1 5.2 0.9 ms 12.4 5.1 1.7 0.3 26.0
Board Repo: acwright/6502
Board: Video Card.kicad_pcb
Folder Hardware / Video Card / Rev 1.0
Complexity 276 / 1000 (size 176, features 100)
KESE features through vias, slotted holes,
custom pads, rounded,
trapezoid or chamfered pads,
drill offsets, filled zones,
copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 35, 881, 231
Triangles, simulation 1,513,430 in 120 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 52 MB 597 MB
STEP 252 MB 790 MB
STL 76 MB 604 MB
OBJ 155 MB 1.0 GB
Visual
GLB 40 MB 907 MB
OBJ 123 MB 929 MB

51. Miniscope-v4-FlexPC

Miniscope-v4-FlexPC: stages 4 and 6 take 24% to 40% of a run. Simulation, GLB takes 1.2 s. Simulation, STEP takes 2.0 s. Simulation, STL takes 1.2 s. Simulation, OBJ takes 1.5 s. Visual, GLB takes 1.3 s. Visual, OBJ takes 1.7 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.4 54 ms 0.1 ms 0.4 11 ms 19 ms 0.2 1.2
Simulation, STEP 0.1 0.4 54 ms 0.1 ms 0.4 0.8 19 ms 0.2 2.0
Simulation, STL 98 ms 0.3 60 ms 0.1 ms 0.4 15 ms 21 ms 0.2 1.2
Simulation, OBJ 0.1 0.3 60 ms 0.1 ms 0.4 0.4 24 ms 0.2 1.5
Visual, GLB 95 ms 0.4 50 ms 0.1 ms 0.4 25 ms 0.1 0.2 1.3
Visual, OBJ 95 ms 0.4 53 ms 0.1 ms 0.5 0.4 89 ms 0.2 1.7
Board Repo: Aharoni-Lab/Miniscope-v4
Board: Miniscope-v4-FlexPC.kicad_pcb
Folder Development Files / Individual PCBs / Miniscope-v4-FlexPC / Miniscope-v4-FlexPC-array-clamp / KiCad
Complexity 85 / 1000 (size 70, features 15)
KESE features through vias
Tested 9th November 2026
Copper layers 2
File format KiCad 5 (20171130)
Parts, tracks, vias 6, 3, 1
Triangles, simulation 64,520 in 5 parts
Note panel
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 2.3 MB 83 MB
STEP 13 MB 195 MB
STL 3.2 MB 81 MB
OBJ 6.5 MB 105 MB
Visual
GLB 2.3 MB 127 MB
OBJ 6.4 MB 134 MB

52. Miniscope-v4-FlexPC

Miniscope-v4-FlexPC: stages 4 and 6 take 54% to 82% of a run. Simulation, GLB takes 4.1 s. Simulation, STEP takes 5.5 s. Simulation, STL takes 4.2 s. Simulation, OBJ takes 5.9 s. Visual, GLB takes 5.6 s. Visual, OBJ takes 6.5 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 1.8 0.3 ms 1.3 65 ms 0.2 0.3 4.1
Simulation, STEP 0.1 0.4 1.8 0.3 ms 1.4 1.4 0.2 0.2 5.5
Simulation, STL 0.1 0.4 1.8 0.3 ms 1.4 0.1 0.2 0.2 4.2
Simulation, OBJ 0.1 0.3 1.8 0.4 ms 1.4 1.9 0.2 0.2 5.9
Visual, GLB 0.1 0.3 1.9 0.2 ms 2.7 33 ms 0.3 0.2 5.6
Visual, OBJ 0.1 0.3 1.8 0.2 ms 2.9 1.0 0.2 0.2 6.5
Board Repo: Aharoni-Lab/Miniscope-v4
Board: Miniscope-v4-FlexPC.kicad_pcb
Folder Development Files / Individual PCBs / Miniscope-v4-FlexPC / Miniscope-v4-FlexPC-array-double-sided / KiCad
Complexity 168 / 1000 (size 123, features 45)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones
Tested 9th November 2026
Copper layers 2
File format KiCad 5 (20171130)
Parts, tracks, vias 8, 148, 2
Triangles, simulation 478,690 in 49 parts
Note panel
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 16 MB 304 MB
STEP 79 MB 321 MB
STL 24 MB 276 MB
OBJ 49 MB 356 MB
Visual
GLB 8.0 MB 267 MB
OBJ 24 MB 269 MB

53. Miniscope-v4-FlexPC

Miniscope-v4-FlexPC: stages 4 and 6 take 50% to 78% of a run. Simulation, GLB takes 4.0 s. Simulation, STEP takes 5.5 s. Simulation, STL takes 4.1 s. Simulation, OBJ takes 6.1 s. Visual, GLB takes 4.8 s. Visual, OBJ takes 5.5 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 98 ms 0.4 1.6 0.4 ms 1.4 69 ms 0.2 0.2 4.0
Simulation, STEP 0.1 0.4 1.6 0.3 ms 1.4 1.4 0.2 0.2 5.5
Simulation, STL 99 ms 0.4 1.6 0.3 ms 1.4 0.1 0.2 0.2 4.1
Simulation, OBJ 99 ms 0.5 1.6 0.3 ms 1.4 2.1 0.2 0.2 6.1
Visual, GLB 98 ms 0.4 1.7 0.3 ms 2.1 35 ms 0.2 0.3 4.8
Visual, OBJ 87 ms 0.4 1.7 0.3 ms 2.0 0.9 0.2 0.2 5.5
Board Repo: Aharoni-Lab/Miniscope-v4
Board: Miniscope-v4-FlexPC.kicad_pcb
Folder Development Files / Individual PCBs / Miniscope-v4-FlexPC / Miniscope-v4-FlexPC-array / KiCad
Complexity 102 / 1000 (size 102, features 0)
Tested 9th November 2026
Copper layers 2
File format KiCad 5 (20171130)
Parts, tracks, vias 6, 50, 0
Triangles, simulation 399,432 in 49 parts
Note panel
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 13 MB 256 MB
STEP 61 MB 301 MB
STL 20 MB 261 MB
OBJ 40 MB 296 MB
Visual
GLB 5.6 MB 242 MB
OBJ 16 MB 239 MB

54. BNO055_08092019

BNO055_08092019: stages 4 and 6 take 39% to 74% of a run. Simulation, GLB takes 1.6 s. Simulation, STEP takes 2.2 s. Simulation, STL takes 1.5 s. Simulation, OBJ takes 1.8 s. Visual, GLB takes 2.4 s. Visual, OBJ takes 2.7 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.2 0.3 0.1 ms 0.6 21 ms 94 ms 0.3 1.6
Simulation, STEP 0.1 0.2 0.3 0.1 ms 0.6 0.8 81 ms 0.3 2.2
Simulation, STL 90 ms 0.2 0.4 0.1 ms 0.6 25 ms 62 ms 0.2 1.5
Simulation, OBJ 86 ms 0.1 0.3 0.2 ms 0.6 0.4 79 ms 0.3 1.8
Visual, GLB 96 ms 0.2 0.3 0.2 ms 1.4 15 ms 78 ms 0.3 2.4
Visual, OBJ 0.1 0.2 0.3 0.2 ms 1.5 0.3 0.1 0.3 2.7
Board Repo: Aharoni-Lab/Miniscope-v4
Board: BNO055_08092019.kicad_pcb
Folder Development Files / Individual PCBs / Miniscope-v4-IMU / KiCad / BNO055_08092019
Complexity 216 / 1000 (size 181, features 35)
KESE features through vias, filled zones
Tested 9th November 2026
Copper layers 4
File format KiCad 5 (20171130)
Parts, tracks, vias 8, 64, 12
Triangles, simulation 77,112 in 26 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 2.8 MB 176 MB
STEP 9.3 MB 175 MB
STL 3.9 MB 174 MB
OBJ 7.6 MB 173 MB
Visual
GLB 1.8 MB 153 MB
OBJ 4.9 MB 153 MB

55. MS_v4_ETL_LED_Driver

MS_v4_ETL_LED_Driver: stages 4 and 6 take 44% to 78% of a run. Simulation, GLB takes 2.4 s. Simulation, STEP takes 3.2 s. Simulation, STL takes 2.4 s. Simulation, OBJ takes 3.5 s. Visual, GLB takes 3.6 s. Visual, OBJ takes 4.1 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 0.7 0.2 ms 0.8 43 ms 0.1 0.3 2.4
Simulation, STEP 0.1 0.3 0.7 0.2 ms 0.8 0.9 0.2 0.2 3.2
Simulation, STL 0.1 0.3 0.7 0.2 ms 0.8 60 ms 0.1 0.2 2.4
Simulation, OBJ 0.1 0.3 0.7 0.2 ms 0.8 1.2 0.1 0.2 3.5
Visual, GLB 0.1 0.3 0.7 0.2 ms 2.1 24 ms 0.2 0.2 3.6
Visual, OBJ 0.1 0.3 0.7 0.2 ms 2.0 0.6 0.1 0.2 4.1
Board Repo: Aharoni-Lab/Miniscope-v4
Board: MS_v4_ETL_LED_Driver.kicad_pcb
Folder Development Files / Individual PCBs / Miniscope-v4-LED-ETL-Driver / KiCad
Complexity 201 / 1000 (size 166, features 35)
KESE features through vias, filled zones
Tested 9th November 2026
Copper layers 6
File format KiCad 5 (20171130)
Parts, tracks, vias 17, 181, 29
Triangles, simulation 222,592 in 36 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 7.8 MB 210 MB
STEP 25 MB 221 MB
STL 11 MB 208 MB
OBJ 22 MB 218 MB
Visual
GLB 4.1 MB 180 MB
OBJ 12 MB 182 MB

56. Miniscope-v4-MCU

Miniscope-v4-MCU: stages 4 and 6 take 45% to 77% of a run. Simulation, GLB takes 2.0 s. Simulation, STEP takes 3.1 s. Simulation, STL takes 2.4 s. Simulation, OBJ takes 3.2 s. Visual, GLB takes 3.3 s. Visual, OBJ takes 3.6 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 84 ms 0.2 0.5 0.2 ms 0.8 36 ms 0.1 0.2 2.0
Simulation, STEP 0.1 0.3 0.6 0.1 ms 0.8 0.9 0.1 0.3 3.1
Simulation, STL 0.1 0.3 0.6 0.2 ms 0.8 63 ms 0.2 0.3 2.4
Simulation, OBJ 96 ms 0.3 0.7 0.2 ms 0.8 1.0 0.2 0.2 3.2
Visual, GLB 0.1 0.3 0.6 0.2 ms 2.0 17 ms 0.1 0.2 3.3
Visual, OBJ 85 ms 0.3 0.6 0.2 ms 2.0 0.4 99 ms 0.2 3.6
Board Repo: Aharoni-Lab/Miniscope-v4
Board: Miniscope-v4-MCU.kicad_pcb
Folder Development Files / Individual PCBs / Miniscope-v4-MCU / KiCad
Complexity 226 / 1000 (size 191, features 35)
KESE features through vias, filled zones
Tested 9th November 2026
Copper layers 6
File format KiCad 5 (20171130)
Parts, tracks, vias 5, 132, 32
Triangles, simulation 239,108 in 45 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 8.3 MB 200 MB
STEP 26 MB 214 MB
STL 12 MB 197 MB
OBJ 24 MB 200 MB
Visual
GLB 3.9 MB 177 MB
OBJ 11 MB 178 MB

57. Miniscope-v4-PYTHON480

Miniscope-v4-PYTHON480: stages 4 and 6 take 46% to 82% of a run. Simulation, GLB takes 5.8 s. Simulation, STEP takes 7.2 s. Simulation, STL takes 5.6 s. Simulation, OBJ takes 9.0 s. Visual, GLB takes 8.6 s. Visual, OBJ takes 10 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.7 2.2 0.2 ms 1.9 0.1 0.4 0.2 5.8
Simulation, STEP 0.2 0.7 2.2 0.2 ms 1.8 1.6 0.4 0.2 7.2
Simulation, STL 0.2 0.7 2.2 0.5 ms 1.8 0.1 0.4 0.3 5.6
Simulation, OBJ 0.2 0.7 2.3 0.4 ms 1.8 3.4 0.4 0.2 9.0
Visual, GLB 0.2 0.7 2.4 0.3 ms 4.6 62 ms 0.4 0.2 8.6
Visual, OBJ 0.2 0.7 2.4 0.3 ms 4.9 1.6 0.3 0.2 10.5
Board Repo: Aharoni-Lab/Miniscope-v4
Board: Miniscope-v4-PYTHON480.kicad_pcb
Folder Development Files / Individual PCBs / Miniscope-v4-PYTHON480 / KiCad
Complexity 282 / 1000 (size 237, features 45)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones
Tested 9th November 2026
Copper layers 6
File format KiCad 5 (20171130)
Parts, tracks, vias 32, 355, 78
Triangles, simulation 642,990 in 68 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 22 MB 281 MB
STEP 75 MB 321 MB
STL 32 MB 279 MB
OBJ 67 MB 470 MB
Visual
GLB 10 MB 301 MB
OBJ 31 MB 304 MB

58. Miniscope-v4-Ser-Pow

Miniscope-v4-Ser-Pow: stages 4 and 6 take 45% to 79% of a run. Simulation, GLB takes 4.9 s. Simulation, STEP takes 6.0 s. Simulation, STL takes 4.6 s. Simulation, OBJ takes 6.8 s. Visual, GLB takes 6.6 s. Visual, OBJ takes 7.8 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.6 1.9 0.3 ms 1.6 91 ms 0.3 0.2 4.9
Simulation, STEP 0.2 0.7 1.5 0.5 ms 1.5 1.5 0.3 0.3 6.0
Simulation, STL 0.2 0.7 1.5 0.4 ms 1.5 0.1 0.3 0.2 4.6
Simulation, OBJ 0.2 0.6 1.5 0.2 ms 1.6 2.3 0.4 0.3 6.8
Visual, GLB 0.2 0.6 1.6 0.3 ms 3.6 36 ms 0.3 0.3 6.6
Visual, OBJ 0.2 0.6 1.6 0.2 ms 3.7 1.1 0.2 0.3 7.8
Board Repo: Aharoni-Lab/Miniscope-v4
Board: Miniscope-v4-Ser-Pow.kicad_pcb
Folder Development Files / Individual PCBs / Miniscope-v4-Ser-Pow / KiCad
Complexity 267 / 1000 (size 222, features 45)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones
Tested 9th November 2026
Copper layers 6
File format KiCad 5 (20171130)
Parts, tracks, vias 38, 265, 58
Triangles, simulation 446,544 in 46 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 16 MB 248 MB
STEP 48 MB 270 MB
STL 22 MB 244 MB
OBJ 46 MB 334 MB
Visual
GLB 7.1 MB 253 MB
OBJ 21 MB 254 MB

59. Miniscope-v4-PCB-fab-assembly

Miniscope-v4-PCB-fab-assembly: stages 4 and 6 take 47% to 82% of a run. Simulation, GLB takes 9.3 s. Simulation, STEP takes 11 s. Simulation, STL takes 8.8 s. Simulation, OBJ takes 13 s. Visual, GLB takes 13 s. Visual, OBJ takes 15 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 1.2 3.8 0.3 ms 3.0 0.2 0.5 0.3 9.3
Simulation, STEP 0.2 1.3 3.3 0.5 ms 3.0 2.1 0.5 0.2 10.7
Simulation, STL 0.3 1.2 3.3 0.4 ms 2.9 0.4 0.5 0.2 8.8
Simulation, OBJ 0.2 1.1 3.4 0.4 ms 2.8 4.9 0.5 0.2 13.1
Visual, GLB 0.2 1.1 3.2 0.4 ms 7.1 79 ms 0.6 0.2 12.6
Visual, OBJ 0.3 1.1 3.3 0.3 ms 7.1 2.4 0.8 0.3 15.3
Board Repo: Aharoni-Lab/Miniscope-v4
Board: Miniscope-v4-PCB-fab-assembly.kicad_pcb
Folder Development Files / Miniscope-v4-PCB-fab-assembly
Complexity 310 / 1000 (size 255, features 55)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 6
File format KiCad 5 (20171130)
Parts, tracks, vias 54, 668, 139
Triangles, simulation 1,120,536 in 105 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 39 MB 395 MB
STEP 130 MB 473 MB
STL 56 MB 425 MB
OBJ 116 MB 786 MB
Visual
GLB 19 MB 481 MB
OBJ 57 MB 488 MB

60. Miniscope-v4-PCB-fab-assembly_2

Stages 4 and 6 take 46% to 82% of a run. Simulation, GLB takes 18 s. Simulation, STEP takes 20 s. Simulation, STL takes 18 s. Simulation, OBJ takes 27 s. Visual, GLB takes 24 s. Visual, OBJ takes 28 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.6 2.3 6.9 0.9 ms 6.4 0.3 0.9 0.3 17.7
Simulation, STEP 0.6 2.3 6.7 0.6 ms 5.9 3.8 0.9 0.3 20.4
Simulation, STL 0.5 2.5 6.8 0.5 ms 6.3 0.5 1.0 0.3 17.9
Simulation, OBJ 0.5 2.4 6.6 1 ms 6.1 10.7 0.8 0.3 27.4
Visual, GLB 0.5 2.4 6.7 0.8 ms 13.1 0.2 1.0 0.3 24.1
Visual, OBJ 0.5 2.1 6.4 0.4 ms 12.6 5.1 1.2 0.3 28.3
Board Repo: Aharoni-Lab/Miniscope-v4
Board: Miniscope-v4-PCB-fab-assembly_2.kicad_pcb
Folder Development Files / Miniscope-v4-PCB-fab-assembly
Complexity 324 / 1000 (size 269, features 55)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 6
File format KiCad 5 (20171130)
Parts, tracks, vias 91, 933, 197
Triangles, simulation 1,660,988 in 132 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 58 MB 505 MB
STEP 200 MB 608 MB
STL 83 MB 503 MB
OBJ 177 MB 1.1 GB
Visual
GLB 28 MB 726 MB
OBJ 88 MB 723 MB

61. Miniscope-v4-Rigid-Flex

Miniscope-v4-Rigid-Flex: stages 4 and 6 take 47% to 82% of a run. Simulation, GLB takes 12 s. Simulation, STEP takes 15 s. Simulation, STL takes 13 s. Simulation, OBJ takes 19 s. Visual, GLB takes 20 s. Visual, OBJ takes 23 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.4 1.7 4.4 0.5 ms 4.6 0.2 0.7 0.3 12.4
Simulation, STEP 0.4 1.6 4.5 0.5 ms 4.8 3.0 0.7 0.3 15.3
Simulation, STL 0.4 1.7 4.3 0.5 ms 4.7 0.4 0.7 0.3 12.5
Simulation, OBJ 0.4 1.7 4.5 0.5 ms 4.7 7.2 0.8 0.2 19.4
Visual, GLB 0.5 1.8 4.5 0.5 ms 11.5 0.1 0.8 0.3 19.6
Visual, OBJ 0.4 1.7 4.3 0.5 ms 11.7 3.6 1.0 0.2 23.0
Board Repo: Aharoni-Lab/Miniscope-v4
Board: Miniscope-v4-Rigid-Flex.kicad_pcb
Folder Miniscope-v4-Rigid-Flex / KiCad
Complexity 353 / 1000 (size 273, features 80)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 6
File format KiCad 9 (20241229)
Parts, tracks, vias 99, 1,047, 164
Triangles, simulation 1,439,938 in 126 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 50 MB 486 MB
STEP 184 MB 568 MB
STL 72 MB 518 MB
OBJ 151 MB 991 MB
Visual
GLB 24 MB 624 MB
OBJ 75 MB 609 MB

62. Miniscope-v4-VDD-PIX-FC

Miniscope-v4-VDD-PIX-FC: stages 4 and 6 take 41% to 58% of a run. Simulation, GLB takes 0.8 s. Simulation, STEP takes 1.0 s. Simulation, STL takes 0.8 s. Simulation, OBJ takes 0.9 s. Visual, GLB takes 1.0 s. Visual, OBJ takes 1.0 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 75 ms 32 ms 0.1 0.1 ms 0.3 8 ms 27 ms 0.2 0.8
Simulation, STEP 94 ms 39 ms 0.2 0.1 ms 0.3 0.2 28 ms 0.2 1.0
Simulation, STL 74 ms 33 ms 0.1 0.1 ms 0.3 7 ms 25 ms 0.2 0.8
Simulation, OBJ 73 ms 31 ms 0.1 0.1 ms 0.3 0.1 26 ms 0.2 0.9
Visual, GLB 94 ms 42 ms 0.1 0.1 ms 0.5 8 ms 47 ms 0.2 1.0
Visual, OBJ 76 ms 32 ms 0.1 0.1 ms 0.4 89 ms 32 ms 0.2 1.0
Board Repo: Aharoni-Lab/Miniscope-v4
Board: Miniscope-v4-VDD-PIX-FC.kicad_pcb
Folder Miniscope-v4-VDD-PIX-FC / Miniscope-v4-VDD-PIX-FC
Complexity 128 / 1000 (size 83, features 45)
KESE features custom pads, rounded,
trapezoid or chamfered pads,
copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 5 (20171130)
Parts, tracks, vias 4, 19, 0
Triangles, simulation 24,216 in 15 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 900 kB 64 MB
STEP 4.8 MB 67 MB
STL 1.2 MB 66 MB
OBJ 2.4 MB 68 MB
Visual
GLB 516 kB 88 MB
OBJ 1.4 MB 88 MB

63. interposer

interposer: stages 4 and 6 take 51% to 79% of a run. Simulation, GLB takes 8.3 s. Simulation, STEP takes 11 s. Simulation, STL takes 9.2 s. Simulation, OBJ takes 12 s. Visual, GLB takes 13 s. Visual, OBJ takes 15 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 1.2 2.3 0.6 ms 3.7 0.1 0.5 0.2 8.3
Simulation, STEP 0.2 1.0 2.2 0.7 ms 3.9 3.1 0.5 0.2 11.1
Simulation, STL 0.2 1.0 2.8 0.8 ms 4.0 0.3 0.6 0.2 9.2
Simulation, OBJ 0.2 1.0 2.2 0.6 ms 3.8 3.8 0.5 0.2 11.7
Visual, GLB 0.2 1.1 2.3 0.9 ms 7.7 0.1 0.9 0.3 12.6
Visual, OBJ 0.2 1.0 2.2 0.8 ms 7.4 2.9 1.2 0.3 15.1
Board Repo: ahmadexp/Open-Source-PC110
Board: interposer.kicad_pcb
Folder Components / U61-VL82C420FC5 / Interposer / interposer
Complexity 235 / 1000 (size 210, features 25)
KESE features through vias, copper drawings
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 1, 2,968, 208
Triangles, simulation 929,806 in 246 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 32 MB 553 MB
STEP 161 MB 562 MB
STL 47 MB 561 MB
OBJ 94 MB 634 MB
Visual
GLB 23 MB 688 MB
OBJ 70 MB 595 MB

64. bgacpu-dualcon

bgacpu-dualcon: stages 4 and 6 take 51% to 83% of a run. Simulation, GLB takes 5.6 s. Simulation, STEP takes 7.5 s. Simulation, STL takes 5.2 s. Simulation, OBJ takes 7.7 s. Visual, GLB takes 8.6 s. Visual, OBJ takes 11 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.5 1.6 0.4 ms 2.6 0.1 0.4 0.3 5.6
Simulation, STEP 0.2 0.5 1.6 0.5 ms 2.3 2.3 0.4 0.3 7.5
Simulation, STL 0.2 0.4 1.4 0.5 ms 2.4 0.2 0.4 0.2 5.2
Simulation, OBJ 0.2 0.5 1.5 0.5 ms 2.4 2.6 0.3 0.2 7.7
Visual, GLB 0.2 0.4 1.5 0.7 ms 5.6 85 ms 0.6 0.2 8.6
Visual, OBJ 0.2 0.5 1.7 0.6 ms 5.7 2.4 0.6 0.3 11.2
Board Repo: ahmadexp/Open-Source-PC110
Board: bgacpu-dualcon.kicad_pcb
Folder Mods / CPU Upgrade / bgacpu-dualcon
Complexity 254 / 1000 (size 209, features 45)
KESE features through vias, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 3, 773, 111
Triangles, simulation 540,030 in 147 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 19 MB 351 MB
STEP 82 MB 403 MB
STL 27 MB 354 MB
OBJ 55 MB 363 MB
Visual
GLB 16 MB 433 MB
OBJ 48 MB 483 MB

65. pcb-bga-adapter-dualcon

pcb-bga-adapter-dualcon: stages 4 and 6 take 48% to 79% of a run. Simulation, GLB takes 6.5 s. Simulation, STEP takes 9.3 s. Simulation, STL takes 6.5 s. Simulation, OBJ takes 9.9 s. Visual, GLB takes 10 s. Visual, OBJ takes 13 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.5 1.8 0.6 ms 3.2 0.1 0.4 0.3 6.5
Simulation, STEP 0.2 0.6 1.9 0.5 ms 3.0 2.8 0.5 0.3 9.3
Simulation, STL 0.2 0.6 1.7 0.7 ms 3.0 0.2 0.5 0.3 6.5
Simulation, OBJ 0.2 0.7 1.9 0.5 ms 2.8 3.4 0.5 0.3 9.9
Visual, GLB 0.3 0.8 1.9 0.6 ms 6.2 90 ms 0.7 0.3 10.3
Visual, OBJ 0.3 0.6 1.9 0.5 ms 6.0 3.0 0.7 0.3 12.7
Board Repo: ahmadexp/Open-Source-PC110
Board: pcb-bga-adapter-dualcon.kicad_pcb
Folder Mods / CPU Upgrade / pcb-bga-adapter-dualcon
Complexity 252 / 1000 (size 207, features 45)
KESE features through vias, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 3, 625, 107
Triangles, simulation 526,464 in 147 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 18 MB 353 MB
STEP 82 MB 398 MB
STL 26 MB 346 MB
OBJ 53 MB 401 MB
Visual
GLB 15 MB 479 MB
OBJ 47 MB 427 MB

66. DockingStation

DockingStation: stages 4 and 6 take 52% to 83% of a run. Simulation, GLB takes 28 s. Simulation, STEP takes 36 s. Simulation, STL takes 28 s. Simulation, OBJ takes 41 s. Visual, GLB takes 38 s. Visual, OBJ takes 49 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.0 3.1 9.6 1 ms 12.3 0.4 1.3 0.3 28.0
Simulation, STEP 0.9 2.9 9.6 1 ms 13.0 8.3 1.4 0.3 36.4
Simulation, STL 0.9 3.1 9.8 2 ms 11.4 0.8 1.3 0.3 27.7
Simulation, OBJ 1.0 2.9 9.4 1 ms 12.2 14.3 1.3 0.3 41.4
Visual, GLB 0.9 2.9 9.3 1 ms 22.3 0.3 2.3 0.3 38.3
Visual, OBJ 0.9 2.8 9.6 1 ms 22.8 10.3 2.9 0.2 49.5
Board Repo: ahmadexp/Open-Source-PC110
Board: DockingStation.kicad_pcb
Folder Mods / NewDock
Complexity 322 / 1000 (size 227, features 95)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones, copper text,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 9 (20241229)
Parts, tracks, vias 217, 3,054, 269
Triangles, simulation 2,437,752 in 234 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 84 MB 825 MB
STEP 357 MB 1.1 GB
STL 122 MB 805 MB
OBJ 255 MB 1.6 GB
Visual
GLB 59 MB 1.2 GB
OBJ 181 MB 1.3 GB

67. PC110

PC110: stages 4 and 6 take 48% to 71% of a run. Simulation, GLB takes 29 s. Simulation, STEP takes 34 s. Simulation, STL takes 30 s. Simulation, OBJ takes 39 s. Visual, GLB takes 42 s. Visual, OBJ takes 50 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 3.2 6.7 10.7 2 ms 7.0 0.3 0.7 0.3 29.0
Simulation, STEP 3.0 6.6 10.5 3 ms 6.5 6.1 0.8 0.3 33.8
Simulation, STL 3.1 6.9 11.0 2 ms 7.0 0.7 0.9 0.3 29.8
Simulation, OBJ 3.3 6.9 11.6 3 ms 7.1 9.3 0.8 0.3 39.2
Visual, GLB 3.4 7.0 11.5 4 ms 18.8 0.2 1.3 0.3 42.5
Visual, OBJ 3.3 7.3 11.3 2 ms 18.5 7.2 1.8 0.3 49.8
Board Repo: ahmadexp/Open-Source-PC110
Board: PC110.kicad_pcb
Folder Mods / PC110-ITX-all-in-one
Complexity 219 / 1000 (size 164, features 55)
KESE features slotted holes, custom pads,
rounded,
trapezoid or chamfered pads,
copper drawings,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 1,482, 0, 0
Triangles, simulation 1,408,560 in 933 parts
Note mostly unrouted
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 49 MB 710 MB
STEP 173 MB 845 MB
STL 71 MB 746 MB
OBJ 151 MB 1.1 GB
Visual
GLB 40 MB 1.1 GB
OBJ 122 MB 1.1 GB

68. PC110-no-placement

PC110-no-placement: stages 4 and 6 take 45% to 78% of a run. Simulation, GLB takes 27 s. Simulation, STEP takes 31 s. Simulation, STL takes 27 s. Simulation, OBJ takes 38 s. Visual, GLB takes 39 s. Visual, OBJ takes 46 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2.3 5.2 9.1 3 ms 8.3 0.4 1.5 0.3 27.1
Simulation, STEP 2.1 5.2 9.0 2 ms 8.0 4.9 1.5 0.3 31.0
Simulation, STL 2.2 5.1 8.9 2 ms 8.0 0.6 1.4 0.3 26.6
Simulation, OBJ 2.2 5.2 9.0 2 ms 8.0 11.8 1.4 0.3 38.0
Visual, GLB 2.1 5.0 8.7 2 ms 21.7 0.1 1.0 0.2 39.0
Visual, OBJ 2.3 5.2 9.3 3 ms 22.0 5.7 1.0 0.3 45.7
Board Repo: ahmadexp/Open-Source-PC110
Board: PC110-no-placement.kicad_pcb
Folder Mods / PC110-ITX
Complexity 272 / 1000 (size 187, features 85)
KESE features slotted holes, custom pads,
rounded,
trapezoid or chamfered pads,
copper drawings,
curved board outline, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 10
File format KiCad 9 (20241229)
Parts, tracks, vias 934, 0, 0
Triangles, simulation 2,086,414 in 830 parts
Note mostly unrouted
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 63 MB 662 MB
STEP 194 MB 732 MB
STL 104 MB 653 MB
OBJ 223 MB 1.4 GB
Visual
GLB 32 MB 894 MB
OBJ 100 MB 781 MB

69. PC110

PC110: stages 4 and 6 take 49% to 82% of a run. Simulation, GLB takes 73 s. Simulation, STEP takes 89 s. Simulation, STL takes 76 s. Simulation, OBJ takes 2 min. Visual, GLB takes 2 min. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2.4 8.2 24.4 2 ms 32.4 1.3 3.4 0.4 72.5
Simulation, STEP 2.6 8.3 23.0 3 ms 29.9 20.9 3.4 0.4 88.5
Simulation, STL 2.3 7.8 25.0 5 ms 33.5 3.0 3.8 0.4 75.9
Simulation, OBJ 2.6 8.6 25.0 5 ms 33.0 46.5 3.3 0.4 119.4
Visual, GLB 2.4 7.8 23.2 3 ms 78.1 0.8 10.1 0.4 122.8
Visual, OBJ 2.4 7.9 23.1 5 ms 75.8 26.7 8.5 0.4 144.8
Board Repo: ahmadexp/Open-Source-PC110
Board: PC110.kicad_pcb
Folder Mods / PC110-ITX
Complexity 272 / 1000 (size 187, features 85)
KESE features slotted holes, custom pads,
rounded,
trapezoid or chamfered pads,
copper drawings,
curved board outline, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 10
File format KiCad 9 (20241229)
Parts, tracks, vias 934, 0, 0
Triangles, simulation 5,605,872 in 1377 parts
Note mostly unrouted
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 182 MB 1.6 GB
STEP 860 MB 2.2 GB
STL 280 MB 1.6 GB
OBJ 604 MB 3.6 GB
Visual
GLB 135 MB 2.1 GB
OBJ 429 MB 2.6 GB

70. DockingStation

DockingStation: stages 4 and 6 take 56% to 82% of a run. Simulation, GLB takes 24 s. Simulation, STEP takes 31 s. Simulation, STL takes 27 s. Simulation, OBJ takes 36 s. Visual, GLB takes 38 s. Visual, OBJ takes 45 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.8 2.3 8.1 0.9 ms 11.3 0.4 1.2 0.2 24.4
Simulation, STEP 0.8 2.4 8.2 2 ms 11.7 6.9 1.3 0.3 31.5
Simulation, STL 0.8 3.2 8.9 1 ms 11.8 0.8 1.2 0.3 27.0
Simulation, OBJ 0.8 2.6 8.6 2 ms 11.2 11.1 1.2 0.2 35.7
Visual, GLB 0.8 2.4 8.9 2 ms 22.4 0.3 3.0 0.2 38.0
Visual, OBJ 0.8 2.5 8.4 1 ms 21.8 8.3 3.2 0.3 45.3
Board Repo: ahmadexp/Open-Source-PC110
Board: DockingStation.kicad_pcb
Folder PCB / DockingStation
Complexity 325 / 1000 (size 230, features 95)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones, copper text,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 253, 3,270, 290
Triangles, simulation 2,650,988 in 277 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 91 MB 872 MB
STEP 398 MB 1.2 GB
STL 133 MB 889 MB
OBJ 279 MB 1.8 GB
Visual
GLB 64 MB 1.2 GB
OBJ 200 MB 1.4 GB

71. PC110_membrance

PC110_membrance: stages 4 and 6 take 50% to 78% of a run. Simulation, GLB takes 9.2 s. Simulation, STEP takes 12 s. Simulation, STL takes 9.5 s. Simulation, OBJ takes 14 s. Visual, GLB takes 13 s. Visual, OBJ takes 16 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.4 1.1 3.4 0.1 ms 3.3 0.1 0.5 0.2 9.2
Simulation, STEP 0.5 1.1 3.4 0.1 ms 3.2 3.4 0.4 0.2 12.3
Simulation, STL 0.4 1.2 3.6 0.2 ms 3.4 0.3 0.4 0.2 9.5
Simulation, OBJ 0.4 1.2 3.5 0.1 ms 3.5 4.8 0.4 0.2 14.1
Visual, GLB 0.5 1.1 3.5 0.2 ms 6.3 95 ms 0.8 0.2 12.5
Visual, OBJ 0.5 1.1 3.6 0.2 ms 6.3 3.5 1.0 0.2 16.1
Board Repo: ahmadexp/Open-Source-PC110
Board: PC110_membrance.kicad_pcb
Folder PCB / Keyboard / Membrane
Complexity 207 / 1000 (size 127, features 80)
KESE features through vias, copper drawings,
curved board outline,
tracks bare of mask, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 0, 762, 32
Triangles, simulation 823,958 in 7 parts
Note no components
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 30 MB 508 MB
STEP 223 MB 580 MB
STL 41 MB 509 MB
OBJ 87 MB 608 MB
Visual
GLB 20 MB 502 MB
OBJ 60 MB 526 MB

72. PC110

PC110: stages 4 and 6 take 42% to 83% of a run. Simulation, GLB takes 5 min. Simulation, STEP takes 6 min. Simulation, STL takes 5 min. Simulation, OBJ takes 10 min. Visual, GLB takes 9 min. Visual, OBJ takes 10 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 6.1 46.8 96.2 5 ms 134.2 10.9 22.2 1.8 318.2
Simulation, STEP 6.6 47.7 95.3 5 ms 123.2 72.6 19.5 1.3 366.2
Simulation, STL 5.9 42.7 88.3 6 ms 122.7 16.6 21.3 1.2 298.6
Simulation, OBJ 6.1 48.6 105.5 10 ms 157.8 266.6 33.3 4.3 622.3
Visual, GLB 6.1 46.1 91.7 6 ms 358.7 3.5 37.4 0.9 544.4
Visual, OBJ 6.3 45.2 91.6 5 ms 306.3 112.5 26.4 0.7 589.0
Board Repo: ahmadexp/Open-Source-PC110
Board: PC110.kicad_pcb
Folder PCB / Mainboard
Complexity 563 / 1000 (size 378, features 185)
KESE features through vias,
blind and buried vias,
slotted holes, custom pads,
rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
copper text, curved board outline,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026 to 11th November 2026
Copper layers 10
File format KiCad 10 (20260206)
Parts, tracks, vias 934, 44,594, 6,088
Triangles, simulation 30,743,204 in 1455 parts
Verifier PASS in all six runs
Run again Visual, OBJ: failed in the corpus run, run again with the memory cap raised from 11 GB to 14.5 GB, and passed
Run again Simulation, OBJ: failed in the corpus run, run again with no memory cap and no time limit (swap added to a 16 GB machine), and passed
File
type
File
size
Peak memory
used
Simulation
GLB 1.0 GB 6.4 GB
STEP 3.4 GB 7.6 GB
STL 1.5 GB 6.0 GB
OBJ 3.5 GB 20 GB
Visual
GLB 538 MB 8.7 GB
OBJ 1.8 GB 12 GB

73. PC110

PC110: stages 4 and 6 take 41% to 84% of a run. Simulation, GLB takes 6 min. Simulation, STEP takes 6 min. Simulation, STL takes 5 min. Simulation, OBJ takes 9 min. Visual, GLB takes 9 min. Visual, OBJ takes 9 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 6.2 50.4 104.4 5 ms 141.9 8.9 21.3 1.2 334.3
Simulation, STEP 5.5 42.6 92.4 5 ms 126.5 67.0 18.6 1.2 353.9
Simulation, STL 5.5 42.3 91.8 6 ms 123.4 14.9 18.8 1.3 298.1
Simulation, OBJ 5.9 45.2 96.8 5 ms 135.8 250.5 32.0 3.7 569.9
Visual, GLB 5.7 42.9 91.8 7 ms 355.8 3.4 33.6 0.9 534.1
Visual, OBJ 5.4 38.6 83.2 5 ms 303.5 101.8 34.0 0.9 567.4
Board Repo: ahmadexp/Open-Source-PC110
Board: PC110.kicad_pcb
Folder PCB / Mainboard / Single-Sheet-Schematic
Complexity 563 / 1000 (size 378, features 185)
KESE features through vias,
blind and buried vias,
slotted holes, custom pads,
rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
copper text, curved board outline,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026 to 11th November 2026
Copper layers 10
File format KiCad 9 (20241229)
Parts, tracks, vias 934, 44,600, 6,088
Triangles, simulation 30,715,986 in 1454 parts
Verifier PASS in all six runs
Run again Visual, OBJ: failed in the corpus run, run again with the memory cap raised from 11 GB to 14.5 GB, and passed
Run again Simulation, OBJ: failed in the corpus run, run again with no memory cap and no time limit (swap added to a 16 GB machine), and passed
File
type
File
size
Peak memory
used
Simulation
GLB 1.0 GB 6.1 GB
STEP 3.4 GB 8.1 GB
STL 1.5 GB 6.0 GB
OBJ 3.5 GB 19 GB
Visual
GLB 538 MB 8.6 GB
OBJ 1.8 GB 11 GB

74. Modem

Modem: stages 4 and 6 take 43% to 80% of a run. Simulation, GLB takes 27 s. Simulation, STEP takes 33 s. Simulation, STL takes 27 s. Simulation, OBJ takes 44 s. Visual, GLB takes 42 s. Visual, OBJ takes 52 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.1 4.0 8.0 1 ms 11.6 0.5 1.6 0.3 27.0
Simulation, STEP 0.9 3.8 8.0 1 ms 11.0 7.9 1.5 0.3 33.5
Simulation, STL 1.1 3.9 7.9 1 ms 11.2 1.0 1.6 0.4 27.0
Simulation, OBJ 1.1 4.1 8.0 2 ms 11.1 18.2 1.7 0.3 44.3
Visual, GLB 1.0 4.0 8.5 1 ms 25.1 0.4 2.7 0.3 41.9
Visual, OBJ 1.0 3.8 7.9 1 ms 24.9 11.7 2.5 0.2 52.1
Board Repo: ahmadexp/Open-Source-PC110
Board: Modem.kicad_pcb
Folder PCB / Modem
Complexity 360 / 1000 (size 240, features 120)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
copper text, curved board outline,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 6
File format KiCad 10 (20260206)
Parts, tracks, vias 211, 3,642, 344
Triangles, simulation 3,141,144 in 275 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 106 MB 984 MB
STEP 414 MB 1.2 GB
STL 157 MB 1.0 GB
OBJ 331 MB 2.0 GB
Visual
GLB 67 MB 1.2 GB
OBJ 213 MB 1.6 GB

75. PSU

PSU: stages 4 and 6 take 47% to 82% of a run. Simulation, GLB takes 21 s. Simulation, STEP takes 25 s. Simulation, STL takes 20 s. Simulation, OBJ takes 33 s. Visual, GLB takes 32 s. Visual, OBJ takes 40 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.2 2.6 6.6 0.8 ms 8.7 0.4 1.0 0.3 20.7
Simulation, STEP 1.0 2.7 6.2 0.6 ms 8.3 5.9 0.9 0.3 25.2
Simulation, STL 1.0 2.3 6.6 1 ms 8.6 0.7 1.0 0.3 20.4
Simulation, OBJ 1.0 2.4 6.5 1 ms 9.0 12.6 0.9 0.3 32.8
Visual, GLB 0.9 2.4 6.4 0.7 ms 19.7 0.4 1.7 0.3 31.8
Visual, OBJ 0.9 2.7 6.8 0.7 ms 18.8 8.6 1.9 0.3 40.0
Board Repo: ahmadexp/Open-Source-PC110
Board: PSU.kicad_pcb
Folder PCB / PSU
Complexity 345 / 1000 (size 225, features 120)
KESE features through vias, custom pads, rounded,
trapezoid or chamfered pads,
filled zones, copper drawings,
copper text, curved board outline,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 256, 2,401, 212
Triangles, simulation 1,939,178 in 172 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 67 MB 693 MB
STEP 311 MB 863 MB
STL 97 MB 692 MB
OBJ 204 MB 1.3 GB
Visual
GLB 49 MB 894 MB
OBJ 151 MB 1.1 GB

76. RAM-Module

RAM-Module: stages 4 and 6 take 42% to 79% of a run. Simulation, GLB takes 10 s. Simulation, STEP takes 13 s. Simulation, STL takes 10 s. Simulation, OBJ takes 16 s. Visual, GLB takes 16 s. Visual, OBJ takes 22 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 1.4 2.6 0.4 ms 4.4 0.2 0.7 0.2 10.1
Simulation, STEP 0.5 1.4 2.5 0.4 ms 3.9 3.4 0.7 0.3 12.8
Simulation, STL 0.5 1.2 2.5 0.4 ms 4.4 0.4 0.9 0.3 10.3
Simulation, OBJ 0.5 1.4 2.7 0.4 ms 4.1 6.4 0.8 0.3 16.2
Visual, GLB 0.5 1.4 2.6 0.4 ms 9.7 0.1 1.0 0.3 15.7
Visual, OBJ 0.7 1.4 2.6 0.5 ms 10.4 5.6 1.3 0.4 22.4
Board Repo: ahmadexp/Open-Source-PC110
Board: RAM-Module.kicad_pcb
Folder PCB / RAM-16MB
Complexity 304 / 1000 (size 194, features 110)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, copper text,
curved board outline,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 9 (20241229)
Parts, tracks, vias 21, 1,851, 152
Triangles, simulation 1,031,920 in 67 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 35 MB 526 MB
STEP 155 MB 558 MB
STL 52 MB 521 MB
OBJ 105 MB 754 MB
Visual
GLB 25 MB 650 MB
OBJ 78 MB 653 MB

77. ALU

ALU: stages 4 and 6 take 51% to 83% of a run. Simulation, GLB takes 39 s. Simulation, STEP takes 50 s. Simulation, STL takes 39 s. Simulation, OBJ takes 60 s. Visual, GLB takes 54 s. Visual, OBJ takes 60 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.1 3.5 14.5 0.9 ms 16.6 0.7 2.6 0.4 39.4
Simulation, STEP 0.9 3.2 13.7 1 ms 16.3 12.9 2.5 0.4 49.9
Simulation, STL 1.0 3.6 14.9 6 ms 15.3 1.4 2.4 0.4 39.0
Simulation, OBJ 0.8 3.4 14.5 2 ms 16.2 22.3 2.5 0.3 60.0
Visual, GLB 1.2 3.6 14.5 1 ms 30.8 0.3 3.6 0.4 54.5
Visual, OBJ 0.8 3.0 12.9 1 ms 27.6 12.5 3.2 0.3 60.2
Board Repo: AJain9199/AOS16
Board: ALU.kicad_pcb
Folder ALU
Complexity 337 / 1000 (size 252, features 85)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 9 (20241229)
Parts, tracks, vias 66, 1,274, 156
Triangles, simulation 3,127,712 in 160 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 106 MB 961 MB
STEP 412 MB 1.2 GB
STL 156 MB 1.0 GB
OBJ 328 MB 2.1 GB
Visual
GLB 57 MB 1.1 GB
OBJ 176 MB 1.4 GB

78. AOS16 Double Buffer

AOS16 Double Buffer: stages 4 and 6 take 49% to 84% of a run. Simulation, GLB takes 16 s. Simulation, STEP takes 21 s. Simulation, STL takes 16 s. Simulation, OBJ takes 26 s. Visual, GLB takes 22 s. Visual, OBJ takes 28 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.6 1.6 5.3 0.7 ms 7.0 0.3 0.9 0.3 16.0
Simulation, STEP 0.5 1.5 5.3 0.9 ms 7.1 5.4 0.9 0.3 21.0
Simulation, STL 0.5 1.5 5.3 2 ms 7.0 0.5 1.0 0.3 16.1
Simulation, OBJ 0.5 1.5 5.4 1 ms 7.3 10.1 0.9 0.2 26.0
Visual, GLB 0.5 1.5 5.5 0.7 ms 12.7 0.2 1.0 0.2 21.6
Visual, OBJ 0.7 1.5 5.3 0.6 ms 12.4 6.4 1.1 0.3 27.7
Board Repo: AJain9199/AOS16
Board: AOS16 Double Buffer.kicad_pcb
Folder AOS16 Double Buffer
Complexity 327 / 1000 (size 252, features 75)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 9 (20241229)
Parts, tracks, vias 63, 1,134, 142
Triangles, simulation 1,701,350 in 130 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 58 MB 631 MB
STEP 235 MB 753 MB
STL 85 MB 637 MB
OBJ 175 MB 1.1 GB
Visual
GLB 37 MB 922 MB
OBJ 114 MB 921 MB

79. AOS16 GPU

AOS16 GPU: stages 4 and 6 take 48% to 82% of a run. Simulation, GLB takes 14 s. Simulation, STEP takes 20 s. Simulation, STL takes 16 s. Simulation, OBJ takes 24 s. Visual, GLB takes 22 s. Visual, OBJ takes 29 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.6 1.4 4.9 0.8 ms 6.2 0.3 0.8 0.2 14.5
Simulation, STEP 0.5 1.4 4.8 0.6 ms 6.3 5.5 0.9 0.2 19.5
Simulation, STL 0.5 1.6 5.1 0.6 ms 6.7 0.5 0.9 0.3 15.6
Simulation, OBJ 0.5 1.6 5.0 0.5 ms 6.6 9.7 0.8 0.3 24.4
Visual, GLB 0.6 1.4 4.8 0.6 ms 13.1 0.2 1.6 0.3 21.9
Visual, OBJ 0.5 1.5 4.8 0.6 ms 12.9 7.1 1.7 0.3 28.7
Board Repo: AJain9199/AOS16
Board: AOS16 GPU.kicad_pcb
Folder AOS16 GPU
Complexity 290 / 1000 (size 205, features 85)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 9 (20241229)
Parts, tracks, vias 105, 1,114, 175
Triangles, simulation 1,867,922 in 120 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 64 MB 743 MB
STEP 281 MB 858 MB
STL 93 MB 764 MB
OBJ 193 MB 1.3 GB
Visual
GLB 43 MB 795 MB
OBJ 131 MB 954 MB

80. AOS16 Register

AOS16 Register: stages 4 and 6 take 49% to 83% of a run. Simulation, GLB takes 4.6 s. Simulation, STEP takes 5.9 s. Simulation, STL takes 4.6 s. Simulation, OBJ takes 6.9 s. Visual, GLB takes 6.8 s. Visual, OBJ takes 8.5 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.4 1.7 0.2 ms 1.7 0.1 0.3 0.3 4.6
Simulation, STEP 0.2 0.3 1.6 0.2 ms 1.7 1.6 0.3 0.2 5.9
Simulation, STL 0.2 0.4 1.6 0.3 ms 1.8 0.1 0.3 0.2 4.6
Simulation, OBJ 0.2 0.3 1.6 0.2 ms 1.7 2.5 0.3 0.2 6.9
Visual, GLB 0.2 0.3 1.7 0.3 ms 4.0 55 ms 0.3 0.2 6.8
Visual, OBJ 0.2 0.3 1.6 0.3 ms 3.9 1.9 0.3 0.2 8.5
Board Repo: AJain9199/AOS16
Board: AOS16 Register.kicad_pcb
Folder AOS16 Register
Complexity 209 / 1000 (size 154, features 55)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 8 (20240108)
Parts, tracks, vias 44, 297, 19
Triangles, simulation 449,674 in 65 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 15 MB 297 MB
STEP 73 MB 327 MB
STL 22 MB 293 MB
OBJ 45 MB 311 MB
Visual
GLB 11 MB 341 MB
OBJ 33 MB 350 MB

81. AOS16 Timer

AOS16 Timer: stages 4 and 6 take 50% to 81% of a run. Simulation, GLB takes 3.2 s. Simulation, STEP takes 4.3 s. Simulation, STL takes 2.8 s. Simulation, OBJ takes 4.0 s. Visual, GLB takes 4.0 s. Visual, OBJ takes 5.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.2 0.8 0.2 ms 1.5 56 ms 0.1 0.3 3.2
Simulation, STEP 0.2 0.2 0.9 0.2 ms 1.2 1.5 0.1 0.2 4.3
Simulation, STL 0.2 0.2 0.7 0.2 ms 1.3 74 ms 0.1 0.2 2.8
Simulation, OBJ 0.2 0.2 0.9 0.2 ms 1.3 1.1 0.1 0.2 4.0
Visual, GLB 0.1 0.2 0.8 0.3 ms 2.4 29 ms 0.2 0.2 4.0
Visual, OBJ 0.1 0.2 0.8 0.3 ms 2.5 1.0 0.3 0.2 5.3
Board Repo: AJain9199/AOS16
Board: AOS16 Timer.kicad_pcb
Folder AOS16 Timer
Complexity 201 / 1000 (size 146, features 55)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 8 (20240108)
Parts, tracks, vias 30, 198, 25
Triangles, simulation 250,036 in 39 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 8.6 MB 240 MB
STEP 39 MB 255 MB
STL 13 MB 234 MB
OBJ 25 MB 237 MB
Visual
GLB 6.8 MB 241 MB
OBJ 20 MB 244 MB

82. Bus Connector

Bus Connector: stages 4 and 6 take 50% to 85% of a run. Simulation, GLB takes 12 s. Simulation, STEP takes 17 s. Simulation, STL takes 13 s. Simulation, OBJ takes 19 s. Visual, GLB takes 17 s. Visual, OBJ takes 21 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.4 1.0 5.3 0.5 ms 4.4 0.2 0.6 0.3 12.1
Simulation, STEP 0.4 1.0 6.0 0.6 ms 5.2 3.8 0.6 0.2 17.2
Simulation, STL 0.3 1.0 6.0 0.5 ms 4.4 0.4 0.6 0.3 13.0
Simulation, OBJ 0.4 1.0 5.3 0.6 ms 4.1 7.3 0.6 0.3 18.9
Visual, GLB 0.3 1.0 5.6 0.7 ms 9.1 0.1 0.8 0.3 17.2
Visual, OBJ 0.3 0.9 5.2 0.9 ms 8.9 4.5 0.9 0.2 21.0
Board Repo: AJain9199/AOS16
Board: Bus Connector.kicad_pcb
Folder Bus Connector
Complexity 232 / 1000 (size 147, features 85)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 13, 309, 60
Triangles, simulation 1,228,318 in 36 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 42 MB 486 MB
STEP 176 MB 613 MB
STL 61 MB 500 MB
OBJ 124 MB 831 MB
Visual
GLB 26 MB 669 MB
OBJ 79 MB 635 MB

83. Bus Probe

Bus Probe: stages 4 and 6 take 52% to 82% of a run. Simulation, GLB takes 3.9 s. Simulation, STEP takes 5.4 s. Simulation, STL takes 4.1 s. Simulation, OBJ takes 5.2 s. Visual, GLB takes 5.1 s. Visual, OBJ takes 6.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.2 1.4 0.4 ms 1.6 64 ms 0.2 0.3 3.9
Simulation, STEP 0.2 0.2 1.4 0.4 ms 1.6 1.6 0.2 0.2 5.4
Simulation, STL 0.2 0.2 1.4 0.3 ms 1.7 0.1 0.2 0.2 4.1
Simulation, OBJ 0.2 0.3 1.2 0.3 ms 1.5 1.6 0.2 0.2 5.2
Visual, GLB 0.1 0.2 1.2 0.3 ms 2.9 43 ms 0.3 0.2 5.1
Visual, OBJ 0.2 0.3 1.4 0.2 ms 2.8 1.3 0.3 0.2 6.3
Board Repo: AJain9199/AOS16
Board: Bus Probe.kicad_pcb
Folder Bus Connector / Bus Probe
Complexity 239 / 1000 (size 184, features 55)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 27, 242, 8
Triangles, simulation 382,562 in 60 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 13 MB 278 MB
STEP 66 MB 309 MB
STL 19 MB 270 MB
OBJ 38 MB 317 MB
Visual
GLB 9.2 MB 298 MB
OBJ 27 MB 300 MB

84. Bus Terminator

Bus Terminator: stages 4 and 6 take 50% to 80% of a run. Simulation, GLB takes 3.7 s. Simulation, STEP takes 5.2 s. Simulation, STL takes 3.6 s. Simulation, OBJ takes 5.1 s. Visual, GLB takes 5.0 s. Visual, OBJ takes 6.2 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.2 1.1 0.4 ms 1.7 64 ms 0.2 0.3 3.7
Simulation, STEP 0.2 0.2 1.1 0.3 ms 1.6 1.6 0.2 0.3 5.2
Simulation, STL 0.2 0.2 1.1 0.3 ms 1.5 0.1 0.2 0.2 3.6
Simulation, OBJ 0.2 0.2 1.0 0.2 ms 1.5 1.7 0.2 0.2 5.1
Visual, GLB 0.2 0.2 1.0 0.3 ms 3.0 40 ms 0.3 0.3 5.0
Visual, OBJ 0.2 0.2 1.0 0.3 ms 3.1 1.2 0.3 0.2 6.2
Board Repo: AJain9199/AOS16
Board: Bus Terminator.kicad_pcb
Folder Bus Connector / Bus Terminator
Complexity 201 / 1000 (size 131, features 70)
KESE features rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 38, 96, 0
Triangles, simulation 358,362 in 45 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 12 MB 256 MB
STEP 64 MB 300 MB
STL 18 MB 258 MB
OBJ 36 MB 272 MB
Visual
GLB 8.6 MB 289 MB
OBJ 25 MB 297 MB

85. bus_boards

bus_boards: stages 4 and 6 take 51% to 84% of a run. Simulation, GLB takes 19 s. Simulation, STEP takes 25 s. Simulation, STL takes 20 s. Simulation, OBJ takes 30 s. Visual, GLB takes 27 s. Visual, OBJ takes 34 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 1.4 8.1 0.7 ms 7.4 0.3 0.8 0.2 18.8
Simulation, STEP 0.5 1.4 7.9 0.5 ms 7.4 6.3 0.8 0.2 24.6
Simulation, STL 0.5 1.3 8.2 0.4 ms 7.9 0.7 0.9 0.2 19.7
Simulation, OBJ 0.6 1.6 7.9 0.6 ms 7.2 11.2 0.9 0.3 29.6
Visual, GLB 0.5 1.7 7.9 0.6 ms 14.6 0.2 1.5 0.2 26.6
Visual, OBJ 0.5 1.5 7.5 0.5 ms 14.6 7.2 2.1 0.3 33.7
Board Repo: AJain9199/AOS16
Board: bus_boards.kicad_pcb
Folder Bus Connector
Complexity 300 / 1000 (size 215, features 85)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 78, 647, 68
Triangles, simulation 1,957,280 in 83 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 66 MB 719 MB
STEP 306 MB 908 MB
STL 98 MB 683 MB
OBJ 203 MB 1.3 GB
Visual
GLB 44 MB 919 MB
OBJ 133 MB 984 MB

86. clock

clock: stages 4 and 6 take 50% to 79% of a run. Simulation, GLB takes 3.2 s. Simulation, STEP takes 4.4 s. Simulation, STL takes 3.1 s. Simulation, OBJ takes 4.4 s. Visual, GLB takes 4.4 s. Visual, OBJ takes 5.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.2 1.1 0.4 ms 1.3 84 ms 0.2 0.2 3.2
Simulation, STEP 0.2 0.3 1.1 0.2 ms 1.2 1.3 0.1 0.2 4.4
Simulation, STL 0.2 0.3 1.1 0.2 ms 1.2 78 ms 0.1 0.2 3.1
Simulation, OBJ 0.1 0.2 1.0 0.2 ms 1.2 1.5 0.2 0.2 4.4
Visual, GLB 0.2 0.3 1.1 0.3 ms 2.4 35 ms 0.2 0.2 4.4
Visual, OBJ 0.1 0.2 1.0 0.3 ms 2.3 1.2 0.3 0.2 5.3
Board Repo: AJain9199/AOS16
Board: clock.kicad_pcb
Folder clock
Complexity 234 / 1000 (size 149, features 85)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 35, 237, 21
Triangles, simulation 314,148 in 48 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 11 MB 248 MB
STEP 48 MB 275 MB
STL 16 MB 249 MB
OBJ 31 MB 273 MB
Visual
GLB 7.8 MB 267 MB
OBJ 23 MB 266 MB

87. Control

Control: stages 4 and 6 take 49% to 84% of a run. Simulation, GLB takes 22 s. Simulation, STEP takes 27 s. Simulation, STL takes 21 s. Simulation, OBJ takes 34 s. Visual, GLB takes 31 s. Visual, OBJ takes 38 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.6 2.0 8.6 1 ms 8.5 0.4 1.2 0.3 21.5
Simulation, STEP 0.6 1.9 8.7 0.6 ms 8.0 6.4 1.2 0.3 26.9
Simulation, STL 0.6 1.9 8.5 0.8 ms 8.2 0.7 1.2 0.2 21.3
Simulation, OBJ 0.6 1.9 8.5 0.6 ms 8.2 13.6 1.3 0.3 34.4
Visual, GLB 0.6 1.9 8.7 1 ms 17.2 0.2 1.8 0.2 30.6
Visual, OBJ 0.6 1.9 8.6 0.7 ms 17.3 7.8 1.8 0.2 38.2
Board Repo: AJain9199/AOS16
Board: Control.kicad_pcb
Folder Control
Complexity 331 / 1000 (size 246, features 85)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 9 (20241229)
Parts, tracks, vias 120, 1,248, 101
Triangles, simulation 2,569,814 in 172 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 87 MB 913 MB
STEP 363 MB 1.0 GB
STL 129 MB 814 MB
OBJ 269 MB 1.7 GB
Visual
GLB 52 MB 1000 MB
OBJ 159 MB 1.1 GB

88. Memory Controller

Memory Controller: stages 4 and 6 take 46% to 84% of a run. Simulation, GLB takes 17 s. Simulation, STEP takes 22 s. Simulation, STL takes 18 s. Simulation, OBJ takes 30 s. Visual, GLB takes 25 s. Visual, OBJ takes 32 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.6 1.7 6.6 0.7 ms 6.7 0.3 0.9 0.2 17.1
Simulation, STEP 0.6 1.8 6.8 0.6 ms 6.7 5.1 1.1 0.3 22.3
Simulation, STL 0.5 1.7 6.5 0.5 ms 6.9 0.7 1.1 0.3 17.7
Simulation, OBJ 0.5 1.8 6.8 0.7 ms 7.1 12.6 1.1 0.2 30.2
Visual, GLB 0.5 1.7 6.4 0.4 ms 14.7 0.2 1.3 0.3 25.1
Visual, OBJ 0.6 1.8 6.3 0.5 ms 14.4 7.5 1.5 0.3 32.3
Board Repo: AJain9199/AOS16
Board: Memory Controller.kicad_pcb
Folder Memory Controller
Complexity 318 / 1000 (size 233, features 85)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 4
File format KiCad 9 (20241229)
Parts, tracks, vias 49, 933, 116
Triangles, simulation 1,987,404 in 91 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 68 MB 784 MB
STEP 270 MB 804 MB
STL 99 MB 789 MB
OBJ 206 MB 1.3 GB
Visual
GLB 40 MB 852 MB
OBJ 121 MB 904 MB

89. Program Counter

Program Counter: stages 4 and 6 take 52% to 85% of a run. Simulation, GLB takes 9.6 s. Simulation, STEP takes 13 s. Simulation, STL takes 11 s. Simulation, OBJ takes 14 s. Visual, GLB takes 15 s. Visual, OBJ takes 18 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.8 3.3 0.5 ms 4.2 0.1 0.6 0.3 9.6
Simulation, STEP 0.3 0.7 3.4 0.9 ms 4.2 3.7 0.6 0.3 13.0
Simulation, STL 0.3 0.7 3.6 0.5 ms 4.7 0.3 0.6 0.3 10.5
Simulation, OBJ 0.3 0.7 3.4 0.5 ms 4.2 5.1 0.6 0.3 14.5
Visual, GLB 0.3 0.7 3.6 0.8 ms 8.9 0.1 0.8 0.3 14.8
Visual, OBJ 0.3 0.7 3.3 0.5 ms 8.6 4.1 1.0 0.3 18.4
Board Repo: AJain9199/AOS16
Board: Program Counter.kicad_pcb
Folder Program Counter
Complexity 294 / 1000 (size 209, features 85)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 50, 561, 78
Triangles, simulation 848,784 in 87 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 29 MB 429 MB
STEP 140 MB 478 MB
STL 42 MB 403 MB
OBJ 85 MB 610 MB
Visual
GLB 22 MB 638 MB
OBJ 66 MB 612 MB

90. reg4x16

reg4x16: stages 4 and 6 take 50% to 81% of a run. Simulation, GLB takes 4.9 s. Simulation, STEP takes 6.8 s. Simulation, STL takes 5.3 s. Simulation, OBJ takes 7.7 s. Visual, GLB takes 7.0 s. Visual, OBJ takes 8.9 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.4 1.7 0.2 ms 2.1 98 ms 0.3 0.2 4.9
Simulation, STEP 0.2 0.4 1.8 0.2 ms 2.2 1.9 0.3 0.2 6.8
Simulation, STL 0.2 0.4 1.8 0.2 ms 2.3 0.1 0.3 0.2 5.3
Simulation, OBJ 0.2 0.4 1.8 0.2 ms 2.1 2.8 0.3 0.2 7.7
Visual, GLB 0.2 0.4 1.8 0.2 ms 3.9 61 ms 0.4 0.3 7.0
Visual, OBJ 0.2 0.4 1.7 0.3 ms 3.9 2.1 0.4 0.2 8.9
Board Repo: AJain9199/AOS16
Board: reg4x16.kicad_pcb
Folder reg4x16
Complexity 239 / 1000 (size 154, features 85)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 21, 377, 67
Triangles, simulation 525,358 in 40 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 18 MB 323 MB
STEP 84 MB 373 MB
STL 26 MB 316 MB
OBJ 52 MB 399 MB
Visual
GLB 14 MB 426 MB
OBJ 42 MB 429 MB

91. html_accelerator

html_accelerator: stages 4 and 6 take 59% to 86% of a run. Simulation, GLB takes 88 s. Simulation, STEP takes 2 min. Simulation, STL takes 86 s. Simulation, OBJ takes 2 min. Visual, GLB takes 2 min. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.5 8.5 43.3 2 ms 29.7 1.1 3.1 0.6 87.7
Simulation, STEP 1.5 8.0 43.9 2 ms 26.7 17.0 2.9 0.4 100.4
Simulation, STL 1.6 7.5 43.4 2 ms 27.8 2.7 3.0 0.4 86.3
Simulation, OBJ 1.4 7.4 41.0 2 ms 26.8 35.7 3.1 0.3 115.7
Visual, GLB 1.4 7.6 42.6 2 ms 58.3 0.6 6.4 0.4 117.2
Visual, OBJ 1.5 7.7 43.9 2 ms 58.1 22.3 6.5 0.3 140.4
Board Repo: akastanley/html_accelerator
Board: html_accelerator.kicad_pcb
Folder PCB / html_accelerator
Complexity 440 / 1000 (size 280, features 160)
KESE features through vias, rounded,
trapezoid or chamfered pads,
arc tracks, filled zones,
copper drawings,
curved board outline,
knockout text, TrueType text,
stack-up, dielectric εr and tanδ,
copper finish,
mask and silkscreen colours
Tested 9th November 2026
Copper layers 4
File format KiCad 10 (20260206)
Parts, tracks, vias 168, 2,688, 1,305
Triangles, simulation 6,289,994 in 866 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 214 MB 1.7 GB
STEP 930 MB 2.5 GB
STL 315 MB 1.7 GB
OBJ 683 MB 4.1 GB
Visual
GLB 128 MB 2.2 GB
OBJ 418 MB 2.8 GB

92. i386sx-motherboard

i386sx-motherboard: stages 4 and 6 take 47% to 84% of a run. Simulation, GLB takes 50 s. Simulation, STEP takes 63 s. Simulation, STL takes 54 s. Simulation, OBJ takes 87 s. Visual, GLB takes 99 s. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.0 4.8 17.3 0.9 ms 21.5 1.0 3.7 0.4 49.6
Simulation, STEP 1.2 5.0 16.7 1 ms 23.0 13.6 3.6 0.4 63.4
Simulation, STL 1.1 5.1 18.8 0.9 ms 23.0 2.1 3.7 0.4 54.1
Simulation, OBJ 1.0 4.9 17.9 1 ms 23.3 35.4 4.1 0.4 87.0
Visual, GLB 1.2 5.1 18.1 0.9 ms 64.3 0.6 8.9 0.4 98.5
Visual, OBJ 1.1 5.2 18.6 1 ms 64.7 18.7 6.8 0.4 115.5
Board Repo: alphaonex86/fpgamotherboard
Board: i386sx-motherboard.kicad_pcb
Folder i386 / fpga-ep4ce22
Complexity 398 / 1000 (size 298, features 100)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ,
copper finish
Tested 9th November 2026
Copper layers 6
File format KiCad 10 (20260206)
Parts, tracks, vias 148, 5,607, 689
Triangles, simulation 5,728,798 in 229 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 193 MB 1.4 GB
STEP 749 MB 1.9 GB
STL 286 MB 1.4 GB
OBJ 605 MB 3.6 GB
Visual
GLB 111 MB 1.9 GB
OBJ 359 MB 2.3 GB

93. i386sx-gw2ar18

i386sx-gw2ar18: stages 4 and 6 take 46% to 86% of a run. Simulation, GLB takes 33 s. Simulation, STEP takes 41 s. Simulation, STL takes 31 s. Simulation, OBJ takes 52 s. Visual, GLB takes 56 s. Visual, OBJ takes 73 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.9 4.1 10.5 1 ms 14.6 0.6 2.3 0.4 33.3
Simulation, STEP 0.8 3.8 10.8 1 ms 14.4 8.8 2.1 0.3 41.0
Simulation, STL 0.7 3.6 9.9 0.8 ms 13.2 1.4 2.0 0.4 31.2
Simulation, OBJ 0.7 3.4 10.2 1.0 ms 13.5 21.8 1.9 0.3 51.9
Visual, GLB 0.7 3.5 10.0 1 ms 38.7 0.3 2.9 0.3 56.4
Visual, OBJ 0.8 3.5 10.0 0.8 ms 41.5 12.9 3.9 0.3 72.7
Board Repo: alphaonex86/fpgamotherboard
Board: i386sx-gw2ar18.kicad_pcb
Folder i386 / fpga-gw2ar18 / hw
Complexity 373 / 1000 (size 273, features 100)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ,
copper finish
Tested 9th November 2026
Copper layers 6
File format KiCad 10 (20260206)
Parts, tracks, vias 129, 3,277, 357
Triangles, simulation 3,256,002 in 173 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 111 MB 1.0 GB
STEP 449 MB 1.1 GB
STL 163 MB 1.0 GB
OBJ 344 MB 2.1 GB
Visual
GLB 62 MB 1.2 GB
OBJ 194 MB 1.4 GB

94. socket3-csg324

socket3-csg324: stages 4 and 6 take 52% to 85% of a run. Simulation, GLB takes 34 s. Simulation, STEP takes 40 s. Simulation, STL takes 33 s. Simulation, OBJ takes 50 s. Visual, GLB takes 45 s. Visual, OBJ takes 55 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 3.4 13.9 0.9 ms 13.3 0.6 1.5 0.3 33.6
Simulation, STEP 0.6 3.5 14.0 0.8 ms 12.6 7.6 1.3 0.3 40.0
Simulation, STL 0.6 3.3 13.6 0.8 ms 12.8 1.0 1.4 0.3 33.0
Simulation, OBJ 0.6 3.3 13.1 1.0 ms 12.9 18.3 1.3 0.3 49.9
Visual, GLB 0.5 3.3 13.5 0.8 ms 24.4 0.3 2.4 0.2 44.7
Visual, OBJ 0.6 3.3 13.5 0.7 ms 23.5 10.5 3.0 0.3 54.6
Board Repo: alphaonex86/fpgamotherboard
Board: socket3-csg324.kicad_pcb
Folder socket3 / fpga-xc7a50t-csg324 / hw
Complexity 206 / 1000 (size 141, features 65)
KESE features slotted holes, rounded,
trapezoid or chamfered pads,
stack-up, dielectric εr and tanδ,
copper finish
Tested 9th November 2026
Copper layers 6
File format KiCad 10 (20260206)
Parts, tracks, vias 215, 0, 0
Triangles, simulation 3,165,612 in 283 parts
Note mostly unrouted
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 104 MB 972 MB
STEP 369 MB 1.1 GB
STL 158 MB 987 MB
OBJ 336 MB 2.1 GB
Visual
GLB 60 MB 1.2 GB
OBJ 187 MB 1.3 GB

95. socket3-motherboard

socket3-motherboard: stages 4 and 6 take 54% to 84% of a run. Simulation, GLB takes 36 s. Simulation, STEP takes 46 s. Simulation, STL takes 37 s. Simulation, OBJ takes 56 s. Visual, GLB takes 55 s. Visual, OBJ takes 67 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.6 3.7 16.0 0.9 ms 13.2 0.7 1.7 0.3 36.3
Simulation, STEP 0.6 3.6 17.2 1 ms 13.9 8.5 1.7 0.3 45.9
Simulation, STL 0.6 3.9 16.5 1 ms 13.2 1.3 1.6 0.3 37.3
Simulation, OBJ 0.6 3.8 17.0 1 ms 13.5 19.1 1.8 0.3 56.1
Visual, GLB 0.5 3.8 16.8 1 ms 29.1 0.3 4.0 0.3 54.8
Visual, OBJ 0.5 4.0 16.7 1 ms 30.0 10.7 4.7 0.3 67.0
Board Repo: alphaonex86/fpgamotherboard
Board: socket3-motherboard.kicad_pcb
Folder socket3 / hw
Complexity 207 / 1000 (size 142, features 65)
KESE features slotted holes, rounded,
trapezoid or chamfered pads,
stack-up, dielectric εr and tanδ,
copper finish
Tested 9th November 2026
Copper layers 6
File format KiCad 10 (20260206)
Parts, tracks, vias 228, 0, 0
Triangles, simulation 3,409,814 in 283 parts
Note mostly unrouted
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 113 MB 1.0 GB
STEP 417 MB 1.2 GB
STL 171 MB 1.0 GB
OBJ 363 MB 2.2 GB
Visual
GLB 65 MB 1.4 GB
OBJ 203 MB 1.4 GB

96. socket370-ti180

socket370-ti180: stages 4 and 6 take 50% to 82% of a run. Simulation, GLB takes 94 s. Simulation, STEP takes 2 min. Simulation, STL takes 2 min. Simulation, OBJ takes 2 min. Visual, GLB takes 2 min. Visual, OBJ takes 3 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2.2 11.8 34.0 1 ms 37.7 1.9 6.3 0.5 94.4
Simulation, STEP 2.1 12.4 35.5 2 ms 40.3 22.0 6.5 0.5 119.3
Simulation, STL 2.1 12.2 35.3 2 ms 40.1 4.2 5.9 0.5 100.4
Simulation, OBJ 2.1 12.0 35.5 2 ms 39.0 53.1 5.8 0.6 148.1
Visual, GLB 2.3 12.9 35.8 2 ms 85.5 1.0 9.3 0.5 147.3
Visual, OBJ 2.1 12.1 34.2 2 ms 84.3 28.8 11.2 0.4 172.9
Board Repo: alphaonex86/fpgamotherboard
Board: socket370-ti180.kicad_pcb
Folder socket370 / fpga-ti180 / hw
Complexity 470 / 1000 (size 330, features 140)
KESE features through vias, microvias,
slotted holes, rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ,
copper finish
Tested 9th November 2026
Copper layers 6
File format KiCad 10 (20260206)
Parts, tracks, vias 444, 19,588, 1,499
Triangles, simulation 11,191,706 in 332 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 373 MB 2.6 GB
STEP 1.4 GB 3.7 GB
STL 560 MB 2.6 GB
OBJ 1.2 GB 6.9 GB
Visual
GLB 210 MB 3.4 GB
OBJ 677 MB 4.4 GB

97. socket370-ti180

socket370-ti180: stages 4 and 6 take 47% to 83% of a run. Simulation, GLB takes 2 min. Simulation, STEP takes 3 min. Simulation, STL takes 2 min. Simulation, OBJ takes 4 min. Visual, GLB takes 3 min. Visual, OBJ takes 4 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 3.2 17.1 48.4 2 ms 53.7 3.1 9.1 0.5 135.2
Simulation, STEP 2.9 16.8 44.3 2 ms 53.6 29.0 8.9 0.6 156.0
Simulation, STL 3.3 17.4 45.2 2 ms 53.2 5.7 8.3 0.6 133.7
Simulation, OBJ 3.3 17.8 48.1 3 ms 54.9 82.5 9.6 0.6 216.8
Visual, GLB 2.4 15.9 40.7 2 ms 120.3 1.0 14.2 0.5 195.0
Visual, OBJ 2.8 15.2 39.9 2 ms 123.0 38.1 15.0 0.4 234.4
Board Repo: alphaonex86/fpgamotherboard
Board: socket370-ti180.kicad_pcb
Folder socket370 / fpga-ti180 / routed
Complexity 475 / 1000 (size 335, features 140)
KESE features through vias, microvias,
slotted holes, rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ,
copper finish
Tested 9th November 2026 to 10th November 2026
Copper layers 6
File format KiCad 10 (20260206)
Parts, tracks, vias 444, 26,277, 1,932
Triangles, simulation 13,745,814 in 332 parts
Verifier PASS in all six runs
Run again Simulation, GLB; Simulation, STEP; Simulation, STL; Simulation, OBJ: failed in the corpus run, run again with fixes to KESE made after the corpus run, and passed
File
type
File
size
Peak memory
used
Simulation
GLB 461 MB 3.1 GB
STEP 1.7 GB 4.1 GB
STL 687 MB 3.2 GB
OBJ 1.5 GB 8.6 GB
Visual
GLB 253 MB 4.1 GB
OBJ 816 MB 5.3 GB

98. socket370-motherboard

socket370-motherboard: stages 4 and 6 take 50% to 87% of a run. Simulation, GLB takes 2 min. Simulation, STEP takes 3 min. Simulation, STL takes 2 min. Simulation, OBJ takes 4 min. Visual, GLB takes 4 min. Visual, OBJ takes 5 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2.5 12.8 54.9 2 ms 57.2 2.6 9.2 0.5 139.7
Simulation, STEP 2.4 12.3 51.1 2 ms 56.2 32.9 9.6 0.5 165.1
Simulation, STL 2.4 12.6 52.5 2 ms 56.3 6.3 8.4 0.6 139.1
Simulation, OBJ 2.3 12.7 51.3 1 ms 55.0 81.9 8.9 0.6 212.7
Visual, GLB 2.6 12.8 52.7 2 ms 166.1 1.4 15.2 0.5 251.2
Visual, OBJ 2.5 12.4 51.3 2 ms 167.6 40.6 14.0 0.4 288.8
Board Repo: alphaonex86/fpgamotherboard
Board: socket370-motherboard.kicad_pcb
Folder socket370 / fpga-xc7a100t / routed
Complexity 431 / 1000 (size 331, features 100)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ,
copper finish
Tested 9th November 2026
Copper layers 6
File format KiCad 10 (20260206)
Parts, tracks, vias 358, 19,945, 1,241
Triangles, simulation 13,071,934 in 353 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 440 MB 2.9 GB
STEP 1.8 GB 3.8 GB
STL 654 MB 2.8 GB
OBJ 1.4 GB 8.1 GB
Visual
GLB 243 MB 3.9 GB
OBJ 786 MB 4.7 GB

99. socket370-motherboard

socket370-motherboard: stages 4 and 6 take 43% to 84% of a run. Simulation, GLB takes 2 min. Simulation, STEP takes 3 min. Simulation, STL takes 3 min. Simulation, OBJ takes 4 min. Visual, GLB takes 4 min. Visual, OBJ takes 4 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2.4 15.4 51.3 2 ms 57.0 3.2 9.0 0.6 139.0
Simulation, STEP 2.3 16.4 53.7 3 ms 62.7 35.7 8.6 0.6 180.0
Simulation, STL 2.6 16.7 56.7 4 ms 59.0 7.9 9.1 0.6 152.6
Simulation, OBJ 2.5 15.8 51.7 3 ms 57.6 118.4 8.4 0.5 255.0
Visual, GLB 2.6 15.0 51.2 3 ms 129.7 1.4 13.9 0.4 214.1
Visual, OBJ 2.5 15.3 53.3 2 ms 127.9 49.1 12.9 0.5 261.4
Board Repo: alphaonex86/fpgamotherboard
Board: socket370-motherboard.kicad_pcb
Folder socket370 / fpga-xc7a100t
Complexity 427 / 1000 (size 327, features 100)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ,
copper finish
Tested 9th November 2026
Copper layers 8
File format KiCad 10 (20260206)
Parts, tracks, vias 384, 7,419, 1,302
Triangles, simulation 14,919,698 in 366 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 492 MB 3.0 GB
STEP 1.6 GB 4.4 GB
STL 746 MB 2.9 GB
OBJ 1.6 GB 9.2 GB
Visual
GLB 234 MB 3.9 GB
OBJ 780 MB 4.8 GB

100. socket7-ti180

socket7-ti180: stages 4 and 6 take 42% to 80% of a run. Simulation, GLB takes 2 min. Simulation, STEP takes 2 min. Simulation, STL takes 2 min. Simulation, OBJ takes 3 min. Visual, GLB takes 2 min. Visual, OBJ takes 3 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2.4 17.7 35.9 2 ms 40.5 2.6 6.1 0.5 105.5
Simulation, STEP 2.5 17.6 34.3 1 ms 38.9 23.6 6.1 0.6 123.6
Simulation, STL 2.5 17.9 35.6 1 ms 39.6 4.8 6.7 0.5 107.6
Simulation, OBJ 2.3 17.1 33.0 1 ms 37.6 72.0 6.4 0.5 168.9
Visual, GLB 2.4 16.5 33.4 1 ms 81.7 1.1 9.2 0.4 144.7
Visual, OBJ 2.3 16.6 33.0 1 ms 82.1 36.6 9.2 0.4 180.2
Board Repo: alphaonex86/fpgamotherboard
Board: socket7-ti180.kicad_pcb
Folder socket7 / fpga-ti180 / hw
Complexity 463 / 1000 (size 323, features 140)
KESE features through vias, microvias,
slotted holes, rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ,
copper finish
Tested 9th November 2026
Copper layers 8
File format KiCad 10 (20260206)
Parts, tracks, vias 398, 10,910, 1,337
Triangles, simulation 11,463,286 in 308 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 382 MB 2.4 GB
STEP 1.3 GB 3.5 GB
STL 573 MB 2.4 GB
OBJ 1.2 GB 7.1 GB
Visual
GLB 193 MB 3.2 GB
OBJ 630 MB 4.0 GB

101. socket7-ti180

socket7-ti180: stages 4 and 6 take 47% to 82% of a run. Simulation, GLB takes 2 min. Simulation, STEP takes 2 min. Simulation, STL takes 2 min. Simulation, OBJ takes 3 min. Visual, GLB takes 3 min. Visual, OBJ takes 3 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2.3 13.6 37.6 4 ms 45.4 2.2 6.6 0.6 108.3
Simulation, STEP 2.4 14.6 38.3 3 ms 45.8 25.0 7.2 0.5 133.9
Simulation, STL 2.5 13.8 38.6 2 ms 46.3 5.2 6.4 0.5 113.2
Simulation, OBJ 2.4 13.6 37.4 3 ms 45.8 70.0 7.7 0.5 177.5
Visual, GLB 2.2 13.5 34.2 3 ms 95.8 0.9 12.2 0.4 159.1
Visual, OBJ 2.2 12.3 32.9 2 ms 94.8 31.3 11.3 0.3 185.2
Board Repo: alphaonex86/fpgamotherboard
Board: socket7-ti180.kicad_pcb
Folder socket7 / fpga-ti180 / routed
Complexity 463 / 1000 (size 323, features 140)
KESE features through vias, microvias,
slotted holes, rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ,
copper finish
Tested 9th November 2026 to 10th November 2026
Copper layers 6
File format KiCad 10 (20260206)
Parts, tracks, vias 398, 17,224, 1,659
Triangles, simulation 11,779,760 in 306 parts
Verifier PASS in all six runs
Run again Simulation, GLB; Simulation, STEP; Simulation, STL; Simulation, OBJ: failed in the corpus run, run again with fixes to KESE made after the corpus run, and passed
File
type
File
size
Peak memory
used
Simulation
GLB 395 MB 2.6 GB
STEP 1.4 GB 3.7 GB
STL 589 MB 2.6 GB
OBJ 1.2 GB 7.3 GB
Visual
GLB 219 MB 3.5 GB
OBJ 705 MB 4.6 GB

102. socket7-motherboard-hdi1

socket7-motherboard-hdi1: stages 4 and 6 take 48% to 88% of a run. Simulation, GLB takes 2 min. Simulation, STEP takes 3 min. Simulation, STL takes 2 min. Simulation, OBJ takes 3 min. Visual, GLB takes 4 min. Visual, OBJ takes 4 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2.3 12.4 44.9 2 ms 51.3 2.8 8.5 0.5 122.7
Simulation, STEP 2.3 12.5 45.0 2 ms 51.8 29.5 9.6 0.6 151.2
Simulation, STL 2.3 13.7 48.5 2 ms 54.2 5.8 9.0 0.6 134.0
Simulation, OBJ 2.4 12.6 45.6 3 ms 52.2 83.0 8.4 0.5 204.6
Visual, GLB 2.3 12.2 46.9 1 ms 153.7 1.1 10.8 0.4 227.4
Visual, OBJ 2.4 13.2 46.1 2 ms 146.8 33.5 9.7 0.4 252.2
Board Repo: alphaonex86/fpgamotherboard
Board: socket7-motherboard-hdi1.kicad_pcb
Folder socket7 / fpga-xc7a100t / hdi1
Complexity 466 / 1000 (size 326, features 140)
KESE features through vias, microvias,
slotted holes, rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ,
copper finish
Tested 9th November 2026
Copper layers 8
File format KiCad 10 (20260206)
Parts, tracks, vias 313, 11,235, 1,182
Triangles, simulation 13,879,848 in 329 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 468 MB 2.6 GB
STEP 1.6 GB 3.7 GB
STL 694 MB 2.7 GB
OBJ 1.5 GB 8.7 GB
Visual
GLB 215 MB 3.7 GB
OBJ 711 MB 4.4 GB

103. socket7-motherboard

socket7-motherboard: stages 4 and 6 take 45% to 88% of a run. Simulation, GLB takes 2 min. Simulation, STEP takes 2 min. Simulation, STL takes 2 min. Simulation, OBJ takes 4 min. Visual, GLB takes 4 min. Visual, OBJ takes 5 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2.3 10.2 42.5 3 ms 46.0 2.4 7.2 0.5 111.1
Simulation, STEP 2.2 9.2 42.2 1 ms 46.3 28.7 7.8 0.4 136.9
Simulation, STL 3.0 9.4 46.0 2 ms 53.3 6.1 8.5 0.6 126.9
Simulation, OBJ 2.6 10.7 47.3 2 ms 53.0 101.2 9.8 0.5 225.1
Visual, GLB 2.9 9.4 45.8 1 ms 152.1 1.1 13.7 0.4 225.2
Visual, OBJ 2.9 10.5 47.9 1 ms 160.9 50.2 13.3 0.6 286.2
Board Repo: alphaonex86/fpgamotherboard
Board: socket7-motherboard.kicad_pcb
Folder socket7 / fpga-xc7a100t / routed
Complexity 418 / 1000 (size 318, features 100)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ,
copper finish
Tested 9th November 2026
Copper layers 6
File format KiCad 10 (20260206)
Parts, tracks, vias 312, 11,508, 851
Triangles, simulation 10,576,164 in 327 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 357 MB 2.4 GB
STEP 1.4 GB 3.2 GB
STL 529 MB 2.6 GB
OBJ 1.1 GB 6.5 GB
Visual
GLB 198 MB 3.3 GB
OBJ 641 MB 4.1 GB

104. socket7-motherboard

socket7-motherboard: stages 4 and 6 take 42% to 83% of a run. Simulation, GLB takes 2 min. Simulation, STEP takes 3 min. Simulation, STL takes 2 min. Simulation, OBJ takes 4 min. Visual, GLB takes 3 min. Visual, OBJ takes 4 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2.6 15.4 49.4 3 ms 59.3 3.6 9.3 0.6 140.3
Simulation, STEP 2.6 15.3 48.8 1 ms 56.4 33.0 9.2 0.5 165.8
Simulation, STL 2.9 14.8 45.7 2 ms 57.5 8.4 10.2 0.6 140.1
Simulation, OBJ 3.0 14.2 49.1 3 ms 57.3 122.7 8.1 0.6 255.0
Visual, GLB 2.7 14.7 46.7 2 ms 113.2 1.0 13.2 0.4 191.8
Visual, OBJ 2.2 13.4 47.3 3 ms 123.1 48.0 13.5 0.4 248.0
Board Repo: alphaonex86/fpgamotherboard
Board: socket7-motherboard.kicad_pcb
Folder socket7 / fpga-xc7a100t
Complexity 417 / 1000 (size 317, features 100)
KESE features through vias, slotted holes,
rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ,
copper finish
Tested 9th November 2026
Copper layers 8
File format KiCad 10 (20260206)
Parts, tracks, vias 313, 5,113, 1,117
Triangles, simulation 13,152,280 in 329 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 432 MB 2.8 GB
STEP 1.4 GB 3.9 GB
STL 658 MB 2.7 GB
OBJ 1.4 GB 8.1 GB
Visual
GLB 206 MB 3.4 GB
OBJ 688 MB 4.5 GB

105. plusd

plusd: stages 4 and 6 take 58% to 85% of a run. Simulation, GLB takes 30 s. Simulation, STEP takes 36 s. Simulation, STL takes 31 s. Simulation, OBJ takes 43 s. Visual, GLB takes 40 s. Visual, OBJ takes 48 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 2.8 13.4 0.9 ms 11.2 0.4 1.5 0.4 30.2
Simulation, STEP 0.6 2.8 13.3 0.6 ms 10.9 6.5 1.3 0.3 35.8
Simulation, STL 0.5 2.9 13.7 0.7 ms 11.5 1.2 1.3 0.3 31.4
Simulation, OBJ 0.6 2.9 13.4 0.5 ms 11.1 13.0 1.3 0.3 42.6
Visual, GLB 0.5 2.6 13.3 0.7 ms 20.6 0.3 2.4 0.2 39.9
Visual, OBJ 0.5 2.7 13.3 0.5 ms 20.6 8.3 2.4 0.3 48.2
Board Repo: alvaroalea/plusD-clone
Board: plusd.kicad_pcb
Complexity 233 / 1000 (size 188, features 45)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones
Tested 9th November 2026
Copper layers 2
File format KiCad 6 (20211014)
Parts, tracks, vias 62, 1,967, 88
Triangles, simulation 2,590,088 in 119 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 89 MB 789 MB
STEP 452 MB 1.0 GB
STL 130 MB 858 MB
OBJ 274 MB 1.7 GB
Visual
GLB 54 MB 1.0 GB
OBJ 166 MB 1.2 GB

106. plusd_no_route

plusd_no_route: stages 4 and 6 take 56% to 85% of a run. Simulation, GLB takes 16 s. Simulation, STEP takes 20 s. Simulation, STL takes 16 s. Simulation, OBJ takes 24 s. Visual, GLB takes 17 s. Visual, OBJ takes 20 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 1.2 7.3 0.5 ms 5.8 0.2 0.6 0.3 15.6
Simulation, STEP 0.3 1.3 7.3 0.5 ms 6.0 4.5 0.6 0.2 20.1
Simulation, STL 0.2 1.3 7.3 0.5 ms 6.0 0.4 0.5 0.2 16.0
Simulation, OBJ 0.2 1.3 7.5 0.6 ms 6.2 8.3 0.6 0.2 24.2
Visual, GLB 0.2 1.3 7.4 0.6 ms 6.6 91 ms 0.7 0.2 16.6
Visual, OBJ 0.2 1.3 7.3 0.5 ms 6.5 3.4 0.9 0.2 19.8
Board Repo: alvaroalea/plusD-clone
Board: plusd_no_route.kicad_pcb
Complexity 59 / 1000 (size 59, features 0)
Tested 9th November 2026
Copper layers 2
File format KiCad 5 (20171130)
Parts, tracks, vias 47, 0, 0
Triangles, simulation 1,550,978 in 100 parts
Note mostly unrouted
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 49 MB 537 MB
STEP 226 MB 688 MB
STL 78 MB 520 MB
OBJ 159 MB 1.0 GB
Visual
GLB 23 MB 577 MB
OBJ 69 MB 605 MB

107. plusd

plusd: stages 4 and 6 take 58% to 87% of a run. Simulation, GLB takes 25 s. Simulation, STEP takes 31 s. Simulation, STL takes 26 s. Simulation, OBJ takes 35 s. Visual, GLB takes 34 s. Visual, OBJ takes 41 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 1.7 11.5 0.5 ms 9.4 0.4 1.4 0.3 25.1
Simulation, STEP 0.3 1.6 11.5 0.4 ms 9.5 6.3 1.3 0.3 30.9
Simulation, STL 0.3 1.7 12.2 0.9 ms 8.9 0.8 1.3 0.3 25.5
Simulation, OBJ 0.4 1.7 11.3 0.4 ms 8.9 11.0 1.2 0.3 34.9
Visual, GLB 0.3 1.6 11.1 0.5 ms 18.1 0.2 2.2 0.3 33.8
Visual, OBJ 0.4 1.7 11.7 0.8 ms 18.1 6.3 2.4 0.3 40.9
Board Repo: alvaroalea/plusD-clone
Board: plusd.kicad_pcb
Folder Rev_01
Complexity 214 / 1000 (size 179, features 35)
KESE features through vias, filled zones
Tested 9th November 2026
Copper layers 2
File format KiCad 5 (20171130)
Parts, tracks, vias 47, 1,452, 36
Triangles, simulation 2,080,546 in 100 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 72 MB 803 MB
STEP 369 MB 882 MB
STL 104 MB 800 MB
OBJ 219 MB 1.4 GB
Visual
GLB 40 MB 897 MB
OBJ 121 MB 904 MB

108. plusd

plusd: stages 4 and 6 take 56% to 88% of a run. Simulation, GLB takes 26 s. Simulation, STEP takes 32 s. Simulation, STL takes 26 s. Simulation, OBJ takes 38 s. Visual, GLB takes 33 s. Visual, OBJ takes 40 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.4 1.9 12.6 0.4 ms 9.4 0.3 1.2 0.3 26.2
Simulation, STEP 0.4 1.9 12.6 0.4 ms 9.5 6.4 1.2 0.3 32.2
Simulation, STL 0.4 1.8 12.3 0.4 ms 9.0 0.6 1.3 0.2 25.7
Simulation, OBJ 0.4 1.9 12.3 0.4 ms 9.1 13.0 1.1 0.3 38.1
Visual, GLB 0.4 1.8 12.4 0.5 ms 17.0 0.2 1.2 0.2 33.3
Visual, OBJ 0.5 1.8 12.3 0.7 ms 17.1 7.0 1.3 0.2 40.3
Board Repo: alvaroalea/plusD-clone
Board: plusd.kicad_pcb
Folder Rev_02
Complexity 220 / 1000 (size 185, features 35)
KESE features through vias, filled zones
Tested 9th November 2026
Copper layers 2
File format KiCad 5 (20171130)
Parts, tracks, vias 51, 1,835, 91
Triangles, simulation 2,206,132 in 102 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 76 MB 767 MB
STEP 380 MB 929 MB
STL 110 MB 812 MB
OBJ 232 MB 1.5 GB
Visual
GLB 43 MB 940 MB
OBJ 129 MB 952 MB

109. situacion1

situacion1: stages 4 and 6 take 57% to 84% of a run. Simulation, GLB takes 17 s. Simulation, STEP takes 21 s. Simulation, STL takes 16 s. Simulation, OBJ takes 24 s. Visual, GLB takes 17 s. Visual, OBJ takes 21 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 1.4 7.4 0.7 ms 6.3 0.2 0.7 0.3 16.6
Simulation, STEP 0.3 1.4 7.7 0.5 ms 6.7 4.6 0.6 0.3 21.5
Simulation, STL 0.2 1.3 7.4 0.7 ms 6.1 0.5 0.6 0.2 16.3
Simulation, OBJ 0.2 1.4 7.3 0.5 ms 6.4 7.8 0.6 0.2 23.8
Visual, GLB 0.3 1.3 7.4 0.6 ms 6.9 98 ms 0.9 0.2 17.1
Visual, OBJ 0.2 1.4 7.3 0.5 ms 6.9 3.6 1.1 0.2 20.7
Board Repo: alvaroalea/plusD-clone
Board: situacion1.kicad_pcb
Complexity 58 / 1000 (size 58, features 0)
Tested 9th November 2026
Copper layers 2
File format KiCad 5 (20171130)
Parts, tracks, vias 45, 0, 0
Triangles, simulation 1,586,200 in 95 parts
Note mostly unrouted
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 50 MB 550 MB
STEP 231 MB 711 MB
STL 79 MB 526 MB
OBJ 162 MB 1.0 GB
Visual
GLB 24 MB 661 MB
OBJ 71 MB 607 MB

110. SMD500

SMD500: stages 4 and 6 take 57% to 88% of a run. Simulation, GLB takes 4 min. Simulation, STEP takes 5 min. Simulation, STL takes 4 min. Simulation, OBJ takes 5 min. Visual, GLB takes 6 min. Visual, OBJ takes 7 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 3.1 22.3 123.4 3 ms 72.6 3.4 12.2 0.7 237.8
Simulation, STEP 3.5 22.7 121.8 2 ms 73.5 52.0 12.2 0.6 286.2
Simulation, STL 3.2 22.8 122.6 2 ms 68.0 6.6 11.3 0.6 235.1
Simulation, OBJ 3.2 22.0 117.1 2 ms 66.3 101.8 11.8 0.6 322.7
Visual, GLB 3.6 23.3 118.4 3 ms 210.5 2.1 17.5 0.5 375.8
Visual, OBJ 3.2 23.3 122.8 2 ms 194.4 66.0 15.9 0.4 426.0
Board Repo: amigalisa/Amiga-SMD-500
Board: SMD500.kicad_pcb
Complexity 342 / 1000 (size 297, features 45)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones
Tested 9th November 2026
Copper layers 2
File format KiCad 5 (20171130)
Parts, tracks, vias 582, 18,007, 1,862
Triangles, simulation 14,372,138 in 534 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 498 MB 3.7 GB
STEP 2.7 GB 5.2 GB
STL 719 MB 3.9 GB
OBJ 1.6 GB 9.3 GB
Visual
GLB 354 MB 5.3 GB
OBJ 1.1 GB 7.0 GB

111. AmigaPCI 68040

AmigaPCI 68040: stages 4 and 6 take 48% to 82% of a run. Simulation, GLB takes 64 s. Simulation, STEP takes 78 s. Simulation, STL takes 63 s. Simulation, OBJ takes 95 s. Visual, GLB takes 93 s. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 1.9 6.7 22.1 1 ms 26.7 1.3 4.4 0.4 63.6
Simulation, STEP 1.9 6.9 21.9 1 ms 26.4 16.6 4.3 0.4 78.4
Simulation, STL 1.9 6.6 20.4 2 ms 25.6 3.1 4.5 0.4 62.5
Simulation, OBJ 1.7 6.7 20.3 1 ms 25.6 36.1 4.4 0.4 95.3
Visual, GLB 1.9 6.3 21.3 1 ms 55.5 0.6 7.5 0.3 93.4
Visual, OBJ 1.8 6.4 21.4 2 ms 55.5 17.8 6.8 0.3 110.1
Board Repo: AmigaPCI/AmigaPCI-LBC040
Board: AmigaPCI 68040.kicad_pcb
Folder KiCAD / AmigaPCI-LBC040-REV60
Complexity 370 / 1000 (size 285, features 85)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, curved board outline,
stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 6
File format KiCad 8 (20240108)
Parts, tracks, vias 126, 4,520, 563
Triangles, simulation 7,796,750 in 379 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 263 MB 1.8 GB
STEP 981 MB 2.5 GB
STL 390 MB 1.8 GB
OBJ 835 MB 4.9 GB
Visual
GLB 133 MB 2.4 GB
OBJ 436 MB 2.9 GB

112. anavi-light-controller

anavi-light-controller: stages 4 and 6 take 52% to 82% of a run. Simulation, GLB takes 3.6 s. Simulation, STEP takes 5.1 s. Simulation, STL takes 3.8 s. Simulation, OBJ takes 5.4 s. Visual, GLB takes 5.5 s. Visual, OBJ takes 6.9 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 1.7 0.2 ms 1.1 55 ms 0.2 0.2 3.6
Simulation, STEP 0.2 0.3 1.7 0.2 ms 1.2 1.3 0.2 0.2 5.1
Simulation, STL 0.2 0.3 1.8 0.2 ms 1.1 74 ms 0.2 0.2 3.8
Simulation, OBJ 0.1 0.3 1.8 0.2 ms 1.1 1.7 0.2 0.2 5.4
Visual, GLB 0.1 0.3 1.7 0.2 ms 2.8 40 ms 0.3 0.2 5.5
Visual, OBJ 0.1 0.3 1.8 0.5 ms 2.7 1.5 0.3 0.2 6.9
Board Repo: AnaviTechnology/anavi-light-controller
Board: anavi-light-controller.kicad_pcb
Complexity 203 / 1000 (size 138, features 65)
KESE features through vias, slotted holes,
drill offsets, filled zones,
curved board outline
Tested 9th November 2026
Copper layers 2
File format KiCad 4 (4)
Parts, tracks, vias 22, 164, 12
Triangles, simulation 355,398 in 30 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 13 MB 267 MB
STEP 67 MB 292 MB
STL 18 MB 267 MB
OBJ 36 MB 270 MB
Visual
GLB 8.9 MB 265 MB
OBJ 26 MB 265 MB

113. Board 2x06 W15.24

Board 2x06 W15.24: stages 4 and 6 take 40% to 67% of a run. Simulation, GLB takes 1.3 s. Simulation, STEP takes 1.9 s. Simulation, STL takes 1.1 s. Simulation, OBJ takes 1.5 s. Visual, GLB takes 1.2 s. Visual, OBJ takes 1.6 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 82 ms 83 ms 0.3 0.1 ms 0.5 12 ms 39 ms 0.2 1.3
Simulation, STEP 70 ms 65 ms 0.3 0.2 ms 0.5 0.8 39 ms 0.2 1.9
Simulation, STL 71 ms 70 ms 0.3 0.1 ms 0.5 16 ms 49 ms 0.2 1.1
Simulation, OBJ 70 ms 62 ms 0.3 0.2 ms 0.6 0.3 43 ms 0.2 1.5
Visual, GLB 68 ms 63 ms 0.3 0.1 ms 0.6 7 ms 48 ms 0.2 1.2
Visual, OBJ 0.1 71 ms 0.3 0.2 ms 0.6 0.2 51 ms 0.2 1.6
Board Repo: andrewpaterson/658-Computer
Board: Board 2x06 W15.24.kicad_pcb
Folder Kicad / Boards / Blank / Board 2x06 W15.24
Complexity 89 / 1000 (size 34, features 55)
KESE features rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 4, 0, 0
Triangles, simulation 62,080 in 24 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 2.1 MB 70 MB
STEP 6.9 MB 171 MB
STL 3.1 MB 72 MB
OBJ 6.0 MB 83 MB
Visual
GLB 1.3 MB 106 MB
OBJ 3.7 MB 107 MB

114. Board 2x06 W22.86

Board 2x06 W22.86: stages 4 and 6 take 40% to 65% of a run. Simulation, GLB takes 1.3 s. Simulation, STEP takes 2.3 s. Simulation, STL takes 1.5 s. Simulation, OBJ takes 2.0 s. Visual, GLB takes 1.6 s. Visual, OBJ takes 1.9 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 88 ms 0.3 0.1 ms 0.5 12 ms 41 ms 0.3 1.3
Simulation, STEP 0.1 88 ms 0.3 0.1 ms 0.6 0.9 60 ms 0.2 2.3
Simulation, STL 0.1 97 ms 0.3 0.1 ms 0.7 22 ms 60 ms 0.2 1.5
Simulation, OBJ 78 ms 76 ms 0.3 0.2 ms 0.7 0.6 45 ms 0.2 2.0
Visual, GLB 0.1 90 ms 0.3 0.4 ms 0.7 8 ms 61 ms 0.3 1.6
Visual, OBJ 0.1 92 ms 0.3 0.2 ms 0.7 0.3 58 ms 0.2 1.9
Board Repo: andrewpaterson/658-Computer
Board: Board 2x06 W22.86.kicad_pcb
Folder Kicad / Boards / Blank / Board 2x06 W22.86
Complexity 89 / 1000 (size 34, features 55)
KESE features rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 4, 0, 0
Triangles, simulation 61,696 in 24 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 2.0 MB 70 MB
STEP 6.6 MB 171 MB
STL 3.1 MB 71 MB
OBJ 5.9 MB 94 MB
Visual
GLB 1.3 MB 105 MB
OBJ 3.7 MB 104 MB

115. Board 2x12 W15.24

Board 2x12 W15.24: stages 4 and 6 take 44% to 76% of a run. Simulation, GLB takes 1.8 s. Simulation, STEP takes 2.6 s. Simulation, STL takes 1.7 s. Simulation, OBJ takes 2.5 s. Visual, GLB takes 2.5 s. Visual, OBJ takes 2.9 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.1 0.6 0.2 ms 0.7 26 ms 93 ms 0.2 1.8
Simulation, STEP 0.1 0.1 0.5 0.2 ms 0.6 0.9 89 ms 0.3 2.6
Simulation, STL 88 ms 0.1 0.6 0.2 ms 0.6 34 ms 78 ms 0.3 1.7
Simulation, OBJ 86 ms 0.1 0.6 0.3 ms 0.6 0.7 90 ms 0.3 2.5
Visual, GLB 93 ms 0.1 0.5 0.2 ms 1.4 12 ms 83 ms 0.3 2.5
Visual, OBJ 0.1 0.2 0.6 0.2 ms 1.4 0.4 74 ms 0.2 2.9
Board Repo: andrewpaterson/658-Computer
Board: Board 2x12 W15.24.kicad_pcb
Folder Kicad / Boards / Blank / Board 2x12 W15.24
Complexity 89 / 1000 (size 34, features 55)
KESE features rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 4, 0, 0
Triangles, simulation 110,320 in 32 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 3.7 MB 178 MB
STEP 12 MB 188 MB
STL 5.5 MB 182 MB
OBJ 11 MB 175 MB
Visual
GLB 2.2 MB 153 MB
OBJ 6.2 MB 153 MB

116. Board 2x12 W22.86

Board 2x12 W22.86: stages 4 and 6 take 46% to 77% of a run. Simulation, GLB takes 1.9 s. Simulation, STEP takes 2.7 s. Simulation, STL takes 1.7 s. Simulation, OBJ takes 2.4 s. Visual, GLB takes 2.4 s. Visual, OBJ takes 2.7 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 86 ms 0.1 0.6 0.2 ms 0.8 24 ms 98 ms 0.2 1.9
Simulation, STEP 94 ms 0.1 0.5 0.2 ms 0.7 0.9 71 ms 0.3 2.7
Simulation, STL 90 ms 0.1 0.5 0.2 ms 0.7 38 ms 75 ms 0.2 1.7
Simulation, OBJ 84 ms 0.1 0.5 0.2 ms 0.7 0.7 78 ms 0.3 2.4
Visual, GLB 87 ms 0.1 0.6 0.2 ms 1.2 15 ms 81 ms 0.3 2.4
Visual, OBJ 89 ms 0.1 0.5 0.2 ms 1.3 0.3 71 ms 0.3 2.7
Board Repo: andrewpaterson/658-Computer
Board: Board 2x12 W22.86.kicad_pcb
Folder Kicad / Boards / Blank / Board 2x12 W22.86
Complexity 89 / 1000 (size 34, features 55)
KESE features rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 4, 0, 0
Triangles, simulation 109,716 in 32 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 3.6 MB 178 MB
STEP 12 MB 186 MB
STL 5.5 MB 175 MB
OBJ 11 MB 178 MB
Visual
GLB 2.2 MB 153 MB
OBJ 6.1 MB 153 MB

117. Board 2x16 W15.24

Board 2x16 W15.24: stages 4 and 6 take 50% to 79% of a run. Simulation, GLB takes 2.1 s. Simulation, STEP takes 2.9 s. Simulation, STL takes 2.1 s. Simulation, OBJ takes 2.6 s. Visual, GLB takes 2.7 s. Visual, OBJ takes 3.4 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 86 ms 0.2 0.7 0.2 ms 0.8 36 ms 94 ms 0.2 2.1
Simulation, STEP 83 ms 0.1 0.7 0.2 ms 0.8 0.9 98 ms 0.2 2.9
Simulation, STL 0.1 0.2 0.6 0.2 ms 0.8 37 ms 84 ms 0.3 2.1
Simulation, OBJ 84 ms 0.1 0.7 0.2 ms 0.7 0.7 98 ms 0.2 2.6
Visual, GLB 92 ms 0.1 0.7 0.2 ms 1.5 18 ms 0.1 0.2 2.7
Visual, OBJ 0.1 0.1 0.8 0.2 ms 1.5 0.5 75 ms 0.2 3.4
Board Repo: andrewpaterson/658-Computer
Board: Board 2x16 W15.24.kicad_pcb
Folder Kicad / Boards / Blank / Board 2x16 W15.24
Complexity 89 / 1000 (size 34, features 55)
KESE features rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 4, 0, 0
Triangles, simulation 143,440 in 40 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 4.7 MB 184 MB
STEP 15 MB 197 MB
STL 7.2 MB 185 MB
OBJ 14 MB 181 MB
Visual
GLB 2.8 MB 155 MB
OBJ 7.8 MB 157 MB

118. Board 2x16 W22.86

Board 2x16 W22.86: stages 4 and 6 take 48% to 79% of a run. Simulation, GLB takes 1.9 s. Simulation, STEP takes 2.8 s. Simulation, STL takes 1.9 s. Simulation, OBJ takes 2.7 s. Visual, GLB takes 2.5 s. Visual, OBJ takes 2.9 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 84 ms 0.1 0.6 0.2 ms 0.8 26 ms 80 ms 0.2 1.9
Simulation, STEP 85 ms 0.1 0.6 0.2 ms 0.7 0.9 95 ms 0.2 2.8
Simulation, STL 84 ms 0.1 0.6 0.2 ms 0.8 36 ms 91 ms 0.2 1.9
Simulation, OBJ 0.1 0.1 0.6 0.2 ms 0.7 0.8 90 ms 0.3 2.7
Visual, GLB 87 ms 0.1 0.6 0.3 ms 1.3 13 ms 83 ms 0.2 2.5
Visual, OBJ 83 ms 0.1 0.6 0.2 ms 1.3 0.5 94 ms 0.2 2.9
Board Repo: andrewpaterson/658-Computer
Board: Board 2x16 W22.86.kicad_pcb
Folder Kicad / Boards / Blank / Board 2x16 W22.86
Complexity 89 / 1000 (size 34, features 55)
KESE features rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 4, 0, 0
Triangles, simulation 142,752 in 40 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 4.6 MB 184 MB
STEP 15 MB 201 MB
STL 7.1 MB 183 MB
OBJ 14 MB 183 MB
Visual
GLB 2.8 MB 157 MB
OBJ 7.8 MB 154 MB

119. Board 2x20 W15.24

Board 2x20 W15.24: stages 4 and 6 take 50% to 81% of a run. Simulation, GLB takes 2.7 s. Simulation, STEP takes 3.7 s. Simulation, STL takes 2.4 s. Simulation, OBJ takes 3.5 s. Visual, GLB takes 3.5 s. Visual, OBJ takes 3.9 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.2 1.0 0.5 ms 0.9 42 ms 0.2 0.3 2.7
Simulation, STEP 97 ms 0.2 1.0 0.2 ms 0.9 1.1 0.1 0.2 3.7
Simulation, STL 93 ms 0.2 0.9 0.2 ms 0.8 54 ms 0.1 0.2 2.4
Simulation, OBJ 0.1 0.2 0.9 0.3 ms 0.9 1.1 0.1 0.2 3.5
Visual, GLB 97 ms 0.2 1.0 0.2 ms 1.8 29 ms 0.1 0.3 3.5
Visual, OBJ 94 ms 0.2 0.9 0.3 ms 1.7 0.6 0.1 0.3 3.9
Board Repo: andrewpaterson/658-Computer
Board: Board 2x20 W15.24.kicad_pcb
Folder Kicad / Boards / Blank / Board 2x20 W15.24
Complexity 89 / 1000 (size 34, features 55)
KESE features rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 4, 0, 0
Triangles, simulation 176,560 in 48 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 5.8 MB 192 MB
STEP 18 MB 213 MB
STL 8.8 MB 194 MB
OBJ 17 MB 194 MB
Visual
GLB 3.4 MB 171 MB
OBJ 9.5 MB 172 MB

120. Board 2x20 W22.86

Board 2x20 W22.86: stages 4 and 6 take 51% to 78% of a run. Simulation, GLB takes 1.9 s. Simulation, STEP takes 2.7 s. Simulation, STL takes 2.0 s. Simulation, OBJ takes 2.6 s. Visual, GLB takes 2.4 s. Visual, OBJ takes 2.8 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 81 ms 0.1 0.7 0.2 ms 0.7 28 ms 86 ms 0.2 1.9
Simulation, STEP 81 ms 0.1 0.7 0.2 ms 0.7 0.9 80 ms 0.2 2.7
Simulation, STL 73 ms 0.1 0.6 0.2 ms 0.8 44 ms 0.1 0.2 2.0
Simulation, OBJ 73 ms 0.1 0.6 0.2 ms 0.8 0.7 84 ms 0.2 2.6
Visual, GLB 78 ms 0.1 0.6 0.2 ms 1.3 15 ms 0.1 0.2 2.4
Visual, OBJ 75 ms 0.1 0.6 0.2 ms 1.3 0.4 94 ms 0.2 2.8
Board Repo: andrewpaterson/658-Computer
Board: Board 2x20 W22.86.kicad_pcb
Folder Kicad / Boards / Blank / Board 2x20 W22.86
Complexity 89 / 1000 (size 34, features 55)
KESE features rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 4, 0, 0
Triangles, simulation 175,844 in 48 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 5.7 MB 190 MB
STEP 18 MB 213 MB
STL 8.8 MB 194 MB
OBJ 17 MB 194 MB
Visual
GLB 3.3 MB 162 MB
OBJ 9.4 MB 171 MB

121. Board 2x22 W15.24

Board 2x22 W15.24: stages 4 and 6 take 49% to 80% of a run. Simulation, GLB takes 2.2 s. Simulation, STEP takes 3.2 s. Simulation, STL takes 2.1 s. Simulation, OBJ takes 2.8 s. Visual, GLB takes 3.1 s. Visual, OBJ takes 3.6 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 83 ms 0.1 0.8 0.2 ms 0.8 37 ms 95 ms 0.2 2.2
Simulation, STEP 88 ms 0.1 0.8 0.3 ms 0.8 1.0 0.1 0.2 3.2
Simulation, STL 84 ms 0.2 0.7 0.2 ms 0.7 54 ms 0.1 0.2 2.1
Simulation, OBJ 85 ms 0.2 0.7 0.2 ms 0.7 0.9 0.1 0.2 2.8
Visual, GLB 87 ms 0.2 0.8 0.2 ms 1.7 15 ms 0.1 0.2 3.1
Visual, OBJ 86 ms 0.2 0.8 0.2 ms 1.7 0.5 0.1 0.3 3.6
Board Repo: andrewpaterson/658-Computer
Board: Board 2x22 W15.24.kicad_pcb
Folder Kicad / Boards / Blank / Board 2x22 W15.24
Complexity 89 / 1000 (size 34, features 55)
KESE features rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 4, 0, 0
Triangles, simulation 193,120 in 52 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.3 MB 198 MB
STEP 20 MB 219 MB
STL 9.7 MB 198 MB
OBJ 19 MB 198 MB
Visual
GLB 3.6 MB 181 MB
OBJ 10 MB 177 MB

122. Board 2x24 W15.24

Board 2x24 W15.24: stages 4 and 6 take 50% to 80% of a run. Simulation, GLB takes 2.4 s. Simulation, STEP takes 3.4 s. Simulation, STL takes 2.5 s. Simulation, OBJ takes 3.4 s. Visual, GLB takes 3.4 s. Visual, OBJ takes 3.8 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 84 ms 0.2 0.9 0.2 ms 0.8 46 ms 0.1 0.2 2.4
Simulation, STEP 93 ms 0.2 0.9 0.2 ms 0.8 1.1 0.1 0.2 3.4
Simulation, STL 87 ms 0.2 1.0 0.2 ms 0.8 54 ms 0.1 0.2 2.5
Simulation, OBJ 82 ms 0.2 0.9 0.2 ms 0.8 1.1 0.1 0.2 3.4
Visual, GLB 91 ms 0.2 1.0 0.2 ms 1.8 20 ms 0.1 0.2 3.4
Visual, OBJ 91 ms 0.2 0.9 0.2 ms 1.8 0.6 0.1 0.2 3.8
Board Repo: andrewpaterson/658-Computer
Board: Board 2x24 W15.24.kicad_pcb
Folder Kicad / Boards / Blank / Board 2x24 W15.24
Complexity 89 / 1000 (size 34, features 55)
KESE features rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 4, 0, 0
Triangles, simulation 209,680 in 56 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.9 MB 203 MB
STEP 22 MB 224 MB
STL 10 MB 200 MB
OBJ 21 MB 202 MB
Visual
GLB 3.9 MB 190 MB
OBJ 11 MB 190 MB

123. Board 2x24 W22.86

Board 2x24 W22.86: stages 4 and 6 take 50% to 81% of a run. Simulation, GLB takes 2.7 s. Simulation, STEP takes 3.3 s. Simulation, STL takes 2.5 s. Simulation, OBJ takes 3.2 s. Visual, GLB takes 3.2 s. Visual, OBJ takes 3.7 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.2 1.0 0.2 ms 0.9 48 ms 0.1 0.3 2.7
Simulation, STEP 83 ms 0.2 0.9 0.2 ms 0.8 1.0 0.1 0.2 3.3
Simulation, STL 93 ms 0.3 0.9 0.2 ms 0.8 51 ms 0.1 0.2 2.5
Simulation, OBJ 78 ms 0.2 0.7 0.2 ms 1.0 0.9 0.1 0.2 3.2
Visual, GLB 84 ms 0.2 0.8 0.4 ms 1.8 19 ms 0.1 0.2 3.2
Visual, OBJ 69 ms 0.2 0.8 0.2 ms 1.8 0.5 0.1 0.2 3.7
Board Repo: andrewpaterson/658-Computer
Board: Board 2x24 W22.86.kicad_pcb
Folder Kicad / Boards / Blank / Board 2x24 W22.86
Complexity 89 / 1000 (size 34, features 55)
KESE features rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 4, 0, 0
Triangles, simulation 209,084 in 56 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.7 MB 203 MB
STEP 21 MB 223 MB
STL 10 MB 201 MB
OBJ 21 MB 202 MB
Visual
GLB 3.9 MB 189 MB
OBJ 11 MB 191 MB

124. Board 2x28 W15.24

Board 2x28 W15.24: stages 4 and 6 take 53% to 83% of a run. Simulation, GLB takes 2.8 s. Simulation, STEP takes 3.9 s. Simulation, STL takes 2.8 s. Simulation, OBJ takes 4.1 s. Visual, GLB takes 3.9 s. Visual, OBJ takes 4.5 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 98 ms 0.2 1.2 0.2 ms 0.9 47 ms 0.1 0.2 2.8
Simulation, STEP 93 ms 0.2 1.2 0.3 ms 0.9 1.1 0.2 0.2 3.9
Simulation, STL 89 ms 0.2 1.2 0.3 ms 0.9 69 ms 0.1 0.2 2.8
Simulation, OBJ 91 ms 0.2 1.2 0.2 ms 1.0 1.3 0.1 0.2 4.1
Visual, GLB 97 ms 0.2 1.1 0.2 ms 2.1 22 ms 0.1 0.2 3.9
Visual, OBJ 90 ms 0.2 1.1 0.2 ms 2.0 0.7 0.1 0.2 4.5
Board Repo: andrewpaterson/658-Computer
Board: Board 2x28 W15.24.kicad_pcb
Folder Kicad / Boards / Blank / Board 2x28 W15.24
Complexity 89 / 1000 (size 34, features 55)
KESE features rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 4, 0, 0
Triangles, simulation 242,800 in 64 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 7.9 MB 212 MB
STEP 25 MB 237 MB
STL 12 MB 212 MB
OBJ 24 MB 212 MB
Visual
GLB 4.5 MB 214 MB
OBJ 13 MB 211 MB

125. Board 2x28 W22.86

Board 2x28 W22.86: stages 4 and 6 take 51% to 82% of a run. Simulation, GLB takes 2.8 s. Simulation, STEP takes 3.9 s. Simulation, STL takes 2.9 s. Simulation, OBJ takes 4.3 s. Visual, GLB takes 3.6 s. Visual, OBJ takes 4.5 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 94 ms 0.3 1.1 0.5 ms 1.0 39 ms 0.1 0.2 2.8
Simulation, STEP 0.1 0.2 1.1 0.2 ms 1.0 1.1 0.1 0.2 3.9
Simulation, STL 0.1 0.2 1.1 0.3 ms 1.1 61 ms 0.1 0.2 2.9
Simulation, OBJ 0.1 0.2 1.1 0.3 ms 1.1 1.4 0.2 0.2 4.3
Visual, GLB 94 ms 0.2 1.0 0.3 ms 2.0 18 ms 0.1 0.2 3.6
Visual, OBJ 0.1 0.2 1.1 0.2 ms 2.0 0.7 0.1 0.2 4.5
Board Repo: andrewpaterson/658-Computer
Board: Board 2x28 W22.86.kicad_pcb
Folder Kicad / Boards / Blank / Board 2x28 W22.86
Complexity 89 / 1000 (size 34, features 55)
KESE features rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 4, 0, 0
Triangles, simulation 242,128 in 64 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 7.7 MB 211 MB
STEP 25 MB 236 MB
STL 12 MB 211 MB
OBJ 24 MB 217 MB
Visual
GLB 4.5 MB 211 MB
OBJ 13 MB 210 MB

126. Board 2x32 W15.24

Board 2x32 W15.24: stages 4 and 6 take 52% to 84% of a run. Simulation, GLB takes 3.6 s. Simulation, STEP takes 4.7 s. Simulation, STL takes 3.7 s. Simulation, OBJ takes 5.0 s. Visual, GLB takes 4.8 s. Visual, OBJ takes 5.6 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 1.4 0.3 ms 1.4 65 ms 0.2 0.3 3.6
Simulation, STEP 0.1 0.3 1.3 0.3 ms 1.3 1.3 0.2 0.2 4.7
Simulation, STL 0.1 0.2 1.4 0.3 ms 1.4 75 ms 0.2 0.2 3.7
Simulation, OBJ 94 ms 0.2 1.3 0.6 ms 1.3 1.6 0.2 0.2 5.0
Visual, GLB 0.1 0.3 1.5 0.2 ms 2.6 26 ms 0.2 0.2 4.8
Visual, OBJ 0.1 0.3 1.4 0.2 ms 2.5 0.9 0.2 0.3 5.6
Board Repo: andrewpaterson/658-Computer
Board: Board 2x32 W15.24.kicad_pcb
Folder Kicad / Boards / Blank / Board 2x32 W15.24
Complexity 89 / 1000 (size 34, features 55)
KESE features rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 4, 0, 0
Triangles, simulation 275,432 in 72 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 8.6 MB 221 MB
STEP 28 MB 248 MB
STL 14 MB 220 MB
OBJ 27 MB 241 MB
Visual
GLB 5.1 MB 229 MB
OBJ 15 MB 233 MB

127. Board 2x32 W22.86

Board 2x32 W22.86: stages 4 and 6 take 56% to 81% of a run. Simulation, GLB takes 3.2 s. Simulation, STEP takes 4.4 s. Simulation, STL takes 3.3 s. Simulation, OBJ takes 4.4 s. Visual, GLB takes 4.1 s. Visual, OBJ takes 5.2 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.2 1.2 0.3 ms 1.3 52 ms 0.2 0.2 3.2
Simulation, STEP 88 ms 0.2 1.2 0.3 ms 1.3 1.2 0.2 0.3 4.4
Simulation, STL 97 ms 0.2 1.2 0.3 ms 1.3 86 ms 0.2 0.2 3.3
Simulation, OBJ 91 ms 0.2 1.2 0.3 ms 1.2 1.3 0.2 0.2 4.4
Visual, GLB 98 ms 0.2 1.2 0.5 ms 2.2 25 ms 0.2 0.2 4.1
Visual, OBJ 96 ms 0.3 1.4 0.3 ms 2.4 0.7 0.2 0.2 5.2
Board Repo: andrewpaterson/658-Computer
Board: Board 2x32 W22.86.kicad_pcb
Folder Kicad / Boards / Blank / Board 2x32 W22.86
Complexity 89 / 1000 (size 34, features 55)
KESE features rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 4, 0, 0
Triangles, simulation 275,332 in 72 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 8.8 MB 217 MB
STEP 28 MB 248 MB
STL 14 MB 217 MB
OBJ 27 MB 236 MB
Visual
GLB 5.1 MB 225 MB
OBJ 15 MB 222 MB

128. Board 2x36 W22.86

Board 2x36 W22.86: stages 4 and 6 take 55% to 81% of a run. Simulation, GLB takes 4.0 s. Simulation, STEP takes 5.5 s. Simulation, STL takes 3.9 s. Simulation, OBJ takes 5.6 s. Visual, GLB takes 4.8 s. Visual, OBJ takes 5.6 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 1.6 0.4 ms 1.6 65 ms 0.2 0.2 4.0
Simulation, STEP 99 ms 0.3 1.6 0.5 ms 1.5 1.6 0.2 0.2 5.5
Simulation, STL 0.1 0.3 1.6 0.3 ms 1.5 0.1 0.2 0.2 3.9
Simulation, OBJ 99 ms 0.3 1.6 0.3 ms 1.5 1.6 0.2 0.3 5.6
Visual, GLB 0.1 0.3 1.5 0.5 ms 2.4 28 ms 0.2 0.3 4.8
Visual, OBJ 0.1 0.3 1.6 0.6 ms 2.4 0.9 0.2 0.2 5.6
Board Repo: andrewpaterson/658-Computer
Board: Board 2x36 W22.86.kicad_pcb
Folder Kicad / Boards / Blank / Board 2x36 W22.86
Complexity 89 / 1000 (size 34, features 55)
KESE features rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 4, 0, 0
Triangles, simulation 308,308 in 80 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 9.8 MB 228 MB
STEP 31 MB 260 MB
STL 15 MB 228 MB
OBJ 31 MB 235 MB
Visual
GLB 5.7 MB 243 MB
OBJ 16 MB 247 MB

129. Board 2x06 W15.24

Board 2x06 W15.24: reading, start-up and exit take 77% to 89% of a run. Simulation, GLB takes 0.3 s. Simulation, STEP takes 0.3 s. Simulation, STL takes 0.2 s. Simulation, OBJ takes 0.2 s. Visual, GLB takes 0.3 s. Visual, OBJ takes 0.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2 ms 12 ms 6 ms 0.0 ms 8 ms 0.9 ms 3 ms 0.2 0.3
Simulation, STEP 3 ms 18 ms 4 ms 0.1 ms 12 ms 9 ms 2 ms 0.2 0.3
Simulation, STL 2 ms 13 ms 6 ms 0.0 ms 9 ms 0.9 ms 2 ms 0.2 0.2
Simulation, OBJ 2 ms 12 ms 8 ms 0.1 ms 13 ms 2 ms 2 ms 0.2 0.2
Visual, GLB 2 ms 11 ms 14 ms 0.0 ms 28 ms 1 ms 8 ms 0.2 0.3
Visual, OBJ 2 ms 10 ms 14 ms 0.0 ms 26 ms 1 ms 9 ms 0.2 0.3
Board Repo: andrewpaterson/658-Computer
Board: Board 2x06 W15.24.kicad_pcb
Folder Kicad / Boards / Pins / Board 2x06 W15.24
Complexity 47 / 1000 (size 17, features 30)
KESE features stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 0, 0, 0
Triangles, simulation 72 in 3 parts
Note no components
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.3 kB 37 MB
STEP 30 kB 37 MB
STL 3.9 kB 35 MB
OBJ 10 kB 37 MB
Visual
GLB 7.7 kB 41 MB
OBJ 10 kB 41 MB

130. Board 2x06 W22.86

Board 2x06 W22.86: reading, start-up and exit take 76% to 88% of a run. Simulation, GLB takes 0.3 s. Simulation, STEP takes 0.3 s. Simulation, STL takes 0.3 s. Simulation, OBJ takes 0.3 s. Visual, GLB takes 0.3 s. Visual, OBJ takes 0.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 3 ms 14 ms 6 ms 0.0 ms 9 ms 1 ms 2 ms 0.2 0.3
Simulation, STEP 3 ms 17 ms 4 ms 0.0 ms 14 ms 14 ms 3 ms 0.2 0.3
Simulation, STL 3 ms 15 ms 4 ms 0.1 ms 13 ms 1 ms 2 ms 0.2 0.3
Simulation, OBJ 3 ms 17 ms 4 ms 0.1 ms 11 ms 2 ms 2 ms 0.2 0.3
Visual, GLB 4 ms 23 ms 8 ms 0.1 ms 29 ms 2 ms 15 ms 0.2 0.3
Visual, OBJ 2 ms 13 ms 2 ms 0.0 ms 23 ms 2 ms 10 ms 0.2 0.3
Board Repo: andrewpaterson/658-Computer
Board: Board 2x06 W22.86.kicad_pcb
Folder Kicad / Boards / Pins / Board 2x06 W22.86
Complexity 47 / 1000 (size 17, features 30)
KESE features stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 0, 0, 0
Triangles, simulation 72 in 3 parts
Note no components
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.3 kB 37 MB
STEP 30 kB 37 MB
STL 3.9 kB 36 MB
OBJ 10 kB 36 MB
Visual
GLB 7.7 kB 37 MB
OBJ 10 kB 42 MB

131. Board 2x12 W15.24

Board 2x12 W15.24: reading, start-up and exit take 79% to 89% of a run. Simulation, GLB takes 0.2 s. Simulation, STEP takes 0.2 s. Simulation, STL takes 0.3 s. Simulation, OBJ takes 0.3 s. Visual, GLB takes 0.3 s. Visual, OBJ takes 0.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2 ms 13 ms 9 ms 0.0 ms 9 ms 2 ms 2 ms 0.2 0.2
Simulation, STEP 2 ms 14 ms 6 ms 0.1 ms 10 ms 7 ms 1 ms 0.2 0.2
Simulation, STL 2 ms 11 ms 8 ms 0.0 ms 9 ms 1 ms 2 ms 0.2 0.3
Simulation, OBJ 2 ms 15 ms 3 ms 0.1 ms 9 ms 2 ms 3 ms 0.2 0.3
Visual, GLB 2 ms 12 ms 5 ms 0.1 ms 25 ms 2 ms 10 ms 0.3 0.3
Visual, OBJ 2 ms 14 ms 10 ms 0.0 ms 22 ms 2 ms 9 ms 0.2 0.3
Board Repo: andrewpaterson/658-Computer
Board: Board 2x12 W15.24.kicad_pcb
Folder Kicad / Boards / Pins / Board 2x12 W15.24
Complexity 47 / 1000 (size 17, features 30)
KESE features stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 0, 0, 0
Triangles, simulation 72 in 3 parts
Note no components
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.3 kB 37 MB
STEP 29 kB 37 MB
STL 3.9 kB 37 MB
OBJ 10 kB 37 MB
Visual
GLB 7.7 kB 41 MB
OBJ 10 kB 41 MB

132. Board 2x12 W22.86

Board 2x12 W22.86: reading, start-up and exit take 73% to 87% of a run. Simulation, GLB takes 0.3 s. Simulation, STEP takes 0.3 s. Simulation, STL takes 0.3 s. Simulation, OBJ takes 0.2 s. Visual, GLB takes 0.3 s. Visual, OBJ takes 0.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2 ms 14 ms 14 ms 0.0 ms 9 ms 1 ms 2 ms 0.2 0.3
Simulation, STEP 2 ms 11 ms 5 ms 0.0 ms 9 ms 7 ms 2 ms 0.2 0.3
Simulation, STL 3 ms 17 ms 4 ms 0.1 ms 15 ms 2 ms 3 ms 0.2 0.3
Simulation, OBJ 2 ms 15 ms 10 ms 0.1 ms 10 ms 1 ms 2 ms 0.2 0.2
Visual, GLB 3 ms 15 ms 4 ms 0.1 ms 25 ms 1 ms 9 ms 0.3 0.3
Visual, OBJ 2 ms 20 ms 6 ms 0.1 ms 31 ms 2 ms 12 ms 0.2 0.3
Board Repo: andrewpaterson/658-Computer
Board: Board 2x12 W22.86.kicad_pcb
Folder Kicad / Boards / Pins / Board 2x12 W22.86
Complexity 47 / 1000 (size 17, features 30)
KESE features stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 0, 0, 0
Triangles, simulation 72 in 3 parts
Note no components
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.3 kB 35 MB
STEP 29 kB 37 MB
STL 3.9 kB 37 MB
OBJ 10 kB 35 MB
Visual
GLB 7.7 kB 42 MB
OBJ 10 kB 38 MB

133. Board 2x16 W15.24

Board 2x16 W15.24: reading, start-up and exit take 76% to 89% of a run. Simulation, GLB takes 0.2 s. Simulation, STEP takes 0.2 s. Simulation, STL takes 0.3 s. Simulation, OBJ takes 0.2 s. Visual, GLB takes 0.2 s. Visual, OBJ takes 0.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2 ms 10 ms 3 ms 0.0 ms 8 ms 1.0 ms 6 ms 0.2 0.2
Simulation, STEP 2 ms 11 ms 7 ms 0.0 ms 8 ms 6 ms 3 ms 0.2 0.2
Simulation, STL 2 ms 12 ms 6 ms 0.0 ms 9 ms 1 ms 3 ms 0.2 0.3
Simulation, OBJ 2 ms 14 ms 10 ms 0.1 ms 9 ms 1 ms 2 ms 0.2 0.2
Visual, GLB 2 ms 13 ms 15 ms 0.0 ms 15 ms 1 ms 9 ms 0.2 0.2
Visual, OBJ 2 ms 15 ms 6 ms 0.0 ms 25 ms 1 ms 8 ms 0.2 0.3
Board Repo: andrewpaterson/658-Computer
Board: Board 2x16 W15.24.kicad_pcb
Folder Kicad / Boards / Pins / Board 2x16 W15.24
Complexity 47 / 1000 (size 17, features 30)
KESE features stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 0, 0, 0
Triangles, simulation 72 in 3 parts
Note no components
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.3 kB 37 MB
STEP 29 kB 37 MB
STL 3.9 kB 37 MB
OBJ 10 kB 35 MB
Visual
GLB 7.7 kB 36 MB
OBJ 10 kB 41 MB

134. Board 2x16 W22.86

Board 2x16 W22.86: reading, start-up and exit take 79% to 85% of a run. Simulation, GLB takes 0.3 s. Simulation, STEP takes 0.2 s. Simulation, STL takes 0.2 s. Simulation, OBJ takes 0.2 s. Visual, GLB takes 0.3 s. Visual, OBJ takes 0.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2 ms 21 ms 8 ms 0.0 ms 9 ms 1 ms 2 ms 0.2 0.3
Simulation, STEP 2 ms 13 ms 7 ms 0.0 ms 9 ms 6 ms 6 ms 0.2 0.2
Simulation, STL 2 ms 12 ms 11 ms 0.0 ms 13 ms 1.0 ms 2 ms 0.2 0.2
Simulation, OBJ 2 ms 11 ms 14 ms 0.0 ms 8 ms 2 ms 2 ms 0.2 0.2
Visual, GLB 4 ms 13 ms 4 ms 0.0 ms 25 ms 1 ms 9 ms 0.2 0.3
Visual, OBJ 2 ms 16 ms 10 ms 0.1 ms 23 ms 1 ms 7 ms 0.2 0.3
Board Repo: andrewpaterson/658-Computer
Board: Board 2x16 W22.86.kicad_pcb
Folder Kicad / Boards / Pins / Board 2x16 W22.86
Complexity 47 / 1000 (size 17, features 30)
KESE features stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 0, 0, 0
Triangles, simulation 72 in 3 parts
Note no components
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.3 kB 37 MB
STEP 29 kB 37 MB
STL 3.9 kB 35 MB
OBJ 10 kB 35 MB
Visual
GLB 7.7 kB 36 MB
OBJ 10 kB 41 MB

135. Board 2x20 W15.24

Board 2x20 W15.24: reading, start-up and exit take 76% to 87% of a run. Simulation, GLB takes 0.2 s. Simulation, STEP takes 0.2 s. Simulation, STL takes 0.2 s. Simulation, OBJ takes 0.2 s. Visual, GLB takes 0.2 s. Visual, OBJ takes 0.2 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2 ms 10 ms 7 ms 0.0 ms 7 ms 1 ms 4 ms 0.2 0.2
Simulation, STEP 2 ms 12 ms 7 ms 0.0 ms 7 ms 5 ms 4 ms 0.2 0.2
Simulation, STL 2 ms 9 ms 7 ms 0.0 ms 7 ms 1 ms 4 ms 0.2 0.2
Simulation, OBJ 2 ms 10 ms 19 ms 0.1 ms 12 ms 1 ms 1 ms 0.2 0.2
Visual, GLB 2 ms 11 ms 6 ms 0.0 ms 24 ms 1 ms 8 ms 0.2 0.2
Visual, OBJ 2 ms 13 ms 11 ms 0.0 ms 20 ms 1 ms 7 ms 0.2 0.2
Board Repo: andrewpaterson/658-Computer
Board: Board 2x20 W15.24.kicad_pcb
Folder Kicad / Boards / Pins / Board 2x20 W15.24
Complexity 47 / 1000 (size 17, features 30)
KESE features stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 0, 0, 0
Triangles, simulation 72 in 3 parts
Note no components
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.3 kB 37 MB
STEP 29 kB 37 MB
STL 3.9 kB 37 MB
OBJ 10 kB 37 MB
Visual
GLB 7.7 kB 41 MB
OBJ 10 kB 36 MB

136. Board 2x20 W22.86

Board 2x20 W22.86: reading, start-up and exit take 73% to 86% of a run. Simulation, GLB takes 0.2 s. Simulation, STEP takes 0.3 s. Simulation, STL takes 0.3 s. Simulation, OBJ takes 0.2 s. Visual, GLB takes 0.3 s. Visual, OBJ takes 0.2 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2 ms 14 ms 12 ms 0.1 ms 11 ms 1.0 ms 2 ms 0.2 0.2
Simulation, STEP 2 ms 15 ms 7 ms 0.0 ms 9 ms 6 ms 2 ms 0.2 0.3
Simulation, STL 3 ms 19 ms 7 ms 0.1 ms 13 ms 1 ms 3 ms 0.2 0.3
Simulation, OBJ 2 ms 18 ms 3 ms 0.0 ms 13 ms 1 ms 2 ms 0.2 0.2
Visual, GLB 2 ms 11 ms 13 ms 0.1 ms 22 ms 1.0 ms 10 ms 0.2 0.3
Visual, OBJ 2 ms 10 ms 10 ms 0.0 ms 29 ms 1 ms 7 ms 0.2 0.2
Board Repo: andrewpaterson/658-Computer
Board: Board 2x20 W22.86.kicad_pcb
Folder Kicad / Boards / Pins / Board 2x20 W22.86
Complexity 47 / 1000 (size 17, features 30)
KESE features stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 0, 0, 0
Triangles, simulation 72 in 3 parts
Note no components
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.3 kB 35 MB
STEP 29 kB 37 MB
STL 3.9 kB 37 MB
OBJ 10 kB 36 MB
Visual
GLB 7.7 kB 41 MB
OBJ 10 kB 36 MB

137. Board 2x22 W15.24

Board 2x22 W15.24: reading, start-up and exit take 78% to 88% of a run. Simulation, GLB takes 0.3 s. Simulation, STEP takes 0.3 s. Simulation, STL takes 0.3 s. Simulation, OBJ takes 0.3 s. Visual, GLB takes 0.3 s. Visual, OBJ takes 0.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2 ms 15 ms 7 ms 0.0 ms 9 ms 1 ms 4 ms 0.2 0.3
Simulation, STEP 2 ms 18 ms 6 ms 0.0 ms 18 ms 8 ms 2 ms 0.2 0.3
Simulation, STL 2 ms 14 ms 7 ms 0.0 ms 9 ms 1.0 ms 2 ms 0.2 0.3
Simulation, OBJ 2 ms 15 ms 6 ms 0.0 ms 10 ms 2 ms 2 ms 0.2 0.3
Visual, GLB 3 ms 13 ms 9 ms 0.1 ms 30 ms 1 ms 17 ms 0.2 0.3
Visual, OBJ 2 ms 13 ms 5 ms 0.0 ms 30 ms 1 ms 10 ms 0.3 0.3
Board Repo: andrewpaterson/658-Computer
Board: Board 2x22 W15.24.kicad_pcb
Folder Kicad / Boards / Pins / Board 2x22 W15.24
Complexity 47 / 1000 (size 17, features 30)
KESE features stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 0, 0, 0
Triangles, simulation 72 in 3 parts
Note no components
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.3 kB 36 MB
STEP 29 kB 37 MB
STL 3.9 kB 36 MB
OBJ 10 kB 36 MB
Visual
GLB 7.7 kB 40 MB
OBJ 10 kB 41 MB

138. Board 2x24 W15.24

Board 2x24 W15.24: reading, start-up and exit take 78% to 89% of a run. Simulation, GLB takes 0.3 s. Simulation, STEP takes 0.3 s. Simulation, STL takes 0.2 s. Simulation, OBJ takes 0.3 s. Visual, GLB takes 0.3 s. Visual, OBJ takes 0.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 3 ms 16 ms 4 ms 0.1 ms 14 ms 1 ms 3 ms 0.3 0.3
Simulation, STEP 3 ms 15 ms 5 ms 0.1 ms 14 ms 10 ms 2 ms 0.2 0.3
Simulation, STL 2 ms 11 ms 10 ms 0.0 ms 9 ms 0.9 ms 2 ms 0.2 0.2
Simulation, OBJ 3 ms 13 ms 4 ms 0.1 ms 9 ms 2 ms 2 ms 0.2 0.3
Visual, GLB 2 ms 15 ms 6 ms 0.0 ms 26 ms 1 ms 10 ms 0.2 0.3
Visual, OBJ 3 ms 17 ms 4 ms 0.1 ms 25 ms 2 ms 12 ms 0.3 0.3
Board Repo: andrewpaterson/658-Computer
Board: Board 2x24 W15.24.kicad_pcb
Folder Kicad / Boards / Pins / Board 2x24 W15.24
Complexity 47 / 1000 (size 17, features 30)
KESE features stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 0, 0, 0
Triangles, simulation 72 in 3 parts
Note no components
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.3 kB 37 MB
STEP 29 kB 37 MB
STL 3.9 kB 35 MB
OBJ 10 kB 37 MB
Visual
GLB 7.7 kB 41 MB
OBJ 10 kB 41 MB

139. Board 2x24 W22.86

Board 2x24 W22.86: reading, start-up and exit take 78% to 88% of a run. Simulation, GLB takes 0.3 s. Simulation, STEP takes 0.3 s. Simulation, STL takes 0.3 s. Simulation, OBJ takes 0.3 s. Visual, GLB takes 0.3 s. Visual, OBJ takes 0.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 3 ms 15 ms 5 ms 0.1 ms 13 ms 2 ms 3 ms 0.3 0.3
Simulation, STEP 2 ms 22 ms 4 ms 0.1 ms 13 ms 11 ms 2 ms 0.3 0.3
Simulation, STL 2 ms 13 ms 11 ms 0.0 ms 9 ms 1 ms 2 ms 0.2 0.3
Simulation, OBJ 3 ms 15 ms 4 ms 0.1 ms 15 ms 2 ms 2 ms 0.3 0.3
Visual, GLB 2 ms 16 ms 7 ms 0.1 ms 26 ms 1 ms 9 ms 0.2 0.3
Visual, OBJ 2 ms 13 ms 5 ms 0.0 ms 23 ms 2 ms 10 ms 0.2 0.3
Board Repo: andrewpaterson/658-Computer
Board: Board 2x24 W22.86.kicad_pcb
Folder Kicad / Boards / Pins / Board 2x24 W22.86
Complexity 47 / 1000 (size 17, features 30)
KESE features stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 0, 0, 0
Triangles, simulation 72 in 3 parts
Note no components
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.3 kB 37 MB
STEP 29 kB 37 MB
STL 3.9 kB 37 MB
OBJ 10 kB 37 MB
Visual
GLB 7.7 kB 38 MB
OBJ 10 kB 41 MB

140. Board 2x28 W15.24

Board 2x28 W15.24: reading, start-up and exit take 76% to 87% of a run. Simulation, GLB takes 0.2 s. Simulation, STEP takes 0.2 s. Simulation, STL takes 0.2 s. Simulation, OBJ takes 0.2 s. Visual, GLB takes 0.2 s. Visual, OBJ takes 0.2 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2 ms 11 ms 7 ms 0.0 ms 9 ms 1 ms 2 ms 0.2 0.2
Simulation, STEP 2 ms 10 ms 11 ms 0.1 ms 13 ms 7 ms 2 ms 0.2 0.2
Simulation, STL 2 ms 13 ms 6 ms 0.0 ms 9 ms 1 ms 2 ms 0.2 0.2
Simulation, OBJ 2 ms 14 ms 3 ms 0.0 ms 8 ms 1 ms 2 ms 0.2 0.2
Visual, GLB 2 ms 10 ms 8 ms 0.0 ms 24 ms 1 ms 8 ms 0.2 0.2
Visual, OBJ 2 ms 10 ms 13 ms 0.0 ms 20 ms 2 ms 9 ms 0.2 0.2
Board Repo: andrewpaterson/658-Computer
Board: Board 2x28 W15.24.kicad_pcb
Folder Kicad / Boards / Pins / Board 2x28 W15.24
Complexity 47 / 1000 (size 17, features 30)
KESE features stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 0, 0, 0
Triangles, simulation 72 in 3 parts
Note no components
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.3 kB 35 MB
STEP 30 kB 36 MB
STL 3.9 kB 37 MB
OBJ 10 kB 37 MB
Visual
GLB 7.7 kB 36 MB
OBJ 10 kB 41 MB

141. Board 2x28 W22.86

Board 2x28 W22.86: reading, start-up and exit take 78% to 88% of a run. Simulation, GLB takes 0.2 s. Simulation, STEP takes 0.3 s. Simulation, STL takes 0.2 s. Simulation, OBJ takes 0.3 s. Visual, GLB takes 0.3 s. Visual, OBJ takes 0.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2 ms 10 ms 7 ms 0.0 ms 8 ms 1 ms 3 ms 0.2 0.2
Simulation, STEP 2 ms 15 ms 3 ms 0.0 ms 7 ms 5 ms 2 ms 0.2 0.3
Simulation, STL 2 ms 11 ms 6 ms 0.1 ms 9 ms 1 ms 2 ms 0.2 0.2
Simulation, OBJ 2 ms 14 ms 10 ms 0.1 ms 8 ms 1 ms 3 ms 0.2 0.3
Visual, GLB 2 ms 15 ms 5 ms 0.0 ms 26 ms 2 ms 12 ms 0.2 0.3
Visual, OBJ 2 ms 12 ms 7 ms 0.0 ms 23 ms 2 ms 9 ms 0.2 0.3
Board Repo: andrewpaterson/658-Computer
Board: Board 2x28 W22.86.kicad_pcb
Folder Kicad / Boards / Pins / Board 2x28 W22.86
Complexity 47 / 1000 (size 17, features 30)
KESE features stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 0, 0, 0
Triangles, simulation 72 in 3 parts
Note no components
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.3 kB 37 MB
STEP 30 kB 37 MB
STL 3.9 kB 36 MB
OBJ 10 kB 37 MB
Visual
GLB 7.7 kB 38 MB
OBJ 10 kB 41 MB

142. Board 2x32 W15.24

Board 2x32 W15.24: reading, start-up and exit take 78% to 87% of a run. Simulation, GLB takes 0.3 s. Simulation, STEP takes 0.3 s. Simulation, STL takes 0.3 s. Simulation, OBJ takes 0.3 s. Visual, GLB takes 0.3 s. Visual, OBJ takes 0.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2 ms 14 ms 5 ms 0.1 ms 16 ms 2 ms 3 ms 0.2 0.3
Simulation, STEP 2 ms 13 ms 9 ms 0.1 ms 12 ms 9 ms 3 ms 0.2 0.3
Simulation, STL 3 ms 17 ms 7 ms 0.1 ms 14 ms 2 ms 3 ms 0.2 0.3
Simulation, OBJ 2 ms 12 ms 10 ms 0.1 ms 8 ms 1 ms 2 ms 0.2 0.3
Visual, GLB 3 ms 17 ms 6 ms 0.1 ms 28 ms 2 ms 13 ms 0.3 0.3
Visual, OBJ 3 ms 12 ms 7 ms 0.0 ms 27 ms 1 ms 10 ms 0.2 0.3
Board Repo: andrewpaterson/658-Computer
Board: Board 2x32 W15.24.kicad_pcb
Folder Kicad / Boards / Pins / Board 2x32 W15.24
Complexity 47 / 1000 (size 17, features 30)
KESE features stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 0, 0, 0
Triangles, simulation 72 in 3 parts
Note no components
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.3 kB 37 MB
STEP 29 kB 37 MB
STL 3.9 kB 37 MB
OBJ 10 kB 37 MB
Visual
GLB 7.7 kB 40 MB
OBJ 10 kB 41 MB

143. Board 2x32 W22.86

Board 2x32 W22.86: reading, start-up and exit take 79% to 87% of a run. Simulation, GLB takes 0.3 s. Simulation, STEP takes 0.3 s. Simulation, STL takes 0.3 s. Simulation, OBJ takes 0.3 s. Visual, GLB takes 0.3 s. Visual, OBJ takes 0.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 3 ms 14 ms 4 ms 0.1 ms 14 ms 1 ms 3 ms 0.2 0.3
Simulation, STEP 2 ms 12 ms 9 ms 0.0 ms 10 ms 7 ms 2 ms 0.2 0.3
Simulation, STL 3 ms 20 ms 7 ms 0.0 ms 9 ms 0.9 ms 2 ms 0.2 0.3
Simulation, OBJ 2 ms 14 ms 7 ms 0.1 ms 15 ms 2 ms 2 ms 0.2 0.3
Visual, GLB 3 ms 14 ms 5 ms 0.0 ms 21 ms 1 ms 10 ms 0.2 0.3
Visual, OBJ 2 ms 14 ms 7 ms 0.0 ms 23 ms 1 ms 9 ms 0.2 0.3
Board Repo: andrewpaterson/658-Computer
Board: Board 2x32 W22.86.kicad_pcb
Folder Kicad / Boards / Pins / Board 2x32 W22.86
Complexity 47 / 1000 (size 17, features 30)
KESE features stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 0, 0, 0
Triangles, simulation 72 in 3 parts
Note no components
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.3 kB 37 MB
STEP 29 kB 37 MB
STL 3.9 kB 37 MB
OBJ 10 kB 37 MB
Visual
GLB 7.7 kB 38 MB
OBJ 10 kB 37 MB

144. Board 2x36 W22.86

Board 2x36 W22.86: reading, start-up and exit take 75% to 87% of a run. Simulation, GLB takes 0.2 s. Simulation, STEP takes 0.2 s. Simulation, STL takes 0.2 s. Simulation, OBJ takes 0.2 s. Visual, GLB takes 0.2 s. Visual, OBJ takes 0.2 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 2 ms 14 ms 8 ms 0.0 ms 8 ms 1 ms 2 ms 0.2 0.2
Simulation, STEP 2 ms 9 ms 5 ms 0.0 ms 7 ms 5 ms 8 ms 0.2 0.2
Simulation, STL 2 ms 16 ms 4 ms 0.0 ms 7 ms 0.7 ms 7 ms 0.2 0.2
Simulation, OBJ 2 ms 11 ms 3 ms 0.0 ms 6 ms 1.0 ms 8 ms 0.2 0.2
Visual, GLB 2 ms 8 ms 8 ms 0.0 ms 28 ms 1 ms 10 ms 0.2 0.2
Visual, OBJ 2 ms 11 ms 7 ms 0.0 ms 24 ms 1 ms 9 ms 0.2 0.2
Board Repo: andrewpaterson/658-Computer
Board: Board 2x36 W22.86.kicad_pcb
Folder Kicad / Boards / Pins / Board 2x36 W22.86
Complexity 47 / 1000 (size 17, features 30)
KESE features stack-up, dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 0, 0, 0
Triangles, simulation 72 in 3 parts
Note no components
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.3 kB 37 MB
STEP 29 kB 37 MB
STL 3.9 kB 37 MB
OBJ 10 kB 37 MB
Visual
GLB 7.7 kB 40 MB
OBJ 10 kB 38 MB

145. Audio Address Decode

Audio Address Decode: stages 4 and 6 take 49% to 80% of a run. Simulation, GLB takes 2.5 s. Simulation, STEP takes 3.5 s. Simulation, STL takes 2.5 s. Simulation, OBJ takes 3.7 s. Visual, GLB takes 3.5 s. Visual, OBJ takes 4.5 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.2 1.0 0.2 ms 0.8 37 ms 0.1 0.2 2.5
Simulation, STEP 0.1 0.2 1.0 0.2 ms 0.8 1.0 0.1 0.2 3.5
Simulation, STL 0.1 0.2 1.0 0.2 ms 0.8 52 ms 0.1 0.2 2.5
Simulation, OBJ 0.1 0.2 0.9 0.2 ms 0.9 1.2 0.1 0.2 3.7
Visual, GLB 0.1 0.2 0.9 0.2 ms 1.8 28 ms 0.2 0.2 3.5
Visual, OBJ 0.1 0.2 1.0 0.2 ms 1.8 0.9 0.2 0.2 4.5
Board Repo: andrewpaterson/658-Computer
Board: Audio Address Decode.kicad_pcb
Folder Kicad / Computer / Audio / Audio Address Decode
Complexity 205 / 1000 (size 135, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 8, 237, 28
Triangles, simulation 236,188 in 37 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 8.2 MB 219 MB
STEP 37 MB 245 MB
STL 12 MB 216 MB
OBJ 24 MB 214 MB
Visual
GLB 6.1 MB 211 MB
OBJ 18 MB 216 MB

146. Audio Board

Audio Board: stages 4 and 6 take 53% to 86% of a run. Simulation, GLB takes 35 s. Simulation, STEP takes 43 s. Simulation, STL takes 35 s. Simulation, OBJ takes 53 s. Visual, GLB takes 54 s. Visual, OBJ takes 65 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 2.9 16.3 0.8 ms 12.6 0.6 1.8 0.3 34.9
Simulation, STEP 0.5 2.9 16.1 0.9 ms 12.8 8.9 1.7 0.3 43.2
Simulation, STL 0.5 2.8 15.7 0.9 ms 13.0 1.0 1.8 0.3 35.0
Simulation, OBJ 0.4 2.8 16.1 0.9 ms 12.2 19.5 1.9 0.3 53.3
Visual, GLB 0.4 2.8 16.5 1 ms 30.1 0.3 3.9 0.2 54.3
Visual, OBJ 0.5 2.8 16.0 0.9 ms 28.7 12.6 3.9 0.3 64.8
Board Repo: andrewpaterson/658-Computer
Board: Audio Board.kicad_pcb
Folder Kicad / Computer / Audio / Audio Board
Complexity 263 / 1000 (size 183, features 80)
KESE features through vias, rounded,
trapezoid or chamfered pads,
curved board outline,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 23, 2,507, 229
Triangles, simulation 3,598,500 in 299 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 120 MB 1.2 GB
STEP 501 MB 1.4 GB
STL 180 MB 1.1 GB
OBJ 377 MB 2.3 GB
Visual
GLB 78 MB 1.6 GB
OBJ 248 MB 1.7 GB

147. Audio Clock

Audio Clock: stages 4 and 6 take 49% to 78% of a run. Simulation, GLB takes 5.4 s. Simulation, STEP takes 6.1 s. Simulation, STL takes 4.4 s. Simulation, OBJ takes 6.8 s. Visual, GLB takes 7.4 s. Visual, OBJ takes 9.0 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.5 1.7 0.4 ms 2.3 72 ms 0.3 0.3 5.4
Simulation, STEP 0.2 0.5 1.6 0.5 ms 1.7 1.5 0.3 0.3 6.1
Simulation, STL 0.1 0.4 1.6 0.3 ms 1.6 0.1 0.3 0.2 4.4
Simulation, OBJ 0.3 0.5 1.6 0.5 ms 1.7 2.2 0.3 0.3 6.8
Visual, GLB 0.2 0.4 1.7 0.4 ms 4.1 67 ms 0.7 0.3 7.4
Visual, OBJ 0.2 0.5 1.4 0.3 ms 4.1 1.9 0.7 0.3 9.0
Board Repo: andrewpaterson/658-Computer
Board: Audio Clock.kicad_pcb
Folder Kicad / Computer / Audio / Audio Clock
Complexity 227 / 1000 (size 157, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 23, 449, 67
Triangles, simulation 413,586 in 67 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 14 MB 268 MB
STEP 62 MB 323 MB
STL 21 MB 269 MB
OBJ 42 MB 330 MB
Visual
GLB 11 MB 343 MB
OBJ 34 MB 329 MB

148. Blitter Board

Blitter Board: stages 4 and 6 take 51% to 85% of a run. Simulation, GLB takes 35 s. Simulation, STEP takes 43 s. Simulation, STL takes 35 s. Simulation, OBJ takes 58 s. Visual, GLB takes 57 s. Visual, OBJ takes 72 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 3.1 16.5 1 ms 11.8 0.6 1.8 0.3 34.5
Simulation, STEP 0.5 3.0 16.5 1 ms 11.8 9.2 1.7 0.3 42.9
Simulation, STL 0.5 3.1 16.1 1 ms 11.4 1.4 1.8 0.3 34.6
Simulation, OBJ 0.5 3.0 18.0 1 ms 11.6 22.7 1.9 0.3 57.9
Visual, GLB 0.5 3.4 16.4 1 ms 32.0 0.4 3.8 0.2 56.9
Visual, OBJ 0.5 3.1 16.4 1 ms 33.9 13.8 4.1 0.3 72.1
Board Repo: andrewpaterson/658-Computer
Board: Blitter Board.kicad_pcb
Folder Kicad / Computer / Blitter / Blitter Board
Complexity 264 / 1000 (size 184, features 80)
KESE features through vias, rounded,
trapezoid or chamfered pads,
curved board outline,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 22, 2,712, 230
Triangles, simulation 3,921,994 in 339 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 131 MB 1.3 GB
STEP 550 MB 1.5 GB
STL 196 MB 1.3 GB
OBJ 412 MB 2.5 GB
Visual
GLB 86 MB 1.5 GB
OBJ 272 MB 1.8 GB

149. Added 8bit

Added 8bit: stages 4 and 6 take 48% to 81% of a run. Simulation, GLB takes 3.0 s. Simulation, STEP takes 4.3 s. Simulation, STL takes 3.3 s. Simulation, OBJ takes 4.7 s. Visual, GLB takes 4.3 s. Visual, OBJ takes 5.6 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 1.2 0.1 ms 1.1 47 ms 0.2 0.2 3.0
Simulation, STEP 0.1 0.3 1.3 0.2 ms 1.0 1.2 0.2 0.2 4.3
Simulation, STL 0.1 0.3 1.2 0.2 ms 1.1 67 ms 0.2 0.2 3.3
Simulation, OBJ 0.1 0.3 1.2 0.1 ms 1.1 1.7 0.2 0.2 4.7
Visual, GLB 0.1 0.3 1.1 0.2 ms 2.4 33 ms 0.2 0.2 4.3
Visual, OBJ 0.1 0.3 1.1 0.2 ms 2.4 1.3 0.3 0.2 5.6
Board Repo: andrewpaterson/658-Computer
Board: Added 8bit.kicad_pcb
Folder Kicad / Computer / Component Boards / Added 8bit
Complexity 206 / 1000 (size 136, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 7, 238, 43
Triangles, simulation 301,014 in 39 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 10 MB 245 MB
STEP 46 MB 265 MB
STL 15 MB 245 MB
OBJ 30 MB 245 MB
Visual
GLB 7.3 MB 245 MB
OBJ 22 MB 251 MB

150. Adder 16bit

Adder 16bit: stages 4 and 6 take 50% to 83% of a run. Simulation, GLB takes 6.3 s. Simulation, STEP takes 8.6 s. Simulation, STL takes 6.9 s. Simulation, OBJ takes 8.8 s. Visual, GLB takes 10 s. Visual, OBJ takes 12 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.5 2.4 0.5 ms 2.3 0.1 0.5 0.3 6.3
Simulation, STEP 0.2 0.5 2.5 0.7 ms 2.4 2.3 0.5 0.3 8.6
Simulation, STL 0.2 0.7 2.8 0.4 ms 2.5 0.2 0.3 0.2 6.9
Simulation, OBJ 0.2 0.6 2.3 0.3 ms 2.1 3.0 0.4 0.2 8.8
Visual, GLB 0.2 0.6 2.6 0.7 ms 5.7 67 ms 0.6 0.2 10.0
Visual, OBJ 0.1 0.5 2.5 0.3 ms 5.9 2.1 0.6 0.2 12.0
Board Repo: andrewpaterson/658-Computer
Board: Adder 16bit.kicad_pcb
Folder Kicad / Computer / Component Boards / Adder 16bit
Complexity 225 / 1000 (size 155, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 11, 627, 83
Triangles, simulation 565,568 in 65 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 20 MB 343 MB
STEP 90 MB 369 MB
STL 28 MB 335 MB
OBJ 57 MB 418 MB
Visual
GLB 14 MB 388 MB
OBJ 42 MB 391 MB

151. Address Buffer 16bit

Address Buffer 16bit: stages 4 and 6 take 50% to 81% of a run. Simulation, GLB takes 4.9 s. Simulation, STEP takes 6.4 s. Simulation, STL takes 4.9 s. Simulation, OBJ takes 7.3 s. Visual, GLB takes 7.7 s. Visual, OBJ takes 9.9 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.5 2.0 0.2 ms 1.7 0.1 0.3 0.2 4.9
Simulation, STEP 0.2 0.5 1.9 0.3 ms 1.6 1.8 0.3 0.2 6.4
Simulation, STL 0.2 0.5 2.0 0.2 ms 1.7 0.1 0.3 0.2 4.9
Simulation, OBJ 0.2 0.5 2.0 0.3 ms 1.7 2.4 0.3 0.2 7.3
Visual, GLB 0.2 0.5 2.0 0.4 ms 4.2 61 ms 0.5 0.2 7.7
Visual, OBJ 0.2 0.5 2.0 0.3 ms 4.1 2.2 0.7 0.2 9.9
Board Repo: andrewpaterson/658-Computer
Board: Address Buffer 16bit.kicad_pcb
Folder Kicad / Computer / Component Boards / Address Buffer 16bit
Complexity 231 / 1000 (size 161, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 20, 636, 77
Triangles, simulation 484,576 in 63 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 17 MB 284 MB
STEP 80 MB 352 MB
STL 24 MB 287 MB
OBJ 49 MB 378 MB
Visual
GLB 13 MB 367 MB
OBJ 39 MB 376 MB

152. Address Buffer 24bit

Address Buffer 24bit: stages 4 and 6 take 50% to 83% of a run. Simulation, GLB takes 8.4 s. Simulation, STEP takes 10 s. Simulation, STL takes 8.2 s. Simulation, OBJ takes 12 s. Visual, GLB takes 12 s. Visual, OBJ takes 15 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.9 3.3 0.4 ms 3.2 0.1 0.5 0.2 8.4
Simulation, STEP 0.3 0.8 3.3 0.3 ms 2.9 2.4 0.5 0.2 10.3
Simulation, STL 0.3 0.8 3.2 0.4 ms 3.0 0.2 0.4 0.3 8.2
Simulation, OBJ 0.2 0.8 3.3 0.5 ms 2.9 4.3 0.6 0.3 12.4
Visual, GLB 0.3 0.9 3.4 0.4 ms 6.3 99 ms 0.5 0.3 11.8
Visual, OBJ 0.2 0.8 3.5 0.4 ms 6.3 3.4 0.5 0.2 15.1
Board Repo: andrewpaterson/658-Computer
Board: Address Buffer 24bit.kicad_pcb
Folder Kicad / Computer / Component Boards / Address Buffer 24bit
Complexity 239 / 1000 (size 169, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 28, 857, 114
Triangles, simulation 684,690 in 87 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 24 MB 344 MB
STEP 112 MB 427 MB
STL 34 MB 357 MB
OBJ 70 MB 510 MB
Visual
GLB 18 MB 503 MB
OBJ 55 MB 495 MB

153. Audio DAC

Audio DAC: stages 4 and 6 take 49% to 81% of a run. Simulation, GLB takes 4.5 s. Simulation, STEP takes 6.4 s. Simulation, STL takes 4.6 s. Simulation, OBJ takes 6.8 s. Visual, GLB takes 7.1 s. Visual, OBJ takes 8.9 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.5 1.7 0.3 ms 1.6 83 ms 0.3 0.2 4.5
Simulation, STEP 0.2 0.5 1.9 0.3 ms 1.8 1.6 0.3 0.3 6.4
Simulation, STL 0.2 0.4 1.8 0.3 ms 1.6 0.1 0.3 0.2 4.6
Simulation, OBJ 0.2 0.5 1.8 0.2 ms 1.5 2.3 0.3 0.2 6.8
Visual, GLB 0.2 0.4 1.8 0.5 ms 4.0 59 ms 0.5 0.2 7.1
Visual, OBJ 0.2 0.5 1.9 0.5 ms 4.0 1.6 0.5 0.3 8.9
Board Repo: andrewpaterson/658-Computer
Board: Audio DAC.kicad_pcb
Folder Kicad / Computer / Component Boards / Audio DAC
Complexity 228 / 1000 (size 158, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 30, 396, 54
Triangles, simulation 450,154 in 60 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 15 MB 287 MB
STEP 68 MB 336 MB
STL 23 MB 290 MB
OBJ 45 MB 353 MB
Visual
GLB 12 MB 349 MB
OBJ 35 MB 343 MB

154. Big Board

Big Board: stages 4 and 6 take 50% to 83% of a run. Simulation, GLB takes 3.8 s. Simulation, STEP takes 5.0 s. Simulation, STL takes 3.8 s. Simulation, OBJ takes 5.8 s. Visual, GLB takes 5.4 s. Visual, OBJ takes 6.4 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 1.6 0.3 ms 1.2 61 ms 0.2 0.2 3.8
Simulation, STEP 0.1 0.3 1.6 0.3 ms 1.2 1.3 0.2 0.2 5.0
Simulation, STL 0.1 0.3 1.6 0.2 ms 1.2 0.1 0.3 0.2 3.8
Simulation, OBJ 0.1 0.3 1.7 0.4 ms 1.2 2.0 0.3 0.2 5.8
Visual, GLB 0.1 0.3 1.7 0.5 ms 2.8 37 ms 0.3 0.2 5.4
Visual, OBJ 0.1 0.3 1.6 0.3 ms 2.8 1.2 0.2 0.2 6.4
Board Repo: andrewpaterson/658-Computer
Board: Big Board.kicad_pcb
Folder Kicad / Computer / Component Boards / Big Board
Complexity 163 / 1000 (size 88, features 75)
KESE features through vias, rounded,
trapezoid or chamfered pads,
filled zones, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 4, 23, 1
Triangles, simulation 402,342 in 72 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 13 MB 264 MB
STEP 46 MB 295 MB
STL 20 MB 272 MB
OBJ 40 MB 275 MB
Visual
GLB 8.1 MB 273 MB
OBJ 24 MB 277 MB

155. Clock Doubler

Clock Doubler: stages 4 and 6 take 51% to 80% of a run. Simulation, GLB takes 2.5 s. Simulation, STEP takes 3.5 s. Simulation, STL takes 2.4 s. Simulation, OBJ takes 3.5 s. Visual, GLB takes 3.7 s. Visual, OBJ takes 4.5 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.2 0.9 0.2 ms 0.8 36 ms 0.1 0.2 2.5
Simulation, STEP 0.1 0.2 1.0 0.2 ms 0.8 1.1 0.1 0.2 3.5
Simulation, STL 0.1 0.2 0.9 0.2 ms 0.8 53 ms 0.1 0.2 2.4
Simulation, OBJ 0.1 0.2 1.0 0.1 ms 0.8 1.1 0.1 0.2 3.5
Visual, GLB 0.1 0.2 0.9 0.2 ms 2.0 29 ms 0.2 0.2 3.7
Visual, OBJ 0.1 0.3 0.9 0.2 ms 1.9 0.9 0.2 0.2 4.5
Board Repo: andrewpaterson/658-Computer
Board: Clock Doubler.kicad_pcb
Folder Kicad / Computer / Component Boards / Clock Doubler
Complexity 207 / 1000 (size 137, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 15, 178, 23
Triangles, simulation 220,574 in 38 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 7.5 MB 214 MB
STEP 32 MB 235 MB
STL 11 MB 212 MB
OBJ 22 MB 218 MB
Visual
GLB 5.5 MB 218 MB
OBJ 16 MB 214 MB

156. Clock Hold Select

Clock Hold Select: stages 4 and 6 take 54% to 83% of a run. Simulation, GLB takes 6.0 s. Simulation, STEP takes 7.8 s. Simulation, STL takes 6.0 s. Simulation, OBJ takes 8.3 s. Visual, GLB takes 9.3 s. Visual, OBJ takes 12 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.5 2.4 0.6 ms 2.2 87 ms 0.3 0.2 6.0
Simulation, STEP 0.2 0.6 2.5 0.4 ms 2.1 1.9 0.3 0.2 7.8
Simulation, STL 0.2 0.5 2.4 0.4 ms 2.1 0.2 0.3 0.2 6.0
Simulation, OBJ 0.2 0.5 2.5 0.4 ms 2.0 2.6 0.3 0.2 8.3
Visual, GLB 0.2 0.5 2.5 0.4 ms 5.2 74 ms 0.5 0.2 9.3
Visual, OBJ 0.2 0.6 2.4 0.6 ms 5.3 2.3 0.6 0.3 11.8
Board Repo: andrewpaterson/658-Computer
Board: Clock Hold Select.kicad_pcb
Folder Kicad / Computer / Component Boards / Clock Hold Select
Complexity 233 / 1000 (size 163, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 23, 645, 84
Triangles, simulation 536,128 in 92 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 18 MB 313 MB
STEP 86 MB 379 MB
STL 27 MB 310 MB
OBJ 55 MB 415 MB
Visual
GLB 15 MB 440 MB
OBJ 46 MB 404 MB

157. Clock Hold Standard

Clock Hold Standard: stages 4 and 6 take 50% to 82% of a run. Simulation, GLB takes 3.7 s. Simulation, STEP takes 5.2 s. Simulation, STL takes 4.0 s. Simulation, OBJ takes 5.8 s. Visual, GLB takes 5.6 s. Visual, OBJ takes 7.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.3 1.5 0.4 ms 1.3 67 ms 0.2 0.2 3.7
Simulation, STEP 0.1 0.3 1.5 0.2 ms 1.4 1.4 0.2 0.2 5.2
Simulation, STL 0.2 0.3 1.5 0.2 ms 1.4 82 ms 0.2 0.2 4.0
Simulation, OBJ 0.2 0.3 1.6 0.2 ms 1.3 1.9 0.2 0.3 5.8
Visual, GLB 0.1 0.3 1.5 0.2 ms 3.1 46 ms 0.3 0.2 5.6
Visual, OBJ 0.1 0.3 1.5 3 ms 3.3 1.5 0.3 0.2 7.3
Board Repo: andrewpaterson/658-Computer
Board: Clock Hold Standard.kicad_pcb
Folder Kicad / Computer / Component Boards / Clock Hold Standard
Complexity 219 / 1000 (size 149, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 12, 434, 55
Triangles, simulation 321,760 in 47 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 11 MB 242 MB
STEP 52 MB 286 MB
STL 16 MB 243 MB
OBJ 33 MB 262 MB
Visual
GLB 9.0 MB 280 MB
OBJ 26 MB 282 MB

158. Clock Transition

Clock Transition: stages 4 and 6 take 49% to 79% of a run. Simulation, GLB takes 2.6 s. Simulation, STEP takes 3.5 s. Simulation, STL takes 2.6 s. Simulation, OBJ takes 3.8 s. Visual, GLB takes 3.6 s. Visual, OBJ takes 4.8 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.2 0.9 0.2 ms 1.0 38 ms 0.1 0.2 2.6
Simulation, STEP 0.1 0.2 0.9 0.1 ms 0.9 1.0 0.1 0.2 3.5
Simulation, STL 0.1 0.2 0.9 0.1 ms 0.9 53 ms 0.1 0.2 2.6
Simulation, OBJ 0.1 0.3 0.9 0.2 ms 1.0 1.2 0.1 0.2 3.8
Visual, GLB 0.1 0.2 0.9 0.2 ms 1.9 32 ms 0.2 0.2 3.6
Visual, OBJ 0.1 0.2 0.9 0.2 ms 2.0 1.1 0.2 0.2 4.8
Board Repo: andrewpaterson/658-Computer
Board: Clock Transition.kicad_pcb
Folder Kicad / Computer / Component Boards / Clock Transition
Complexity 216 / 1000 (size 146, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 14, 298, 49
Triangles, simulation 238,130 in 35 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 8.2 MB 220 MB
STEP 37 MB 251 MB
STL 12 MB 220 MB
OBJ 24 MB 225 MB
Visual
GLB 7.0 MB 233 MB
OBJ 20 MB 234 MB

159. Comparator 10bit

Comparator 10bit: stages 4 and 6 take 51% to 81% of a run. Simulation, GLB takes 3.4 s. Simulation, STEP takes 4.7 s. Simulation, STL takes 3.6 s. Simulation, OBJ takes 5.1 s. Visual, GLB takes 5.7 s. Visual, OBJ takes 6.8 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 1.4 0.2 ms 1.2 58 ms 0.2 0.2 3.4
Simulation, STEP 0.1 0.3 1.4 0.3 ms 1.3 1.2 0.2 0.2 4.7
Simulation, STL 0.1 0.4 1.4 0.2 ms 1.2 0.1 0.2 0.2 3.6
Simulation, OBJ 0.1 0.3 1.5 0.2 ms 1.1 1.6 0.2 0.2 5.1
Visual, GLB 0.1 0.3 1.4 0.3 ms 3.3 47 ms 0.4 0.2 5.7
Visual, OBJ 0.1 0.3 1.3 0.3 ms 3.2 1.2 0.3 0.2 6.8
Board Repo: andrewpaterson/658-Computer
Board: Comparator 10bit.kicad_pcb
Folder Kicad / Computer / Component Boards / Comparator 10bit
Complexity 223 / 1000 (size 153, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 14, 485, 62
Triangles, simulation 393,638 in 59 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 14 MB 265 MB
STEP 64 MB 309 MB
STL 20 MB 266 MB
OBJ 40 MB 320 MB
Visual
GLB 10 MB 322 MB
OBJ 31 MB 316 MB

160. Comparator 16bit

Comparator 16bit: stages 4 and 6 take 51% to 82% of a run. Simulation, GLB takes 5.4 s. Simulation, STEP takes 7.2 s. Simulation, STL takes 5.7 s. Simulation, OBJ takes 8.5 s. Visual, GLB takes 7.9 s. Visual, OBJ takes 10 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.5 2.2 0.3 ms 1.9 74 ms 0.3 0.2 5.4
Simulation, STEP 0.1 0.5 2.1 0.2 ms 2.1 1.8 0.3 0.2 7.2
Simulation, STL 0.2 0.5 2.3 0.4 ms 2.0 0.2 0.3 0.2 5.7
Simulation, OBJ 0.2 0.6 2.2 0.2 ms 2.2 2.9 0.3 0.2 8.5
Visual, GLB 0.2 0.5 2.1 0.4 ms 4.4 78 ms 0.5 0.2 7.9
Visual, OBJ 0.2 0.5 2.2 0.2 ms 4.4 2.1 0.5 0.3 10.1
Board Repo: andrewpaterson/658-Computer
Board: Comparator 16bit.kicad_pcb
Folder Kicad / Computer / Component Boards / Comparator 16bit
Complexity 230 / 1000 (size 160, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 13, 798, 90
Triangles, simulation 523,882 in 64 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 18 MB 319 MB
STEP 87 MB 363 MB
STL 26 MB 308 MB
OBJ 53 MB 403 MB
Visual
GLB 14 MB 380 MB
OBJ 42 MB 382 MB

161. Counter 16bit with IO

Counter 16bit with IO: stages 4 and 6 take 54% to 81% of a run. Simulation, GLB takes 7.2 s. Simulation, STEP takes 9.4 s. Simulation, STL takes 7.3 s. Simulation, OBJ takes 11 s. Visual, GLB takes 11 s. Visual, OBJ takes 14 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.7 2.6 0.6 ms 3.0 0.1 0.4 0.2 7.2
Simulation, STEP 0.2 0.7 2.8 0.5 ms 2.8 2.2 0.5 0.2 9.4
Simulation, STL 0.2 0.7 2.6 0.4 ms 3.0 0.2 0.4 0.2 7.3
Simulation, OBJ 0.2 0.7 2.7 0.5 ms 3.0 3.3 0.4 0.2 10.5
Visual, GLB 0.2 0.8 2.8 0.3 ms 6.2 0.1 0.8 0.2 11.1
Visual, OBJ 0.2 0.7 2.7 0.6 ms 6.4 3.1 0.9 0.2 14.1
Board Repo: andrewpaterson/658-Computer
Board: Counter 16bit with IO.kicad_pcb
Folder Kicad / Computer / Component Boards / Counter 16bit with IO
Complexity 246 / 1000 (size 176, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 24, 1,368, 199
Triangles, simulation 864,154 in 70 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 30 MB 436 MB
STEP 142 MB 501 MB
STL 43 MB 454 MB
OBJ 88 MB 623 MB
Visual
GLB 25 MB 616 MB
OBJ 77 MB 649 MB

162. Counter 16bit

Counter 16bit: stages 4 and 6 take 52% to 80% of a run. Simulation, GLB takes 5.3 s. Simulation, STEP takes 6.8 s. Simulation, STL takes 5.1 s. Simulation, OBJ takes 7.3 s. Visual, GLB takes 8.3 s. Visual, OBJ takes 10 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.5 2.1 0.4 ms 1.9 77 ms 0.3 0.2 5.3
Simulation, STEP 0.2 0.5 2.0 0.4 ms 1.9 1.7 0.3 0.2 6.8
Simulation, STL 0.2 0.5 2.0 0.3 ms 1.8 0.1 0.3 0.2 5.1
Simulation, OBJ 0.2 0.5 1.9 0.3 ms 1.8 2.3 0.3 0.2 7.3
Visual, GLB 0.2 0.5 2.0 0.3 ms 4.6 76 ms 0.7 0.3 8.3
Visual, OBJ 0.2 0.5 2.0 0.4 ms 4.5 1.9 0.7 0.3 10.0
Board Repo: andrewpaterson/658-Computer
Board: Counter 16bit.kicad_pcb
Folder Kicad / Computer / Component Boards / Counter 16bit
Complexity 224 / 1000 (size 154, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 14, 508, 78
Triangles, simulation 468,570 in 52 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 16 MB 294 MB
STEP 74 MB 347 MB
STL 23 MB 308 MB
OBJ 47 MB 366 MB
Visual
GLB 12 MB 353 MB
OBJ 37 MB 356 MB

163. Counter 24bit with IO

Counter 24bit with IO: stages 4 and 6 take 56% to 83% of a run. Simulation, GLB takes 13 s. Simulation, STEP takes 15 s. Simulation, STL takes 13 s. Simulation, OBJ takes 17 s. Visual, GLB takes 19 s. Visual, OBJ takes 23 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 1.2 5.1 0.6 ms 5.2 0.2 0.6 0.3 12.8
Simulation, STEP 0.2 1.0 4.8 0.7 ms 4.6 3.5 0.6 0.2 15.1
Simulation, STL 0.3 1.2 5.0 0.7 ms 5.0 0.4 0.6 0.3 12.8
Simulation, OBJ 0.3 1.2 4.8 0.7 ms 4.8 5.3 0.6 0.2 17.3
Visual, GLB 0.3 1.1 4.8 0.7 ms 10.8 0.2 1.4 0.2 18.7
Visual, OBJ 0.3 1.0 4.6 0.6 ms 10.5 4.8 1.6 0.2 23.0
Board Repo: andrewpaterson/658-Computer
Board: Counter 24bit with IO.kicad_pcb
Folder Kicad / Computer / Component Boards / Counter 24bit with IO
Complexity 256 / 1000 (size 186, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 32, 2,287, 246
Triangles, simulation 1,167,700 in 106 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 40 MB 551 MB
STEP 192 MB 635 MB
STL 58 MB 555 MB
OBJ 119 MB 824 MB
Visual
GLB 34 MB 693 MB
OBJ 102 MB 771 MB

164. Counter 24bit

Counter 24bit: stages 4 and 6 take 52% to 84% of a run. Simulation, GLB takes 6.5 s. Simulation, STEP takes 8.5 s. Simulation, STL takes 6.8 s. Simulation, OBJ takes 9.6 s. Visual, GLB takes 10 s. Visual, OBJ takes 12 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.6 2.6 0.5 ms 2.4 0.1 0.3 0.2 6.5
Simulation, STEP 0.2 0.7 2.8 0.3 ms 2.2 2.0 0.4 0.2 8.5
Simulation, STL 0.2 0.6 2.6 0.4 ms 2.5 0.2 0.4 0.2 6.8
Simulation, OBJ 0.2 0.7 2.6 0.3 ms 2.4 3.1 0.4 0.2 9.6
Visual, GLB 0.2 0.7 2.7 0.5 ms 5.9 71 ms 0.5 0.2 10.3
Visual, OBJ 0.2 0.5 2.6 0.4 ms 5.6 2.4 0.7 0.2 12.3
Board Repo: andrewpaterson/658-Computer
Board: Counter 24bit.kicad_pcb
Folder Kicad / Computer / Component Boards / Counter 24bit
Complexity 234 / 1000 (size 164, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 18, 816, 114
Triangles, simulation 673,350 in 71 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 23 MB 375 MB
STEP 108 MB 421 MB
STL 34 MB 361 MB
OBJ 68 MB 496 MB
Visual
GLB 18 MB 481 MB
OBJ 53 MB 466 MB

165. D Flip Flop 16bit

D Flip Flop 16bit: stages 4 and 6 take 51% to 82% of a run. Simulation, GLB takes 4.9 s. Simulation, STEP takes 6.6 s. Simulation, STL takes 4.9 s. Simulation, OBJ takes 6.4 s. Visual, GLB takes 6.8 s. Visual, OBJ takes 9.2 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.5 1.9 0.3 ms 1.7 89 ms 0.3 0.3 4.9
Simulation, STEP 0.2 0.4 2.0 0.2 ms 1.6 1.8 0.3 0.2 6.6
Simulation, STL 0.2 0.4 1.9 0.2 ms 1.6 0.1 0.3 0.3 4.9
Simulation, OBJ 0.2 0.4 1.8 0.3 ms 1.5 1.9 0.3 0.3 6.4
Visual, GLB 0.2 0.4 2.0 0.3 ms 3.6 48 ms 0.3 0.3 6.8
Visual, OBJ 0.2 0.4 1.9 0.2 ms 4.3 1.8 0.3 0.3 9.2
Board Repo: andrewpaterson/658-Computer
Board: D Flip Flop 16bit.kicad_pcb
Folder Kicad / Computer / Component Boards / D Flip Flop 16bit
Complexity 211 / 1000 (size 141, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 8, 360, 31
Triangles, simulation 343,422 in 48 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 12 MB 238 MB
STEP 56 MB 283 MB
STL 17 MB 250 MB
OBJ 35 MB 273 MB
Visual
GLB 8.5 MB 273 MB
OBJ 25 MB 276 MB

166. D Flip Flop 24bit

D Flip Flop 24bit: stages 4 and 6 take 52% to 82% of a run. Simulation, GLB takes 4.7 s. Simulation, STEP takes 6.1 s. Simulation, STL takes 4.9 s. Simulation, OBJ takes 6.9 s. Visual, GLB takes 7.4 s. Visual, OBJ takes 8.6 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.4 2.0 0.4 ms 1.6 76 ms 0.3 0.2 4.7
Simulation, STEP 0.1 0.4 1.8 0.2 ms 1.5 1.6 0.3 0.2 6.1
Simulation, STL 0.1 0.5 1.9 0.3 ms 1.5 0.1 0.4 0.3 4.9
Simulation, OBJ 0.2 0.5 2.1 0.2 ms 1.5 2.2 0.3 0.2 6.9
Visual, GLB 0.1 0.4 2.0 0.2 ms 4.1 53 ms 0.5 0.3 7.4
Visual, OBJ 0.2 0.5 2.0 0.3 ms 3.8 1.4 0.4 0.3 8.6
Board Repo: andrewpaterson/658-Computer
Board: D Flip Flop 24bit.kicad_pcb
Folder Kicad / Computer / Component Boards / D Flip Flop 24bit
Complexity 215 / 1000 (size 145, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 10, 400, 39
Triangles, simulation 463,344 in 64 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 16 MB 277 MB
STEP 75 MB 334 MB
STL 23 MB 286 MB
OBJ 47 MB 361 MB
Visual
GLB 11 MB 342 MB
OBJ 34 MB 348 MB

167. Data and Signal Buffer

Data and Signal Buffer: stages 4 and 6 take 52% to 81% of a run. Simulation, GLB takes 5.5 s. Simulation, STEP takes 6.6 s. Simulation, STL takes 5.2 s. Simulation, OBJ takes 7.2 s. Visual, GLB takes 8.3 s. Visual, OBJ takes 9.8 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.6 2.2 0.3 ms 1.9 97 ms 0.3 0.2 5.5
Simulation, STEP 0.2 0.5 1.9 0.3 ms 1.8 1.7 0.3 0.2 6.6
Simulation, STL 0.2 0.5 2.1 0.4 ms 1.8 0.1 0.3 0.2 5.2
Simulation, OBJ 0.2 0.5 2.0 0.5 ms 1.8 2.3 0.3 0.2 7.2
Visual, GLB 0.2 0.6 2.1 0.4 ms 4.5 73 ms 0.4 0.3 8.3
Visual, OBJ 0.2 0.5 2.2 0.3 ms 4.5 1.7 0.4 0.2 9.8
Board Repo: andrewpaterson/658-Computer
Board: Data and Signal Buffer.kicad_pcb
Folder Kicad / Computer / Component Boards / Data and Signal Buffer
Complexity 229 / 1000 (size 159, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 20, 584, 75
Triangles, simulation 478,376 in 64 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 17 MB 288 MB
STEP 78 MB 345 MB
STL 24 MB 286 MB
OBJ 49 MB 378 MB
Visual
GLB 13 MB 365 MB
OBJ 38 MB 363 MB

168. Device Buffer

Device Buffer: stages 4 and 6 take 52% to 83% of a run. Simulation, GLB takes 6.1 s. Simulation, STEP takes 7.9 s. Simulation, STL takes 5.9 s. Simulation, OBJ takes 9.1 s. Visual, GLB takes 9.2 s. Visual, OBJ takes 11 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.5 2.7 0.6 ms 2.0 85 ms 0.3 0.2 6.1
Simulation, STEP 0.2 0.6 2.7 0.2 ms 2.0 1.9 0.3 0.2 7.9
Simulation, STL 0.2 0.6 2.7 0.3 ms 1.9 0.1 0.3 0.2 5.9
Simulation, OBJ 0.2 0.6 2.7 0.3 ms 2.1 3.1 0.3 0.2 9.1
Visual, GLB 0.2 0.6 2.8 0.4 ms 4.8 60 ms 0.5 0.2 9.2
Visual, OBJ 0.2 0.5 2.8 0.3 ms 4.5 2.2 0.7 0.2 11.2
Board Repo: andrewpaterson/658-Computer
Board: Device Buffer.kicad_pcb
Folder Kicad / Computer / Component Boards / Device Buffer
Complexity 226 / 1000 (size 156, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 18, 571, 40
Triangles, simulation 557,548 in 75 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 19 MB 316 MB
STEP 98 MB 367 MB
STL 28 MB 310 MB
OBJ 57 MB 420 MB
Visual
GLB 14 MB 412 MB
OBJ 41 MB 380 MB

169. Device Decode stage A

Device Decode stage A: stages 4 and 6 take 49% to 81% of a run. Simulation, GLB takes 4.0 s. Simulation, STEP takes 5.4 s. Simulation, STL takes 4.0 s. Simulation, OBJ takes 6.0 s. Visual, GLB takes 5.8 s. Visual, OBJ takes 7.6 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 1.7 0.3 ms 1.4 80 ms 0.3 0.2 4.0
Simulation, STEP 0.1 0.4 1.6 0.2 ms 1.5 1.4 0.2 0.2 5.4
Simulation, STL 0.1 0.4 1.6 0.2 ms 1.4 0.1 0.2 0.2 4.0
Simulation, OBJ 0.2 0.4 1.5 0.2 ms 1.4 2.0 0.2 0.2 6.0
Visual, GLB 0.1 0.4 1.7 0.3 ms 3.0 46 ms 0.3 0.2 5.8
Visual, OBJ 0.1 0.4 1.6 0.2 ms 3.3 1.6 0.4 0.2 7.6
Board Repo: andrewpaterson/658-Computer
Board: Device Decode stage A.kicad_pcb
Folder Kicad / Computer / Component Boards / Device Decode stage A
Complexity 223 / 1000 (size 153, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 16, 442, 62
Triangles, simulation 391,752 in 57 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 14 MB 259 MB
STEP 63 MB 313 MB
STL 20 MB 260 MB
OBJ 40 MB 317 MB
Visual
GLB 11 MB 317 MB
OBJ 31 MB 326 MB

170. Device Decode stage B

Device Decode stage B: stages 4 and 6 take 50% to 82% of a run. Simulation, GLB takes 4.7 s. Simulation, STEP takes 6.1 s. Simulation, STL takes 4.6 s. Simulation, OBJ takes 7.2 s. Visual, GLB takes 6.9 s. Visual, OBJ takes 9.1 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.4 1.9 0.2 ms 1.6 93 ms 0.3 0.2 4.7
Simulation, STEP 0.1 0.4 1.9 0.2 ms 1.7 1.5 0.3 0.2 6.1
Simulation, STL 0.2 0.5 1.8 0.2 ms 1.7 95 ms 0.2 0.2 4.6
Simulation, OBJ 0.1 0.4 1.9 0.2 ms 1.7 2.5 0.3 0.2 7.2
Visual, GLB 0.2 0.4 2.0 0.2 ms 3.7 56 ms 0.4 0.2 6.9
Visual, OBJ 0.2 0.4 2.0 0.2 ms 3.9 1.9 0.4 0.3 9.1
Board Repo: andrewpaterson/658-Computer
Board: Device Decode stage B.kicad_pcb
Folder Kicad / Computer / Component Boards / Device Decode stage B
Complexity 227 / 1000 (size 157, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 16, 572, 78
Triangles, simulation 451,576 in 50 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 16 MB 318 MB
STEP 75 MB 334 MB
STL 23 MB 289 MB
OBJ 46 MB 311 MB
Visual
GLB 13 MB 358 MB
OBJ 37 MB 359 MB

171. Dual Comparator 8bit

Dual Comparator 8bit: stages 4 and 6 take 51% to 83% of a run. Simulation, GLB takes 5.7 s. Simulation, STEP takes 7.2 s. Simulation, STL takes 5.5 s. Simulation, OBJ takes 8.0 s. Visual, GLB takes 8.3 s. Visual, OBJ takes 11 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.5 2.3 0.3 ms 2.0 83 ms 0.3 0.3 5.7
Simulation, STEP 0.2 0.5 2.0 0.3 ms 2.2 1.7 0.3 0.2 7.2
Simulation, STL 0.2 0.5 2.1 0.4 ms 1.9 0.2 0.4 0.2 5.5
Simulation, OBJ 0.1 0.5 2.1 0.2 ms 2.0 2.6 0.3 0.2 8.0
Visual, GLB 0.2 0.5 2.2 0.3 ms 4.7 65 ms 0.5 0.2 8.3
Visual, OBJ 0.2 0.5 2.2 0.3 ms 4.7 2.4 0.4 0.2 10.7
Board Repo: andrewpaterson/658-Computer
Board: Dual Comparator 8bit.kicad_pcb
Folder Kicad / Computer / Component Boards / Dual Comparator 8bit
Complexity 227 / 1000 (size 157, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 11, 728, 91
Triangles, simulation 503,120 in 64 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 17 MB 323 MB
STEP 80 MB 354 MB
STL 25 MB 291 MB
OBJ 51 MB 389 MB
Visual
GLB 13 MB 363 MB
OBJ 40 MB 370 MB

172. Flags Enable Interrupt

Flags Enable Interrupt: stages 4 and 6 take 53% to 83% of a run. Simulation, GLB takes 5.3 s. Simulation, STEP takes 7.2 s. Simulation, STL takes 5.7 s. Simulation, OBJ takes 8.3 s. Visual, GLB takes 8.3 s. Visual, OBJ takes 9.7 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.5 2.3 0.5 ms 1.8 96 ms 0.3 0.3 5.3
Simulation, STEP 0.2 0.5 2.1 0.4 ms 2.0 1.9 0.4 0.2 7.2
Simulation, STL 0.2 0.5 2.4 0.6 ms 1.9 0.2 0.3 0.3 5.7
Simulation, OBJ 0.2 0.5 2.2 0.3 ms 2.2 2.7 0.3 0.2 8.3
Visual, GLB 0.1 0.5 2.1 0.3 ms 4.7 70 ms 0.5 0.2 8.3
Visual, OBJ 0.2 0.5 2.0 0.3 ms 4.4 1.9 0.4 0.2 9.7
Board Repo: andrewpaterson/658-Computer
Board: Flags Enable Interrupt.kicad_pcb
Folder Kicad / Computer / Component Boards / Flags Enable Interrupt
Complexity 230 / 1000 (size 160, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 17, 674, 88
Triangles, simulation 478,496 in 56 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 17 MB 317 MB
STEP 80 MB 353 MB
STL 24 MB 319 MB
OBJ 49 MB 376 MB
Visual
GLB 13 MB 379 MB
OBJ 40 MB 370 MB

173. GPIO 16bit

GPIO 16bit: stages 4 and 6 take 57% to 81% of a run. Simulation, GLB takes 12 s. Simulation, STEP takes 15 s. Simulation, STL takes 11 s. Simulation, OBJ takes 16 s. Visual, GLB takes 19 s. Visual, OBJ takes 21 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 1.1 4.7 0.3 ms 4.8 0.2 0.6 0.2 11.8
Simulation, STEP 0.3 1.1 4.8 0.3 ms 4.3 3.3 0.5 0.2 14.6
Simulation, STL 0.3 1.2 4.5 0.3 ms 4.4 0.3 0.5 0.2 11.4
Simulation, OBJ 0.3 1.1 4.6 0.8 ms 4.2 4.7 0.5 0.2 15.6
Visual, GLB 0.3 1.1 4.5 0.3 ms 10.5 0.1 1.8 0.2 18.6
Visual, OBJ 0.3 1.1 4.7 0.4 ms 9.0 4.3 1.2 0.2 20.8
Board Repo: andrewpaterson/658-Computer
Board: GPIO 16bit.kicad_pcb
Folder Kicad / Computer / Component Boards / GPIO 16bit
Complexity 268 / 1000 (size 188, features 80)
KESE features through vias, rounded,
trapezoid or chamfered pads,
curved board outline,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 43, 2,026, 281
Triangles, simulation 1,188,690 in 130 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 41 MB 528 MB
STEP 200 MB 651 MB
STL 59 MB 514 MB
OBJ 122 MB 810 MB
Visual
GLB 37 MB 831 MB
OBJ 111 MB 845 MB

174. GPIO 4bit

GPIO 4bit: stages 4 and 6 take 52% to 82% of a run. Simulation, GLB takes 4.8 s. Simulation, STEP takes 5.9 s. Simulation, STL takes 4.4 s. Simulation, OBJ takes 6.5 s. Visual, GLB takes 7.0 s. Visual, OBJ takes 8.5 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.4 1.8 0.3 ms 1.8 69 ms 0.3 0.2 4.8
Simulation, STEP 0.1 0.4 1.9 0.3 ms 1.5 1.4 0.3 0.2 5.9
Simulation, STL 0.1 0.4 1.7 0.3 ms 1.6 0.1 0.2 0.2 4.4
Simulation, OBJ 0.2 0.4 1.7 0.2 ms 1.7 2.1 0.3 0.3 6.5
Visual, GLB 0.1 0.4 1.8 0.2 ms 4.0 58 ms 0.4 0.2 7.0
Visual, OBJ 0.1 0.4 1.7 0.3 ms 4.0 1.6 0.4 0.3 8.5
Board Repo: andrewpaterson/658-Computer
Board: GPIO 4bit.kicad_pcb
Folder Kicad / Computer / Component Boards / GPIO 4bit
Complexity 225 / 1000 (size 155, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 14, 560, 67
Triangles, simulation 412,782 in 54 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 14 MB 272 MB
STEP 68 MB 320 MB
STL 21 MB 265 MB
OBJ 42 MB 330 MB
Visual
GLB 11 MB 330 MB
OBJ 33 MB 336 MB

175. Main Address Buffer

Main Address Buffer: stages 4 and 6 take 52% to 83% of a run. Simulation, GLB takes 4.5 s. Simulation, STEP takes 5.9 s. Simulation, STL takes 4.6 s. Simulation, OBJ takes 6.4 s. Visual, GLB takes 6.6 s. Visual, OBJ takes 8.8 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.4 2.0 0.5 ms 1.4 73 ms 0.3 0.2 4.5
Simulation, STEP 0.1 0.4 2.1 0.3 ms 1.4 1.4 0.3 0.3 5.9
Simulation, STL 0.1 0.4 2.0 0.2 ms 1.4 0.1 0.3 0.3 4.6
Simulation, OBJ 0.1 0.4 1.9 0.3 ms 1.4 2.1 0.3 0.2 6.4
Visual, GLB 0.2 0.4 2.0 0.3 ms 3.5 44 ms 0.3 0.2 6.6
Visual, OBJ 0.2 0.5 2.1 0.6 ms 3.9 1.7 0.3 0.3 8.8
Board Repo: andrewpaterson/658-Computer
Board: Main Address Buffer.kicad_pcb
Folder Kicad / Computer / Component Boards / Main Address Buffer
Complexity 209 / 1000 (size 139, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 10, 290, 20
Triangles, simulation 411,660 in 64 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 14 MB 268 MB
STEP 67 MB 308 MB
STL 21 MB 268 MB
OBJ 42 MB 326 MB
Visual
GLB 9.8 MB 318 MB
OBJ 29 MB 317 MB

176. Main Data Buffer

Main Data Buffer: stages 4 and 6 take 45% to 81% of a run. Simulation, GLB takes 3.0 s. Simulation, STEP takes 4.2 s. Simulation, STL takes 2.9 s. Simulation, OBJ takes 4.3 s. Visual, GLB takes 4.5 s. Visual, OBJ takes 5.5 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 94 ms 0.2 1.2 0.3 ms 1.0 43 ms 0.2 0.2 3.0
Simulation, STEP 0.1 0.3 1.3 0.3 ms 1.0 1.1 0.1 0.3 4.2
Simulation, STL 0.1 0.2 1.1 0.2 ms 1.0 55 ms 0.1 0.2 2.9
Simulation, OBJ 0.1 0.3 1.0 0.3 ms 0.9 1.5 0.2 0.3 4.3
Visual, GLB 93 ms 0.3 1.2 0.2 ms 2.5 25 ms 0.2 0.2 4.5
Visual, OBJ 0.1 0.3 1.1 0.2 ms 2.5 0.9 0.3 0.3 5.5
Board Repo: andrewpaterson/658-Computer
Board: Main Data Buffer.kicad_pcb
Folder Kicad / Computer / Component Boards / Main Data Buffer
Complexity 198 / 1000 (size 128, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 8, 155, 19
Triangles, simulation 251,780 in 40 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 8.7 MB 222 MB
STEP 38 MB 246 MB
STL 13 MB 247 MB
OBJ 25 MB 234 MB
Visual
GLB 6.1 MB 218 MB
OBJ 18 MB 219 MB

177. Memory 32KB with Output

Memory 32KB with Output: stages 4 and 6 take 49% to 82% of a run. Simulation, GLB takes 4.8 s. Simulation, STEP takes 6.1 s. Simulation, STL takes 4.9 s. Simulation, OBJ takes 7.1 s. Visual, GLB takes 6.9 s. Visual, OBJ takes 8.6 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.5 1.8 0.3 ms 1.7 85 ms 0.3 0.2 4.8
Simulation, STEP 0.1 0.4 1.9 0.4 ms 1.6 1.6 0.3 0.2 6.1
Simulation, STL 0.1 0.5 1.9 0.2 ms 1.8 0.2 0.3 0.2 4.9
Simulation, OBJ 0.1 0.5 1.8 0.2 ms 1.7 2.5 0.3 0.2 7.1
Visual, GLB 0.1 0.4 1.8 0.4 ms 3.9 52 ms 0.4 0.2 6.9
Visual, OBJ 0.2 0.5 1.9 0.3 ms 3.7 1.7 0.4 0.2 8.6
Board Repo: andrewpaterson/658-Computer
Board: Memory 32KB with Output.kicad_pcb
Folder Kicad / Computer / Component Boards / Memory 32KB with Output
Complexity 220 / 1000 (size 150, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 10, 502, 62
Triangles, simulation 431,984 in 59 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 15 MB 279 MB
STEP 70 MB 326 MB
STL 22 MB 277 MB
OBJ 44 MB 347 MB
Visual
GLB 11 MB 336 MB
OBJ 34 MB 341 MB

178. Register 24bit with IO

Register 24bit with IO: stages 4 and 6 take 51% to 84% of a run. Simulation, GLB takes 7.1 s. Simulation, STEP takes 9.8 s. Simulation, STL takes 7.4 s. Simulation, OBJ takes 10 s. Visual, GLB takes 11 s. Visual, OBJ takes 13 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.6 2.9 0.2 ms 2.6 0.1 0.5 0.2 7.1
Simulation, STEP 0.3 0.7 3.2 0.3 ms 2.7 2.2 0.4 0.2 9.8
Simulation, STL 0.2 0.7 3.0 0.2 ms 2.7 0.2 0.4 0.2 7.4
Simulation, OBJ 0.2 0.6 2.8 0.3 ms 2.4 3.7 0.4 0.2 10.3
Visual, GLB 0.2 0.6 2.7 0.3 ms 6.1 86 ms 0.6 0.2 10.5
Visual, OBJ 0.2 0.6 2.9 0.2 ms 5.9 2.8 0.8 0.2 13.4
Board Repo: andrewpaterson/658-Computer
Board: Register 24bit with IO.kicad_pcb
Folder Kicad / Computer / Component Boards / Register 24bit with IO
Complexity 235 / 1000 (size 165, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 18, 903, 99
Triangles, simulation 668,102 in 67 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 23 MB 349 MB
STEP 113 MB 426 MB
STL 33 MB 342 MB
OBJ 68 MB 484 MB
Visual
GLB 18 MB 497 MB
OBJ 54 MB 503 MB

179. Register 8bit with IO

Register 8bit with IO: stages 4 and 6 take 52% to 81% of a run. Simulation, GLB takes 3.5 s. Simulation, STEP takes 5.0 s. Simulation, STL takes 3.7 s. Simulation, OBJ takes 5.6 s. Visual, GLB takes 5.6 s. Visual, OBJ takes 5.8 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 1.3 0.2 ms 1.2 59 ms 0.2 0.2 3.5
Simulation, STEP 0.1 0.3 1.2 0.2 ms 1.4 1.4 0.2 0.3 5.0
Simulation, STL 0.2 0.3 1.3 0.3 ms 1.4 0.1 0.2 0.3 3.7
Simulation, OBJ 0.2 0.3 1.6 0.1 ms 1.3 1.7 0.2 0.2 5.6
Visual, GLB 0.1 0.3 1.2 0.3 ms 3.3 38 ms 0.3 0.3 5.6
Visual, OBJ 0.1 0.3 1.1 0.2 ms 2.8 0.9 0.2 0.3 5.8
Board Repo: andrewpaterson/658-Computer
Board: Register 8bit with IO.kicad_pcb
Folder Kicad / Computer / Component Boards / Register 8bit with IO
Complexity 210 / 1000 (size 140, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 10, 289, 30
Triangles, simulation 290,342 in 42 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 10 MB 241 MB
STEP 46 MB 265 MB
STL 15 MB 228 MB
OBJ 29 MB 251 MB
Visual
GLB 7.3 MB 251 MB
OBJ 21 MB 249 MB

180. Selector 1-of-4 4bit with Input

Stages 4 and 6 take 50% to 82% of a run. Simulation, GLB takes 3.6 s. Simulation, STEP takes 4.9 s. Simulation, STL takes 3.6 s. Simulation, OBJ takes 5.2 s. Visual, GLB takes 5.3 s. Visual, OBJ takes 6.4 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 1.4 0.3 ms 1.2 55 ms 0.2 0.2 3.6
Simulation, STEP 0.1 0.4 1.4 0.4 ms 1.2 1.3 0.2 0.2 4.9
Simulation, STL 0.1 0.3 1.4 0.3 ms 1.2 89 ms 0.2 0.3 3.6
Simulation, OBJ 0.1 0.3 1.4 0.3 ms 1.2 1.7 0.2 0.2 5.2
Visual, GLB 0.1 0.3 1.4 0.3 ms 3.0 39 ms 0.3 0.2 5.3
Visual, OBJ 0.1 0.3 1.4 0.2 ms 2.8 1.3 0.3 0.2 6.4
Board Repo: andrewpaterson/658-Computer
Board: Selector 1-of-4 4bit with Input.kicad_pcb
Folder Kicad / Computer / Component Boards / Selector 1-of-4 4bit with Input
Complexity 210 / 1000 (size 140, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 7, 321, 49
Triangles, simulation 367,886 in 54 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 13 MB 273 MB
STEP 56 MB 289 MB
STL 18 MB 270 MB
OBJ 37 MB 282 MB
Visual
GLB 9.0 MB 283 MB
OBJ 27 MB 290 MB

181. Selector 1-of-4 4bit

Selector 1-of-4 4bit: stages 4 and 6 take 49% to 79% of a run. Simulation, GLB takes 3.8 s. Simulation, STEP takes 4.8 s. Simulation, STL takes 3.3 s. Simulation, OBJ takes 4.7 s. Visual, GLB takes 4.9 s. Visual, OBJ takes 6.1 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 1.5 0.2 ms 1.3 78 ms 0.2 0.3 3.8
Simulation, STEP 0.1 0.3 1.2 0.4 ms 1.3 1.4 0.2 0.3 4.8
Simulation, STL 0.1 0.3 1.2 0.2 ms 1.2 67 ms 0.2 0.2 3.3
Simulation, OBJ 0.1 0.3 1.1 0.2 ms 1.2 1.6 0.2 0.2 4.7
Visual, GLB 0.1 0.3 1.2 0.2 ms 2.7 48 ms 0.3 0.3 4.9
Visual, OBJ 0.1 0.3 1.3 0.2 ms 2.7 1.1 0.2 0.3 6.1
Board Repo: andrewpaterson/658-Computer
Board: Selector 1-of-4 4bit.kicad_pcb
Folder Kicad / Computer / Component Boards / Selector 1-of-4 4bit
Complexity 202 / 1000 (size 132, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 5, 253, 30
Triangles, simulation 267,396 in 38 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 9.2 MB 226 MB
STEP 41 MB 251 MB
STL 13 MB 227 MB
OBJ 27 MB 237 MB
Visual
GLB 6.4 MB 223 MB
OBJ 19 MB 222 MB

182. Selector 12bit

Selector 12bit: stages 4 and 6 take 50% to 83% of a run. Simulation, GLB takes 5.8 s. Simulation, STEP takes 7.2 s. Simulation, STL takes 6.2 s. Simulation, OBJ takes 8.3 s. Visual, GLB takes 8.5 s. Visual, OBJ takes 11 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.6 2.3 0.4 ms 2.1 0.1 0.3 0.2 5.8
Simulation, STEP 0.2 0.5 2.2 0.3 ms 1.9 1.8 0.3 0.3 7.2
Simulation, STL 0.2 0.5 2.7 0.3 ms 2.0 0.2 0.4 0.2 6.2
Simulation, OBJ 0.2 0.5 2.2 0.5 ms 1.9 2.9 0.3 0.3 8.3
Visual, GLB 0.2 0.5 2.3 0.5 ms 4.8 75 ms 0.5 0.2 8.5
Visual, OBJ 0.2 0.5 2.4 0.3 ms 4.6 2.5 0.6 0.2 11.0
Board Repo: andrewpaterson/658-Computer
Board: Selector 12bit.kicad_pcb
Folder Kicad / Computer / Component Boards / Selector 12bit
Complexity 221 / 1000 (size 151, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 10, 499, 83
Triangles, simulation 474,738 in 52 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 16 MB 281 MB
STEP 75 MB 343 MB
STL 24 MB 283 MB
OBJ 48 MB 369 MB
Visual
GLB 12 MB 356 MB
OBJ 37 MB 356 MB

183. Selector 18bit

Selector 18bit: stages 4 and 6 take 52% to 84% of a run. Simulation, GLB takes 7.1 s. Simulation, STEP takes 8.5 s. Simulation, STL takes 7.0 s. Simulation, OBJ takes 10 s. Visual, GLB takes 11 s. Visual, OBJ takes 14 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.6 2.8 0.3 ms 2.6 0.1 0.5 0.3 7.1
Simulation, STEP 0.2 0.7 2.6 0.3 ms 2.3 2.0 0.4 0.2 8.5
Simulation, STL 0.2 0.6 2.8 0.3 ms 2.7 0.2 0.4 0.2 7.0
Simulation, OBJ 0.2 0.5 2.6 0.7 ms 2.6 3.6 0.4 0.2 10.2
Visual, GLB 0.2 0.6 2.9 0.3 ms 6.0 87 ms 0.7 0.2 10.6
Visual, OBJ 0.2 0.6 2.7 0.6 ms 6.1 2.9 1.1 0.2 13.8
Board Repo: andrewpaterson/658-Computer
Board: Selector 18bit.kicad_pcb
Folder Kicad / Computer / Component Boards / Selector 18bit
Complexity 232 / 1000 (size 162, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 14, 849, 115
Triangles, simulation 720,584 in 74 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 25 MB 390 MB
STEP 119 MB 444 MB
STL 36 MB 402 MB
OBJ 74 MB 530 MB
Visual
GLB 18 MB 439 MB
OBJ 55 MB 484 MB

184. State Reader 16bit

State Reader 16bit: stages 4 and 6 take 51% to 80% of a run. Simulation, GLB takes 3.6 s. Simulation, STEP takes 4.6 s. Simulation, STL takes 3.8 s. Simulation, OBJ takes 5.1 s. Visual, GLB takes 5.5 s. Visual, OBJ takes 6.7 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 1.4 0.3 ms 1.3 50 ms 0.2 0.2 3.6
Simulation, STEP 0.1 0.3 1.4 0.1 ms 1.1 1.3 0.2 0.2 4.6
Simulation, STL 0.2 0.3 1.5 0.2 ms 1.3 91 ms 0.2 0.2 3.8
Simulation, OBJ 0.2 0.3 1.5 0.2 ms 1.2 1.6 0.2 0.2 5.1
Visual, GLB 0.1 0.3 1.5 0.2 ms 3.0 39 ms 0.4 0.3 5.5
Visual, OBJ 0.1 0.3 1.5 0.2 ms 3.0 1.3 0.3 0.2 6.7
Board Repo: andrewpaterson/658-Computer
Board: State Reader 16bit.kicad_pcb
Folder Kicad / Computer / Component Boards / State Reader 16bit
Complexity 212 / 1000 (size 142, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 10, 350, 26
Triangles, simulation 298,626 in 42 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 10 MB 236 MB
STEP 50 MB 270 MB
STL 15 MB 230 MB
OBJ 30 MB 235 MB
Visual
GLB 7.7 MB 255 MB
OBJ 22 MB 256 MB

185. State Reader 8bit

State Reader 8bit: stages 4 and 6 take 50% to 77% of a run. Simulation, GLB takes 2.2 s. Simulation, STEP takes 3.0 s. Simulation, STL takes 2.2 s. Simulation, OBJ takes 2.9 s. Visual, GLB takes 3.3 s. Visual, OBJ takes 3.6 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.2 0.8 0.2 ms 0.8 30 ms 0.1 0.2 2.2
Simulation, STEP 94 ms 0.2 0.7 0.2 ms 0.8 0.9 98 ms 0.2 3.0
Simulation, STL 85 ms 0.2 0.8 0.2 ms 0.8 49 ms 0.1 0.2 2.2
Simulation, OBJ 0.1 0.2 0.8 0.3 ms 0.8 0.8 96 ms 0.2 2.9
Visual, GLB 0.1 0.2 0.8 0.2 ms 1.8 24 ms 0.2 0.2 3.3
Visual, OBJ 0.1 0.2 0.8 0.2 ms 1.6 0.6 0.1 0.2 3.6
Board Repo: andrewpaterson/658-Computer
Board: State Reader 8bit.kicad_pcb
Folder Kicad / Computer / Component Boards / State Reader 8bit
Complexity 196 / 1000 (size 126, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 8, 147, 11
Triangles, simulation 187,430 in 35 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.5 MB 203 MB
STEP 30 MB 220 MB
STL 9.4 MB 205 MB
OBJ 19 MB 199 MB
Visual
GLB 4.5 MB 193 MB
OBJ 13 MB 195 MB

186. Coprocessor Board - Additional

Stages 4 and 6 take 52% to 86% of a run. Simulation, GLB takes 36 s. Simulation, STEP takes 45 s. Simulation, STL takes 36 s. Simulation, OBJ takes 56 s. Visual, GLB takes 53 s. Visual, OBJ takes 66 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 3.3 17.1 0.8 ms 12.0 0.6 1.8 0.3 35.8
Simulation, STEP 0.5 3.2 17.1 0.8 ms 12.0 9.9 2.0 0.3 44.8
Simulation, STL 0.5 3.3 17.0 0.8 ms 12.0 1.2 1.9 0.3 36.2
Simulation, OBJ 0.5 3.3 17.3 3 ms 11.8 21.0 1.9 0.3 56.1
Visual, GLB 0.6 3.2 17.2 0.7 ms 28.4 0.4 2.8 0.3 52.8
Visual, OBJ 0.5 3.4 16.7 0.8 ms 28.5 13.3 3.0 0.3 65.6
Board Repo: andrewpaterson/658-Computer
Board: Coprocessor Board - Additional.kicad_pcb
Folder Kicad / Computer / Coprocessor / Coprocessor Board - Additional
Complexity 264 / 1000 (size 184, features 80)
KESE features through vias, rounded,
trapezoid or chamfered pads,
curved board outline,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 27, 2,198, 268
Triangles, simulation 3,637,522 in 233 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 124 MB 1.3 GB
STEP 583 MB 1.4 GB
STL 182 MB 1.3 GB
OBJ 388 MB 2.3 GB
Visual
GLB 79 MB 1.5 GB
OBJ 249 MB 1.8 GB

187. Coprocessor Board - Main

Coprocessor Board - Main: stages 4 and 6 take 55% to 85% of a run. Simulation, GLB takes 51 s. Simulation, STEP takes 63 s. Simulation, STL takes 53 s. Simulation, OBJ takes 74 s. Visual, GLB takes 96 s. Visual, OBJ takes 2 min

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.6 4.6 24.1 2 ms 18.2 0.8 2.5 0.3 51.2
Simulation, STEP 0.6 4.5 24.5 2 ms 18.3 12.3 2.6 0.3 62.9
Simulation, STL 0.6 4.8 24.0 2 ms 18.4 2.2 2.4 0.3 52.7
Simulation, OBJ 0.6 4.6 22.4 2 ms 18.6 24.8 2.7 0.3 74.0
Visual, GLB 0.7 5.2 24.2 2 ms 58.0 0.7 7.2 0.3 96.4
Visual, OBJ 0.6 5.3 24.0 1 ms 60.3 17.5 6.4 0.3 114.4
Board Repo: andrewpaterson/658-Computer
Board: Coprocessor Board - Main.kicad_pcb
Folder Kicad / Computer / Coprocessor / Coprocessor Board - Main
Complexity 279 / 1000 (size 199, features 80)
KESE features through vias, rounded,
trapezoid or chamfered pads,
curved board outline,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 42, 3,940, 516
Triangles, simulation 5,772,242 in 394 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 194 MB 1.8 GB
STEP 831 MB 2.2 GB
STL 289 MB 1.7 GB
OBJ 610 MB 3.6 GB
Visual
GLB 132 MB 2.1 GB
OBJ 425 MB 2.7 GB

188. Coprocessor Clock

Coprocessor Clock: stages 4 and 6 take 49% to 79% of a run. Simulation, GLB takes 2.6 s. Simulation, STEP takes 3.6 s. Simulation, STL takes 2.6 s. Simulation, OBJ takes 3.5 s. Visual, GLB takes 3.6 s. Visual, OBJ takes 4.3 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.2 0.9 0.2 ms 0.9 35 ms 0.1 0.3 2.6
Simulation, STEP 0.1 0.2 0.9 0.2 ms 0.9 1.1 0.1 0.2 3.6
Simulation, STL 0.1 0.2 0.9 0.2 ms 0.9 57 ms 0.1 0.2 2.6
Simulation, OBJ 0.1 0.2 0.9 0.2 ms 0.8 1.2 0.1 0.2 3.5
Visual, GLB 0.1 0.2 0.9 0.2 ms 2.0 32 ms 0.2 0.2 3.6
Visual, OBJ 0.1 0.2 0.9 0.2 ms 1.9 0.8 0.2 0.2 4.3
Board Repo: andrewpaterson/658-Computer
Board: Coprocessor Clock.kicad_pcb
Folder Kicad / Computer / Coprocessor / Coprocessor Clock
Complexity 202 / 1000 (size 132, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 12, 170, 12
Triangles, simulation 199,224 in 41 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 6.9 MB 207 MB
STEP 30 MB 230 MB
STL 10.0 MB 206 MB
OBJ 20 MB 209 MB
Visual
GLB 4.9 MB 200 MB
OBJ 14 MB 204 MB

189. Coprocessor Memory Select

Coprocessor Memory Select: stages 4 and 6 take 52% to 80% of a run. Simulation, GLB takes 3.2 s. Simulation, STEP takes 4.4 s. Simulation, STL takes 3.3 s. Simulation, OBJ takes 4.7 s. Visual, GLB takes 5.4 s. Visual, OBJ takes 6.5 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 1.2 0.3 ms 1.1 51 ms 0.2 0.2 3.2
Simulation, STEP 0.1 0.3 1.2 0.3 ms 1.2 1.2 0.2 0.2 4.4
Simulation, STL 0.1 0.3 1.2 0.2 ms 1.2 87 ms 0.2 0.2 3.3
Simulation, OBJ 0.1 0.3 1.2 0.5 ms 1.2 1.4 0.2 0.2 4.7
Visual, GLB 0.1 0.3 1.3 0.2 ms 3.0 37 ms 0.3 0.3 5.4
Visual, OBJ 0.1 0.4 1.4 0.2 ms 3.1 1.1 0.3 0.2 6.5
Board Repo: andrewpaterson/658-Computer
Board: Coprocessor Memory Select.kicad_pcb
Folder Kicad / Computer / Coprocessor / Coprocessor Memory Select
Complexity 217 / 1000 (size 147, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 16, 304, 44
Triangles, simulation 348,694 in 53 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 12 MB 284 MB
STEP 52 MB 288 MB
STL 17 MB 278 MB
OBJ 35 MB 272 MB
Visual
GLB 9.4 MB 296 MB
OBJ 28 MB 292 MB

190. Coprocessor Support

Coprocessor Support: stages 4 and 6 take 52% to 81% of a run. Simulation, GLB takes 3.6 s. Simulation, STEP takes 4.9 s. Simulation, STL takes 3.7 s. Simulation, OBJ takes 5.4 s. Visual, GLB takes 5.6 s. Visual, OBJ takes 6.9 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 1.3 0.3 ms 1.3 63 ms 0.2 0.2 3.6
Simulation, STEP 0.1 0.3 1.4 0.4 ms 1.4 1.3 0.2 0.2 4.9
Simulation, STL 0.1 0.3 1.3 0.2 ms 1.4 91 ms 0.2 0.2 3.7
Simulation, OBJ 0.1 0.4 1.5 0.3 ms 1.3 1.7 0.2 0.2 5.4
Visual, GLB 0.1 0.3 1.4 0.2 ms 3.1 57 ms 0.4 0.2 5.6
Visual, OBJ 0.1 0.4 1.3 0.2 ms 3.1 1.5 0.4 0.2 6.9
Board Repo: andrewpaterson/658-Computer
Board: Coprocessor Support.kicad_pcb
Folder Kicad / Computer / Coprocessor / Coprocessor Support
Complexity 225 / 1000 (size 155, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 18, 447, 74
Triangles, simulation 417,018 in 65 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 14 MB 267 MB
STEP 62 MB 322 MB
STL 21 MB 267 MB
OBJ 42 MB 332 MB
Visual
GLB 11 MB 332 MB
OBJ 34 MB 324 MB

191. Coprocessor Transceiver

Coprocessor Transceiver: stages 4 and 6 take 50% to 83% of a run. Simulation, GLB takes 3.2 s. Simulation, STEP takes 4.1 s. Simulation, STL takes 3.2 s. Simulation, OBJ takes 4.6 s. Visual, GLB takes 4.8 s. Visual, OBJ takes 5.4 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.3 1.2 0.4 ms 1.2 48 ms 0.2 0.2 3.2
Simulation, STEP 0.1 0.3 1.0 0.2 ms 1.1 1.2 0.2 0.2 4.1
Simulation, STL 0.1 0.3 1.2 0.2 ms 1.1 0.1 0.2 0.2 3.2
Simulation, OBJ 0.1 0.3 1.1 0.3 ms 1.2 1.5 0.2 0.2 4.6
Visual, GLB 83 ms 0.3 1.3 0.2 ms 2.7 35 ms 0.2 0.2 4.8
Visual, OBJ 96 ms 0.3 1.1 0.3 ms 2.5 1.0 0.2 0.2 5.4
Board Repo: andrewpaterson/658-Computer
Board: Coprocessor Transceiver.kicad_pcb
Folder Kicad / Computer / Coprocessor / Coprocessor Transceiver
Complexity 208 / 1000 (size 138, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 6, 284, 52
Triangles, simulation 315,966 in 38 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 11 MB 235 MB
STEP 48 MB 273 MB
STL 16 MB 241 MB
OBJ 32 MB 265 MB
Visual
GLB 7.8 MB 254 MB
OBJ 23 MB 256 MB

192. Graphics Board

Graphics Board: stages 4 and 6 take 55% to 85% of a run. Simulation, GLB takes 47 s. Simulation, STEP takes 58 s. Simulation, STL takes 48 s. Simulation, OBJ takes 72 s. Visual, GLB takes 76 s. Visual, OBJ takes 95 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.5 4.1 21.8 2 ms 17.4 0.9 2.4 0.3 47.3
Simulation, STEP 0.6 4.2 21.5 1 ms 17.3 12.0 2.3 0.3 58.2
Simulation, STL 0.6 4.2 21.8 2 ms 17.1 1.8 2.4 0.4 48.3
Simulation, OBJ 0.6 4.3 22.0 2 ms 17.1 24.8 2.4 0.3 71.6
Visual, GLB 0.5 4.0 22.0 2 ms 43.0 0.5 6.0 0.2 76.4
Visual, OBJ 0.6 4.2 22.1 2 ms 44.3 16.5 6.7 0.2 94.6
Board Repo: andrewpaterson/658-Computer
Board: Graphics Board.kicad_pcb
Folder Kicad / Computer / Graphics / Graphics Board
Complexity 274 / 1000 (size 194, features 80)
KESE features through vias, rounded,
trapezoid or chamfered pads,
curved board outline,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 10 (20260206)
Parts, tracks, vias 28, 4,219, 433
Triangles, simulation 5,741,322 in 422 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 189 MB 1.7 GB
STEP 816 MB 2.1 GB
STL 287 MB 1.7 GB
OBJ 606 MB 3.6 GB
Visual
GLB 127 MB 2.1 GB
OBJ 409 MB 2.7 GB

193. Graphics Main Data

Graphics Main Data: stages 4 and 6 take 49% to 81% of a run. Simulation, GLB takes 2.7 s. Simulation, STEP takes 3.7 s. Simulation, STL takes 2.7 s. Simulation, OBJ takes 3.9 s. Visual, GLB takes 4.2 s. Visual, OBJ takes 4.9 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.1 0.2 1.0 0.2 ms 0.9 50 ms 0.2 0.3 2.7
Simulation, STEP 0.1 0.2 1.0 0.2 ms 0.9 1.1 0.1 0.2 3.7
Simulation, STL 99 ms 0.2 1.1 0.2 ms 0.9 65 ms 0.1 0.2 2.7
Simulation, OBJ 0.1 0.2 0.9 0.2 ms 1.0 1.3 0.2 0.2 3.9
Visual, GLB 0.1 0.2 1.1 0.2 ms 2.4 29 ms 0.2 0.2 4.2
Visual, OBJ 0.1 0.2 1.1 0.2 ms 2.3 0.8 0.2 0.2 4.9
Board Repo: andrewpaterson/658-Computer
Board: Graphics Main Data.kicad_pcb
Folder Kicad / Computer / Graphics / Graphics Main Data
Complexity 203 / 1000 (size 133, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 8, 227, 20
Triangles, simulation 254,212 in 44 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 8.7 MB 238 MB
STEP 39 MB 249 MB
STL 13 MB 229 MB
OBJ 25 MB 233 MB
Visual
GLB 6.2 MB 223 MB
OBJ 18 MB 216 MB

194. Graphics Signals

Graphics Signals: stages 4 and 6 take 50% to 81% of a run. Simulation, GLB takes 5.3 s. Simulation, STEP takes 6.7 s. Simulation, STL takes 5.0 s. Simulation, OBJ takes 7.1 s. Visual, GLB takes 7.9 s. Visual, OBJ takes 9.6 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.5 2.1 0.5 ms 1.8 83 ms 0.3 0.2 5.3
Simulation, STEP 0.2 0.5 2.0 0.4 ms 1.8 1.7 0.3 0.2 6.7
Simulation, STL 0.2 0.5 1.9 0.3 ms 1.8 0.1 0.3 0.2 5.0
Simulation, OBJ 0.1 0.4 1.9 0.3 ms 1.7 2.5 0.3 0.2 7.1
Visual, GLB 0.2 0.5 2.0 0.3 ms 4.5 74 ms 0.6 0.2 7.9
Visual, OBJ 0.2 0.5 1.9 0.2 ms 4.0 2.0 0.7 0.2 9.6
Board Repo: andrewpaterson/658-Computer
Board: Graphics Signals.kicad_pcb
Folder Kicad / Computer / Graphics / Graphics Signals
Complexity 234 / 1000 (size 164, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 28, 597, 84
Triangles, simulation 491,460 in 57 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 17 MB 320 MB
STEP 78 MB 358 MB
STL 25 MB 297 MB
OBJ 50 MB 377 MB
Visual
GLB 14 MB 381 MB
OBJ 41 MB 409 MB

195. Graphics Transparency

Graphics Transparency: stages 4 and 6 take 47% to 83% of a run. Simulation, GLB takes 5.4 s. Simulation, STEP takes 7.2 s. Simulation, STL takes 5.6 s. Simulation, OBJ takes 8.6 s. Visual, GLB takes 8.6 s. Visual, OBJ takes 11 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.6 2.1 0.2 ms 1.9 95 ms 0.3 0.3 5.4
Simulation, STEP 0.2 0.5 2.0 0.3 ms 2.0 1.9 0.4 0.2 7.2
Simulation, STL 0.2 0.6 2.2 0.7 ms 2.1 0.1 0.3 0.2 5.6
Simulation, OBJ 0.2 0.5 2.1 0.3 ms 1.9 3.3 0.3 0.2 8.6
Visual, GLB 0.2 0.6 2.3 0.5 ms 4.8 67 ms 0.4 0.2 8.6
Visual, OBJ 0.2 0.6 2.1 0.3 ms 4.6 2.3 0.5 0.2 10.5
Board Repo: andrewpaterson/658-Computer
Board: Graphics Transparency.kicad_pcb
Folder Kicad / Computer / Graphics / Graphics Transparency
Complexity 227 / 1000 (size 157, features 70)
KESE features through vias, rounded,
trapezoid or chamfered pads,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 16, 545, 89
Triangles, simulation 469,960 in 55 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 16 MB 283 MB
STEP 73 MB 348 MB
STL 24 MB 293 MB
OBJ 47 MB 353 MB
Visual
GLB 13 MB 373 MB
OBJ 39 MB 367 MB

196. LCD Board

LCD Board: stages 4 and 6 take 54% to 85% of a run. Simulation, GLB takes 17 s. Simulation, STEP takes 21 s. Simulation, STL takes 17 s. Simulation, OBJ takes 25 s. Visual, GLB takes 26 s. Visual, OBJ takes 31 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 1.5 8.1 0.7 ms 5.7 0.3 0.9 0.2 16.9
Simulation, STEP 0.3 1.5 7.8 0.7 ms 5.9 4.4 0.9 0.3 21.0
Simulation, STL 0.3 1.4 7.8 0.7 ms 5.9 0.5 0.8 0.2 17.0
Simulation, OBJ 0.3 1.4 7.9 1 ms 5.7 8.8 0.8 0.2 25.2
Visual, GLB 0.3 1.5 7.9 0.7 ms 14.0 0.2 1.5 0.2 25.8
Visual, OBJ 0.3 1.5 7.8 0.6 ms 13.9 6.0 1.4 0.2 31.0
Board Repo: andrewpaterson/658-Computer
Board: LCD Board.kicad_pcb
Folder Kicad / Computer / LCD / LCD Board
Complexity 248 / 1000 (size 168, features 80)
KESE features through vias, rounded,
trapezoid or chamfered pads,
curved board outline,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 17, 1,151, 117
Triangles, simulation 1,760,916 in 194 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 59 MB 680 MB
STEP 246 MB 795 MB
STL 88 MB 628 MB
OBJ 181 MB 1.2 GB
Visual
GLB 39 MB 891 MB
OBJ 120 MB 923 MB

197. LCD Display

LCD Display: stages 4 and 6 take 53% to 82% of a run. Simulation, GLB takes 7.5 s. Simulation, STEP takes 9.2 s. Simulation, STL takes 7.4 s. Simulation, OBJ takes 11 s. Visual, GLB takes 11 s. Visual, OBJ takes 14 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.3 0.7 3.0 0.4 ms 2.7 0.1 0.4 0.3 7.5
Simulation, STEP 0.2 0.6 3.0 0.4 ms 2.4 2.3 0.4 0.2 9.2
Simulation, STL 0.3 0.6 2.9 0.4 ms 2.8 0.2 0.4 0.2 7.4
Simulation, OBJ 0.2 0.7 3.0 0.5 ms 2.8 3.5 0.4 0.2 10.9
Visual, GLB 0.2 0.7 2.8 0.4 ms 6.4 88 ms 0.7 0.2 11.2
Visual, OBJ 0.2 0.6 3.2 0.5 ms 6.2 2.8 0.8 0.2 14.0
Board Repo: andrewpaterson/658-Computer
Board: LCD Display.kicad_pcb
Folder Kicad / Computer / LCD / LCD Display
Complexity 246 / 1000 (size 166, features 80)
KESE features through vias, rounded,
trapezoid or chamfered pads,
curved board outline,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 20, 878, 107
Triangles, simulation 720,300 in 101 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 25 MB 348 MB
STEP 111 MB 442 MB
STL 36 MB 358 MB
OBJ 73 MB 527 MB
Visual
GLB 19 MB 510 MB
OBJ 57 MB 514 MB

198. Clock Device

Clock Device: stages 4 and 6 take 51% to 81% of a run. Simulation, GLB takes 4.9 s. Simulation, STEP takes 6.2 s. Simulation, STL takes 4.8 s. Simulation, OBJ takes 7.2 s. Visual, GLB takes 7.2 s. Visual, OBJ takes 9.1 s

Mode and format 1–2 read 3 resolve 4 geometry 5 materials 6 assemble 7 write 8 verify start-up and exit Total
Simulation, GLB 0.2 0.5 2.0 0.4 ms 1.7 87 ms 0.3 0.2 4.9
Simulation, STEP 0.2 0.5 1.9 0.5 ms 1.5 1.5 0.3 0.2 6.2
Simulation, STL 0.2 0.5 1.9 0.3 ms 1.5 0.2 0.3 0.2 4.8
Simulation, OBJ 0.2 0.5 2.0 0.3 ms 1.6 2.4 0.3 0.2 7.2
Visual, GLB 0.2 0.5 2.0 0.3 ms 3.9 57 ms 0.4 0.2 7.2
Visual, OBJ 0.2 0.5 1.9 0.2 ms 3.9 2.0 0.4 0.3 9.1
Board Repo: andrewpaterson/658-Computer
Board: Clock Device.kicad_pcb
Folder Kicad / Computer / Main / Clock Device
Complexity 236 / 1000 (size 156, features 80)
KESE features through vias, rounded,
trapezoid or chamfered pads,
curved board outline,
knockout text, stack-up,
dielectric εr and tanδ
Tested 9th November 2026
Copper layers 2
File format KiCad 9 (20241229)
Parts, tracks, vias 18, 446, 79
Triangles, simulation 474,398 in 72 parts
Verifier PASS in all six runs
File
type
File
size
Peak memory
used
Simulation
GLB 16 MB 280 MB
STEP 73 MB 346 MB
STL 24 MB 278 MB
OBJ 48 MB 369 MB
Visual
GLB 12 MB 351 MB

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