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mshahbaz edited this page Sep 12, 2012 · 1 revision

Name

nf10_switch

Version

v1.00a

Author

Michaela Blott (Xilinx)

Type

pcore (HW)

Location

netfpga-10g/lib/hw/contrib/pcores/nf10_switch_v1_00_a/

Interface Types

AXI4-Stream

Busses

S_AXIS: Slave AXI4-Stream bus, Variable width

M_AXIS: Master AXI4-Stream bus, Variable width

Parameters

C_AXIS_DATA_WIDTH: Data width of the AXI4-Stream bus.

C_USER_WIDTH: Data width of the TUSER field.

Register map

Description

This block implements a bare minimum functionality of a learning CAM switch. In general, it's useful as a base module for implementing more complex custom switching fabrics.

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