Getting Started Guide

Welcome to the getting started guide! This guide is for new users. It covers:

1. System Requirements.
2. Downloading the code repository.
3. Installation.
4. Testing your board.
5. What to do next!

Let's get started...

Section 1 - System Requirements

To use the NetFPGA-10G code base, your system needs to meet the following requirements.

1. Operating System - In principle, any operating system that can run Xilinx ISE Design Suite should work for composing and synthesizing the IP in the code base. However, please note that the NetFPGA team develops strictly on Linux. While hardware composition and synthesis can be done on any platform which runs the Xilinx tools, software components of the NetFPGA-10G platform have been and will continue to be developed initially for Linux. The reference Linux distribution for NetFPGA-10G development is Fedora 14 (x86_64). The Reference Operating System page provides instructions on setting up a Fedora 14 (x86_64) development system. Additionally, the Ubuntu Operating System page provides set up information for Ubuntu 12.04 LTS.
2. Xilinx Tools - To do any development you will need the following Xilinx software: ISE, EDK, and iSim. Please note that the NetFPGA team strives to always use the latest version of the tools, and we strongly advise all other developers to do the same. At the time of writing, that version is Xilinx ISE Design Suite v13.4.
3. Xilinx IP core licences - In order to build bitstreams, you must have a valid license for Xilinx 10G MAC.
4. Network Cables - The NetFPGA-10G network interfaces support both 1G and 10G standard. Here is a list of Verified 1G and 10G cables
5. Host Motherboard - The NetFPGA 10G works both standalone and in hosts, if you intend to use the NetFPGA 10G board in a host you will need to become familiar with other experiences with motherboards. Beware that some motherbaords are known not to work with the NetFPGA 10G boards.
6. Other Stuff - A Xilinx Programming Cable such as this one is required to program the board at least once. Later on the configuration over PCIe feature of the Skellig release can be used to program the FPGA. At this time, an RS232 Null Modem cable is also needed in some of the projects to interact with the MicroBlaze embedded processor for register read/write.

Section 2 - Registering for the Beta Program

Prior to accessing code we need people to register. We do this to understand who is using NetFPGA so please give as complete answers as you can. The better usage we can show the more support we can motivate sponsors to provide.

Feel free to explore the wiki; it is publicly readable.

Continue on from here once your registered

Section 2a - Downloading the Code Base

The Beta code release is available to the Beta community as either a git repository or tarball.

If you wish to use a stabile release, the most recent stabile release is available as a tarball from the list here. The latest release is the tag at the top.

Edit access to this community wiki is co-located with the live repository. If you have access to the repository, you also have access to this wiki.

Section 2b - Downloading the Live Code Base (Developers and people who wish to use potentially unstable code)

The current developers code base is available as a git repository hosted on GitHub

After you have gained access to the repository, change into the desired directory and execute the following command:

git clone git@github.com:NetFPGA/NetFPGA-10G-live.git

For more information about git and github in general, please consult github help.

Section 3 - Installation

When you have the code in place, you will need to run a one-time installation script:

1. Make sure you have Xilinx ISE installed and $XILINX, $XILINX_EDK environment variables are set correctly. Check that the environment variable $LD_PRELOAD is not set.
2. Make sure the 10G MAC is correctly licensed. You may run "xlicmgr status -c ten_gig_eth_mac". Only "Full" or "Hardware Evaluation" will allow you to build the bitfile.
3. Go to the top-level NetFPGA-10G directory
4. Run "make cores"

The above command will do the following:

1. Copy necessary files from your Xilinx ISE installation
2. Generate necessary IP cores (such as 10G Ethernet MAC and XAUI) and put them in the hardware library
3. Patch some of the copied files so that the copied IP can be synthesized on the NetFPGA-10G board's Virtex-5 FPGA device.

Section 4 - Testing Your Board

Before using your NetFPGA-10G board, you need to make sure it is working correctly. To do this, you will need to run both the Production Test and the separate RLDRAM Test. If these tests indicate any hardware problems with your board, please return it to HiTech Global (HTG) immediately.

Section 5 - What to do Next!

If both the Production Test and the separate RLDRAM test have passed, then you have a working board and you are ready to rock. What should you do now? Here are some suggestions:

If you're not familiar with Xilinx EDK, you might want to check out the EDK Tutorials page.

For an explanation of the organization and use of the code base, please see the Code Base Organization and Use section.

For information on individual projects, please see the Projects section.

For information on individual IP cores in the library, please see the IP Library section.

For information on the interface standards for NetFPGA-10G IP, please see the Standard IP Interfaces section.

For detailed information on the NetFPGA-10G board, please see the NetFPGA-10G Board section.

And for all other information on the platform, please browse the NetFPGA-10G Platform Documentation.