NetFlow simple 10G Bram
See the design document for the full documentation.
- Project Specific cores
- NetFPGA-10G Specific cores
- Xilinx AXI Peripheral
- Microblaze Subsystem
This project captures the active flows received on a 10 Gbps Ethernet interface and exports them via other 10 Gbps Ethernet interface using the NetFlow v5 protocol. For more information see the design document.
- Build the bitfile. Please read the README under projects/netflow_simple_10g_bram/ for detailed instructions. You can also use the pre-built bitfile supplied with the code to skip this step.
- Follow Section 5 of the design document for testing the design.
Please refer to the design document provided above for further details.