Firtool Release 1.51.0

What's Changed

• [FIRRTL] Add LowerGroups Pass by @seldridge in #5659
• [Calyx]Add invoke pass by @linuxlonelyeagle in #5635
• [FIRRTL][CAPI] Add a new function to get ParamDeclAttr by @SpriteOvO in #5792
• [FIRRTL][IMCP] Refactor and generalize overdefined operations by @uenoku in #5797
• [FIRRTL][HW] Add verbatim literal support by @rwy7 in #5774
• [Ibis] Add ibis.this by @mortbopet in #5794
• [FIRRTL][Inliner] Support per-field syms, update local users. by @dtzSiFive in #5776
• [FIRRTL][NFCI] Cleanup misc "inner_sym" uses. by @dtzSiFive in #5802
• [FIRRTL] Reject unsupported port symbols on instance + class ops. by @dtzSiFive in #5796
• [cmake][CI] Use llvm_gtest target directly. by @dtzSiFive in #5804
• [OM] Add om.list_create to create lists of objects by @nandor in #5418
• [Pipeline] Remove ext input from pipelines by @mortbopet in #5805
• [Seq] Add an inner symbol to permit references to clock gates by @nandor in #5799
• [FIRRTL][NFC] Add fir tests relating to probes, from spec. by @dtzSiFive in #5781
• [FIRRTL] Clean up RWProbe's verifier by @youngar in #5806
• [HW][Seq][NFC] Fix layering re:includes to FIRRTL headers. by @dtzSiFive in #5811
• [FIRRTL] add DedupGroupAnnotation by @albertchen-sifive in #5787
• [CI] Switch back to ccache action for nightlies by @teqdruid in #5813
• [PipelineToHW] Fix PipelineToHW TSAN issue by @mortbopet in #5817
• [FIRRTL] Add PathOp by @youngar in #5808
• [FIRRTL][LowerToHW] Fix race by processing ports before parallel, fix failure path. by @dtzSiFive in #5818
• [Ibis] Add containerize pass by @mortbopet in #5810
• [FIRRTL][Inliner][NFC] Cleanup with some scoped state structs. by @dtzSiFive in #5812
• [FIRRTL] Add ObjectSubfieldOp by @rwy7 in #5768
• [FIRRTL] RWProbeOp: Add requirement+verify def before use. by @dtzSiFive in #5807
• [ESI] Remove auto-wrap functionality by @teqdruid in #5823
• [FIRRTL][HW] Replace ModuleNamespace with InnerSymbol one. by @dtzSiFive in #5819
• [CMake] Implement add_circt_tool() by @nickelpro in #5821
• [CI] Attempt to fix nightly cache evictions by @teqdruid in #5826
• Bump LLVM by @rwy7 in #5825
• [Python] Handle inner symbols in attribute_to_var by @uenoku in #5824
• [FIRRTL] RWProbeOp: support width inference. by @dtzSiFive in #5782
• [FIRRTL][Emitter] RWProbeOp, RefCast, better forceable support. by @dtzSiFive in #5779
• [FIRRTL][CAPI] Fix undefined reference for mlirExportFIRRTL by @SpriteOvO in #5790
• [FIRRTL][Import][NFC] Drop unused annotationMap, touchup comment. by @dtzSiFive in #5836
• [ci] Finish, use reusable workflow for build/test/install by @seldridge in #5838
• [LowerToHW] Remove temporary wire optimization by @nandor in #5837
• [FIRRTL][BlackboxReader] Don't insert outside circuit. by @dtzSiFive in #5840
• [FIRRTL][Emitter] Sync to use "latest", and bump that to 3.1.0. by @dtzSiFive in #5839
• [HW/Support] Introduce InstanceGraph interface by @mortbopet in #5833
• [FIRRTL][OMIR] Remove deprecated OMConstant node by @youngar in #5841

New Contributors

• @nickelpro made their first contribution in #5821

Full Changelog: firtool-1.50.0...firtool-1.51.0

Firtool Release 1.50.0

What's Changed

• [HW][InnerSym] Use uint64_t for method names involving FieldID. by @dtzSiFive in #5739
• [Calyx][ESI[FIRRTL][SV] Use getAnalysis for SymbolTable and others. by @dtzSiFive in https://github.com//pull/5733
• Add codeowners for Calyx by @rachitnigam in #5631
• [NFC] factor out port printing by @darthscsi in #5745
• [CombFolds] Optimize OrOp whose operands are mux of the same value and a zero. by @uenoku in #5730
• [FirParser][Typealias] Reject keyword as type alias name by @prithayan in #5737
• New Module Parse Style by @darthscsi in #5748
• [LowerToHW] Wires used for output ports should get their symbols. by @dtzSiFive in #5726
• Abstract out PortList from HWModuleLike by @darthscsi in #5749
• ExportVerilog emits ports preserving their order. by @darthscsi in #5738
• Use InnerSymAttr and InnerSymOpInterface by @youngar in #5703
• [PyCDE] Post innersym change fixes by @teqdruid in #5750
• [FIRRTL][EmitOMIR] Don't insert above pass level. by @dtzSiFive in #5751
• [OM] Implement OM linker pass by @uenoku in #5743
• [FIRRTL] Add class type by @rwy7 in #5753
• [ESI] ESITranslations: rework diag interception, fix memory error. by @dtzSiFive in #5755
• [FIRRTL] Add ObjectOp by @rwy7 in #5759
• [HW][FIRRTL] Delete unused ProbeOp by @youngar in #5764
• [ExportVerilog] Fix Expr/PropertyEmitter token buffer crash by @fabianschuiki in #5765
• [FIRRTL] Rename BigIntType to FIntegerType by @youngar in #5766
• [CI] firtool release cleanup by @seldridge in #5741
• [ci] Add nightly firtool release build, options to workflow_dispatch by @seldridge in #5742
• [ESI][HW][DC][OM][Comb][Ibis] Documentation refactoring and fixes by @teqdruid in #5767
• [HW] InnerSymProperties: emit error when visibility is invalid by @youngar in #5769
• [CI] Use a consistent key for ccache caching in Short Integration Tests by @youngar in #5770
• [FIRRTL][LowerXMR] Always insert nodes for probes, don't block opts. by @dtzSiFive in #5746
• [Ibis] Add container and port operations by @mortbopet in #5747
• [SVExtractTestCode] Inline input only modules even when no operation … by @uenoku in #5771
• [FIRRTL] Use symbols in ResolveTraces verbatims by @seldridge in #5752
• [Verif] Add has_been_reset op by @fabianschuiki in #5694
• [NFC] .clang-tidy: Disable misc-use-anonymous-namespace . by @dtzSiFive in #5775
• [Seq][LowerFIFO] Fix non-determinism, enable test. by @dtzSiFive in #5757
• [FIRRTL] Add has_been_reset intrinsic by @fabianschuiki in #5777
• [FIRRTL] Relax ODS defined FIRRTL base subtypes to allow type aliases by @uenoku in #5652
• Start of LLVM bump by @mikeurbach in #5760
• [FIRRTL][MergeConnections] Fix merging non-passive or unsized parent. by @dtzSiFive in #5780
• [FIRRTL][Namespace] Fix and simplify, use walkSymbols. by @dtzSiFive in #5783
• [PyCDE] Fixed NoneType name in Mux by @Dragon-Git in #5785
• [Ibis] Add instance/port references and related ops by @mortbopet in #5773
• [FIRRTL][InferWidths] Fix handling of non-base ports in instances. by @dtzSiFive in #5791

Full Changelog: firtool-1.49.0...firtool-1.50.0

Firtool Release 1.37.2

What's Changed

• [firtool 1.37] Enhanced Firtool Release Artifacts by @jackkoenig in #5498
• Backport ETC and UNROnly fixes to firtool 1.37 by @uenoku in #5744

Full Changelog: firtool-1.37.1...firtool-1.37.2

firtool-1.49.0

What's Changed

• [FIRRTL] Add getAsKey to type storages, NFC by @uenoku in #5614
• [Calyx]Add invoke operation. by @linuxlonelyeagle in #5558
• [OM] Add external class declaration. by @mikeurbach in #5611
• [OM] Add Python bindings for ListAttr by @nandor in #5617
• [Ibis] Boilerplate for a new dialect by @teqdruid in #5609
• [Calyx] Fix use after free bug. by @linuxlonelyeagle in #5620
• [CI] Fix nightly wheel upload by @rsetaluri in #5623
• [HW][ESI][MSFT][NFCI] HWInnerRefAttr -> InnerRefAttr. by @dtzSiFive in #5624
• [FIRRTL][GrandCentral] Stop using ModuleNamespace for unique names by @youngar in #5619
• [FIRRTL][Utils] Drop support for hinting at symbol names. by @dtzSiFive in #5627
• [Python] Fix wheel publishing by @seldridge in #5608
• [FIRRTL] Use type_{cast, isa, dyn_cast} and FIRRTLTypeSwitch by @uenoku in #5539
• [Pipeline] Allow explicitly named registers and passthroughs by @mortbopet in #5602
• [Calyx] Add Repeat Op by @calebmkim in #5606
• [ExportVerilog] Fix crash when spilling LTL expr to wire by @fabianschuiki in #5625
• [CI] Split wheel upload into stages by @rsetaluri in #5628
• [FIRRTL][InferResets] Peel interesting operations paralelly, NFC by @uenoku in #5629
• [Verif] Add format_verilog_string, print operations by @mortbopet in #5616
• [Arc] Add LowerFirMems pass to Arcilator pipeline by @TaoBi22 in #5644
• [FIRRTL][InferRW] Drop unnecessary ModuleNamespace usage. by @dtzSiFive in #5643
• [FIRRTL][LowerTypes] Support per-field inner symbols. by @dtzSiFive in #5610
• [FIRRTL] Refactor getInnerRefTo/getOrAddInnerSym, support fields. by @dtzSiFive in #5633
• [SCFToCalyx] Use sequential memories by @andrewb1999 in #5599
• [Docs] Update dialects.dot for LoopSchedule by @andrewb1999 in #5632
• [Ibis] assign codeowners by @mortbopet in #5641
• [Arc] Add dedup stats by @TaoBi22 in #5583
• [FIRRTL] Fix type cast to look through type alias for type interfaces by @uenoku in #5642
• [FIRRTL][Folds] Fix AggOneShot to avoid non-passive aggregates. by @dtzSiFive in #5651
• [NFC] Move functions from HWMutableModuleLike to HWModuleLike by @darthscsi in #5656
• [FIRRTL] Add GroupDeclOp and GroupOp by @seldridge in #5529
• [FIRRTL] Add Groups to LowerTypes by @seldridge in #5649
• [SV] Add constraint and test rejecting subst w/o message by @dtzSiFive in #5666
• [FIRRTL] Add Groups to ExpandWhens by @seldridge in #5648
• [HW][Support][NFC] Move generic module parsing func into support by @teqdruid in #5657
• [Ibis] Structural basics: classes, functions, and calls by @teqdruid in #5646
• [PyCDE] Add implemented of comparison operators by @Dragon-Git in #5654
• Replace old InnerName helper with InnerSymbolTable by @youngar in #5672
• [Seq] Add FIFO lowering by @mortbopet in #5630
• [NFC] unify ModulePort and PortInfo by @darthscsi in #5675
• [FIRRTL][LOA] Fix handling of ref-only-agg interior element. by @dtzSiFive in #5677
• [FIRRTL][LOA] Detect and error if find sym on open agg field. by @dtzSiFive in #5678
• [FIRRTL] Add parsing and emission of optional groups by @seldridge in #5663
• [Seq] Add a preset value to allow fir registers to be preset by @nandor in #5667
• [PyCDE] Add implemented of comparison operators by @Dragon-Git in #5673
• [PyCDE] Add or/and reduce by @Dragon-Git in #5662
• [FIRRTL] Add RWProbe op. by @dtzSiFive in #5669
• [FIRRTL][LowerXMR] Support RWProbeOp. by @dtzSiFive in #5671
• [NFC] change ModulePortInfo to store in a single array and get rid of redundant APIs. This is preparation for not splitting inputs and outputs. by @darthscsi in #5680
• [SVExtractTestCode] Fix a bug that instance inlining doesn't update inner symbols and clone sv.bind by @uenoku in #5679
• [FIRRTL] Make DropConst circuit op pass, NFC by @uenoku in #5684
• [CMake] Add MLIRArithOpsInterfacesIncGen dependency by @rsetaluri in #5636
• [FIRRTL] Fix lowering of plusarg value since it returns an integer rather than a bool by @darthscsi in #5607
• [SCF-To-Calyx] Compilation of scf.for loops in certain cases by @calebmkim in #5655
• [CI] Use LLVM_USE_SPLIT_DWARF to reduce time and space. by @dtzSiFive in #5692
• [Python] Remove tablegen file that was deleted upstream. by @mikeurbach in #5697
• [om-linker] Set up boilerplate; parse and concat modules by @uenoku in #5693
• [LowerTypes] Replace isa with type_isa and type switch, NFC by @uenoku in #5699
• [ExportVerilog] Use wire for inlined op operand by @seldridge in #5695
• [HWMemSimImpl] Fix RW port enable gating by @nandor in #5700
• [TypeAlias] Add LowerToHW support for lowering TypeAlias by @prithayan in #5292
• [Calyx] Changed type of getBound() to std::optional<int64_t> by @calebmkim in #5701
• [FIRRTL] Add ClassOp by @rwy7 in #5637
• [Ibis] Call preparation pass -- part 1 by @teqdruid in #5683
• [HW] Consistent HWMemSimImpl ignore-read-enable by @seldridge in #5704
• [FIRRTL] Refactor parseModule into multiple functions by @rwy7 in #5710
• [circt-reduce] Add DropNames Preserving None Pass by @seldridge in #5713
• [FIRRTL] Remove {circuit,module}Target from FIRParser by @rwy7 in #5712
• [DC] dc.value should only take one type by @mortbopet in #5702
• [HW] Improve generated names in HWMemSimImpl by @seldridge in #5707
• [FIRRTL][NFC] Fix accidental substitution, pohwist -> portlist. by @dtzSiFive in #5718
• [FIRRTL][LOA] Handle inner symbols on open aggs hw components. by @dtzSiFive in #5709
• [FIRRTL][FIRParser] Parse rwprobe of port into RWProbeOp. by @dtzSiFive in #5670
• [DC] Add cast to/from ESI ops by @mortbopet in #5676
• [FIRRTL][SFCTests] Fixup dedup tests. by @dtzSiFive in #5720
• [FIRRTL] Add FIRParser support for classes by @rwy7 in #5705
• [HW] Add InnerSymAttr python bindings by @youngar in #5711
• [IMCP] Mark PlusArgs intrinsics as overdefined by @jackkoenig in #5725
• [circt-reduce] OperandForwarder One Operand by @seldridge in #5714
• [circt-reduce] Add FIRRTL name sanitization by @seldridge in #5723
• [HW] Allow default builders for hw.wire. by @mikeurbach in #5728
• [HW][HWModules] Add ability to set/erase port symbols. by @dtzSiFive in #5724
• [FIRRTL][FIRParser] BigInt -> Integer . by @dtzSiFive in #5734
• [FIRRTL] Add path types by @youngar in #5735
• [FIRRTL][FIRParser] Gate properties on 3.1.0+. by @dtzSiFive in #5736
• [LowerXMR] iterate to handle ref.sub . by @dtzSiFive in #5732
• [FIREmitter] support property types and expressions by @youngar in #5740

New Contributors

• @Dragon-Git made their first contribution in #5654

Full Changelog: firtool-1.48.0...firtool-1.49.0

Firtool Release 1.48.0

This is a release that was cut, primarily, to fix a problem with the CIRCT Python API in the 1.47.0 release.

What's Changed

• [FIRRTL][LowerTypes] fix error paths to fail pass. by @dtzSiFive in #5593
• [HW] Add hw.triggered op by @mortbopet in #5582
• [FIRRTL][LowerTypes] Simplify fieldID handling code. by @dtzSiFive in #5596
• [FIRRTL][OMIR] Detect and error if tracker resolution is ambiguous. by @dtzSiFive in #5591
• [FIRRTL][LowerTypes] Don't silently drop symbols on type-lowered mem's. by @dtzSiFive in #5594
• [OM] Extract interfaces for ClassLike ops and ClassFieldLike ops, NFC. by @mikeurbach in #5595
• [ESI] Improve the way to/from server requests are handled by @teqdruid in #5586
• [Python] Ensure attribute_to_var only accesses value when legal. by @mikeurbach in #5612

Full Changelog: firtool-1.47.0...firtool-1.48.0

Firtool Release 1.47.0

What's Changed

• [FIRRTL] -emit-asserts-as-sva changes all asserts by @seldridge in #5565
• [Pipeline] Add missing name arg to builder by @mortbopet in #5572
• [PipelineToHW] Don't CE pipeline regs in non-stallable pipelines by @mortbopet in #5567
• Bump LLVM to 86bc2e3ae905f0668f12c6f52191c1273936da80 by @uenoku in #5579
• [SCF-To-Calyx] Fixes Bugs by @calebmkim in #5573
• [LowerFirMem] Insert memory modules before first user by @fabianschuiki in #5587
• Fix ordering of operands in ScheduledPipelineOp::build by @blakep-msft in #5585
• [HW][SV] Move string type from SV to HW by @teqdruid in #5588

New Contributors

• @blakep-msft made their first contribution in #5585

Full Changelog: firtool-1.46.0...firtool-1.47.0

Firtool Release 1.46.0

What's Changed

• [Dedup] Parallelize hash calculation, NFCI by @uenoku in #5518
• [FIRRTL] Delete force/release statements with constant-false predicates. by @dtzSiFive in #5555
• [FIRRTL][LowerXMR][NFCI] Minor touchups. by @dtzSiFive in #5549
• [Arc] Fix header generation when depth is -1 by @zyedidia in #5501
• [FIRParser] Allocate subParser on heap by @uenoku in #5560
• [FIRRTL] Allow strictconnect to have different but structurally equivalent types by @uenoku in #5515
• [Support/ESI] Add generic port conversion utility by @mortbopet in #5533
• [FIRRTL][LowerXMR] Support ref.sub. by @dtzSiFive in #5551
• [FIRRTL][FIRParser] Parse rwprobe to element of aggregate. by @dtzSiFive in #5550
• [FIRRTL][LowerXMR] Include forceable + force/release ops in zero-width handling. by @dtzSiFive in #5553
• Emit companion Assumes for UNR Only SVAs as Immediate (instead of concurrent) by @girishpai in #5561
• [FIRRTLToHW] Lower memories to seq.firmem by @fabianschuiki in #5025
• [Pipeline] Refactor pipeline ops to include naming info by @mortbopet in #5548
• [HW/SV] Add hw.inout elimination pass by @mortbopet in #5390
• [FIRRTL][LOA][NFC] Tweak structure dump/print. by @dtzSiFive in #5570

Full Changelog: firtool-1.45.0...firtool-1.46.0

Firtool Release 1.45.0

What's Changed

• [LowerIntrinsics] Touchup to avoid unused instance path cache. by @dtzSiFive in #5411
• [Comb] Truth table operation by @teqdruid in #5404
• [OM] Expose ReferenceAttr to Python by @nandor in #5413
• [FIRRTL][InferWidths] Tweak debug printing to show names and more bits. by @dtzSiFive in #5415
• [FIRRTL] Clean up instances in ExtractClasses. by @mikeurbach in #5395
• [CI] Push circt python wheel to pypi nightly by @rsetaluri in #5412
• [Pipeline] Add verifiers and fix register materialization pass by @mortbopet in #5386
• [Pipeline] Add "ext" inputs to pipelines by @mortbopet in #5347
• [DCToHW] Add DCToHW conversion pass by @mortbopet in #5298
• [FIRRTL] ExtractClasses: Fix use-after-free. by @dtzSiFive in #5429
• [Reduce] Add missing build deps on HW/FIRRTL dialects. by @dtzSiFive in #5430
• [CAPI][NFC] Address function prototype warnings by @trilorez in #5432
• [Python] Fix import path by @teqdruid in #5434
• [PyCDE] Fix parameterized extern mods by @teqdruid in #5435
• [Comb] Lower comb pass boilerplate by @teqdruid in #5433
• [LowerComb] Truth table to mux tree lowering by @teqdruid in #5405
• [FIRRTL] Support EnumTypes in error messages by @youngar in #5439
• PTECH-747: llvm bump on circt. Found 2 errors. by @mbalboni07 in #5414
• [Seq] Add seq.fifo ODS and rationale by @mortbopet in #4189
• [CMake] Make cmake config more reliable? by @maerhart in #5145
• [FIRRTL] Add mux cell intrinsics by @uenoku in #5428
• [FIRRTL] Add BaseTypeAliasType by @uenoku in #5416
• [ExportVerilog] Remove array literal by @uenoku in #5443
• [FIRRTL][InferResets] Fix reset inference through const cast. by @dtzSiFive in #5370
• [HW] Add struct_create(struct_explode) folder by @maerhart in #5450
• [CI][Win] Reduce peak disk usage after LLVM rebuild. by @dtzSiFive in #5446
• [Seq] Add FirMem op by @fabianschuiki in #5009
• Bump LLVM along Main by @mwachs5 in #5451
• [FIRRTL] Implement alias-aware type casts by @uenoku in #5417
• [FIRRTL] Options for using both @info and .fir, attach .fir as notes. by @dtzSiFive in #4671
• [Seq] Fix FirMemReadWriteOp::canonicalize by @trilorez in #5460
• [SVExtractTestCode] Clone constants even when used by designs as well by @uenoku in #5466
• [SVExtractTestCode] Use name/namehint as a port name by @uenoku in #5464
• [FIRRTL] Reset values added in InferResets are now const. by @trilorez in #5468
• [SeqToSV] Add clock_gate lowering by @mortbopet in #5457
• [Pipeline] add 'go' signal to pipeline by @mortbopet in #5455
• [Pipeline] Add preliminary stall lowering by @mortbopet in #5467
• [FIRRTL] Add type alias parser by @uenoku in #5449
• [FIRRTL] Drop unused repl-seq-mem-circuit option. by @dtzSiFive in #5474
• [Seq] Lower FirMemOp to HWModuleGeneratedOp by @fabianschuiki in #5024
• [Calyx] Add sequential memories by @andrewb1999 in #5471
• [FIRRTL][CHIRRTL] Add dialect C API by @SpriteOvO in #5472
• [FIRRTL] Support instances of property modules in ExtractClasses. by @mikeurbach in #5396
• [FIRRTL][CHIRRTL] C API rename and change some types by @SpriteOvO in #5486
• [NFC][Pipeline] Restructure pipeline dialect tablegen files by @mortbopet in #5475
• [Arc] Eliminate AllocateState moveBefore/isBeforeInBlock combination by @TaoBi22 in #5481
• [FIRRTL][NFC] Add test rejecting connect of properties. by @dtzSiFive in #5491
• Add support for Windows and revamp FIRRTL release artifacts by @jackkoenig in #5470
• [FIRRTL][NFC] Fix typo in Vector type parameter. by @dtzSiFive in #5495
• [FIRRTL][Properties] Add List, Map<K, V> types. by @dtzSiFive in #5492
• [circt-lec] Fixed equivalence check for multiple outputs by @fzi-hielscher in #5358
• [FIRRTLToHW] Add missing twoState attributes by @fzi-hielscher in #5257
• [FIRRTL][CreateSifiveMetadata] Use symbols for memory metadata by @prithayan in #5482
• [SV] Cleanup HWExportModuleHierarchyPass by @seldridge in #5485
• [FIRRTL] Export literal identifiers correctly by @seldridge in #5502
• [InferWidth] Parallelize post processing, NFCI by @uenoku in #5496
• [Comb][ExportVerilog] Support SV attributes for MuxOp by @uenoku in #5487
• [FIRRTL][FIRParser] Rework assert+FALLTHROUGH, NFCI. by @dtzSiFive in #5505
• [FIRRTL] Verify OpenAggs, fix agg-of-properties. by @dtzSiFive in #5508
• [FIRRTL][IMDCE] Remove some cached state by @youngar in #5480
• [LowerFIRRTLToHW] Create less wires with instance ports by @youngar in #5510
• [FIRRTL][IMDCE] Add test for dead output ports, NFC by @youngar in #5512
• [LowerFIRRTLToHW] Use backedges over temporary wires, NFC by @youngar in #5513
• [FIRRTL] Add FIRRTLTypeSwitch by @uenoku in #5456
• [IMDCE] Delete unreachable modules by @uenoku in #5517
• [Arc] Fix dominance issue in GroupResetsAndEnables by @zyedidia in #5511
• [FIRRTL] Canonicalize reductions looking through casts of various forms by @darthscsi in #5499
• [InstanceGraph] Speed up instance graph constructions, NFCI by @uenoku in #5520
• [FIRRTL][FIRPaser] Better diagnostic for unsupported rwprobe's. by @dtzSiFive in #5522
• [InferWidths] Remove expensive walks, NFC by @uenoku in #5523
• [ExportChiselInterface] Support probe types by @trilorez in #5497
• [FIRRTL] Change emitter to v3.0.0 by @seldridge in #5509
• [Calyx] Add Static Groups and Control by @andrewb1999 in #5354
• [PyCDE] Upgrade FSMs to new module style by @teqdruid in #5516
• [LLVM] Weekly bump by @maerhart in #5503
• [FIRRTL] Add containTypeAlias to type storage and define getAnonymousType by @uenoku in #5493
• [Pipeline] Add per-register clock gating by @mortbopet in #5489
• [LowerToHW] Implement MuxCell intrinsics lowering by @uenoku in #5458
• [InferReset] Parallelize the annotations accumulation, NFC by @uenoku in #5534
• [FIRRTL] Canonicalize away CVT and adjust all patterns which matched cvt by @darthscsi in #5527
• [FIRRTL] Remove UninferredWidthCastOp for now. by @dtzSiFive in #5528
• [Support] Add a 'by-name' lookup for HWModuleLike ops by @mortbopet in #5473
• [Comb][Canonicalize] keep attributes during op width narrowing by @7FM in #5532
• [Pipeline] Fix ScheduledPipelineOp builder by @mortbopet in #5540
• [Seq] Canonicalize transitive clock gates by @mortbopet in #5504
• [SCF-to-Calyx] Fix Ordering Bug by @calebmkim in #5526
• Bump LLVM to 015dabd7672f936cdb5bdcad20fe80b17f05c9ca by @mikeurbach in #5546
• [HW] Fix instance ops in hw-flatten-io pass by @mortbopet in #5537
• [FIRRTLFolds] Fix andr(pad(x:sint, n)) -> andr(x) canonicalization by @uenoku in #5547
• [FIRRTL] incorrect canonicalization pattern by @darthscsi in #5556

New Contributors

• @mbalboni07 made their first contribution in #5414
• @fzi-hielscher made their first contribution in #5358
• @calebmkim made their first contribution in #5526

Full Changelog: https://github.com/llvm/circt...

Firtool Release 1.44.0

What's Changed

• [Reducer] Speed up OperationPruner by @maerhart in #5311
• [Pipeline] Fix use-after-free in StageSeparatorToStagePass. by @dtzSiFive in #5313
• [FIRRTL] Add Verif/LTL intrinsics by @fabianschuiki in #5310
• [OM] Bypass constant ops referencing symbols in ExportVerilog by @nandor in #5314
• [MapArith] Introduce --map-arith-to-comb pass by @mortbopet in #5297
• [IMCP] Speed up the bulk connection propagation, NFCI by @uenoku in #5290
• [NFC] LLVM bump by @darthscsi in #5317
• [FIRRTL] Add util support for refsub/open aggs by @dtzSiFive in #5315
• Enum const support by @trilorez in #5321
• Preserve const for getWidthlessType by @trilorez in #5328
• [Pipeline] Add integration test by @mortbopet in #5281
• [Capnp] Move the minimum CMake version logic to only run if capnp is found by @teqdruid in #5335
• [ETC] Extract registers and instances if not in design by @uenoku in #5331
• [OM] Use standard API for getting the base pointer from a vector. by @mikeurbach in #5338
• [Calyx to FSM]Fix the bug when calyx multi-component design lower to fsm. by @linuxlonelyeagle in #5341
• [Python] Add CMake for MacOS C++17 compatibility in wheel build. by @mikeurbach in #5343
• Update FIRRTLAnnotations.md to remove reference to tb_seq_mems.json [NFC] by @mwachs5 in #5342
• [FIRRTL] Make StringType buildable by @youngar in #5344
• [FIRRTL] Add StringConstantOp by @youngar in #5345
• [Comb] Canonicalize a + c1 + c2 into a + (c1 + c2) by @nandor in #5348
• [Comb][FIRRTL][Seq] Fix fusing locations to append not add as metadata. by @dtzSiFive in #5349
• [FIRRTL] Donot rename InstanceOp by @prithayan in #5352
• [SV][ETC] Fix perf bug removing from a SetVector of slice results. by @dtzSiFive in #5353
• [DependenceAnalysis] Check memref dependencies on each loop nest by @matth2k in #5287
• [Arc] Preserve extern modules as internal inputs/outputs by @fabianschuiki in #5069
• [ETC] Don't erase operations used by dead module instances by @uenoku in #5357
• [Pipeline] Refactor pipeline dialect to be block-based by @mortbopet in #5332
• [FIRRTL] Add property assign op instead of using connect by @youngar in #5361
• [FIRParser] Add support for parsing String types by @youngar in #5362
• [FIRParser] Parse PropAssignOps by @youngar in #5365
• [FIRRTL] Explicitly reject rwprobe of types containing const. by @dtzSiFive in #5367
• [FIRRTL][IMDCE] Remove dead operation from live set. by @dtzSiFive in #5369
• [FIRParser] Parse string constants by @youngar in #5368
• [FIRRTL][ExpandWhens] Support properties by @youngar in #5373
• [FIRRTL] Improve PropAssignOp verifiers by @youngar in #5375
• [FIRRTL] Add RefCastOp for reset/width/const differences in refs. by @dtzSiFive in #5372
• [FIRRTL][InferWidths] Skip over property types by @youngar in #5381
• [Pipeline] Add optional stall signal to pipelines by @mortbopet in #5278
• [Pipeline] Add pipeline.latency operation by @mortbopet in #5340
• [Pipeline] Remove LI notion from pipelines by @mortbopet in #5359
• [FIRRTL] Add utility for getting the assignment to a property value. by @mikeurbach in #5374
• [ExportFIRRTL] Implement C API by @SpriteOvO in #5300
• [LowerToHW] Lower clock gate intrinsic to Seq dialect by @fabianschuiki in #5363
• [FIRRTL][LowerXMR] Resolve through refcast operations. by @dtzSiFive in #5376
• [FIRRTL][IMCP] Skip over non-base types by @youngar in #5382
• [FIRRTL][InferWidths] Handle foreign and prop types uniformly by @youngar in #5392
• [FIRRTL][CheckCombLoops] Support property types by @youngar in #5383
• [FIRRTL] Add BigInt property type by @youngar in #5384
• [FIRRTL][LowerTypes] Support RefCast. by @dtzSiFive in #5377
• [FIRRTL][InferWidths] Support RefCastOp. by @dtzSiFive in #5378
• [FIRRTL][InferResets] Support RefCastOp. by @dtzSiFive in #5387
• [FIRParser] Add support for BigInt types by @youngar in #5385
• [FIRRTL] Add v2.4.0 Radix-specified Integer Literals by @seldridge in #5380
• [FIRRTL] Support const "source" in forces, insert refcast as needed. by @dtzSiFive in #5388
• [FIRRTL][FIRParser] Support define of non-identical refs via ref.cast. by @dtzSiFive in #5389
• [Seq] Add clock gate conversion to extern module by @fabianschuiki in #5364
• [FIRRTL] Add BigIntConstantOp by @youngar in #5397
• [FIRParser] Support BigInt constants by @youngar in #5398
• [FIRRTL] Remove getBaseTypeOrNull by @youngar in #5393
• [OM] Simplify the Python instantiate API to just return Objects. by @mikeurbach in #5400
• [FIRRTL][InferWidths] Fix back-prop, fix ref equality, fix upper bound. by @dtzSiFive in #5403
• [FIRRTL] Use preferred cast style, NFC by @uenoku in #5401
• [FIRRTL] Initial pass to extract OM classes from FIRRTL modules. by @mikeurbach in #5394
• [FIRRTL] Introduce a helper ODS class for type declaration, NFC by @uenoku in #5399
• [HW] Fix type casts for nested type alias by @uenoku in #5339
• [FIRRTL] Replace deprecated casts in tablegen, NFC by @uenoku in #5406
• [FIRRTL][InferWidths] Restore back-prop constraint for strictconnect. by @dtzSiFive in #5409
• [FIRRTL] Delete CheckCombCycles, remove -use-old-check-comb-cycles. by @dtzSiFive in #5410
• [OM] Get the field names from an Object by @prithayan in #5402

New Contributors

• @linuxlonelyeagle made their first contribution in #5341

Full Changelog: firtool-1.43.0...firtool-1.44.0

Firtool Release 1.37.1

What's Changed

• Backport IMDCE improvements into firtool 1.37 by @uenoku in #5318
• [ModuleInliner][BugFix] Correctly update NLA after recursive inline (… by @uenoku in #5330

Full Changelog: firtool-1.37.0...firtool-1.37.1